A Low-Complexity ADC Calibration Method and System

Abstract

The present invention relates to the technical field of ADC calibration, and specifically discloses a low-complexity ADC calibration method and system, which constructs an ADC calibration model (VICNN). VICNN includes a convolutional network and a fully connected network; the convolutional network includes the first to the P convolution branches, which are respectively used to convolve the input ADC digital sampling values with first-order to P -order Volterra convolution kernels to obtain P error features, P ≥3; the fully connected network is used to integrate the P error features to obtain the total error feature. The VICNN constructed by the present invention efficiently extracts the inherent non-linear features of the ADC digital sampling values with a simplified structure, while significantly avoiding the problem of directly solving the Volterra kernel, achieving accurate non-linear representation and adaptive learning across different orders, realizing ADC calibration performance comparable to existing neural network-based methods, and significantly reducing the computational complexity.

Description

Technical Field

[0001] The present invention relates to the technical field of ADC calibration, and particularly to a low-complexity ADC calibration method and system. Background Art

[0002] High-speed analog-to-digital converters (ADCs) are key components in various applications such as radar communication, precision instruments, and automotive electronics. However, they are vulnerable to various errors caused by process, voltage, and temperature (PVT) fluctuations, which severely degrade their performance. To this end, numerous calibration methods have been proposed in the past few decades. Despite some progress, there are still significant limitations: most traditional calibration techniques are only effective for specific error types and certain ADC architectures.

[0003] Due to their powerful non-linear modeling capabilities, traditional neural networks have shown significant potential in high-speed analog-to-digital converter (ADC) calibration, capable of modeling various errors. Specifically, an additive neural network has been developed to correct amplitude- and phase-related errors in pipelined ADCs and time-interleaved ADCs (TIADCs). A vector recovery mapping neural network has been introduced to address single-channel errors and inter-channel mismatches in time-interleaved ADCs. A neural network has been proposed that can effectively correct errors and minimize harmonic distortion and spurs in pipelined ADCs and time-interleaved ADCs. In fact, due to the various frequency-related errors inherent in ADCs themselves, these conventional neural networks often require a large number of parameters to achieve acceptable calibration performance. For example, for a 12-bit, 3000 mega-samples-per-second time-interleaved ADC, the calibration performance of a convolutional neural network (CNN) gradually improves as convolutional layers are continuously stacked, but once the number of parameters exceeds 8100, its performance reaches a peak and then decreases. Similarly, by increasing the number of nodes in a three-layer fully-connected neural network (FCNN), its calibration performance steadily improves until it reaches a saturation state. These observations indicate that simply increasing the capacity of a neural network may lead to underfitting and significantly increase the computational complexity (including the number of parameters and the number of floating-point operations per second), which limits their operation on resource-constrained devices. Summary of the Invention

[0004] The present invention provides a low-complexity ADC calibration method and system, and the technical problem to be solved is that the existing neural-network-based ADC calibration methods use a large number of parameters and have high computational requirements.

[0005] To solve the above technical problems, the present invention provides a low-complexity ADC calibration method, including the steps of:

[0006] Construct a training set and a test set for ADC calibration;

[0007] Construct an ADC calibration model, where the ADC calibration model includes a convolutional network and a fully connected network; the convolutional network includes a first convolutional branch, a second convolutional branch to the P th convolutional branch, which are respectively used to convolve the input ADC digital sampling values with a first-order Volterra convolutional kernel, a second-order Volterra convolutional kernel to the P th-order Volterra convolutional kernel to obtain P error features, P ≥3; the fully connected network is used to integrate the P error features to obtain the total error feature;

[0008] Subtract the total error feature from the input ADC digital sampling value to obtain the calibrated ADC digital sampling value for output;

[0009] Use the training set to train the ADC calibration model and use the test set to test the trained ADC calibration model;

[0010] Use the ADC calibration model after testing to calibrate the ADC digital sampling value to be calibrated and output the calibrated ADC digital sampling value.

[0011] Furthermore, the first-order Volterra convolutional kernel to the P th-order Volterra convolutional kernel respectively model the first-order nonlinear error to the P th-order nonlinear error of the ADC digital sampling value.

[0012] Furthermore, each convolutional branch uses multi-channel input, and the convolution result of each convolutional branch is modeled as the concatenation of the convolution results of all channels of that convolutional branch.

[0013] Furthermore, the convolution result of the p th convolutional branch of the c th channel is calculated as , represents the p th-order Volterra convolutional kernel used by the p th convolutional branch, x (c) represents the input signal of the c th channel of that convolutional branch, p =1,2,…, P , c =1,2,…, C , C is the p number of channels of the

[0014] Further, all channels of the p convolution branches adopt the same number of p order Volterra convolution kernels. The number of p order Volterra convolution kernels adopted by each channel of the p convolution branch is matched with the memory depth of the p order Volterra kernels.

[0015] Further, the fully connected network integrates P error features to obtain the total error feature, specifically including:

[0016] Concatenate the P extracted error features into a single feature vector a( n )

[0017] Map the feature vector a( n ) to a high-dimensional space through the first fully connected layer, and apply a non-linear activation function for transformation here;

[0018] Perform weighted summation and combination operations on the transformed features through the second fully connected layer to obtain the total error feature.

[0019] Further, the size of the 1st order Volterra convolution kernel is the largest; the number of channels of the 1st to P convolution branches gradually increases.

[0020] Further, the loss function adopted during training is , h represents the parameters of each Volterra convolution kernel in the convolution network, w and b represent the weights and biases of the fully connected network respectively, D error = X - D gt represents the difference between the network input X and its true value D gt , D cali represents the output of the fully connected network, N represents the number of samples.

[0021] Further, construct a training set and a test set for ADC calibration, specifically including:

[0022] Use a multi-channel time-interleaved analog-to-digital converter to construct a simulation data set;

[0023] Use a parameter measurement method based on spectral information to construct true values and obtain a true dataset;

[0024] Construct a training set and a test set based on the simulation dataset and the true dataset.

[0025] The present invention also provides a low-complexity ADC calibration system, which applies the low-complexity ADC calibration method described above. The key lies in: including a dataset construction module, a model construction module, a model training and testing module, and a model application module;

[0026] The dataset construction module is used to construct a training set and a test set for ADC calibration;

[0027] The model construction module is used to construct an ADC calibration model;

[0028] The model training and testing module is used to train the ADC calibration model with the training set and test the trained ADC calibration model with the test set;

[0029] The model application module is used to calibrate the ADC digital sampling values to be calibrated with the ADC calibration model after testing and output the calibrated ADC digital sampling values.

[0030] A low-complexity ADC calibration method and system provided by the present invention constructs an ADC calibration model (VICNN). The ADC calibration model (VICNN) includes a convolutional network (CNN) and a fully connected network (FCNN); the convolutional network includes a first convolutional branch, a second convolutional branch to the P th convolutional branch, which are respectively used to convolve the input ADC digital sampling values with a first-order Volterra convolutional kernel, a second-order Volterra convolutional kernel to the P th-order Volterra convolutional kernel to obtain P error features, P ≥3; the fully connected network is used to integrate the P error features to obtain the total error feature. The VICNN constructed by the present invention efficiently extracts the inherent non-linear features of the ADC digital sampling values with a simplified structure, and at the same time significantly avoids the problem of directly solving the Volterra kernel. By fusing multi-order non-linear features through the fully connected network, the VICNN realizes accurate non-linear representation and adaptive learning across different orders, achieves ADC calibration performance comparable to existing neural network-based methods, and significantly reduces the computational complexity. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a schematic diagram of a low-complexity ADC calibration method and system provided by an embodiment of the present invention;

[0032] Figure 2 It is the graph of SFDR and SNDR results before ADC calibration provided by the embodiments of the present invention;

[0033] Figure 3 It is the graph of SFDR and SNDR results after ADC calibration provided by the embodiments of the present invention. Detailed implementation manners

[0034] The embodiments of the present invention will be specifically described below in conjunction with the accompanying drawings. The given embodiments are only for illustrative purposes and should not be construed as a limitation of the present invention. The accompanying drawings are only for reference and illustration and do not constitute a limitation on the scope of patent protection of the present invention, because many changes can be made to the present invention without departing from the spirit and scope of the present invention.

[0035] For a discrete-time input signal x ( n ) ( n indicating the current moment) (ADC digital sampling value), the general form of the Volterra series without the zero-order term can be expressed as:

[0036] ,

[0037] ,

[0038] y ( n ) represents x ( n )'s Volterra series, y p ( n ) represents p th-order Volterra series, P is the maximum non-linear order, h p ( k 1 , …, k p ) represents p th-order Volterra kernel, 2 L 1 +1, …, 2 L p +1 defines the memory depth of the 1st-order to p th-order Volterra kernels, k i represents p the sampling moment of the i th-order Volterra kernel in the

[0039] Without loss of generality, it is assumed that the Volterra kernel is symmetric, which can further simplify the representation of the nonlinear interaction. Based on this symmetry, p order Volterra kernel h p ( k 1 ,…, k p ) can be approximated as p the product of symmetric one-dimensional kernels:

[0040] ,

[0041] h p ( k i ) which represents the x ( n - k i ) order one-dimensional symmetric convolution kernel. p Based on the above decomposition,

[0042] the p order Volterra series y p ( n ) can be transformed into a p ( n ) as follows:

[0043] ,

[0044] Mathematically speaking, a p ( n ) is equivalent to convolving the input with p symmetric one-dimensional symmetric convolution kernels.

[0045] Based on the above theoretical analysis, an embodiment of the present invention provides a low-complexity ADC calibration method, as shown in the flowchart of Figure 1 , specifically including the steps:

[0046] Construct a training set and a test set for ADC calibration;

[0047] Construct an ADC calibration model (VICNN), where the ADC calibration model (VICNN) includes a convolutional network (CNN) and a fully connected network (FCNN); the convolutional network includes a first convolutional branch, a second convolutional branch to the P th convolutional branch, which are respectively used to adopt a first-order Volterra convolution kernel, a second-order Volterra convolution kernel to PPerform convolution with the nth-order Volterra convolution kernel to obtain P error features, P n≥3; The fully connected network is used to P integrate the error features to obtain the total error feature;

[0048] Subtract the total error feature from the input ADC digital sampling value to output the calibrated ADC digital sampling value;

[0049] Use the training set to train the ADC calibration model and use the test set to test the trained ADC calibration model;

[0050] Use the ADC calibration model that has completed testing to calibrate the ADC digital sampling value to be calibrated and output the calibrated ADC digital sampling value.

[0051] If each convolution branch uses a single-channel input, the convolution result of the p nth convolution branch a p ( n ) can be modeled as p the product of the nth-order one-dimensional symmetric convolution kernels:

[0052] ,

[0053] where f p represents the one-dimensional convolution kernel corresponding to the p nth-order Volterra kernel ( p nth-order Volterra convolution kernel), and * represents the convolution operation.

[0054] If each convolution branch uses a multi-channel input, the convolution result of the p nth convolution branch a p ( n ) can be modeled as:

[0055] ,

[0056] where represents the convolution kernel of the p nth convolution branch and the c mth channel, x (c) represents the input signal of channel c , C m is the number of input channels, and || represents the channel concatenation operation.

[0057] Since the high-speed analog-to-digital converter (ADC) exhibits weak nonlinear characteristics, the error components are mainly limited to the first-order, second-order, and third-order nonlinear features. Therefore, in this embodiment, the order of the one-dimensional convolution kernel is set to 3 (i.e., P = 3), and the convolutional network is correspondingly provided with a first convolutional branch, a second convolutional branch to a third convolutional branch to extract the error features of three orders of the input signal. As Figure 1 shown, if each convolutional branch has only one convolutional channel, each convolutional branch contains multiple one-dimensional convolution kernels that match the memory depth of the corresponding order, that is, the first convolutional branch, the second convolutional branch, and the third convolutional branch respectively have 2 L 1 + 1, 2 L 2 + 1, 2 L 3 + 1 one-dimensional convolution kernels.

[0058] To make full use of the representation ability of the Volterra series while avoiding exponential growth of memory, the network extracts error features through multiple convolutional channels for each order. While keeping the order and memory depth constant, more comprehensive representations of the first-order, second-order, and third-order potential error features can also be obtained by expanding the convolutional channels. As Figure 1 shown, the first convolutional branch, the second convolutional branch, and the third convolutional branch respectively have m 1 , m 2 , m 3 channels. Each channel of the first convolutional branch has 2 L 1 + 1 one-dimensional convolution kernels, and the 2 L 1 + 1 one-dimensional convolution kernels of the first channel are represented as , the 2 m 1 + 1 one-dimensional convolution kernels of the L 1 th channel are represented as , and so on. Similarly, the convolution kernel representations of each convolutional channel of the three convolutional branches can be obtained.

[0059] Regarding the convolution operation of each convolutional channel, taking the second-order memory depth of 2 L 2 + 1 = s as an example for illustration, the output of the first channel of the second convolutional branch is obtained by expanding the channel and expanding the quadratic expression , x 1 to xs Represents a discrete-time input signal x ( n )'s s discrete data, that is x ( n-L 2 ) to x ( n+ L 2 ). Similarly, the output of each convolutional channel of the three convolutional branches can be obtained.

[0060] Then, during the training process, the weights of the one-dimensional convolution are optimized through backpropagation to determine the parameters of the corresponding Volterra kernel h .

[0061] In a high-speed analog-to-digital converter (ADC), linear errors are usually more significant than higher-order non-linear errors. To balance accuracy and computational complexity, the size of the convolutional kernel is optimized: the size of the first-order convolutional kernel is set to 9 (which needs to be set as the maximum) to accurately extract the dominant linear error features, while the sizes of the second-order and third-order convolutional kernels are set to 7, which can not only simplify the network but also fully extract the non-linear error features. As the ADC bandwidth increases, the dynamic non-linear errors become more obvious, which requires a richer representation of higher-order errors. To solve this problem, in this embodiment, the convolutional channels are extended to enhance their representation ability, and the number of channels of the first convolutional branch to the P convolutional branch gradually increases. Taking Figure 1 as an example, in this example, the first convolutional branch is set with 8 channels, the second convolutional branch is set with 12 channels, and the third convolutional branch is set with 16 channels, so as to effectively extract complex error features.

[0062] The fully connected network integrates the P error features to obtain the total error feature, specifically including:[[]]

[0063] Concatenate the P extracted error features into a single feature vector a( n );

[0064] Map the feature vector a( n ) to a high-dimensional space through the first fully connected layer, and apply a non-linear activation function for transformation here;

[0065] Perform weighted summation and combination operations on the transformed features through the second fully connected layer to obtain the total error feature.

[0066] To fuse non-linear features of different orders, the fully connected network uses a splicing unit to splice the 1 extracted error feature to P error featuresa 1 ( n ) to a P ( n ) are concatenated into a single feature vector a( n ) to obtain the contributions of all orders:

[0067] ,

[0068] where the superscript T represents matrix transpose.

[0069] Although one-dimensional convolution performs well in extracting error features from the ADC, it is insufficient in effectively integrating these features for the calibration task. To overcome this limitation, the fully connected network uses a fully connected neural network (FCNN) to fuse the error features extracted by the three branches of one-dimensional convolution, thereby achieving effective ADC calibration. First, the error feature vector a( n ) is mapped to a high-dimensional space through the first fully connected layer, where a non-linear activation function is applied for transformation. Second, these features are adaptively fused through the second fully connected layer, which performs weighted summation and combination operations to finally obtain the integrated feature representation. The final output z of the fully connected network can be expressed as:

[0070] ,

[0071] where , W are the weight matrices of the first and second fully connected layers respectively, is the bias matrix of the first fully connected layer, b 1 is the bias term of the second fully connected network, F [ ] is a non-linear activation function.

[0072] Therefore, the fully connected neural network (FCNN) is designed as a two-layer fully connected network. The first fully connected layer serves as the input layer with 48 nodes, which is the minimum number of nodes used without sacrificing performance to achieve richer feature interactions. The second fully connected layer serves as the output layer with only one node, representing the final output. Each neuron in the FCNN processes the input signal through weighted summation and applies a non-linear activation function to generate its output. In addition, the FCNN effectively reduces the dimension of the physical features generated by the convolution operation.

[0073] Finally, the VICNN is trained through backpropagation to minimize the deviation between the output of the FCNN and the error (which is defined as the difference between the actual output of the analog-to-digital converter (ADC) and the true value), and the calibration result is finally obtained. The loss function in this embodiment adopts the MSE loss function, which is specifically expressed as:

[0074] ,

[0075] where, h represents the parameters of each Volterra convolution kernel in the convolutional network, w and b represent the weights and biases of the fully connected network respectively, D error = X - D gt represents the network input X and its true value D gt the difference between them, D cali represents the output of the fully connected network, N represents the number of samples.

[0076] Specifically, during the training process, by using the backpropagation algorithm, the optimal parameters h , w , b are obtained to minimize the loss, avoiding the complexity associated with directly determining the Volterra series parameters.

[0077] By using one-dimensional convolution operations to model the Volterra kernel, the VICNN efficiently extracts the inherent non-linear features of the ADC digital sampling values with a simplified structure, while significantly avoiding the problem of directly solving the Volterra kernel. By fusing multi-order non-linear features through a fully connected network, the VICNN achieves accurate non-linear representation and adaptive learning across different orders. These advantages make the VICNN a low-complexity and efficient non-linear modeling method with broad application potential in ADC calibration and other related fields.

[0078] Constructing a high-quality dataset is crucial for applying artificial intelligence algorithms, because the performance of the neural network and parameter tuning are directly affected by the quality of the training dataset. In this embodiment, a training set and a test set for ADC calibration are constructed, specifically including:

[0079] Using a multi-channel time-interleaved analog-to-digital converter to construct a simulation dataset;

[0080] Using a parameter measurement method based on spectral information to construct the true value to obtain a true dataset;

[0081] Construct a training set and a test set based on the simulation dataset and the real dataset.

[0082] In this embodiment, a simulation dataset is first constructed using a 14-bit, 4000MS / s, 4-channel time-interleaved analog-to-digital converter (TIADC) model. Specifically, the timing mismatch, gain, and offset of each channel are specifically set. The timing mismatch of each channel is [0.16%T S , -0.21%T S , 0.04%T S , -0.43%T S , where T S is the sampling period of the TIADC. The gain of each channel is [1.003, 1.002, 0.999, 0.995]. And the offset of each channel is [0.1mV, 2mV, -5mV, -1mV]. This embodiment collects and labels 1430 groups of data to construct the dataset, where the input frequency is evenly distributed across the entire Nyquist sampling rate spectrum, and this is used as the training set and test set of the VICNN.

[0083] Generally speaking, the true value can be obtained from the simulation model of the analog-to-digital converter (ADC), but its practical application faces significant limitations. Some neural network calibration methods use a low-speed and high-precision reference channel ADC to obtain ideal data, which introduces unnecessary analog circuits. The method of directly fitting the discrete sampled values output by the ADC in the time domain is vulnerable to outliers. When abnormal errors occur in the ADC, they will seriously affect the fitting result. In the frequency domain, it is easier to identify and filter out noise, reduce its interference, and then be able to extract a pure ideal signal. Therefore, this embodiment adopts a parameter measurement method based on spectral information to construct the true value. It should be noted that traditional Fourier analysis is affected by spectral leakage and the fence effect. This embodiment uses a fourth-order five-term Nuttall window function for windowed Fourier transform to mitigate spectral leakage, and applies a three-line spectral interpolation algorithm to offset the fence effect. Then, the ideal amplitude, frequency, and phase of the input signal are estimated. Since the gain error affects the amplitude, this embodiment uses statistical methods to optimize the estimated amplitude and reconstruct the ideal input signal based on the optimized parameters.

[0084] Figure 2 、 Figure 3 are the SFDR (spurious-free dynamic range) and SNDR (signal-to-noise and distortion ratio) result graphs before and after ADC calibration respectively. As Figure 2 and Figure 3As shown, the SFDR and SNDR of the VICNN model are improved from 50.61 dB and 45.43 dB to 84.13 dB and 65.12 dB respectively. And this method only contains 2.73 thousand parameters and 21.55 million floating-point operations.

[0085] The experimental results show that this method achieves ADC calibration performance comparable to existing neural network-based methods and significantly reduces the computational complexity.

[0086] Based on the above method, an embodiment of the present invention further provides a low-complexity ADC calibration system, which includes a dataset construction module, a model construction module, a model training and testing module, and a model application module;

[0087] The dataset construction module is used to construct a training set and a test set for ADC calibration;

[0088] The model construction module is used to construct an ADC calibration model;

[0089] The model training and testing module is used to train the ADC calibration model with the training set and test the trained ADC calibration model with the test set;

[0090] The model application module is used to calibrate the ADC digital sampling values to be calibrated with the ADC calibration model after testing and output the calibrated ADC digital sampling values.

[0091] The systems and methods described in this embodiment can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems on a chip (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include: implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a dedicated or general-purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit the data and instructions to the storage system, the at least one input device, and the at least one output device.

[0092] A computer program for implementing the method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing devices, such that when the computer programs are executed by the processor, the functions / operations specified in the flowchart and / or block diagram are implemented. The computer programs can be executed entirely on a machine, partially on a machine, executed partially on a machine and partially on a remote machine as an independent software package, or executed entirely on a remote machine or server.

[0093] In summary, a low-complexity ADC calibration method and system provided by an embodiment of the present invention constructs an ADC calibration model (VICNN). The ADC calibration model (VICNN) includes a convolutional network (CNN) and a fully connected network (FCNN). The convolutional network includes a first convolutional branch, a second convolutional branch to the P th convolutional branch, which are respectively used to perform convolution on the input ADC digital sampling values using a first-order Volterra convolution kernel, a second-order Volterra convolution kernel to the P th-order Volterra convolution kernel to obtain P error features, P ≥3; the fully connected network is used to integrate the P error features to obtain the total error feature. The VICNN constructed by the present invention efficiently extracts the inherent nonlinear features of the ADC digital sampling values with a simplified structure, and at the same time significantly avoids the problem of directly solving the Volterra kernel. By fusing multi-order nonlinear features through the fully connected network, the VICNN realizes accurate nonlinear representation and adaptive learning across different orders, achieves ADC calibration performance comparable to existing neural network-based methods, and significantly reduces the computational complexity.

[0094] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited by the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications made without departing from the spirit and principle of the present invention shall be equivalent replacement methods and are all included in the protection scope of the present invention.

Claims

1. A low-complexity ADC calibration method, characterized in that: Includes steps: Construct training and test sets for ADC calibration; Construct an ADC calibration model, wherein the ADC calibration model includes a convolutional network and a fully connected network; the convolutional network includes a first convolutional branch, a second convolutional branch to a P The convolution branch is used to apply the first-order Volterra convolution kernel and the second-order Volterra convolution kernel to the input ADC digital sampling value. P Convolution is performed with a Volterra convolution kernel of order , and we get P The error characteristics, P ≥3; the fully connected network is used for P The error characteristics are integrated to obtain the total error characteristics; First-order Volterra convolution kernel to P The first-order nonlinear error of the ADC digital sampling value is modeled by the Volterra convolution kernel of order P Order nonlinear error; each convolution branch uses multi-channel input, and the convolution result of each convolution branch is modeled as the concatenation of the convolution results of all channels of the convolution branch; No. p The convolution branch c The convolution result of channels is calculated as , Indicates p The convolution branch uses p The Volterra convolution kernel of order, x (c) Represents the convolution branch c The input signal of each channel, p =1,2,…, P , c =1,2,…, C , C It is p The number of channels of the convolution branch; p All channels of the convolutional branches use the same number of p The Volterra convolution kernel is p The convolution branch uses p The number of Volterra convolution kernels is related to p The memory depth of the first-order Volterra kernel matches; The size of the first-order Volterra convolution kernel is the largest; the first convolution branch to the P The number of channels of the convolution branch gradually increases; Subtracting the total error characteristic from the input ADC digital sampling value to obtain a calibrated ADC digital sampling value for output; The ADC calibration model is trained using the training set and the trained ADC calibration model is tested using the test set; during the training process, the optimal parameters of each Volterra convolution kernel are obtained; The ADC digital sampling value to be calibrated is calibrated using the tested ADC calibration model, and the calibrated ADC digital sampling value is output.

2. A low-complexity ADC calibration method according to claim 1, characterized in that: The fully connected network P The error characteristics are integrated to obtain the total error characteristics, which include: The extracted P error features are concatenated into a single feature vector a( n ); Through the first fully connected layer, the feature vector a( n ) is mapped to a high-dimensional space; The transformed features are passed through the second fully connected layer to perform weighted summation and combination operations to obtain the total error features.

3. The low-complexity ADC calibration method according to claim 1, characterized in that: The loss function used in the training process is , h represents the parameters of each Volterra convolution kernel in the convolutional network, w and b Respectively represent the weight and bias of the fully connected network, D error = X - D gt Represents network input X Its true value D gt The difference between D cali represents the output of the fully connected network, N Indicates the sample size.

4. The low-complexity ADC calibration method according to claim 1, characterized in that: Construct training and test sets for ADC calibration, including: A simulation data set was constructed using a multi-channel time-interleaved analog-to-digital converter; Use the parameter measurement method based on spectrum information to construct the true value and obtain the real data set; A training set and a test set are constructed based on the simulation data set and the real data set.

5. A low-complexity ADC calibration system, applying the low-complexity ADC calibration method according to any one of claims 1 to 4, characterized in that: The system includes a data set construction module, a model construction module, a model training and testing module, and a model application module; The data set construction module is used to construct a training set and a test set for ADC calibration; The model building module is used to build an ADC calibration model; The model training and testing module is used to train the ADC calibration model using the training set and to test the trained ADC calibration model using the test set; The model application module is used to calibrate the ADC digital sampling values ​​to be calibrated by using the tested ADC calibration model, and output the calibrated ADC digital sampling values.

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