A communication system
By introducing an analog interface signal processing module to the communication system for digital predistortion processing, the contradiction between signal linearity and system efficiency in the prior art is solved, and higher amplifier power, efficiency and bandwidth are achieved, while reducing equipment costs.
Patent Information
- Application Number
- CN202510274572.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2024-06-25
- Filing Date
- 2025-03-10
- Publication Date
- 2025-06-13
- Estimated Expiration
- 2045-03-10
AI Technical Summary
While existing communication systems improve transmission power, efficiency and bandwidth, it is difficult to maintain the linearity of signals, resulting in reduced system efficiency and increased cost.
An analog interface signal processing module is adopted to perform digital predistortion processing on the analog signal between the baseband module and the radio frequency module through the signal processing device to generate a second analog signal with digital predistortion information, thereby optimizing radio frequency performance.
While maintaining signal quality, the power, efficiency and bandwidth of the amplifier are improved, equipment costs are reduced, and the adaptability of high-performance predistortion methods in RF systems is enhanced.
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Figure CN119788100B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of communications, and particularly to a communication system. Background Art
[0002] The development of communication systems has always been limited by the materials and process levels of components, facing the mutually exclusive contradiction among transmit bandwidth, transmit power, signal linearity, and system efficiency. Increasing the transmit power may lead to signal distortion or poor linearity, while pursuing signal linear distortion-free may reduce system efficiency and increase the heat dissipation burden.
[0003] Figures 1 to 3 It is a schematic diagram of the transmit part of an existing communication system. In a general communication system, there are two parts: transmit and receive, and each part may have multiple channels working simultaneously or non-simultaneously.
[0004] A radio frequency power amplifier (RF power amplifier or PA) is used to amplify a small radio frequency signal to increase the transmit distance. Limited by materials, the design of the RF power amplifier needs to make trade-offs among important indicators such as output power, linearity, efficiency, and output bandwidth.
[0005] In order to mitigate or eliminate non-linear problems such as those brought by power amplifiers, current RF enhancement technologies mainly occur in the digital intermediate frequency position or the baseband chip. However, this solution has a high usage threshold and a fixed system structure, which limits the application of RF enhancement functions in the terminal field and is only used in a small range in high-power base station equipment.
[0006] Such as Figure 1 and Figure 2 The systems in need FPGA in the baseband to support the implementation of digital signal processing functions to optimize RF performance, such as mitigating or eliminating non-linear effects brought by power amplifiers. In these two solutions, the digital signal processing module is located in the baseband chip / module and is usually implemented by FPGA. Since FPGA has a large area and high production cost, the system performance and cost will be affected by the performance of FPGA and the RF chip. And the system shown in Figure 3 requires the cooperation of FPGA in the baseband chip / module and the digital signal processing unit 310 in the high-integration RF chip / module 300 to achieve the purpose of optimizing RF performance. The performance of the digital signal processing unit 310 in the high-integration RF module 300 is limited and the adaptability is not strong, and it can only be used in limited application scenarios. The high-integration RF module 300 needs to cooperate with FPGA and needs to be connected by a high-speed digital interface, and the cost of this interface is relatively high, which will increase the overall product cost. Summary of the Invention
[0007] In view of the technical problems existing in the prior art, the present application proposes a communication system, including: a baseband module, a radio frequency module, and a radio frequency front-end module; and, an analog interface signal processing module coupled between the baseband module and the radio frequency module; the analog interface signal processing module is configured to at least receive a first analog signal from the baseband module; wherein, the analog interface signal processing module includes a signal processing device, and the signal processing device is configured to at least perform digital pre-distortion operation based on the first analog signal, so as to obtain a second analog signal with digital pre-distortion information.
[0008] Particularly, in the system, the analog interface signal processing module further includes a feedback channel, which is configured to receive a radio frequency feedback signal from the radio frequency front-end module, convert the radio frequency feedback signal into a third analog signal and provide it to the signal processing device.
[0009] Particularly, in the system, the signal processing device includes: a first switch configured to receive the first analog signal; a first analog-to-digital converter coupled to the first switch and configured to convert the first analog signal into a first digital signal; a core processor coupled to the first analog-to-digital converter and configured to process the first digital signal and output at least a second digital signal with digital pre-distortion information; a digital-to-analog converter coupled to the core processor and configured to convert the second digital signal into a second analog signal; a second switch coupled to the digital-to-analog converter and configured to output the second analog signal.
[0010] Particularly, in the system, the signal processing device further includes a second analog-to-digital converter coupled to the core processor and configured to receive the third analog signal and provide it to the core processor.
[0011] Particularly, in the system, the signal processing device obtains a second digital signal with digital pre-distortion information based on the first analog signal and the third analog signal.
[0012] Particularly, in the system, the analog interface signal processing module is further configured to receive multiple baseband analog signals and radio frequency feedback signals.
[0013] Specifically, in the described system, the feedback channel includes a feedback selection switch coupled to the RF front-end module and configured to select and output multiple RF feedback signals; a down-conversion sub-unit coupled between the feedback selection switch and the signal processing device and configured to perform a down-conversion operation on the RF feedback signal and provide a third analog signal generated after frequency conversion to the signal processing device; and a high-frequency clock sub-unit coupled to the down-conversion sub-unit and configured to generate a local oscillator signal required by the down-conversion sub-unit.
[0014] Specifically, in the described system, the RF front-end module includes a power amplifier unit and a coupler coupled to the power amplifier unit, and the coupler is configured to provide the RF signal output by the power amplifier to the RF module.
[0015] Specifically, in the described system, the system is a WiFi router, and the analog interface signal processing module further includes a plurality of transmit / receive switching switches configured to select whether to pass through the signal processing device in the analog interface signal processing device in the transmit or receive mode.
[0016] Specifically, in the described system, the system is a base station, and the base station further includes an intermediate frequency processing module coupled between the baseband module and the analog interface signal processing module.
[0017] Specifically, in any of the previous communication systems, the communication system is a drone, a mobile phone, a walkie-talkie, a car, a satellite, or a wireless camera.
[0018] The solution proposed in this application can weaken or eliminate the non-linear problem of the signal generated by the power amplifier. On the premise of the same signal quality, the power, efficiency, and bandwidth that the power amplifier can achieve are further improved, and the cost of the device is reduced. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Next, the preferred embodiments of this application will be further described in detail with reference to the drawings, where:
[0020] Figures 1 to 3 It is a schematic diagram of the transmitting part of the existing communication system;
[0021] Figure 4 It shows a schematic diagram of some modules of a communication system according to an embodiment of this application
[0022] Figure 5 It shows a schematic diagram of the modules of an analog interface signal processing module according to an embodiment of this application;
[0023] Figure 6 It shows a schematic diagram of the modules of a signal processing device according to an embodiment of this application;
[0024] Figure 7 Shown is a schematic diagram of the modules of an existing base station;
[0025] Figure 8 Shown is a schematic diagram of the modules of another existing base station;
[0026] Figure 9 Shown is a schematic diagram of the modules of a base station according to an embodiment of the present application;
[0027] Figure 10 Shown is a schematic diagram of some modules of an existing WiFi router;
[0028] Figure 11 Shown is a schematic diagram of some modules of a WiFi router according to an embodiment of the present application;
[0029] Figure 12 Shown is a schematic diagram of some modules of a WiFi router according to another embodiment of the present application. Detailed implementation manners
[0030] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without making creative efforts shall fall within the scope of protection of the present application.
[0031] In the following detailed description, reference may be made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments in which the application may be practiced. In the drawings, like reference numerals describe substantially similar components in different figures. The various specific embodiments of the present application have been described in sufficient detail below to enable those of ordinary skill in the art with relevant knowledge and technology to implement the technical solutions of the present application. It should be understood that other embodiments may be utilized or structural, logical or electrical changes may be made to the embodiments of the present application.
[0032] Technologies, methods and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods and devices should be regarded as a part of the description. For the connections between the units in the drawings, it is only for the convenience of description, which indicates that at least the units at both ends of the connection communicate with each other, and it is not intended to limit that the units not connected cannot communicate. In addition, the number of lines between two units is intended to represent at least the number of signals involved in the communication between the two units or at least the number of output terminals, and is not used to limit that the two units can only communicate with the signals shown in the figure.
[0033] In the existing solutions, it is through Figure 1 or Figure 2 the digital signal processing unit 120 or 220 in Figure 3 or the digital signal processing unit 310 in
[0034] to compensate the digital signal, attempting to solve problems such as the linearity of the signal. Moreover, it is necessary to match peripheral devices such as ADC and DAC and the corresponding clock circuit, making the system design face challenges in aspects such as interface and electrical characteristic matching, and at the same time, it will further increase the cost, area, and power consumption of this system. In addition, the signal processing algorithm is not targeted enough and cannot process the signal according to the usage scenario and signal quality, etc. Currently, there are some applications or devices that do not have such a digital signal processing module, such as a WiFi router. Or, due to cost considerations, for some device manufacturers such as base station manufacturers, the current expectation or trend is to provide base station equipment that does not include a digital processing module or only includes a digital processing module with basic functions. Such a situation leads to either reducing the power amplifier efficiency of the communication system or sacrificing high cost for signal linearity performance. However, more expectations are to be able to achieve an optimal efficiency while improving the linearity with a lower cost and a better design solution.
[0035] The communication system proposed in this application uses an analog interface signal processing module with pre-distortion processing ability to pre-compensate the radio frequency signal, making the radio frequency signal have good linearity, improving the performance of the communication system, and greatly increasing the adaptability of high-performance pre-distortion methods in the radio frequency system, reducing the development complexity and application cost of applying high-performance pre-distortion methods.
[0036] Figure 4 Shown is a schematic diagram of some modules of a communication system according to an embodiment of this application. Among them, the system may include a baseband module 41, a radio frequency module 43 supporting multiple frequency bands, and a radio frequency front end 44 supporting multiple frequency bands. The radio frequency module 43 and the radio frequency front end module 44 may be integrated or discrete.
[0037] According to one embodiment, the radio frequency front-end module 44 may include a power amplifier unit 441, which is coupled to the radio frequency module 43 and configured to transmit radio frequency signals outward. The radio frequency front-end module 44 may further include a coupler coupled to the power amplifier 441. The coupler is configured to receive the radio frequency signal output by the power amplifier and feedback it to the analog interface signal processing module 42.
[0038] According to one embodiment, an analog interface signal processing module 42 may also be coupled between the baseband module 41 and the radio frequency module 43, and is configured to receive the baseband analog signal from the baseband module 41 and perform operations such as digital mirror correction, digital pre-distortion processing, and peak clipping processing on it, and output a baseband analog transmission signal with pre-distortion information.
[0039] According to one embodiment, the analog interface signal processing module 42 may also perform real-time tracking on the output signal of the power amplifier unit, so as to adjust the baseband analog transmission signal with digital pre-distortion information. Among them, the radio frequency feedback signal may be a radio frequency signal with non-linear information output by the power amplifier unit.
[0040] Figure 5 The figure shows a module schematic diagram of an analog interface signal processing module according to an embodiment of the present application. The analog interface signal processing module proposed in the present application can be used as an independent module and is located between the baseband module and the radio frequency module that communicate using analog signals and are separated from each other. This module has a high signal-to-noise ratio, low cost, and is suitable for application scenarios with high requirements for baseband noise and phase noise.
[0041] According to one embodiment, as shown in the figure, the analog interface signal processing module 50 may include a signal processing device 510.
[0042] According to one embodiment, the analog interface signal processing module 50 is configured to receive multiple baseband analog signals and radio frequency feedback signals, and use the signal processing device 510 to process the baseband analog signals and radio frequency feedback signals, and generate and output a baseband analog transmission signal with digital pre-distortion information.
[0043] According to one embodiment, the digital pre-distortion function in the signal processing device 510 needs to use the feedback signal to monitor the correction state in real time, which requires obtaining the radio frequency feedback signal carrying non-linear information.
[0044] According to one embodiment, the analog interface signal processing module 50 may further include a feedback channel, which may include a feedback selection switch 520, which may be coupled to a coupler in the RF front-end module, and its state may be to obtain the feedback RF signal. A down-conversion subunit 530, coupled to the feedback selection switch 520 and the high-frequency clock subunit 540, which may be configured to receive the RF feedback signal from the feedback selection switch 520; a high-frequency clock subunit 540, which may be configured to generate a local oscillator signal and provide it to the down-conversion subunit 530. The frequency of the local oscillator signal provided by the high-frequency clock subunit 540 is greater than or equal to the frequency of the RF signal. The down-conversion subunit 530 may also be coupled to the signal processing device 510. The down-converted RF feedback signal may be provided to the signal processing device 510 for iterative optimization.
[0045] According to one embodiment, the analog interface signal processing module 50 may further include a control unit (not shown), configured to control the feedback module switching and control each part in the analog interface signal processing module.
[0046] According to one embodiment, the analog interface signal processing module 50 supports multiplexing multiple RF feedback signals on one feedback channel. The feedback selection switch 520 selects the multiple RF feedback signals.
[0047] According to one embodiment, the analog-to-digital conversion input and digital-to-analog conversion output in the signal processing device 510 may be in single-ended, differential, quadrature IQ or non-orthogonal forms. The input of the down-conversion subunit 530 may be differential or single-ended input, and the input frequency may also be any frequency, as long as the high-frequency modulation signal at the input is reduced to the range that can be sampled by the signal processing device 510.
[0048] The analog interface signal processing module proposed in this application is independent of the baseband module and the RF module, eliminates the constraints and limitations brought by the FPGA, has higher processing performance and higher adaptability, and users can obtain better linearity without changing the original architecture.
[0049] Figure 6 The figure shows a module schematic diagram of a signal processing device according to an embodiment of the present application. In this application, "analog" refers to a relatively low-frequency signal, whose center frequency is near zero frequency; "RF" refers to a relatively high-frequency signal, whose center frequency is outside zero frequency, such as 900 MHz.
[0050] As shown in the figure, the signal processing device 60 may include: a switch 630, an analog-to-digital converter 640 coupled thereto, the output end of the analog-to-digital converter 640 is coupled to the input end of the core processor 650, the output end of the core processor 650 is coupled to the input end of the digital-to-analog converter 640', the output end of the digital-to-analog converter 640' is coupled to the switch 630', and the main control 610 is coupled or electrically connected to all other units.
[0051] According to one embodiment, one output end of the switch 630' is configured to provide the processed high-speed analog signal to the outside of the signal processing device 60.
[0052] According to one embodiment, the switch 630' may be coupled to the switch 630 to form a transceiver mode shared by the analog interfaces.
[0053] According to one embodiment, the switch 630 and the switch 630' may include high-efficiency and high-linearity switches.
[0054] According to other embodiments, in non-WiFi application scenarios, the signal processing device 60 may also not include the switch 630 and the switch 630'.
[0055] According to one embodiment, the main control 610 may be electrically connected to all other units and configure the initialization parameters and startup processes of other units, communicate with external control modules such as an external MCU, perform command and data interactions, and at the same time, may also monitor the working state of the signal processing device 60 and make abnormal recovery processing.
[0056] According to one embodiment, the switch 630 may serve as an intermediary for signal exchange inside and outside the signal processing device 60, and it may support two working modes. Mode A: Switch channels according to the instruction of the main control 610; Mode B: Switch channels according to the indication of an external pin. By controlling signal adaptation to switch the uplink and downlink circuits, it can support the selection of uplink and downlink signals in a time-division duplex (TDD) scenario, or can be constantly set to the TX or RX interval and used as a dedicated processing channel for the corresponding channel.
[0057] According to one embodiment, the signal processing device 60 may include uplink and downlink circuits / channels. When the signal processing device 60 is in the receive mode (RX), the switches 630 and 630' in the signal processing device are switched to the uplink mode to receive and transfer analog signals, for example, from a radio frequency module. When the signal processing device 60 is in the transmit mode (TX), the switches 630 and 630' in the signal processing device are switched to the downlink mode, and the downlink circuit / channel includes the switch 630, the analog-to-digital converter 640, the core processor 650, the digital-to-analog converter 640', and the switch 630'.
[0058] According to one embodiment, the analog-to-digital converter 640 or the digital-to-analog converter 640' can respectively adopt an ADC or DAC module with high precision and high sampling rate, which can support I_P / I_N / Q_P / Q_N; or I / Q single-ended; or single-channel and other conventional analog signal formats. The analog-to-digital converter 640 is configured to convert the corresponding analog signal into a digital signal. The digital-to-analog converter 640' is configured to convert the digital signal processed by the core processor 650 into an analog signal.
[0059] According to one embodiment, in the analog-to-digital converter 640, the analog bandwidth of the ADC needs to be greater than the signal bandwidth, and its sampling rate is greater than twice the signal bandwidth. For high-speed communication systems such as WiFi and base stations, generally the sampling rate of the ADC needs to be above 160 MHz. The accuracy of the ADC determines the upper limit of the signal-to-noise ratio SNR, which can vary according to different system index requirements. In addition, the indexes of the sampling rate and resolution need to be balanced with the system requirements. For example, when the solution of this application is applied to WiFi6, the sampling rate of the ADC can be 640 MHz, with a 12-bit resolution, and the analog bandwidth needs to be above 250 MHz.
[0060] According to one embodiment, the requirement for the DAC resolution in the digital-to-analog converter 640' is similar to the requirement for the ADC resolution in the analog-to-digital converter 640. For example, when the solution of this application is applied to WiFi6, the sampling rate of the DAC in the digital-to-analog converter 640' is at least 640 MHz, the resolution is 12 bits, and the DAC analog bandwidth is above 250 MHz.
[0061] According to one embodiment, the signal processing device 60 may further include an analog-to-digital converter 640", which may also include a high-precision and high-sampling-rate ADC. Its input end is configured to receive the frequency-converted RF feedback signal, and its output end is coupled to the input end of the core processor 650, thereby forming a feedback observation channel, which can collect the observation point data of the target, observe the external data in real time, and enable the signal processing device 60 to calculate the corresponding parameters. The feedback observation channel can greatly improve the tracking performance of the system, enabling the signal processing device 60 to process external scenarios such as rapid cooling, heating, impedance change, and power amplifier aging.
[0062] According to one embodiment, the core processor 650 can have functions such as quadrature error correction (QEC), digital pre-distortion (PD), clipping processing (CFR), digital filtering (FIR), signal rate conversion (Resample), and DC offset correction (DC-Offset EQ).
[0063] According to one embodiment, the CFR functional structure in the core processor 650 can be configured to perform clipping and peak suppression operations on the input signal. Among them, the input signal can be the digital signal from the analog-to-digital converter 640.
[0064] Clipping and Peak Reduction (CFR) technology is a method used to reduce signal peaks in order to improve the efficiency of power amplifiers (PAs) and reduce signal distortion. By monitoring the amplitude of the input signal, the peak part exceeding the set threshold is detected; the peak part exceeding the threshold is clipped to limit its amplitude to the set maximum value; filtering or other technologies are used to restore the signal quality and reduce the negative impact brought by clipping.
[0065] According to an embodiment, the EQ functional structure in the core processor 50 is mainly used to compensate for frequency response-related distortion and interference introduced in the channel, so as to restore the original signal. The purpose of the equalization filter is to reverse the influence of the channel on the signal.
[0066] According to an embodiment, the Quadrature Error Correction (QEC) function in the core processor 650 compensates for the IQ mirroring problem caused by the inconsistency of the IQ signal link. The IQ mirroring existing within the zero-IF signal bandwidth will have a great impact on the EVM performance of the entire system, and it is reduced below the system EVM index through quadrature error correction.
[0067] According to an embodiment, the predistortion functional structure in the core processor 650 is a function implemented in the digital domain, and its function is to introduce distortion opposite to the non-linear characteristics of the power amplifier. After the output signal of the signal processing device processed by PD passes through the power amplifier, it can exactly balance the distortion generated by the power amplifier, so that the signal output by the RF front-end module can be restored to linearity.
[0068] According to an embodiment, the FIR functional structure in the core processor 650 can provide an LPF filter with a stopband attenuation of <10Mhz> 40dBc in the transition band, and its performance is more than 10 times better than that of traditional analog LPFs.
[0069] Figure 7 The schematic diagram of the modules of an existing base station is shown. As can be seen from the figure, the FPGA processing unit 722 is responsible for processing the digital signals generated by the base station. The base station shown in the figure includes a baseband module 71, an intermediate frequency processing module 72, a radio frequency module 73, and a radio frequency front-end module 74. The intermediate frequency processing module 72 includes an FPGA processing unit 722 with signal processing capabilities. Since this solution needs to implement functions such as digital predistortion on the digital signals output by the baseband module 71, it has high requirements for the resources and performance of the FPGA processing unit 722, thus greatly increasing the system cost, system power consumption, and design cost.
[0070] Figure 8Shown is a schematic diagram of modules of another existing base station. As shown in the figure, the base station includes a baseband module 81, an intermediate frequency processing module 82, a highly integrated radio frequency module 83, and a radio frequency front-end module 84. The highly integrated radio frequency module 83 includes a digital signal processing unit 831, an up-conversion unit 832, and a down-conversion unit 833. As can be seen from the figure, the FPGA processing unit 822 and the digital signal processing unit 831 in the highly integrated radio frequency module 83 are jointly responsible for processing the digital signals generated by the base station. However, a high-speed digital interface must be used between the intermediate frequency processing module 82 and the highly integrated radio frequency module 83, and the cost of this interface is very high. Moreover, the signal processing ability of the highly integrated radio frequency module cannot be guaranteed.
[0071] Figure 9 Shown is a schematic diagram of modules of a base station according to an embodiment of the present application. While solving the performance of the base station, this embodiment does not need to change the architecture of the existing base station. As shown in the figure, the base station includes a baseband module 91, an intermediate frequency processing module 92 coupled to the baseband module 91, a radio frequency module 94, and a radio frequency front-end module 95 coupled to the radio frequency module 94. Among them, an analog interface signal processing module 93 is coupled between the intermediate frequency processing module 92 and the radio frequency module 94, and is configured to receive the baseband analog signal output by the intermediate frequency processing module 92. The analog interface signal processing module 93 includes the aforementioned signal processing device configured to process the signal output by the intermediate frequency processing module 92, such as predistortion processing, etc. The radio frequency module includes up and down conversion sub-units.
[0072] According to one embodiment, the intermediate frequency processing module 92 is configured to receive the baseband digital signal from the baseband module 91 and convert it into a baseband analog signal.
[0073] According to one embodiment, the power amplifier units 9510 to 951n in the radio frequency front-end module 95 are configured to receive radio frequency transmission signals. The radio frequency front-end module 95 further includes couplers 9520 to 952n coupled to the output ends of the power amplifier units 9510 to 951n, and is configured to receive the output signals of the power amplifier units 9510 to 951n.
[0074] According to one embodiment, the analog interface signal processing module 93 is configured to receive the baseband analog signal from the intermediate frequency processing module 92 and the radio frequency feedback signal with non-linear information output from the couplers 9520 to 952n in the radio frequency front-end module 95, and output a radio frequency transmission signal with predistortion information after performing, for example, predistortion processing. The analog interface signal processing module 93 in this embodiment can also be the aforementioned signal processing device 60 in the present application, and with the addition of a feedback selection switch, multiplex the original Figure 7 down-conversion structure of the radio frequency module 73 to implement the analog interface signal processing module. The input and output interfaces of the analog interface signal processing module can be orthogonal (IQ) differential or single-ended interfaces.
[0075] According to one embodiment, the radio frequency front-end module 95 can also feedback the radio frequency signal it outputs to the down-conversion structure in the radio frequency module, and then to the analog interface signal processing module for iteration and optimization.
[0076] Figure 10 The figure shows a schematic diagram of some modules of an existing WiFi router. As shown in the figure, the WiFi router includes a baseband module 101, a radio frequency module 102, and a radio frequency front-end module 103. Among them, the signals in each channel are at the same frequency.
[0077] The power amplifiers currently used in WiFi routers focus on linearity and output bandwidth while sacrificing efficiency and output power. In this way, in high modulation scenarios (1024QAM and 4096QAM), the output power cannot meet the requirements, resulting in problems such as insufficient coverage area and excessive heat generation under high throughput. Currently, WiFi chip solution providers provide some signal processing and power amplifier linearization functions. However, these functions are currently integrated inside the baseband module and have limited performance, and cannot meet the purpose of increasing the output power to significantly increase the coverage area under high throughput.
[0078] Figure 11 The figure shows a schematic diagram of some modules of a WiFi router according to an embodiment of the present application. As can be seen from the figure, an analog interface signal processing module 112 is coupled between the baseband module 111 and the radio frequency module 113. The radio frequency front-end module 114 is coupled to the radio frequency module 113.
[0079] According to one embodiment, both the input and output of the analog interface signal processing module 112 are analog signals (i.e., low-frequency signals), which can be differential or single-ended interfaces of quadrature (IQ).
[0080] According to one embodiment, the transmit-receive switches 11210 to 1121n and the transmit-receive switches 11250 to 1125n in the analog interface signal processing module 112 can be used to select whether to pass through other modules in the analog interface signal processing module 1120 in the transmit or receive mode. For example, in the receive scenario (upward mode), the transmit-receive switch 11250 directly outputs the output of the radio frequency module to the transmit-receive switch 11210; in the transmit scenario (downward mode), the transmit-receive switch 11210 provides the output signal of the baseband module to the signal processing device for processing, and then outputs it through the transmit-receive switch 11250.
[0081] According to one embodiment, the signal processing device 1122 in the analog interface signal processing module 112 (which may have the functions and structures introduced in the foregoing embodiments) can provide functions such as digital pre-distortion (DPD) processing of the power amplifier, frequency response equalizer (EQ), crest factor reduction (CFR), quadrature imbalance calibration (QE), local oscillator leakage calibration (LOL), filter, power statistics, and so on.
[0082] According to one embodiment, the signal processing device 1122 can support single-channel or multi-channel. According to one embodiment, the system supports N channels, where N is an integer greater than or equal to 1. Among them, the frequencies of the signals in different channels can be different.
[0083] According to one embodiment, if real-time tracking of the RF performance is required, a coupler 11430 to 1143n or a power splitter needs to be added to the output end of the power amplifier unit in the RF front-end module 114. The output ports of the couplers 11430 to 1143n are coupled to the feedback selection switch 1123 in the analog interface signal processing module 112 for selecting the feedback channel that the analog interface signal processing module currently needs to observe.
[0084] According to one embodiment, the output of the feedback selection switch 1123 is connected to the down-conversion sub-unit 1127 to convert the RF feedback signal to the baseband and provide it to the signal processing device 1122 for real-time observation of the RF transmission signal, calculation, and real-time adjustment of the baseband analog transmission signal of the analog interface signal processing module.
[0085] According to one embodiment, the down-conversion sub-unit 1127 requires the local oscillator signal provided by the high-frequency clock sub-unit 1126 for down-conversion. The high-frequency clock sub-unit 1126 needs to be synchronized with the reference clock of the RF module 113. The low-noise amplifiers 11420 to 1142n of the RF front-end module 114 are electrically connected to the receiving ports of the RF module 113.
[0086] According to one embodiment, if there are multiple high-frequency clock sub-units in the system, multiple clocks need to be selected by the clock switching switch before being given to the down-conversion sub-unit 1127 as the local oscillator input. The selection of the clock switching switch is related to the RF feedback signal to be monitored. The feedback channel can also include a clock switching switch that is coupled to multiple high-frequency clock sub-units and coupled to the down-conversion sub-unit 1127. The clock switching switch is configured to select the local oscillator signals generated by multiple high-frequency clock sub-units based on the RF feedback signal to be observed, and select the same high-frequency clock source as the current transmission link that needs to be monitored.
[0087] Figure 12The figure shows a schematic diagram of some modules of a WiFi router according to another embodiment of the present application. As can be seen from the figure, an analog interface signal processing module 122 is coupled between a baseband module 121 and a radio frequency module 123. The radio frequency module 123 is coupled to a radio frequency front-end module 124. The radio frequency front-end module 124 includes power amplifier units 12410 to 1241n, and couplers 12420 to 1242n coupled to the power amplifier units 12410 to 1241n. The outputs of the couplers 12420 to 1242n are used for calibration.
[0088] According to one embodiment, a signal processing device 1225 in the analog interface signal processing module 122 (which may have the functions and structures described in the foregoing embodiments) can provide functions such as digital pre-distortion (DPD) processing. According to one embodiment, the signal processing device 1225 can support single-channel or multi-channel.
[0089] According to one embodiment, the transmit / receive switches 12210 to 1221n and the transmit / receive switches 12250 to 1225n in the analog interface signal processing module 122 can be used to select whether to pass through other modules in the analog interface signal processing module 120 in the transmit or receive mode.
[0090] If real-time tracking of the quality of the radio frequency signal output by the power amplifier is not required, the Figure 12 shown architecture can be adopted. At this time, the output of the power amplifier will be used for coefficient calibration during factory production and the coefficients will be recorded in a non-volatile memory. Each time the device is powered on, relevant links and modules including couplers, power regulation, feedback selection switches, down-conversion of the feedback channel, high-frequency clock sub-units, etc. will be fed back. However, training needs to be carried out in advance and the coefficients need to be recorded in the non-volatile memory for the signal processing device 1225 to call each time it is powered on.
[0091] Using the analog interface signal processing module proposed in the present application, without changing the original WiFi router or base station framework, it can be directly applied between the baseband and radio frequency modules to compensate the radio frequency signal, so that the radio frequency signal output by the power amplifier has good linearity, improves the performance of the communication system, and reduces the requirements for the physical characteristics of devices such as power amplifiers.
[0092] The above embodiments are only for illustrating the present invention and are not intended to limit the present invention. Those of ordinary skill in the relevant technical fields can make various changes and modifications without departing from the scope of the present invention. Therefore, all equivalent technical solutions should also fall within the scope of the disclosure of the present invention.
Claims
1. A communication system, comprising: Baseband module, RF module, and RF front-end module; and, an analog interface signal processing module coupled between the baseband module and the radio frequency module; the analog interface signal processing module being configured to at least receive a first analog signal from the baseband module; in, The analog interface signal processing module includes a signal processing device, and the signal processing device is configured to perform a digital predistortion operation based on at least the first analog signal, thereby obtaining a second analog signal with digital predistortion information; The signal processing device includes: a first switch, configured to receive the first analog signal; a first analog-to-digital converter, coupled to the first switch, configured to convert the first analog signal into a first digital signal; a core processor, coupled to the first analog-to-digital converter, configured to process the first digital signal and output a second digital signal with at least digital predistortion information; a digital-to-analog converter, coupled to the core processor, configured to convert the second digital signal into a second analog signal; a second switch, coupled to the digital-to-analog converter, configured to output the second analog signal; wherein the second switch is also coupled to the first switch to jointly constitute an uplink channel.
2. The system according to claim 1, wherein: The analog interface signal processing module also includes a feedback channel, which is configured to receive a radio frequency feedback signal from the radio frequency front-end module, convert the radio frequency feedback signal into a third analog signal, and provide the third analog signal to the signal processing device.
3. The system according to claim 2, wherein: The signal processing device further includes a second analog-to-digital converter coupled to the core processor and configured to receive the third analog signal and provide the third analog signal to the core processor.
4. The system according to claim 3, wherein: The signal processing device obtains a second digital signal with digital predistortion information based on the first analog signal and the third analog signal.
5. The system according to claim 4, wherein: The analog interface signal processing module is also configured to receive multiple baseband analog signals and radio frequency feedback signals.
6. The system according to claim 5, wherein: The feedback channel includes: A feedback selection switch, coupled to the RF front-end module, configured to select and output multiple RF feedback signals; a down-conversion subunit, coupled between the feedback selection switch and the signal processing device, configured to perform a down-conversion operation on the RF feedback signal, and provide a third analog signal generated after the frequency conversion to the signal processing device; The high frequency clock subunit is coupled to the down conversion subunit and is configured to generate a local oscillator signal required by the down conversion subunit.
7. The system according to claim 6, wherein: The RF front-end module includes a power amplifier unit and a coupler coupled to the power amplifier unit, and the coupler is configured to provide the RF signal output by the power amplifier to the RF module.
8. The system according to claim 7, wherein: The system is a WiFi router, wherein the analog interface signal processing module further comprises a plurality of transmit / receive switching switches configured to select whether to pass through the signal processing device in the analog interface signal processing module in a transmit or receive mode.
9. The system according to claim 7, wherein: The system is a base station, and the base station further comprises an intermediate frequency processing module coupled between the baseband module and the analog interface signal processing module.
10. The communication system according to any one of claims 1-9, wherein the communication system is a drone, a mobile phone, a walkie-talkie, a car, a satellite, or a wireless camera.
Citation Information
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