Sketch measurement precision improvement method based on programmable switch virtualization register, electronic equipment and medium

Abstract

The invention discloses a Sketch measurement precision improvement method based on a programmable switch virtualization register, electronic equipment and a medium. The method comprises the following steps: acquiring a Sketch program; parameters required by register virtualization are set, wherein the parameters comprise the maximum influence threshold value theta on the bandwidth of the programmable switch during register virtualization, the number mu of register arrays needing to be used and the number ni of registers in each register array; according to a physical register of the programmable switch, the bandwidth of a data recycling channel and parameters required by register virtualization, whether a virtualization register is provided or not is judged; when the virtualization register needs to be provided and realized, determining the virtualization register; sketch data are input, and data storage or data updating is carried out on the Sketch data through the virtualization register; and the server periodically receives data push of the physical register of the programmable switch, monitors the virtualization register all the time, and fuses the data of the physical register and the data of the virtualization register to jointly recover the Sketch data.

Description

Technical Field

[0001] The present invention relates to the field of computer network technology, and in particular to a method for improving the Skech measurement accuracy based on a programmable switch virtualization register, an electronic device, and a medium. Background Art

[0002] In modern networks such as data centers and wide area networks, traffic measurement is the basis for network management applications such as traffic engineering and anomaly detection. Among the existing measurement technologies, Sketch has attracted much attention because it can accurately measure traffic with low resource consumption.

[0003] Sketch is a fast, low-overhead network measurement technology based on probabilistic algorithms. It uses fixed-size data structures and hash algorithms to compress network traffic information and retain key features, reducing storage and computing overhead while maintaining high measurement accuracy, thereby quickly capturing network traffic features and providing real-time measurement results.

[0004] Past practice has shown that Sketch accuracy can be significantly improved by using more registers to store Sketch data. The reason is that using more registers can reduce the probability of hash collisions when recording flows in Sketch. This rule applies to most sketches, and in theory, Sketch's higher accuracy is positively correlated with more registers.

[0005] However, programmable switches have severe limitations in register resources. Each switch uses a multi-stage pipeline to maintain its line-rate packet processing performance. Each stage provides limited computing resources and memory resources. These limitations result in each stage being able to retain only a small number of register arrays, with a maximum of 10 registers per array. 5 In addition, each switch has a limited number of stages.

[0006] Therefore, building Sketch faces two major limitations:

[0007] (1) The number of register arrays used by each Sketch is limited by the number of arrays in each stage and the number of stages;

[0008] (2) The number of registers per array should be lower than the capacity of each stage. These constraints determine the maximum memory budget allocated to each Sketch, thus limiting the accuracy of Sketch-based measurements. Summary of the invention

[0009] In view of the shortcomings of the prior art, the embodiments of the present invention provide a method for improving Sketch measurement accuracy based on a programmable switch virtualization register, an electronic device, and a medium.

[0010] In a first aspect, an embodiment of the present invention provides a Sketch measurement method based on a programmable switch virtualization register, the method comprising:

[0011] Get Sketch.

[0012] Set the parameters required for register virtualization, including: the maximum impact threshold θ on the bandwidth of the programmable switch when virtualizing registers, the number of register arrays m to be used u and the number of registers n in each register array i ;

[0013] Determine whether to provide and implement virtualized registers according to the physical registers of the programmable switch, the bandwidth of the data recycling channel, and the parameters required for register virtualization;

[0014] When it is necessary to provide and implement a virtualized register, determine the virtualized register; input Sketch data, and store or update the Sketch data through the virtualized register;

[0015] The server periodically receives data push from the physical registers of the programmable switch, and always monitors the virtualized registers. It also restores the Sketch data by fusing the data of the physical registers and the virtualized registers.

[0016] In a second aspect, an embodiment of the present invention provides an electronic device, comprising a memory and a processor, wherein the memory is coupled to the processor; wherein the memory is used to store program data, and the processor is used to execute the program data to implement the above-mentioned Sketch measurement method based on programmable switch virtualization registers.

[0017] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, and when the program is executed by a processor, the above-mentioned Sketch measurement method based on a programmable switch virtualization register is implemented.

[0018] In a fourth aspect, an embodiment of the present invention provides a computer program product, including a computer program / instruction, which implements the above-mentioned Sketch measurement method based on programmable switch virtualization register when executed by a processor.

[0019] Compared with the prior art, the present invention has the following beneficial effects:

[0020] The present invention provides a method for improving Sketch measurement accuracy based on programmable switch virtualized registers. Without affecting user programming too much, a register virtualization solution that can meet user needs is made according to hardware parameters such as the number of register arrays required by Sketch, the number of required registers, the number of physical register arrays of the programmable switch, and the bandwidth of the programmable switch data recycling channel. The accuracy of Sketch real-time network measurement is improved by increasing the number of registers available to users. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0022] Figure 1 is a schematic diagram of virtualized registers;

[0023] Figure 2 It is a flow chart of virtual register data preservation and recovery of the method of the present invention;

[0024] Figure 3 It is a structural diagram of the method of the present invention;

[0025] Figure 4 It is a work flow chart of the method of the present invention;

[0026] Figure 5 It is a schematic diagram of an electronic device. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0028] It should be noted that, in the absence of conflict, the features in the following embodiments and implementations may be combined with each other.

[0029] The present invention is structured as follows Figure 3 As shown, the present invention is a method for improving Sketch measurement accuracy based on programmable switch virtualized registers. The user uses the Phantom framework to program using the P4 language. Phantom runs programs on both the programmable switch and the server to achieve register recovery and Sketch data recovery.

[0030] The Phantom framework consists of three components:

[0031] Component 1: Sketch receiver. Users use the programmable switch on Phantom through the API provided by Phantom. The Sketch receiver is responsible for receiving the Sketch code implemented by the user in P4 language and the resource parameters allowed by the Phantom virtualization register, and submitting them to component 2 data plane processor.

[0032] Component 2: Data plane processor. The data plane processor is responsible for virtualization settings and implementation on the programmable switch, and communicates with the server processor to complete the recovery of register data for Sketch algorithm to use.

[0033] When a Sketch data packet is received, the data plane processor will use the data recycling channel of the programmable switch to virtualize the registers under the conditions specified by the user, and continuously circulate the operations of the virtual registers in the data recycling channel in the form of register update data packets to preserve them.

[0034] Component 3: Server processor. The server processor is located on the server directly connected to the programmable switch. It is responsible for collecting the update push of the physical register at the end of the cycle and monitoring the Sketch update data packets for the virtual registers sent by the data plane processor during the cycle. The server processor is also responsible for restoring and fusing the data of the physical registers and virtual registers to the complete Sketch data format for network measurement and analysis.

[0035] The mathematical symbols used in this example are shown in Table 1:

[0036] Table 1 Mathematical symbols used in this example

[0037]

[0038]

[0039] like Figure 4 As shown, an embodiment of the present invention provides a method for improving Sketch measurement accuracy based on a programmable switch virtualization register, and the method includes the following steps:

[0040] Step S1, obtaining the Sketch program.

[0041] Specifically, users use the register virtualization (Phantom) framework programming to implement Sketch, and use the P414 or P416 language to write Sketch programs. The writing method is the same as writing traditional Sketch programs. Only when defining registers, the API provided by Phantom is used to customize registers. The use of registers is the same as the P4 language standard. The machine code can be obtained and run through the P4C compiler and the back-end compiler provided by the manufacturer.

[0042] Step S2, setting the parameters required for register virtualization, including: the maximum impact threshold θ on the bandwidth of the programmable switch when virtualizing registers, the number of register arrays m to be used u and the number of registers n in each register array i .

[0043] Where m is the maximum value of the register array of a programmable switch. To calculate m, the following five factors need to be considered:

[0044] (1) Each stage of a programmable switch supports at most k register arrays, using N stage To represent all the inlet and outlet stages of the programmable switch, so m ≥ N stage ·k.

[0045] (2) m is limited by the bandwidth threshold θ. At runtime, each data packet is sent to each register array and hashed to a register before updating the register data. Therefore, for a Sketch with m arrays, mN stage The k array is a virtual array, and each data packet will generate mN stage k register updates, where the target of these updates is the virtual register. The packet size of each update is denoted by l. In this case, for the maximum possible traffic volume γ (in pps) and a measurement time of t seconds, there are at most γ·t packets and γ·t·(mN stage ·k) virtual register updates. In each cycle, the bandwidth consumed by the loop update should be less than θ, so the equation can be obtained: γ·t·(mN stage ·k)·l≤t·θ, the m restriction condition can be obtained by deduction:

[0046] (3)m is also limited by the memory threshold λ of the programmable switch traffic manager (TM). Specifically, the normal packet forwarding behavior of the programmable switch in the process of register virtualization using the data recycling channel will not be affected by exceeding the limit value. If the memory consumption of the TM by virtualization is greater than λ, the cyclic update will compete with the normal traffic for the TM buffer, resulting in packet loss. Assuming α is the maximum number of updates residing in the data recycling channel, the number of updates in each cycle is γ·t·(mN stage ·k), so the number of updates in the cache is γ·t·(mN stage ·k)-α, the virtualization consumption of TM memory should be less than λ, so l·(γ·t·(mN stage ·k)-α)≤λ, from the above formula we can deduce

[0047] (4) In each reporting cycle, the virtualized register update must be sent to the server before the end of the cycle to ensure the timeliness of the measurement. Assuming that ω is the bandwidth budget of the programmable switch and t is the length of a cycle, combined with the above text description, we can derive the formula: γ·t·(mN stage ·k)·l≤t·ω / l, after deformation, it becomes,

[0048] (5) m is limited by the maximum number of hash functions N in each programmable switch. hash , because each register array requires at least one hash function to calculate the index of the addressing target register, so we can get m≤N hash

[0049] In summary, the calculation formula for m can be obtained as follows:

[0050]

[0051] In the formula, each stage of the programmable switch supports at most k register arrays, N stage represents all the ingress and egress stages of the programmable switch; γ represents the maximum flow, t represents the measurement cycle length, l represents the length of each register update packet, ω represents the bandwidth budget of each programmable switch port, λ represents the maximum cache of the programmable switch traffic manager TM, α represents the maximum number of cycles of the Sketch update packet in the pipeline, and N hash Indicates the maximum number of hash functions in each programmable switch.

[0052] n i is the number of register arrays m given by the user uThe number of registers in each register array in order to calculate n i , the following three scenarios need to be considered:

[0053] (1) When m u = m, then the top N stage ·k registers are the physical register array, and the remaining m - N stage ·k is the virtual register array; for the physical register array, the maximum number of available registers is the number of registers allowed for each stage For the virtual register array, the maximum number of available registers is the maximum number that can be indexed by the hash function, that is The above text can be expressed by the following formula:

[0054]

[0055] (2) When N stage ·k ≤ m u < m, Sketch uses N stage ·k physical register arrays and m u - N stage ·k virtual register arrays, and it is stipulated that the first m - m u physical register arrays can use virtual registers, and the part exceeding the upper limit provided by the N stage ·k physical register arrays also uses virtual registers, which can be expressed by the formula:

[0056] (3) When 1 ≤ m u < N stage ·k, then only the physical register array is used without virtualizing the register array.

[0057] In summary, the calculation formula of n i can be summarized as:

[0058]

[0059] Step S3, determine whether to provide and implement virtual registers according to the physical registers of the programmable switch, the data recirculation channel bandwidth, and the parameters required for register virtualization.

[0060] Step S4, when it is necessary to provide and implement virtual registers, determine the virtual registers; input the Sketch data, and use the data recirculation channel of the programmable switch to save the update and operation of the newly arrived Sketch data on the virtual registers to achieve virtualization. Until it is necessary to restore the Sketch data or the link state meets the preset conditions, the data recirculation channel of the programmable switch sends the virtual register update packet to the server;

[0061] The process of determining the virtualized register includes:

[0062] The virtualization array strategy is determined by making a comprehensive judgment based on the number of available physical register arrays of the current programmable switch, the number of register arrays required by Sketch, the number of available registers in each register array, and the number of registers required by Sketch. i The number of required register arrays is greater than the number of physical register arrays (m i >N stage k), Phantom virtualizes the remaining m i -N stage k register array; if the number of registers required by the jth register array exceeds the number of physical registers Then, Phantom virtualizes the register array. Register. See the example Figure 1 .

[0063] Furthermore, the virtualized register abstracts the register function by implementing two functions, namely, simulation of data storage and simulation of Sketch operation.

[0064] The process of storing Sketch data through the virtualized register includes: continuously sending Sketch data to a data recycling channel of the programmable switch and continuously circulating the data, so that the data of the virtual register is stored in the programmable switch;

[0065] The process of updating Sketch data through virtualized registers includes:

[0066] When performing Sketch write-only operations, the Sketch updates are submitted to the server in order, and the server can identify the order of the data packets by timestamping the data packets in the data recycling channel;

[0067] When performing Sketch read-after-write operations, such as Figure 2 As shown, the register data is read first, and then the new data to be written can be calculated after comparing with the register data. By making the read-after-write operation an equivalent operation, and adjusting the read-after-write operation to a conditional write-only operation, the server can understand the Sketch update and then restore the Sketch data.

[0068] It should be noted that some operations of Sketch need to read register data first and then determine how to change the data. The data of the virtual register (stored in the switch in the form of data packets in the programmable switch data recycling channel) is not available before the server restores it. Therefore, this instance adopts fine-grained strategies to perform these operations.

[0069] Furthermore, virtualized registers strictly guarantee data recycling control, load control, and small update aggregation at runtime, including:

[0070] The virtualized register executes each arriving Sketch data, calculates the index, and then generates an update data packet (including write-only operation data packets and read-after-write data packets) based on the Sketch data, and finally sends the update data packet to the data recycling channel of the programmable switch.

[0071] Real-time detection of TM memory usage by virtualized registers, bandwidth usage by non-data recycling channels, etc.

[0072] The size of register updates is small (13 bytes) and programmable switches typically do not provide line rate guarantees for processing updates smaller than 64 bytes. Therefore, to prevent the loss of small updates, updates created for the same packet are aggregated into one large update. In this way, each recirculated update consists of multiple register updates and is larger than 100 bytes. Therefore, the programmable switch processes updates at line rate and aggregation does not affect the normal work flow of the programmable switch and the server.

[0073] Step S5, the server periodically receives data push from the physical register of the programmable switch, monitors the virtualized register all the time, and restores the Sketch data by fusing the data of the physical register and the virtualized register; including:

[0074] For physical registers, the programmable switch pushes register data to the server at the end of each cycle; for virtual registers, the server receives updates from the programmable switch and restores the data;

[0075] The server receives register updates from the programmable switch and maintains an identical copy of the register array; while a cycle is in progress, register updates are temporarily buffered in server-side memory and sorted based on timestamps;

[0076] When the cycle ends, the server processes the updates in ascending timestamp order; for each update, the server uses the update index to address the corresponding register in its replica; if the register uses write-only operation, the server directly updates the register data; if the register uses read-after-write operation, the server first reads the register data, then compares the data with the operand extracted from the update, based on the comparison result, the server calculates the new value to be written and performs the write operation; after processing all updates, the register data is restored.

[0077] Example 1

[0078] S1: This example implements virtualization (Phantom) on a 64×100Gbps Tofino programmable switch. First, this example builds a control plane agent on the front-end compiler P4C, which accepts Sketch written in P4. The agent converts Sketch into an intermediate representation (IR). Then, it automatically analyzes the IR to identify virtual registers and integrates the code of the switch handler into the IR to activate the virtual registers. It converts the IR into a configuration and loads it onto the switch through the back-end Tofino compiler.

[0079] S2: The data plane processor is implemented in this example P4. When a packet updates the virtual registers, the handler records these updates in the metadata. When the packet leaves Sketch, the data plane processor extracts the register updates from the metadata and performs subsequent processing. To configure the user-specified thresholds, the data plane executes the corresponding system commands in the switch operating system. For θ, the data plane processor calls the port management command to set up the loop transmission channel. For λ, the data plane processor calls the TM command to allocate sufficient buffer memory for the queue admission control of the data loop. For ω, the data plane processor calculates t in the switch operating system. i , and fill in setting t i to the rules of the ASIC pipeline.

[0080] S3: This example implements a server processor in C++ and uses the library provided by DPDK (Data Plane Development Kit) to implement its I / O driver. This example builds a test platform that includes a control plane and a data plane. On the control plane, this example runs a control plane agent on a server. The server is directly connected to the data plane devices and sends messages to them through remote procedure calls. On the data plane, this example connects a switch running a switch handler and three servers running server handlers through a 100Gbps link. This example also connects two servers to the switch. This example uses PktGen of the DPDK toolkit to build traffic generators and receivers in these servers. Each server is equipped with a 36-core Intel(R) Xeon(R) Gold 6240C CPU (2.60GHz) and 128GBRAM. This example uses the snake test method, which is an industry-standard performance evaluation method. For the switch running Phantom, its first port and The port is a traffic port, connected to two test servers (because The 2i-th port is the loopback port. The 2i-th port is connected to the (2i-1)-th port, where Then, this example sets each test server to inject 100Gbps of traffic into each traffic port, and the switch forwards traffic to another server through the connected normal port. In this case, the above snake structure enables all ports to receive and send traffic at the same time, thereby stress testing the switch performance.

[0081] S4: Programming using the Phantom framework to implement the Sketch structure. Unless otherwise specified, this example configures the two user-specified thresholds θ and ω as follows:

[0082] (1) In this example, θ is set to 100 Gbps, which is approximately 1 / 4 of the built-in cycle bandwidth ρ.

[0083] (2) This example sets λ to 5MB, which is a small fraction of the buffer memory in modern switches (e.g., Tofino and Tomahawk provide 64MB of buffer).

[0084] (3)ω is set equal toθ. For other target-specific parameters, such as N stage and N hash , this example sets their values ​​according to the specifications of the switch.

[0085] At the same time, this example sets the length t of each cycle to 1 millisecond.

[0086] This example implements five state-of-the-art Sketches, including count-min Sketch (CM), count Sketch (CS), elastic Sketch (ES)

[73] , FlowRadar (FR), and UnivMon (UM). CM, CS, and FR call write-only operations to operate their register arrays, while ES and UM call read-after-write operations. This example configures the corresponding parameters according to their classic usage.

[0087] S5: Based on the parameters set in step S4, Phantom determines the virtualization register strategy. This example demonstrates one of the situations. Figure 1 As shown in the figure: This situation covers the strategy mode of Phantom virtualization registers more comprehensively. Assume that the current Sketch user requires m u =4, and the current maximum number of physical register arrays in a programmable switch is 3. Therefore, in order to meet the number of register arrays required by users, Phantom uses physical register arrays as the first three register arrays, and the fourth register array is implemented by virtualization. In addition, users require that the number of registers in each register array is 16, and the maximum number of physical registers is 12. Therefore, Phantom uses physical registers for the first 12 registers of the physical register array, and virtual registers for the last 4 registers. For the fourth register array, since the entire array is a virtualized array, all registers are virtual registers. At T1, T2, T3, and T4, 4 Sketch data packets arrive respectively. The access indexes at T1 and T2 are all physical registers, so Phantom does not need to perform any operations, and can directly operate the physical register values ​​according to the requirements of the data packet. The data packet arriving at time point T3 requires a +1 operation on the fifteenth register of the third register array. Phantom recognizes that this is a write-only operation on the virtual register, so it creates a write-only Sketch update data packet with the content ((3,15),+1,T3), indicating that this is a request to perform a +1 operation on the fifteenth register of the third register array at time T3, and then sends the update data packet to the data recycling channel. The data packet arriving at time point T4 requires conditional judgment and modification on the eighth register of the fourth register array. Phantom recognizes that this is a read-after-write operation on the virtual register, so it creates a read-after-write Sketch update data packet with the content ((4,8),100,T4), indicating that this is a request to compare the eighth register data of the fourth register array with 100 at time T4. If the data is greater than 100, write 0, otherwise do nothing, and then Phantom sends the Sketch update data packet to the data recycling channel.

[0088] S6: The server processor recovers and merges the physical register and virtual register data obtained from the programmable switch. The server processor uses two methods to collect register data.

[0089] (1) For physical registers, the switch pushes register data to the handler at the end of each cycle.

[0090] (2) For virtual registers, the server processor receives updates from the switch and restores data. It supports user query and recovery of register data.

[0091] At runtime, the server processor receives register updates from the switch and maintains an identical copy of the register array. During a cycle, register updates are temporarily cached in the server-side memory and sorted by timestamp. When the cycle ends, the server processor processes these updates in ascending order of timestamp. For each update, it uses the updated index to access the corresponding register in its copy. If the register uses write-only operations, the server processor directly updates the register data. If the register uses read-after-write operations, it first performs a read of the register data. Then, the data is compared with the operand extracted from the update. Based on the comparison results, the server processor determines the new value to be written and forces the register to be written. After processing all updates, it restores the register data for that cycle. Register updates may appear out of order during the cycle or transmission process. However, this reordering does not affect the recovery because each update is accompanied by the timestamp when it was generated. The timestamp allows the handler to correctly process the updates and avoid errors. According to the S5 example, the update ((3,15),+1,T3) targets a write-only register, so the server processor increases the register data by 1. For update ((4,8),100,T4), the destination register supports read-after-write operations. Therefore, the server processor reads the latest register data, for example, 101. Next, it extracts the operand (100) from update ((4,8),100,T4) and compares the operand with the data. The data exceeds the operand, so the server processor overwrites the data to zero.

[0092] S7: The server provides APIs for network real-time measurement programs to query Sketch data.

[0093] In summary, the present invention first implements the storage of virtual registers in each switch by looping its register updates to keep its data within the switch. Secondly, in order to correctly perform the operation of the virtual registers without incurring high overhead, it transmits the register updates from the switch to the server, while using data looping to keep the overhead below the user-specified budget. With the support of the Phantom framework, the classic programmable switch Tofino can virtualize O(10 6 ) registers, resulting in up to 86% accuracy improvement for Sketch.

[0094] Accordingly, the present application also provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the Sketch measurement method based on the programmable switch virtualization register as described above. Figure 5 As shown, a hardware structure diagram of any device with data processing capability in which the Sketch measurement method based on programmable switch virtualization register provided by an embodiment of the present invention is located, except Figure 5 In addition to the processor, memory and network interface shown, any device with data processing capability in which the apparatus in the embodiment is located may also include other hardware, generally based on the actual functions of the device with data processing capability, which will not be described in detail.

[0095] Accordingly, the present application also provides a computer-readable storage medium on which computer instructions are stored, and when the instructions are executed by the processor, the Sketch measurement method based on the virtualized register of the programmable switch as described above is implemented. The computer-readable storage medium can be an internal storage unit of any device with data processing capability described in any of the foregoing embodiments, such as a hard disk or a memory. The computer-readable storage medium can also be an external storage device, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), an SD card, a flash card (Flash Card), etc. equipped on the device. Furthermore, the computer-readable storage medium can also include both an internal storage unit of any device with data processing capability and an external storage device. The computer-readable storage medium is used to store the computer program and other programs and data required by any device with data processing capability, and can also be used to temporarily store data that has been output or is to be output.

[0096] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A Sketch measurement method based on a programmable switch virtualization register, characterized in that: The method comprises: Get Sketch. Set the parameters required for register virtualization, including: the maximum impact threshold θ on the bandwidth of the programmable switch when virtualizing registers, the number of register arrays m to be used u and the number of registers n in each register array i ; Determine whether to provide and implement virtualized registers according to the physical registers of the programmable switch, the bandwidth of the data recycling channel, and the parameters required for register virtualization; When it is necessary to provide and implement a virtualized register, determine the virtualized register; input Sketch data, and store or update the Sketch data through the virtualized register; The server periodically receives data push from the physical registers of the programmable switch, and always monitors the virtualized registers. It also restores the Sketch data by fusing the data of the physical registers and the virtualized registers.

2. According to claim 1, a Sketch measurement method based on a programmable switch virtualization register is characterized in that: The process of calculating the maximum value m of the possible register array of a programmable switch includes: In the formula, each stage of the programmable switch supports at most k register arrays, N stage represents all the ingress and egress stages of the programmable switch; γ represents the maximum flow, t represents the measurement cycle length, l represents the length of each register update packet, ω represents the bandwidth budget of each programmable switch port, λ represents the maximum cache of the programmable switch traffic manager TM, α represents the maximum number of cycles of the Sketch update packet in the pipeline, and N hash Indicates the maximum number of hash functions in each programmable switch.

3. A Sketch measurement method based on a programmable switch virtualization register according to claim 1 or 2, characterized in that: The number of register arrays to be used is m u The number of registers in each register array n i The calculation process includes: Where m represents the maximum value of the register array of a programmable switch, N stage Represents all the ingress and egress stages of a programmable switch, Indicates the number of registers allowed in each stage of the programmable switch. Indicates the maximum number of indices that the hash function can index.

4. A Sketch measurement method based on a programmable switch virtualization register according to claim 1 or 3, characterized in that: The number of register arrays to be used is m u The number of registers in each register array n i The calculation process also includes: When m u =m, then N stage k registers are physical register arrays, and the remaining mN stage k is the virtual register array; for the physical register array, the maximum number of registers available is the number of registers allowed in each stage For the virtual register array, the maximum number of available registers is the maximum number that the hash function can index. When N stage ·k ≤ m u < m, then use N stage ·k physical register arrays and m u -N stage ·k virtual register arrays. For the first m - m u physical register arrays, virtual registers can be used. For the part that exceeds the upper limit provided by N stage ·k physical register arrays, virtual registers are also used; When 1≤m u <N stage When k is equal to 0, all physical register arrays are used without virtualizing the register array.

5. According to claim 1, a Sketch measurement method based on a programmable switch virtualization register is characterized in that: The process of determining virtualized registers includes: Determine the virtualization array strategy according to the number of available physical register arrays of the current programmable switch, the number of register arrays required by Sketch, the number of available registers in each register array, and the number of registers required by Sketch; If Sketch i The number of required register arrays is greater than the number of physical register arrays, m i >N stage k, then virtualize the remaining m i -N stage k register array; if the number of registers required by the jth register array exceeds the number of physical registers Then the virtual register array register.

6. The Sketch measurement method based on programmable switch virtualization register according to claim 1, characterized in that: The process of storing or updating Sketch data through virtualized registers include: The process of storing Sketch data through the virtualized register includes: continuously sending Sketch data to a data recycling channel of the programmable switch and continuously circulating the data, so that the data of the virtual register is stored in the programmable switch; The process of updating Sketch data through virtualized registers includes: When performing Sketch write-only operations, the Sketch updates are submitted to the server in order, and the server can identify the order of the data packets by timestamping the data packets in the data recycling channel; When executing a sketch read-after-write operation, the register data is read first, and the new data to be written can be calculated after comparison with the register data. However, the programmable switch cannot obtain real-time register data, so the read-after-write operation needs to be equivalently operated, thereby adjusting it to a write-only operation under a condition. The server can understand the sketch update through this condition and then restore the sketch data.

7. The Sketch measurement method based on programmable switch virtualization register according to claim 1, characterized in that: The server periodically receives data push from the physical register of the programmable switch, and monitors the virtualized register at all times. The process of fusing the data of the physical register and the virtualized register to jointly restore the Sketch data includes: For physical registers, the programmable switch pushes register data to the server at the end of each cycle; for virtual registers, the server receives updates from the programmable switch and restores the data in order; The server receives register updates from the programmable switch and maintains an identical copy of the register array; while a cycle is in progress, register updates are temporarily buffered in server-side memory and sorted based on timestamps; When the cycle ends, the server processes the updates in ascending timestamp order; for each update, the server uses the update index to address the corresponding register in its replica; if the register uses write-only operation, the server directly updates the register data; if the register uses read-after-write operation, the server first reads the register data, then compares the data with the operand extracted from the update, based on the comparison result, the server calculates the new value to be written and performs the write operation; after processing all updates, the register data is restored.

8. An electronic device, comprising a memory and a processor, characterized in that: The memory is coupled to the processor; wherein the memory is used to store program data, and the processor is used to execute the program data to implement the Sketch measurement method based on programmable switch virtualization register according to any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the Sketch measurement method based on a programmable switch virtualization register as described in any one of claims 1 to 7 is implemented.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the Sketch measurement method based on a programmable switch virtualization register described in any one of claims 1 to 7 is implemented.

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