Gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and preparation method thereof

Abstract

The invention discloses a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and a preparation method thereof. Comprising a back metal, a substrate, a gallium nitride device epitaxial layer, a gallium nitride device electrode drain, a gallium nitride device electrode gate, a gallium nitride device electrode source, a back through hole, a gallium arsenide epitaxial transition layer, a gallium arsenide device epitaxial layer, a gallium arsenide device electrode source, a gallium arsenide device electrode gate and a gallium arsenide device electrode drain. Gallium nitride and gallium arsenide epitaxial materials and the radio frequency device share a back metal and a substrate, and the gallium arsenide radio frequency device realizes monolithic heterogeneous integration in the horizontal direction in the mode that a groove is selected on a gallium nitride wafer of a heterogeneous substrate to epitaxially grow a gallium arsenide material and a gallium arsenide device is processed; according to the invention, gallium nitride and gallium arsenide radio frequency devices can have an extremely small space interval, the loss of long-distance transmission signals under high frequency and the influence of parasitic parameters are reduced, the chip area and the chip volume are reduced, and the packaging cost is reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor devices, in particular to a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and a preparation method thereof. Background Art

[0002] With the advent of the 5G era, communication systems have higher technical requirements such as reducing volume, increasing density, improving efficiency, reducing energy consumption, and reducing costs. In addition to continuing to improve indicators in terms of communication speed, capacity, latency, and spatial range, post-5G and 6G communication systems also need to solve important problems encountered in the current 5G communication system solutions, namely high cost and high power consumption. In the process of evolution from 4G to 5G and post-5G and 6G communication systems, communication systems need to process more and more frequency bands; in addition, with the widespread application of massive multiple-input multiple-output (MIMO) technology and carrier aggregation technology, communication base stations and terminal equipment need to integrate large-scale arrays consisting of multiple RF transceiver modules and antennas, resulting in a sharp increase in system cost and power consumption. Due to the significant decrease in the efficiency of RF front-end modules in high-frequency bands, the extension of communication carrier frequencies to millimeter wave bands has further aggravated the power consumption of base stations and terminal electronic equipment. High-density system integration can effectively reduce the high cost and high power consumption of 5G, post-5G, and 6G communication equipment.

[0003] As a third-generation semiconductor, GaN has excellent characteristics such as large bandgap, high electron mobility, high electron saturation velocity, etc. It has broad application potential in the fields of next-generation RF devices, power and electrical devices, etc. GaN-based devices have the advantages of high power and high efficiency at the transmitting end, while GaAs-based devices have the advantages of low noise and high gain at the receiving end. Therefore, if high-density micro-nano heterogeneous integration of GaN and GaAs microwave chips can be achieved, it will be of great significance to solve the problems of current communication systems. However, there are still many difficulties in terms of material compatibility, process compatibility, thermal compatibility and electromagnetic compatibility.

[0004] Based on this, the present invention proposes a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and a preparation method, providing technical personnel with a new thinking direction. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip and a preparation method thereof.

[0006] To achieve the above object, the present invention is implemented according to the following technical solutions:

[0007] One of the purposes of the present invention is to provide a laterally monolithic heterogeneous integrated radio frequency chip of gallium nitride and gallium arsenide, comprising a back metal, a substrate, a gallium nitride device epitaxial layer, a gallium nitride device electrode drain, a gallium nitride device electrode gate, a gallium nitride device electrode source, a back through hole, a gallium arsenide epitaxial transition layer, a gallium arsenide device epitaxial layer, a gallium arsenide device electrode source, a gallium arsenide device electrode gate, and a gallium arsenide device electrode drain; the gallium nitride and gallium arsenide epitaxial materials and radio frequency devices share the back metal and substrate, and the gallium arsenide radio frequency device realizes horizontal monolithic heterogeneous integration by epitaxially growing gallium arsenide materials by trenching in a selective area on a heterogeneous substrate gallium nitride wafer and processing gallium arsenide devices; the back metal is connected to the gallium nitride device electrode source and the gallium arsenide device electrode source through the back through hole; the gallium nitride device electrode gate and the gallium arsenide device electrode gate are interconnected by wires, and the gallium nitride device electrode drain and the gallium arsenide device electrode drain are interconnected by wires.

[0008] Furthermore, the substrate is made of silicon and has a thickness of 30-500 μm.

[0009] Further, the material of the epitaxial layer of the gallium nitride device is a compound formed by one or more of gallium nitride, aluminum nitride, and indium nitride; the epitaxial layer of the gallium nitride device comprises a nitride nucleation layer, a nitride transition layer, a nitride buffer layer, a nitride channel layer, and a nitride barrier layer from bottom to top; the material of the nitride nucleation layer is aluminum nitride with a thickness of 50-300nm; the material of the nitride transition layer is graded aluminum gallium nitride or aluminum nitride / aluminum gallium nitride superlattice , with a thickness of 500-1000nm; the material of the nitride buffer layer is gallium nitride, with a thickness of 100-1000nm; the material of the nitride channel layer is gallium nitride or indium gallium nitride or aluminum gallium nitride, with a thickness of 50-500nm; the material of the nitride barrier layer is aluminum gallium nitride or indium aluminum nitride, with a thickness of 5-30nm; a two-dimensional electron gas is formed between the nitride channel layer and the nitride barrier layer, which serves as a conductive channel of the gallium nitride radio frequency device.

[0010] Further, the material of the gallium arsenide epitaxial transition layer is a compound semiconductor formed by germanium or silicon and germanium, with a thickness of 50-500nm; the material of the gallium arsenide device epitaxial layer is a compound composed of one or more of gallium arsenide, indium arsenide, aluminum arsenide, and indium phosphide; the gallium arsenide device epitaxial layer includes an arsenide buffer layer, an arsenide channel layer, an arsenide isolation layer, an arsenide barrier layer, and an arsenide cap layer from bottom to top, and the material of the arsenide buffer layer is gallium arsenide, with a thickness of 50-1000nm; the material of the arsenide channel layer is gallium arsenide or indium gallium arsenide, with a thickness of The thickness is 50-300nm; the material of the arsenide isolation layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium phosphide, and indium gallium phosphide, and the thickness is 1-5nm; the material of the arsenide barrier layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium aluminum gallium arsenic, and indium gallium phosphide, and the thickness is 5-30nm; the material of the arsenide cap layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium aluminum gallium arsenic, and indium gallium phosphide, and the thickness is 2-10nm; a two-dimensional electron gas is formed between the arsenide channel layer and the arsenide isolation layer as a conductive channel of the gallium arsenide device.

[0011] Furthermore, the gate electrode of the gallium nitride device is a multi-layer metal material, the bottom layer is one of Ni, Ti, TiN, and TaN, and the second layer or the second layer above the second layer is one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; the source electrode of the gallium nitride device is a multi-layer metal material, the bottom two layers from bottom to top are Ti and Al, or Ta and Al, or Mo and Al, and the metals of other layers include one or more of Ti, Al, Ni, Au, Mo, Pt, and W; the drain electrode of the gallium nitride device is a multi-layer metal material, the bottom two layers from bottom to top are Ti and Al, or Ta and Al, or Mo and Al, and the metals of other layers include Ti, A l, one or more of Ni, Au, Mo, Pt, and W; the gate electrode of the gallium arsenide device is a multi-layer metal material, the bottom layer is one of Ti, Ta, Ni, TiN, and TaN, and the second layer or the second layer above the second layer is one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; the drain electrode of the gallium arsenide device is a multi-layer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the metals of other layers are one or more of Ni and Au; the source electrode of the gallium arsenide device is a multi-layer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the metals of other layers are one or more of Ni and Au.

[0012] Preferably, the back metal is a multi-layer metal material, which is Ni / Au, or Ti / Au, or Ni / Cu, or Ti / Cu from bottom to top.

[0013] The second object of the present invention is to provide a method for preparing a lateral monolithic heterogeneous integrated radio frequency chip of gallium nitride and gallium arsenide, which is characterized by comprising the following steps:

[0014] S1: Select substrate;

[0015] S2: growing a GaN device epitaxial layer on the substrate;

[0016] S3: Perform process preparation of GaN devices;

[0017] S4: etching and removing the epitaxial layer of the GaN device in a partial area;

[0018] S5: epitaxially growing a GaAs epitaxial transition layer and a GaAs device epitaxial layer in the etched groove obtained in step S4;

[0019] S6: preparing gallium arsenide devices;

[0020] S7: Conduct metal interconnection of the front electrode;

[0021] S8: etching back through hole;

[0022] S9: Deposit back metal to obtain a lateral monolithic heterogeneous integrated RF chip of gallium nitride and gallium arsenide.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] 1) The present invention adopts a material structure combining gallium nitride and gallium arsenide, breaking through the performance limitations of single material devices and synergistically improving the power, efficiency and noise performance of the millimeter wave RF front end;

[0025] 2) The gallium nitride device of the present invention is horizontally heterogeneously integrated face to face with the gallium arsenide device, with high integration density, short metal interconnection distance, small footprint, and small spatial spacing;

[0026] 3) The gallium arsenide radio frequency device of the present invention realizes horizontal monolithic heterogeneous integration by selectively digging grooves in areas on a heterogeneous substrate gallium nitride wafer to epitaxially grow gallium arsenide materials and processing gallium arsenide devices. The process compatibility of gallium nitride and gallium arsenide epitaxial material growth and device processing is high.

[0027] 4) The gallium nitride and gallium arsenide epitaxial material growth and device processing and preparation of the present invention are carried out using existing mature process technologies, with low cost and high solution feasibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] FIG1 is a lateral monolithic heterogeneous integrated RF chip of gallium nitride and gallium arsenide provided by an embodiment of the present invention. Schematic diagram of the film structure. FIG. 2 is a lateral monolithic heterogeneous integrated RF chip of gallium nitride and gallium arsenide provided by an embodiment of the present invention. Flowchart of the film.

[0029] Reference numerals in the figure: 1-substrate; 2-gallium nitride device epitaxial layer; 3-gallium arsenide epitaxial transition layer; 4-gallium arsenide device epitaxial layer; 5-back metal; 6-back via; 81-gallium nitride device electrode drain; 82-gallium nitride device electrode gate; 83-gallium nitride device electrode source; 91-gallium arsenide device electrode source; 92-gallium arsenide device electrode gate; 93-gallium arsenide device electrode drain. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments. The specific embodiments described herein are only used to explain the present invention and are not used to limit the invention.

[0031] like Figure 1 As shown, this embodiment exemplarily shows a gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip, including a back metal 5, a substrate 1, a gallium nitride device epitaxial layer 2, a gallium nitride device electrode drain 81, a gallium nitride device electrode gate 82, a gallium nitride device electrode source 83, a back through hole 6, a gallium arsenide epitaxial transition layer 3, a gallium arsenide device epitaxial layer 4, a gallium arsenide device electrode source 93, a gallium arsenide device electrode gate 92, and a gallium arsenide device electrode drain 91. Specifically, the upper end surface of one end of the gallium nitride device epitaxial layer 2 is provided with a through groove that communicates with the upper end surface of the substrate 1, and the gallium arsenide epitaxial transition layer 3 and the gallium arsenide device epitaxial layer 4 are arranged from top to bottom in the through groove; the upper end of the gallium arsenide device epitaxial layer 4 A gallium arsenide device electrode source 93, a gallium arsenide device electrode gate 92 and a gallium arsenide device electrode drain 91 are provided on the surface; the gallium nitride and gallium arsenide epitaxial materials and the radio frequency device share the back metal 5 and the substrate 1, and the gallium arsenide radio frequency device realizes horizontal monolithic heterogeneous integration by trenching in a selected area on the heterogeneous substrate gallium nitride wafer and epitaxially growing the gallium arsenide material, and processing the gallium arsenide device; the back metal 5 is connected to the gallium nitride device electrode source 83 and the gallium arsenide device electrode source 93 through the back through hole 6; the gallium nitride device electrode gate 82 and the gallium arsenide device electrode gate 92 are interconnected by wires, and the gallium nitride device electrode drain 81 and the gallium arsenide device electrode drain 91 are interconnected by wires.

[0032] The principle of this embodiment is: GaAs RF devices are realized by epitaxially growing GaAs materials by trenching in selected areas on a heterogeneous substrate GaN wafer and processing GaAs devices to realize horizontal monolithic heterogeneous integration. The RF chip adopts a microstrip waveguide structure, and a back metal grounding is set on the back. The back metal is connected to the source electrodes of the GaN device and the GaAs device on the front through a back through hole. The electrodes of the GaN device and the GaAs device are interconnected by wires, so that the GaN and GaAs RF devices have extremely small spatial spacing, reducing the loss of long-distance transmission signals at high frequencies and the influence of parasitic parameters, and reducing the chip area and chip volume, reducing the packaging cost, and realizing a high-density, high-performance, and multi-functional GaN and GaAs lateral monolithic heterogeneous integrated RF chip.

[0033] In this embodiment, the material of the substrate 1 is silicon, and the thickness is 30-500 μm. Preferably, the thickness of the substrate 1 is 100 μm;

[0034] In this embodiment, the material of the gallium nitride device epitaxial layer 2 is a compound formed by one or more of gallium nitride, aluminum nitride, and indium nitride; the gallium nitride device epitaxial layer 2 includes a nitride nucleation layer, a nitride transition layer, a nitride buffer layer, a nitride channel layer, and a nitride barrier layer from bottom to top; the material of the nitride nucleation layer is aluminum nitride with a thickness of 50-300nm; the material of the nitride transition layer is graded aluminum gallium nitride or aluminum nitride / aluminum gallium nitride super The lattice has a thickness of 500-1000nm; the material of the nitride buffer layer is gallium nitride, with a thickness of 100-1000nm; the material of the nitride channel layer is gallium nitride or indium gallium nitride or aluminum gallium nitride, with a thickness of 50-500nm; the material of the nitride barrier layer is aluminum gallium nitride or indium aluminum nitride, with a thickness of 5-30nm; a two-dimensional electron gas is formed between the nitride channel layer and the nitride barrier layer, which serves as a conductive channel of the gallium nitride radio frequency device.

[0035] Preferably, the material of the nitride nucleation layer is aluminum nitride with a thickness of 200nm; the material of the nitride transition layer is gradient aluminum gallium nitride with a thickness of 750nm; the material of the nitride buffer layer is gallium nitride with a thickness of 800nm; the material of the nitride channel layer is gallium nitride with a thickness of 300nm; and the material of the nitride barrier layer is aluminum gallium nitride with a thickness of 20nm.

[0036] In this embodiment, the material of the GaAs epitaxial transition layer 3 is germanium or a compound semiconductor formed by silicon and germanium, with a thickness of 50-500 nm; preferably, the material of the GaAs epitaxial transition layer 3 is germanium, with a thickness of 300 nm.

[0037] In this embodiment, the material of the epitaxial layer 4 of the gallium arsenide device is a compound composed of one or more of gallium arsenide, indium arsenide, aluminum arsenide, and indium phosphide; the epitaxial layer 4 of the gallium arsenide device includes, from bottom to top, an arsenide buffer layer, an arsenide channel layer, an arsenide isolation layer, an arsenide barrier layer, and an arsenide cap layer, wherein the material of the arsenide buffer layer is gallium arsenide with a thickness of 50-1000nm; the material of the arsenide channel layer is gallium arsenide or indium gallium arsenide with a thickness of 50-300nm; the arsenide isolation layer The material of the arsenide barrier layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium phosphide, and indium gallium phosphide, with a thickness of 1-5nm; the material of the arsenide barrier layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium aluminum gallium arsenic, and indium gallium phosphide, with a thickness of 5-30nm; the material of the arsenide cap layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium aluminum gallium arsenic, and indium gallium phosphide, with a thickness of 2-10nm; a two-dimensional electron gas is formed between the arsenide channel layer and the arsenide isolation layer as a conductive channel of the gallium arsenide device.

[0038] Preferably, the material of the arsenide buffer layer is gallium arsenide with a thickness of 800nm; the material of the arsenide channel layer is indium gallium arsenide with a thickness of 300nm; the material of the arsenide isolation layer is indium aluminum arsenic with a thickness of 3nm; the material of the arsenide barrier layer is indium gallium phosphide with a thickness of 20nm; the material of the arsenide cap layer is indium aluminum arsenic with a thickness of 5nm.

[0039] In this embodiment, the GaN device electrode gate 82 is a multi-layer metal material, the bottom layer is one of Ni, Ti, TiN, and TaN, and the second layer or the second layer above the second layer is one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; preferably, the material of the GaN device electrode gate 82 is Ni and Au from bottom to top, with thicknesses of 50nm and 400nm respectively.

[0040] In this embodiment, the gallium nitride device electrode source 83 is a multi-layer metal material, the bottom two layers from bottom to top are Ti and Al, or Ta and Al, or Mo and Al, and the metals of other layers include one or more of Ti, Al, Ni, Au, Mo, Pt, and W; preferably, the material of the gallium nitride device electrode source 83 from bottom to top is Ti, Al, Ni, and Au, with thicknesses of 20nm, 120nm, 40nm, and 50nm, respectively.

[0041] In this embodiment, the GaN device electrode drain 81 is a multi-layer metal material, the bottom two layers from bottom to top are Ti and Al, or Ta and Al, or Mo and Al, and the metals of other layers include one or more of Ti, Al, Ni, Au, Mo, Pt, and W; preferably, the material of the GaN device electrode drain 81 from bottom to top is Ti, Al, Ni, and Au, with thicknesses of 20 nm, 120 nm, 40 nm, and 50 nm, respectively.

[0042] In this embodiment, the electrode gate 92 of the gallium arsenide device is a multi-layer metal material, the bottom layer is one of Ti, Ta, Ni, TiN, and TaN, and the second layer or the second layer above the second layer is one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu; preferably, the material of the electrode gate 92 of the gallium arsenide device is Ti, Pt, and Au from bottom to top, with thicknesses of 50nm, 50nm, and 300nm.

[0043] In this embodiment, the gallium arsenide device electrode drain 91 is a multi-layer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the metals of other layers are one or more of Ni and Au; preferably, the material of the gallium arsenide device electrode drain 91 from bottom to top is Ni, Ge, Au, Ni, Au; the thickness is 5nm, 20nm, 100nm, 25nm, 100nm.

[0044] In this embodiment, the gallium arsenide device electrode source 93 is a multi-layer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the metals of other layers are one or more of Ni and Au; preferably, the material of the gallium arsenide device electrode source 93 from bottom to top is Ni, Ge, Au, Ni, Au, with thicknesses of 5nm, 20nm, 100nm, 25nm, and 100nm.

[0045] In this embodiment, the back metal 5 is a multi-layer metal material, which is Ni / Au, or Ti / Au, or Ni / Cu, or Ti / Cu from bottom to top; preferably, the material of the back metal 5 is Ti / Au from bottom to top, with a thickness of 100nm or 5μm.

[0046] Reference Figure 2 When preparing the above-mentioned GaN and GaAs lateral monolithic heterogeneous integrated RF chip, a typical preparation process is as follows:

[0047] S1: Select substrate 1;

[0048] Specifically, the surface grease and pollutants were washed away with organic acetone, and then the silicon substrate was cleaned with flowing deionized water and then dried with high-purity nitrogen. The thickness of the silicon substrate was 100 μm.

[0049] S2: epitaxially growing a gallium nitride device epitaxial layer 2 on the substrate 1;

[0050] Specifically, a gallium nitride HEMT epitaxial layer is epitaxially grown on a silicon substrate using MOCVD (Metal-organic Chemical Vapor Deposition) equipment and technology under high temperature conditions (800-1100° C.).

[0051] S3: Perform process preparation of GaN devices;

[0052] Specifically, firstly, the mesa is photolithographed and etched to achieve isolation between devices, and then the source and drain metals are deposited using photoresist as a mask, and the gate metal is deposited in the same way.

[0053] S4: etching and removing the GaN epitaxial layer in a partial area;

[0054] Specifically, ultraviolet exposure is performed through a specific photomask to obtain a specified structure, and then etching is performed using an inductively coupled plasma (ICP) device. After etching, the sample is placed in acetone to remove the photoresist and organic pollutants on the surface, and then placed in an acidic solvent to remove the surface oxide layer and inorganic pollutants, and then dried in a nitrogen atmosphere.

[0055] S5: epitaxially growing a gallium arsenide epitaxial transition layer 3 and a gallium arsenide device epitaxial layer 4 in the etched groove obtained in step S4;

[0056] Specifically, a GaAs epitaxial transition layer and a GaAs device epitaxial layer are epitaxially grown on a silicon substrate under high temperature conditions (800-1100° C.) using MOCVD (Metal-organic Chemical Vapor Deposition) equipment and technology.

[0057] S6: preparing gallium arsenide devices;

[0058] Specifically, firstly, the mesa is photolithographed and etched to achieve isolation between devices, and then the source and drain metals are deposited using photoresist as a mask, and the gate metal is deposited in the same way.

[0059] S7: Conduct metal interconnection of the front electrode;

[0060] Specifically, air bridge interconnection or open hole interconnection is used to achieve the connection between metal wirings. Air bridge interconnection is to build a "bridge" between metal wirings to avoid direct contact and short circuit between wirings. Open hole interconnection is to open a small hole in the passivation layer to allow the metal wiring to pass through the small hole to achieve connection.

[0061] S8: etching the back through hole 6;

[0062] Specifically, ultraviolet exposure is performed through a specific photomask to obtain a specified structure, and then etching is performed using an inductively coupled plasma (ICP) device to form a through hole.

[0063] S9: depositing back metal 5;

[0064] Metal is grown on the wafer using electron beam evaporation equipment and technology. After the growth is completed, it is immersed in acetone and peeled off to form a back metal.

[0065] At this point, the preparation of gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated RF chip has been completed.

[0066] The technical solution of the present invention is not limited to the above-mentioned specific embodiments. All technical variations made according to the technical solution of the present invention fall within the protection scope of the present invention.

Claims

1. A gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip, characterized in that: The invention comprises a back metal (5), a substrate (1), a gallium nitride device epitaxial layer (2), a gallium nitride device electrode drain (81), a gallium nitride device electrode gate (82), a gallium nitride device electrode source (83), a back through hole (6), a gallium arsenide epitaxial transition layer (3), a gallium arsenide device epitaxial layer (4), a gallium arsenide device electrode source (93), a gallium arsenide device electrode gate (92), and a gallium arsenide device electrode drain (91); the gallium nitride and gallium arsenide epitaxial materials and the radio frequency device share the back metal (5) and the substrate ( ... gallium arsenide epitaxial materials and the gallium arsenide epit The GaAs radio frequency device realizes horizontal monolithic heterogeneous integration by trenching in a selected area on a GaAs wafer on a heterogeneous substrate, epitaxially growing GaAs material, and processing GaAs devices; a back metal (5) is connected to a GaAs device electrode source (83) and a GaAs device electrode source (93) through a back through hole (6); a GaAs device electrode gate (82) and a GaAs device electrode gate (92) are interconnected through a wire, and a GaAs device electrode drain (81) and a GaAs device electrode drain (91) are interconnected through a wire.

2. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The substrate (1) is made of silicon and has a thickness of 30-500 μm.

3. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The material of the gallium nitride device epitaxial layer (2) is a compound formed by one or more of gallium nitride, aluminum nitride, and indium nitride; the gallium nitride device epitaxial layer (2) comprises, from bottom to top, a nitride nucleation layer, a nitride transition layer, a nitride buffer layer, a nitride channel layer, and a nitride barrier layer; the material of the nitride nucleation layer is aluminum nitride with a thickness of 50-300nm; the material of the nitride transition layer is graded aluminum gallium nitride or aluminum nitride / aluminum gallium nitride supercrystal The material of the nitride buffer layer is gallium nitride, and the thickness is 500-1000nm; the material of the nitride channel layer is gallium nitride or indium gallium nitride or aluminum gallium nitride, and the thickness is 50-500nm; the material of the nitride barrier layer is aluminum gallium nitride or indium aluminum nitride, and the thickness is 5-30nm; a two-dimensional electron gas is formed between the nitride channel layer and the nitride barrier layer, which serves as a conductive channel of the gallium nitride radio frequency device.

4. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The material of the gallium arsenide epitaxial transition layer (3) is germanium or a compound semiconductor formed by silicon and germanium, with a thickness of 50-500nm; the material of the gallium arsenide device epitaxial layer (4) is a compound composed of one or more of gallium arsenide, indium arsenide, aluminum arsenide, and indium phosphide; the gallium arsenide device epitaxial layer (4) comprises, from bottom to top, an arsenide buffer layer, an arsenide channel layer, an arsenide isolation layer, an arsenide barrier layer, and an arsenide cap layer; the material of the arsenide buffer layer is gallium arsenide, with a thickness of 50-1000nm; the material of the arsenide channel layer is gallium arsenide or indium gallium arsenide , with a thickness of 50-300nm; the material of the arsenide isolation layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium phosphide, and indium gallium phosphide, with a thickness of 1-5nm; the material of the arsenide barrier layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium aluminum gallium arsenic, and indium gallium phosphide, with a thickness of 5-30nm; the material of the arsenide cap layer is one of aluminum gallium arsenic, indium aluminum arsenic, indium aluminum gallium arsenic, indium aluminum gallium arsenic, and indium gallium phosphide, with a thickness of 2-10nm; a two-dimensional electron gas is formed between the arsenide channel layer and the arsenide isolation layer as a conductive channel of the gallium arsenide device.

5. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The gallium nitride device electrode gate (82) is a multi-layer metal material, the bottom layer is one of Ni, Ti, TiN, and TaN, and the second layer or the second layer above the second layer is one or more of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu. The gallium nitride device electrode source (83) is a multi-layer metal material, the bottom two layers from bottom to top are Ti and Al, or Ta and Al, or Mo and Al, and the metals of other layers include one or more of Ti, Al, Ni, Au, Mo, Pt, and W. The gallium nitride device electrode drain (81) is a multi-layer metal material, the bottom two layers from bottom to top are Ti and Al, or Ta and Al, or Mo and Al, and the metals of other layers include Ti, Al, The gallium arsenide device electrode gate (92) is a multi-layer metal material, the bottom layer is one of Ti, Ta, Ni, TiN, TaN, and the second layer or the second layer above is one of Al, Au, Ti, Ta, Pt, TiN, TaN, W, and Cu. The gallium arsenide device electrode drain (91) is a multi-layer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the metals of other layers are one of Ni and Au. The gallium arsenide device electrode source (93) is a multi-layer metal material, the bottom two layers from bottom to top are Ni and Ge, or Mo and Al, and the metals of other layers are one of Ni and Au.

6. The gallium nitride and gallium arsenide lateral monolithic heterogeneous integrated radio frequency chip according to claim 1, characterized in that: The back metal (5) is a multi-layer metal material, which is Ni / Au, or Ti / Au, or Ni / Cu, or Ti / Cu from bottom to top.

7. A method for preparing a lateral monolithic heterogeneous integrated radio frequency chip of gallium nitride and gallium arsenide as claimed in any one of claims 1 to 6, characterized in that The following steps are involved: S1: Select a substrate (1); S2: growing a gallium nitride device epitaxial layer (2) on the substrate (1); S3: Perform process preparation of GaN devices; S4: etching and removing the epitaxial layer (2) of the gallium nitride device in a partial area; S5: epitaxially growing a gallium arsenide epitaxial transition layer (3) and a gallium arsenide device epitaxial layer (4) in the etched groove obtained in step S4; S6: preparing gallium arsenide devices; S7: Conduct metal interconnection of the front electrode; S8: etching back through hole (6); S9: Deposit back metal (5) to obtain a lateral monolithic heterogeneous integrated radio frequency chip of gallium nitride and gallium arsenide.

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