Display panel and display device

Abstract

The present application provides a display panel and a display device, wherein the display panel includes a pixel electrode layer, a vapor deposition layer, and a common electrode layer. The pixel electrode layer has a first surface and a second surface that are arranged opposite to each other; the vapor deposition layer is arranged on the first surface, and a plurality of first connection holes are arranged on a side of the vapor deposition layer away from the pixel electrode layer; the common electrode layer is arranged on a side of the vapor deposition layer away from the pixel electrode layer, and the common electrode layer extends into the first connection hole for connection. By setting a plurality of first connection holes, the present application makes the contact area between the common electrode layer and the vapor deposition layer larger, thereby enhancing the adhesion between the common electrode layer and the vapor deposition layer, reducing the risk of the common electrode layer falling off, and improving the yield and reliability of the display panel.

Description

Technical Field

[0001] The present application relates to the technical field of display panels, and in particular to a display panel and a display device. Background Art

[0002] LTPS is the abbreviation of Low-Temperature Polycrystalline Silicon, which is a high-performance thin-film transistor technology widely used in display technologies such as liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs). LTPS technology has the advantages of fast response, low power consumption, high resolution, bright colors and reduced eye fatigue.

[0003] The current technical route of LTPS is mostly Top-Vcom (the common electrode layer is at the top of the array). The common electrode layer is at the top of the film stack. After film formation, exposure, development, and etching, the common electrode layer needs to undergo an annealing process in order to reduce the contact resistance with the pixel electrode layer. However, the common electrode layer will cause the film to shrink after annealing. The shrinkage stress of a normal sample is in equilibrium with the adhesion of the common electrode layer to the vapor deposition layer. When this shrinkage stress is greater than the adhesion, the common electrode layer will separate and fall off at the position where the adhesion is weak, thereby affecting the yield and reliability of the display panel.

[0004] Therefore, providing a display panel and a display device that improve the yield and reliability of the display panel has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0005] Embodiments of the present application provide a display panel and a display device.

[0006] The embodiment of the present application provides a display panel, including a pixel electrode layer, a vapor deposition layer and a common electrode layer. The pixel electrode layer has a first surface and a second surface arranged opposite to each other; the vapor deposition layer is arranged on the first surface, and a surface of the vapor deposition layer away from the pixel electrode layer is provided with a plurality of first connection holes; Common Electrode Layer The common electrode layer is disposed on a side of the vapor deposition layer away from the pixel electrode layer, and the common electrode layer extends into the first connection hole for connection.

[0007] In some embodiments, the display panel includes a display area and a peripheral area located outside the display area, and the first connection holes are evenly distributed in the display area.

[0008] In some embodiments, a second connection hole is further included, wherein the second connection hole is located in the peripheral area, and the common electrode layer is connected to the pixel electrode layer through the second connection hole.

[0009] In some embodiments, the second connection hole has a depth greater than that of the first connection hole, and the first connection hole and the second connection hole are formed in one step.

[0010] In some embodiments, the first connection hole is circular or sawtooth-shaped.

[0011] In some embodiments, a depth of the first connection hole is greater than half the thickness of the vapor deposition layer and less than the thickness of the vapor deposition layer.

[0012] In some embodiments, a bonding layer is disposed between the first connection hole and the vapor deposition layer.

[0013] In some embodiments, a surface of the common electrode layer in contact with the first connection hole is provided with micro protrusions.

[0014] In some embodiments, it also includes a planarization layer, an interlayer dielectric layer, a gate layer, an insulating layer, a semiconductor layer, a backlight layer, a shading layer and a glass substrate, wherein the planarization layer is arranged on a side of the pixel electrode layer away from the vapor deposition layer, the interlayer dielectric layer is arranged on a side of the planarization layer away from the pixel electrode layer, the gate layer is arranged on a side of the interlayer dielectric layer away from the planarization layer, the insulating layer is arranged on a side of the gate layer away from the interlayer dielectric layer, the semiconductor layer is arranged on a side of the insulating layer away from the gate layer, the backlight layer is arranged on a side of the semiconductor layer away from the insulating layer, the shading layer is arranged on a side of the backlight layer away from the semiconductor layer, and the glass substrate is arranged on a side of the shading layer away from the backlight layer.

[0015] Another embodiment of the present application further provides a display device, comprising the display panel described in the above embodiment.

[0016] The embodiment of the present application provides a display panel, including a pixel electrode layer, a vapor deposition layer and a common electrode layer. The pixel electrode layer has a first surface and a second surface arranged opposite to each other; the vapor deposition layer is arranged on the first surface, and a surface of the vapor deposition layer away from the pixel electrode layer is provided with a plurality of first connection holes; The common electrode layer is arranged on a side of the vapor deposition layer away from the pixel electrode layer, and the common electrode layer extends to the first connection hole for connection. In the present application, a plurality of first connection holes are arranged to increase the contact area between the common electrode layer and the vapor deposition layer, thereby enhancing the adhesion between the common electrode layer and the vapor deposition layer, reducing the risk of the common electrode layer falling off, and improving the yield and reliability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings without creative work.

[0018] Figure 1 A schematic diagram of the structure of a display panel provided in an embodiment of the present application.

[0019] Figure 2 Another structural schematic diagram of a display panel provided in an embodiment of the present application.

[0020] Figure 3 This is another schematic diagram of the structure of the display panel provided in the embodiment of the present application.

[0021] Figure 4 This is another schematic diagram of the structure of the display panel provided in the embodiment of the present application.

[0022] Figure 5 A schematic diagram of the structure of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0024] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0025] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0026] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0027] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the various specific processes and material examples provided by the present application, but those of ordinary skill in the art can appreciate the application of other processes and / or the use of other materials.

[0028] Embodiments of the present application provide a display panel and a display device.

[0029] See also Figures 1 to 4 In one embodiment of the present application, a display panel 100 includes a pixel electrode layer 10, a vapor deposition layer 20 is arranged on a first surface 10a of the pixel electrode layer 10, a side of the vapor deposition layer 20 away from the pixel electrode layer 10 is provided with a plurality of first connection holes 101, a common electrode layer 30 is arranged on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 extends to the first connection holes 101 for connection.

[0030] It should be noted that the first surface 10a is the upper surface of the pixel electrode layer 10, and the second surface 10b is the lower surface of the pixel electrode layer 10. Of course, the directions of the first surface 10a and the second surface 10b can be exchanged as needed. In the embodiments of the present application, unless otherwise specified, the first surface 10a is assumed to be the upper surface of the pixel electrode.

[0031] In the prior art, due to the film shrinkage caused by the annealing process of the common electrode layer 30, the common electrode layer 30 at the position with weak adhesion is easy to fall off, affecting the yield and reliability of the display panel 100. By providing a plurality of first connection holes 101 on the side of the vapor deposition layer 20 away from the pixel electrode layer 10, and extending the common electrode layer 30 into the first connection holes 101 for connection, the adhesion between the common electrode layer 30 and the vapor deposition layer 20 is enhanced, the risk of the common electrode layer 30 falling off is reduced, and the yield and reliability of the display panel 100 are improved.

[0032] The pixel electrode layer 10 has a first surface 10a and a second surface 10b that are arranged opposite to each other. The vapor deposition layer 20 is arranged on the first surface 10a, and a plurality of first connection holes 101 are arranged on a side of the vapor deposition layer 20 away from the pixel electrode layer 10. The common electrode layer 30 is arranged on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 extends into the first connection holes 101 for connection. By forming a plurality of first connection holes 101 on the vapor deposition layer 20, the common electrode layer 30 can extend into these connection holes, thereby enhancing the adhesion between the common electrode layer 30 and the vapor deposition layer 20 and reducing the risk of the common electrode layer 30 falling off.

[0033] The display panel 100 of the present application sets a plurality of first connection holes 101 on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and extends the common electrode layer 30 into these connection holes for connection, thereby enhancing the adhesion between the common electrode layer 30 and the vapor deposition layer 20. Compared with the prior art, the display panel 100 of the present application has a stronger adhesion between the common electrode layer 30 and the vapor deposition layer 20 after the annealing process, reduces the risk of the common electrode layer 30 falling off, and improves the yield and reliability of the display panel 100.

[0034] Specifically, the vapor deposition layer 20 is disposed on the first surface 10a of the pixel electrode layer 10, a plurality of first connection holes 101 are disposed on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 is disposed on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 extends to be connected in the first connection holes 101. With this design, the common electrode layer 30 can be more firmly attached to the vapor deposition layer 20, reducing the problem of film shrinkage caused by the annealing process, and improving the yield and reliability of the display panel 100.

[0035] Therefore, the present application sets a plurality of first connection holes 101 on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and extends the common electrode layer 30 into these connection holes for connection, thereby enhancing the adhesion between the common electrode layer 30 and the vapor deposition layer 20, reducing the risk of the common electrode layer 30 falling off, and improving the yield and reliability of the display panel 100.

[0036] Furthermore, the present application also proposes that the display panel 100 includes a display area 100 a and a peripheral area 100 b located outside the display area 100 a , and the first connection holes 101 are evenly distributed in the display area 100 a .

[0037] The technical solution of the present application makes the common electrode layer 30 more stably connected to the vapor deposition layer 20 by evenly distributing the first connection holes 101 in the display area 100a. This design can effectively alleviate the shrinkage stress of the common electrode layer 30 during the annealing process, thereby reducing the possibility of the common electrode layer 30 separating and falling off at the position with weak adhesion. Specifically, the uniform distribution of the first connection holes 101 can provide uniform adhesion in the entire display area 100a, avoiding the problems caused by local stress concentration.

[0038] The newly added technical feature of the present application is that the first connection holes 101 are evenly distributed in the display area 100a. This feature can be achieved in a variety of ways. For example, through precise mask design and lithography technology, evenly distributed first connection holes 101 can be formed in the display area 100a. In addition, the distribution and shape of the connection holes can be further optimized by adjusting the materials and thicknesses of the vapor deposition layer 20 and the common electrode layer 30 to ensure stable connection of the common electrode layer 30.

[0039] Through the above technical solution, the display panel 100 proposed in this application is improved on the basis of the prior art, and the problem that the common electrode layer 30 may fall off during the annealing process is solved. Compared with the prior art, the display panel 100 of this application has a higher yield and reliability, and can better meet the production and use requirements of the display panel 100.

[0040] Furthermore, the present application also proposes that it further includes a second connection hole 102 , the second connection hole 102 is located in the peripheral area 100 b , and the common electrode layer 30 is connected to the pixel electrode layer 10 through the second connection hole 102 .

[0041] In the technical solution of the present application, the display panel 100 includes a display area 100a and a peripheral area 100b located outside the display area 100a, and the first connection holes 101 are evenly distributed in the display area 100a. By setting the second connection holes 102, the common electrode layer 30 can be connected to the pixel electrode layer 10 through the second connection holes 102.

[0042] The newly added second connection hole 102 can be implemented in a variety of ways. For example, the shape of the second connection hole 102 can be circular, rectangular or other suitable shapes to meet different process and design requirements. The depth of the second connection hole 102 can be adjusted according to actual needs to ensure reliable connection between the common electrode layer 30 and the pixel electrode layer 10. In addition, the second connection hole 102 can be formed simultaneously with the first connection hole 101 through a one-time molding process, thereby simplifying the manufacturing process and improving production efficiency.

[0043] Furthermore, the present application also proposes that the depth of the second connection hole 102 is greater than that of the first connection hole 101 , and the first connection hole 101 and the second connection hole 102 are formed at one time.

[0044] The technical solution of the present application aims to solve the problem that the common electrode layer 30 causes film shrinkage after annealing, thereby affecting the yield and reliability of the display panel 100. By providing a second connection hole 102 with a depth greater than the first connection hole 101, and forming the first connection hole 101 and the second connection hole 102 at one time, a more stable connection can be provided between the common electrode layer 30 and the pixel electrode layer 10, avoiding the separation and falling problem caused by film shrinkage.

[0045] Specifically, the depth of the second connection hole 102 is greater than that of the first connection hole 101, so that the connection between the common electrode layer 30 and the pixel electrode layer 10 is more secure. Through a one-time molding process, the accuracy of the shape and position of the two connection holes is ensured, the processing error is reduced, and the reliability of the connection is improved. As a preferred embodiment, these connection holes can be formed by laser drilling or chemical etching.

[0046] Therefore, the present application solves the problem of separation and detachment of the common electrode layer 30 after annealing by optimizing the structure and molding process of the connection hole, thereby improving the yield and reliability of the display panel 100. Compared with the prior art, the present application provides a more reliable connection method, ensuring the stability of the display panel 100 in long-term use.

[0047] Furthermore, the present application also proposes that the shape of the first connection hole 101 is circular or sawtooth.

[0048] In the technical solution of the present application, the display panel 100 includes a pixel electrode layer 10, a vapor deposition layer 20 and a common electrode layer 30. The vapor deposition layer 20 is arranged on the first surface 10a of the pixel electrode layer 10, and a plurality of first connection holes 101 are arranged on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 is arranged on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and extends to connect in the first connection holes 101. Further, the shape of the first connection holes 101 is circular or sawtooth.

[0049] The shape of the first connection hole 101 is circular or sawtooth, which is of great significance to the improvement of the overall invention. The circular connection hole can provide uniform stress distribution, reduce stress concentration, and reduce the risk of the common electrode layer 30 falling off. The sawtooth connection hole can increase the contact area, enhance the adhesion between the common electrode layer 30 and the vapor deposition layer 20, and further improve the reliability and yield of the display panel 100.

[0050] Therefore, the present application provides a technical solution for improving the yield and reliability of the display panel 100 by improving the shape of the first connection hole 101. Compared with the prior art, the display panel 100 proposed in the present application can more effectively solve the adhesion problem of the common electrode layer 30 after annealing, reduce the risk of film shedding, and improve the reliability and production yield of the display panel 100.

[0051] Furthermore, the present application also proposes that the depth of the first connection hole 101 is greater than half the thickness of the vapor deposition layer 20 and less than the thickness of the vapor deposition layer 20 .

[0052] The technical solution of the present application solves the problem of the common electrode layer 30 possibly falling off after annealing by providing a first connection hole 101, the depth of which is greater than half the thickness of the vapor deposition layer 20 but less than the thickness of the vapor deposition layer 20. Specifically, the depth design of the first connection hole 101 helps to reduce the stress concentration between the common electrode layer 30 and the vapor deposition layer 20 during the annealing process, thereby improving the adhesion and preventing the common electrode layer 30 from separating and falling off.

[0053] The implementation of this design may include the following: During the manufacturing process, the thickness of the vapor deposition layer 20 and the first connection hole 101 is precisely controlled to ensure that the depth of the first connection hole 101 is within a specified range. High-precision etching equipment and processes are used to ensure the depth consistency of the first connection hole 101. During the design stage, the shape and distribution of the first connection hole 101 are optimized through simulation and calculation to further enhance the adhesion of the common electrode layer 30.

[0054] Compared with the prior art, the advantage of the present application is that, by optimizing the depth design of the first connection hole 101 , the problem of the common electrode layer 30 possibly falling off after annealing is effectively solved, thereby improving the yield and reliability of the display panel 100 .

[0055] Furthermore, the present application also proposes that an adhesive layer 40 is provided between the first connection hole 101 and the vapor deposition layer 20 .

[0056] The present application provides a display panel 100, including a pixel electrode layer 10, a vapor deposition layer 20 and a common electrode layer 30. The pixel electrode layer 10 has a first surface 10a and a second surface 10b arranged opposite to each other, the vapor deposition layer 20 is arranged on the first surface 10a, a side of the vapor deposition layer 20 away from the pixel electrode layer 10 is provided with a plurality of first connection holes 101, the common electrode layer 30 is arranged on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 extends into the first connection hole 101 for connection. By arranging an adhesive layer 40 between the first connection hole 101 and the vapor deposition layer 20, the adhesion between the common electrode layer 30 and the vapor deposition layer 20 can be effectively enhanced, and the separation and detachment problem caused by the film shrinkage of the common electrode layer 30 after annealing is solved, thereby improving the yield and reliability of the display panel 100.

[0057] Specifically, the bonding layer 40 can be made of common bonding materials, such as epoxy resin, polyimide, etc., and by setting the bonding layer 40 between the first connection hole 101 and the vapor deposition layer 20, the bonding strength between the common electrode layer 30 and the vapor deposition layer 20 can be further enhanced. The thickness and material of the bonding layer 40 can be adjusted according to actual needs to achieve the best adhesion effect. In addition, the bonding layer 40 can be set by spraying, coating and other processes to ensure that the bonding layer 40 is evenly distributed between the first connection hole 101 and the vapor deposition layer 20.

[0058] Therefore, the present application effectively solves the problem of separation and detachment of the common electrode layer 30 due to film shrinkage after annealing by setting the adhesive layer 40 between the first connection hole 101 and the vapor deposition layer 20, and significantly improves the yield and reliability of the display panel 100. Compared with the prior art, the technical solution provided by the present application has higher stability and reliability, and can meet the manufacturing requirements of high-quality display panels 100.

[0059] Furthermore, the present application also proposes that a micro-protrusion 31 is provided on a surface of the common electrode layer 30 that contacts the first connection hole 101 .

[0060] The present application increases the contact area between the common electrode layer 30 and the vapor deposition layer 20 by setting a micro-protrusion 31 on the side of the common electrode layer 30 that contacts the first connection hole 101, thereby improving the adhesion between the two. Therefore, during the annealing process, even if the common electrode layer 30 generates a certain shrinkage stress, it will not easily cause the common electrode layer 30 to separate and fall off at a position where the adhesion is weak. Specifically, the micro-protrusion 31 can be achieved by performing a micro-nano level patterning treatment on the surface of the common electrode layer 30. This treatment method can adopt a variety of means such as photolithography technology and laser etching technology. As a preferred embodiment, the height of the micro-protrusion 31 can be controlled between 10 nanometers and 100 nanometers to ensure that the adhesion can be improved without having a negative impact on the display effect.

[0061] Through the above technical means, the present application effectively solves the problem in the prior art that the common electrode layer 30 is easy to fall off after annealing, thereby significantly improving the yield and reliability of the display panel 100. Compared with the prior art, the technical solution provided by the present application has higher feasibility and superiority in practical applications.

[0062] Furthermore, the present application also proposes that it also includes a planarization layer 50, an interlayer dielectric layer 60, a gate layer 70, an insulating layer 80, a semiconductor layer 90, a backlight layer 103, a shading layer 104 and a glass substrate 105, wherein the planarization layer 50 is arranged on the side of the pixel electrode layer 10 away from the vapor deposition layer 20, the interlayer dielectric layer 60 is arranged on the side of the planarization layer 50 away from the pixel electrode layer 10, the gate layer 70 is arranged on the side of the interlayer dielectric layer 60 away from the planarization layer 50, the insulating layer 80 is arranged on the side of the gate layer 70 away from the interlayer dielectric layer 60, the semiconductor layer 90 is arranged on the side of the insulating layer 80 away from the gate layer 70, the backlight layer 103 is arranged on the side of the semiconductor layer 90 away from the insulating layer 80, the shading layer 104 is arranged on the side of the backlight layer 103 away from the semiconductor layer 90, and the glass substrate 105 is arranged on the side of the shading layer 104 away from the backlight layer 103.

[0063] The present application can effectively improve the structural stability and adhesion of the display panel 100 by adding a multi-layer structure such as a planarization layer 50, an interlayer dielectric layer 60, a gate layer 70, an insulating layer 80, a semiconductor layer 90, a backlight layer 103, a shading layer 104 and a glass substrate 105 to the display panel 100, thereby improving the yield and reliability of the display panel 100.

[0064] Specifically, in the technical solution of the present application, the planarization layer 50 is used to improve the flatness of the surface of the pixel electrode layer 10, the interlayer dielectric layer 60 is used to isolate and protect the functional layers, the gate layer 70 is used to control the switching state of the semiconductor layer 90, the insulating layer 80 is used for electrical insulation and protection, the semiconductor layer 90 is used to achieve the transmission and conversion of electrical signals, the backlight layer 103 is used to provide the light source required for display, the light shielding layer 104 is used to avoid light interference, and the glass substrate 105 is used as the supporting base of the entire display panel 100. The combined use of these layers can not only improve the overall performance of the display panel 100, but also effectively solve the problem of insufficient adhesion of the common electrode layer 30.

[0065] Therefore, through the design of the above-mentioned multi-layer structure, the display panel 100 of the present application can significantly reduce the separation and shedding phenomenon of the common electrode layer 30 after the annealing process, thereby improving the yield and reliability of the display panel 100 .

[0066] The embodiment of the present application provides a display panel 100, including a pixel electrode layer 10, a vapor deposition layer 20 and a common electrode layer 30. The pixel electrode layer 10 has a first surface 10a and a second surface 10b arranged opposite to each other; the vapor deposition layer 20 is arranged on the first surface 10a, and a side of the vapor deposition layer 20 away from the pixel electrode layer 10 is provided with a plurality of first connection holes 101; Common electrode layer 30 The common electrode layer 30 is disposed on a side of the vapor deposition layer 20 away from the pixel electrode layer 10, and the common electrode layer 30 extends to connect to the first connection hole 101. In the present application, by providing a plurality of first connection holes 101, the contact area between the common electrode layer 30 and the vapor deposition layer 20 is increased, thereby enhancing the adhesion between the common electrode layer 30 and the vapor deposition layer 20, reducing the risk of the common electrode layer 30 falling off, and improving the yield and reliability of the display panel 100.

[0067] See also Figure 5 Another embodiment of the present application further provides a display device 1000, comprising the display panel 100 described in the above embodiment. Since the display panel 100 has been described in detail in the above embodiment, the display panel 100 in the above embodiment will not be described in detail in the present application embodiment.

[0068] The thin film transistor, display panel and display device provided in the embodiments of the present application are described in detail above. The principles and implementation methods of the present application are described in detail using specific examples herein. The description of the above embodiments is only used to help understand the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present application.

Claims

1. A display panel, characterized in that: include: The pixel electrode layer has a first surface and a second surface which are arranged opposite to each other; A vapor deposition layer is arranged on the first surface, and a plurality of first connection holes are arranged on a side of the vapor deposition layer away from the pixel electrode layer; A common electrode layer is disposed on a side of the vapor deposition layer away from the pixel electrode layer, and the common electrode layer extends into the first connection hole for connection.

2. The display panel according to claim 1, characterized in that: The display panel includes a display area and a peripheral area located outside the display area, and the first connection holes are evenly distributed in the display area.

3. The display panel according to claim 2, characterized in that: It also includes a second connection hole, which is located in the peripheral area, and the common electrode layer is connected to the pixel electrode layer through the second connection hole.

4. The display panel according to claim 3, characterized in that: The second connection hole has a depth greater than that of the first connection hole, and the first connection hole and the second connection hole are formed at one time.

5. The display panel according to claim 1, characterized in that: The first connection hole has a circular or sawtooth shape.

6. The display panel according to any one of claims 1 to 5, characterized in that: The depth of the first connection hole is greater than half the thickness of the vapor deposition layer and less than the thickness of the vapor deposition layer.

7. The display panel according to any one of claims 1 to 5, characterized in that: An adhesive layer is disposed between the first connection hole and the vapor deposition layer.

8. The display panel according to any one of claims 1 to 5, characterized in that: A micro-protrusion is arranged on a surface of the common electrode layer contacting the first connection hole.

9. The display panel according to claim 1, characterized in that: It also includes a planarization layer, an interlayer dielectric layer, a gate layer, an insulating layer, a semiconductor layer, a backlight layer, a shading layer and a glass substrate, wherein the planarization layer is arranged on a side of the pixel electrode layer away from the vapor deposition layer, the interlayer dielectric layer is arranged on a side of the planarization layer away from the pixel electrode layer, the gate layer is arranged on a side of the interlayer dielectric layer away from the planarization layer, the insulating layer is arranged on a side of the gate layer away from the interlayer dielectric layer, the semiconductor layer is arranged on a side of the insulating layer away from the gate layer, the backlight layer is arranged on a side of the semiconductor layer away from the insulating layer, the shading layer is arranged on a side of the backlight layer away from the semiconductor layer, and the glass substrate is arranged on a side of the shading layer away from the backlight layer.

10. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 9.

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