Display device
By using a partition wall containing metal and metal oxide in the display device, combined with a detection method of signal lines and drivers, the current leakage problem caused by partition wall defects is solved, and the image quality and efficiency of the manufacturing process are improved.
Patent Information
- Application Number
- CN202411315668.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-04
- Filing Date
- 2024-09-20
- Publication Date
- 2025-04-08
AI Technical Summary
It is difficult to effectively detect and repair defects in the partition wall in existing display devices, resulting in current leakage and image quality degradation.
Using a partition wall containing a metal material, the partition wall includes a portion containing metal and a portion containing metal oxide, the current value of the partition wall is detected through the signal line and the driver, and the short circuit defect is checked and repaired.
Effectively prevent current leakage, improve image quality, and improve manufacturing process yield by detecting short circuit defects.
Smart Images
Figure CN119789686A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a display device, and more particularly to a display device that provides visual information. Background Art
[0002] The display device may include a display area that displays an image. The display area may include a pixel area defined as an area that emits light, and the pixel area may be defined as a minimum partial area that emits light.
[0003] In the display device, a pixel defining layer may be provided to separate each pixel region, and a partition wall may be provided on the pixel defining layer to separate the pixel regions. Summary of the invention
[0004] Embodiments provide a display device capable of detecting defects of a partition wall.
[0005] A display device according to an embodiment of the present disclosure may include a substrate, a first electrode, a pixel defining layer, a partition wall, a light emitting layer, and a second electrode, the substrate including a display area and a non-display area adjacent to the display area, the first electrode being arranged in the display area on the substrate, the pixel defining layer being arranged on the substrate and exposing at least a portion of the first electrode, the partition wall being arranged on the pixel defining layer and including a first portion including a metal material and a second portion surrounding the first portion and including a metal oxide, the light emitting layer being arranged on the first electrode and the partition wall, and at least a portion of the light emitting layer being cut off by the partition wall, and the second electrode being arranged on the light emitting layer and the partition wall.
[0006] In one embodiment, the partition wall may include at least one selected from the group consisting of aluminum (Al), hafnium (Hf), zirconium (Zr), tantalum (Ta), and titanium (Ti).
[0007] In one embodiment, the partition wall portion may include a first partition wall portion extending in a first direction and a second partition wall portion extending in a second direction intersecting the first direction.
[0008] In one embodiment, the partition wall may include a plurality of partition walls, each of the plurality of partition walls including a wave shape in a plan view and being spaced apart from each other.
[0009] In one embodiment, the width of the upper portion of the partition wall is longer than the width of the lower portion of the partition wall.
[0010] In one embodiment, the light emission layer may include a plurality of organic light emission layers sequentially disposed on the first electrode and the partition wall, and a functional layer disposed between the plurality of organic light emission layers, the functional layer being completely cut off by the partition wall.
[0011] In one embodiment, the light emitting layer may be completely cut off by the partition wall.
[0012] In one embodiment, an upper surface of the partition wall may be positioned at the same level as an upper surface of a portion of the light emitting layer directly disposed on the first electrode, relative to the substrate.
[0013] In one embodiment, the organic light emission layer may include a blue organic light emission layer, a green organic light emission layer, and a red organic light emission layer disposed on the first electrode and the partition wall, and the blue organic light emission layer and the green organic light emission layer may be cut off by the partition wall, and the red organic light emission layer may extend continuously in the display area.
[0014] In one embodiment, the display area may include a first pixel region, a second pixel region, and a third pixel region emitting light of different colors, and the organic light emission layer may include a red organic light emission layer disposed in the first pixel region, a green organic light emission layer disposed in the second pixel region, and a blue organic light emission layer disposed in the third pixel region.
[0015] In one embodiment, the functional layer may include at least one hole transport layer and at least one electron transport layer, and the electron transport layer closest to the second electrode continuously extends in the display region.
[0016] In one embodiment, the second electrode may extend continuously in the display area.
[0017] In one embodiment, the display device may further include a signal line disposed in the non-display area and electrically connected to the partition wall to apply a signal to the partition wall, and a driver disposed in the non-display area and measuring a current value of the partition wall based on the signal.
[0018] In one implementation, the display device may further include an insulating layer disposed directly on the partition wall.
[0019] In one embodiment, the insulating layer may include an inorganic insulating material.
[0020] In one embodiment, the insulating layer may be a single layer or multiple layers.
[0021] In one embodiment, the insulating layer may include a silicon oxide (SiO x ) and silicon nitride (SiN x ) is at least one of the clusters.
[0022] In one embodiment, the second portion of the partition wall may include a high dielectric constant.
[0023] Since the display device according to the embodiment of the present disclosure includes a partition wall including a first portion including a metal and a second portion including a metal oxide film, leakage current can be blocked from flowing into an adjacent pixel region, and a short-circuit defect of the partition wall can be inspected. In addition, the process yield can be improved by inspecting a short-circuit defect in the partition wall during a manufacturing process of the display device. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification and together with the description, illustrate embodiments of the inventive concept.
[0025] Figure 1 is a plan view showing a display device according to an embodiment of the present disclosure.
[0026] Figure 2 is included in Figure 1 A cross-sectional view of one embodiment of a pixel in FIG.
[0027] Figure 3 is used to show that the Figure 2 Cross-sectional view of the substrate and transistor layers in a pixel.
[0028] Figure 4 It is shown Figure 2 Cross-sectional view of the thin-film encapsulation layer, color conversion layer, and glass encapsulation layer.
[0029] Figure 5 is included in Figure 1 A cross-sectional view of an example of a light emitting layer in a pixel.
[0030] Figure 6 Yes Figure 5 The light emitting layer along Figure 1 An example cross-sectional view taken along line II'.
[0031] Figure 7 Yes Figure 5 The light emitting layer along Figure 1 Another example cross-sectional view taken along line II'.
[0032] Figure 8 Yes Figure 5 The light emitting layer along Figure 1 Another example cross-sectional view taken along line II'.
[0033] Fig. 9 is included in Figure 1 A cross-sectional view of another example of a light emitting layer in a pixel of FIG.
[0034] Fig.10 Yes Fig. 9 The light emitting layer along Figure 1 An example cross-sectional view taken along line II'.
[0035] Fig.11 Yes Fig. 9 The light emitting layer along Figure 1 Another example cross-sectional view taken along line II'.
[0036] Fig.12 is along Figure 1 Another example cross-sectional view taken along line II'.
[0037] Fig.13 is along Figure 1 Another example cross-sectional view taken along line II'.
[0038] Fig.14 is along Figure 1 Another example cross-sectional view taken along line II'.
[0039] Fig.15 is a plan view showing an example of a partition wall according to an embodiment of the present disclosure.
[0040] Fig.16 It is shown Fig.15 A plan view of another example of a partition wall.
[0041] Fig.17 is a plan view for illustrating a method of inspecting a short circuit in a partition wall through a partition wall and a signal line. DETAILED DESCRIPTION
[0042] The illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.
[0043] Figure 1 is a plan view showing a display device according to an embodiment of the present disclosure.
[0044] Reference Figure 1 , the display device 1000 according to an embodiment of the present disclosure may include a plurality of pixels (e.g., a first pixel PX1, a second pixel PX2, and a third pixel PX3). Each of the plurality of pixels may be arranged in the same structure, and may be arranged in a matrix form along a first direction DR1 and a second direction DR2 intersecting the first direction DR1. In addition, the display device 1000 may include a display area DA that may display an image and a non-display area NDA adjacent to the display area DA. Figure 1 As shown in , a thickness direction of the display device 1000 may be parallel to a third direction DR3 perpendicular to the first direction DR1 and the second direction DR2.
[0045] A plurality of pixels (e.g., a first pixel PX1, a second pixel PX2, and a third pixel PX3) may be disposed in the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3, respectively. Specifically, the first pixel PX1 may be disposed in the first pixel region PA1, the second pixel PX2 may be disposed in the second pixel region PA2, and the third pixel PX3 may be disposed in the third pixel region PA3.
[0046] For example, the first pixel PX1 may emit red light, the second pixel PX2 may emit green light, and the third pixel PX3 may emit blue light. In addition, each of the plurality of pixels may emit a color that is a combination of colors emitted from the first pixel PX1, the second pixel PX2, and the third pixel PX3, and the display device 1000 may display a video combined with the colors emitted from the pixels.
[0047] In one embodiment, the display device 1000 may be a micro light emitting diode display device including a micro light emitting diode (micro LED) as a light emitting element. However, the embodiments of the present disclosure are not limited thereto. Alternatively, the display device 1000 may include an organic light emitting diode display device including an organic light emitting diode (OLED) as a light emitting device, a quantum dot display device including quantum dots, etc.
[0048] Figure 2 is included in Figure 1 A cross-sectional view of one embodiment of a pixel in FIG.
[0049] Reference Figure 2 , the pixel PX may include a substrate SUB, a transistor layer TL, a light emission layer EL, a thin film encapsulation layer TFE, a color conversion layer CCL, and a glass encapsulation layer ENC. The transistor layer TL, the light emission layer EL, the thin film encapsulation layer TFE, the color conversion layer CCL, and the glass encapsulation layer ENC may be sequentially stacked on the substrate SUB.
[0050] The transistor layer TL may generate a driving current, and the light emission layer EL may emit light corresponding to the driving current. The thin film encapsulation layer TFE may prevent moisture and external air from penetrating into the light emission layer EL. The color conversion layer CCL may convert the color of light emitted from the light emission layer EL, and the glass encapsulation layer ENC may protect the light emission layer EL and the color conversion layer CCL from impact. Figure 3 , Figure 4 , Figure 5 The substrate SUB, the transistor layer TL, the light emitting layer EL, the thin film encapsulation layer TFE, the color conversion layer CCL and the glass encapsulation layer ENC are described in detail.
[0051] Figure 3 is used to show that the Figure 2 Cross-sectional view of the substrate and transistor layers in a pixel.
[0052] Reference Figure 3 The transistor layer TL may include a buffer layer BFR, an active pattern ACT, a first gate insulating layer GI1, a first gate electrode GE1, a second gate insulating layer GI2, a second gate electrode GE2, an interlayer insulating layer ILD, a source electrode SE, a drain electrode DE, and a via insulating layer VIA disposed on a substrate SUB.
[0053] For example, the substrate SUB may include glass, quartz, plastic, etc. Examples of materials that may be used as plastic may include polyimide (PI), polyacrylate, polymethyl methacrylate (PMMA), polycarbonate (PC), polyethylene naphthalate (PEN), polyvinylidene chloride, polyvinylidene fluoride (PVDF), polystyrene, ethylene vinyl alcohol copolymer, polyether sulfone (PES), polyetherimide (PEI), polyphenylene sulfide (PPS), polyallylate, triacetyl cellulose (TAC), cellulose acetate propionate (CAP), etc. These may be used alone or in combination with each other.
[0054] The buffer layer BFR may be disposed on the substrate SUB. The buffer layer BFR may prevent metal atoms or impurities from penetrating into the active pattern ACT. In addition, the buffer layer BFR may control a heat supply rate during a crystallization process for forming the active pattern ACT. For example, the buffer layer BFR may include an inorganic material. Examples of inorganic materials that may be used as the buffer layer BFR may include silicon oxide, silicon nitride, and silicon oxynitride. These may be used alone or in combination with each other.
[0055] The active pattern ACT may be disposed on the buffer layer BFR. For example, the active pattern ACT may include a silicon semiconductor material or an oxide semiconductor material. Examples of silicon semiconductor materials that may be used as the active pattern ACT may include amorphous silicon and polycrystalline silicon. Examples of oxide semiconductor materials that may be used as the active pattern ACT may be InGaZnO (IGZO), InSnZnO (ITZO), and the like. In addition, the oxide semiconductor material may include indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), zinc (Zn), and the like. These may be used alone or in combination with each other.
[0056] The first gate insulating layer GI1 may be disposed on the buffer layer BFR and may cover the active pattern ACT. For example, the first gate insulating layer GI1 may include an insulating material. Examples of insulating materials that may be used as the first gate insulating layer GI1 may include silicon oxide, silicon nitride, and silicon oxynitride. These may be used alone or in combination with each other.
[0057] The first gate electrode GE1 may be disposed on the first gate insulating layer GI1. For example, the first gate electrode GE1 may include a metal, an alloy, a conductive metal oxide, a transparent conductive material, etc. Examples of materials that may be used as the first gate electrode GE1 may include silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other.
[0058] The second gate insulating layer GI2 may be disposed on the first gate insulating layer GI1 and cover the first gate electrode GE1. For example, the second gate insulating layer GI2 may include an insulating material. Examples of insulating materials that may be used as the second gate insulating layer GI2 may include silicon oxide, silicon nitride, and silicon oxynitride. These may be used alone or in combination with each other.
[0059] The second gate electrode GE2 may be disposed on the second gate insulating layer GI2. For example, the second gate electrode GE2 may include a metal, an alloy, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other.
[0060] The interlayer insulating layer ILD may be disposed on the second gate insulating layer GI2 and cover the second gate electrode GE2. For example, the interlayer insulating layer ILD may include an insulating material.
[0061] The source electrode SE and the drain electrode DE may be disposed on the interlayer insulating layer ILD. For example, the source electrode SE and the drain electrode DE may contact the active pattern ACT. The source electrode SE and the drain electrode DE may include metal, alloy, conductive metal oxide, transparent conductive material, etc. These may be used alone or in combination with each other.
[0062] The via insulating layer VIA may be disposed on the interlayer insulating layer ILD and cover the source electrode SE and the drain electrode DE. For example, the via insulating layer VIA may include an organic material. Examples of organic materials may include photoresists, polyacrylic resins, polyimide resins, and acrylic resins. These may be used alone or in combination with each other. Accordingly, the via insulating layer VIA may have a substantially flat upper surface.
[0063] Figure 4 It is shown Figure 2 Cross-sectional view of the thin-film encapsulation layer, color conversion layer, and glass encapsulation layer.
[0064] Reference Figure 4The thin film encapsulation layer TFE may include a first inorganic layer IL1, an organic layer OL, and a second inorganic layer IL2. The first inorganic layer IL1 may be disposed on a via insulating layer (eg, Figure 3 The first inorganic layer IL1 may be formed on the via insulating layer VIA in the via hole. For example, the first inorganic layer IL1 may include an inorganic material. Examples of inorganic materials that may be used as the first inorganic layer IL1 may include silicon oxide, silicon nitride, and silicon oxynitride. These may be used alone or in combination with each other.
[0065] The organic layer OL may be disposed on the first inorganic layer IL1. For example, the organic layer OL may include an organic material. Examples of the organic material may include photoresist, polyacrylic resin, polyimide resin, and acrylic resin. These may be used alone or in combination with each other.
[0066] The second inorganic layer IL2 may be disposed on the organic layer OL, and may include a material substantially the same as that of the first inorganic layer IL1 .
[0067] The color conversion layer CCL may include a color filter CF, a microlens array MLA, and a filler FM. The color filter CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. The first color filter CF1 may convert the color of light emitted from the light emission layer EL into red, and the second color filter CF2 may convert the color of light emitted from the light emission layer EL into blue. The third color filter CF3 may convert the color of light emitted from the light emission layer EL into green. However, embodiments of the present disclosure are not limited thereto.
[0068] The microlens array MLA may include a plurality of microlenses. The microlens array MLA may create a virtual image from an image provided from the light emitting layer EL and the color filter CF, and may project the virtual image to the user's eyes.
[0069] The filler FM may protect the color filter CF and the micro lens array MLA from impact. For example, the filler FM may include a liquid polymer.
[0070] The glass encapsulation layer ENC may include glass. For example, the glass encapsulation layer ENC may protect the underlying components from impact.
[0071] Figure 5 is included in Figure 1 A cross-sectional view of an example of a light emitting layer in a pixel.
[0072] Reference Figure 5 , the light emission layer EL may include an organic light emission layer EML and a functional layer FL. In addition, a first electrode AE may be disposed under the light emission layer EL, and a second electrode CE may be disposed on the light emission layer EL. That is, the light emission layer EL may be disposed between the first electrode AE and the second electrode CE in the cross-sectional view.
[0073] The organic light emission layer EML may include a blue organic light emission layer BEML, a green organic light emission layer GEML, and a red organic light emission layer REML. In addition, the functional layer FL may include a hole injection layer HIL, a hole transport layer HTL, an electron injection layer EIL, an electron transport layer ETL, and a charge generation layer CGL. Specifically, the functional layer FL may include a first hole injection layer HIL1, a first hole transport layer HTL1, a first electron transport layer ETL1, a first electron injection layer EIL1, a first charge generation layer CGL1, a second hole injection layer HIL2, a second hole transport layer HTL2, a second electron transport layer ETL2, a second electron injection layer EIL2, a second charge generation layer CGL2, a third hole injection layer HIL3, a third hole transport layer HTL3, a third electron transport layer ETL3, and a third electron injection layer EIL3. For example, the first charge generation layer CGL1 may include a first n-type charge generation layer nCGL1 and a first p-type charge generation layer pCGL1, and the second charge generation layer CGL2 may include a second n-type charge generation layer nCGL2 and a second p-type charge generation layer pCGL2.
[0074] The first hole injection layer HIL1 may be disposed on the first electrode AE. The first hole injection layer HIL1 may inject holes into the first hole transport layer HTL1. The first hole injection layer HIL1 may include various organic materials including copper phthalocyanine (CuPc), N,N-di(naphthalene-1-yl)-N,N'-diphenylbenzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq3), etc. These may be used alone or in combination with each other.
[0075] The first hole transport layer HTL1 may be disposed on the first hole injection layer HIL1. The first hole transport layer HTL1 may increase the mobility of holes. For example, the first hole transport layer HTL1 may include a hole transport material. Examples of materials that may be used as the first hole transport layer HTL1 may include HATCN (1,4,5,8,9,11-hexaazatriphenyl-hexanitrile), CuPc (copper phthalocyanine), PEDOT (poly (3,4)-ethylenedioxythiophene), PANI (polyaniline), NPD (N,N-dinaphthyl-N,N'-diphenylbenzidine), etc. These may be used alone or in combination with each other.
[0076] The blue organic light emitting layer BEML may be disposed on the first hole transport layer HTL1. When electrons and holes are injected into the blue organic light emitting layer BEML, the blue organic light emitting layer BEML may emit light of a preset color. For example, the blue organic light emitting layer BEML may include an organic material emitting blue light and may emit blue light.
[0077] The first electron transport layer ETL1 may be disposed on the blue organic light emitting layer BEML. The first electron transport layer ETL1 may increase electron mobility. For example, the first electron transport layer ETL1 may include an electron transport material. Examples of materials that may be used as the first electron transport layer ETL1 may include 8-hydroxyquinoline lithium (LiQ), Alq3 (tris(8-hydroxyquinoline)aluminum), PBD (2-(4-biphenyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), TAZ, SP1iro-PBD, and the like. These materials may be used alone or in combination with one another.
[0078] The first electron injection layer EIL1 may be disposed on the first electron transport layer ETL1. The first electron injection layer EIL1 may inject electrons into the first electron transport layer ETL1. The first electron injection layer EIL1 may include various organic materials including copper phthalocyanine (CuPc), N,N-di(naphthalene-1-yl)-N,N'-diphenylbenzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq3), etc. These may be used alone or in combination with each other.
[0079] The first n-type charge generation layer nCGL1 may be disposed on the first electron injection layer EIL1. The first n-type charge generation layer nCGL1 may supply electrons to the blue organic light emitting layer BEML. Examples of materials that may be used as the first n-type charge generation layer nCGL1 may include metals, alloys, metal oxides, reflective conductive materials, and organic materials doped with n-type materials. These may be used alone or in combination with each other.
[0080] The first p-type charge generation layer pCGL1 may be disposed on the first n-type charge generation layer nCGL1. The first p-type charge generation layer pCGL1 may supply holes to the green organic light emitting layer GEML. Examples of materials that may be used as the first p-type charge generation layer pCGL1 may include metals, alloys, metal oxides, reflective conductive materials, and organic materials doped with p-type materials. These may be used alone or in combination with each other.
[0081] The second hole injection layer HIL2 may be disposed on the first p-type charge generation layer pCGL1. The second hole injection layer HIL2 may inject holes into the second hole transport layer HTL2. The second hole injection layer HIL2 may include various organic materials including copper phthalocyanine (CuPc), N,N-di(naphthalene-1-yl)-N,N'-diphenylbenzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq3). These may be used alone or in combination with each other.
[0082] The second hole transport layer HTL2 may be disposed on the second hole injection layer HIL2. The second hole transport layer HTL2 may increase the mobility of holes. For example, the second hole transport layer HTL2 may include a hole transport material.
[0083] The green organic light emitting layer GEML may be disposed on the second hole transport layer HTL2. When electrons and holes are injected into the green organic light emitting layer GEML, the green organic light emitting layer GEML may emit light of a preset color. For example, the green organic light emitting layer GEML may include an organic material emitting green light and may emit green light.
[0084] The second electron transport layer ETL2 may be disposed on the green organic light emitting layer GEML. The second electron transport layer ETL2 may increase electron mobility. For example, the second electron transport layer ETL2 may include an electron transport material.
[0085] The second electron injection layer EIL2 may be disposed on the second electron transport layer ETL2. The second electron injection layer EIL2 may inject electrons into the second electron transport layer ETL2. The second electron injection layer EIL2 may include a material substantially the same as that of the second electron transport layer ETL2.
[0086] The second n-type charge generation layer nCGL2 may be disposed on the second electron injection layer EIL2. The second n-type charge generation layer nCGL2 may supply electrons to the green organic light emission layer GEML. Examples of materials that may be used as the second n-type charge generation layer nCGL2 may include metals, alloys, metal oxides, reflective conductive materials, organic materials doped with n-type materials, and the like. These materials may be used alone or in combination with each other.
[0087] The second p-type charge generation layer pCGL2 may be disposed on the second n-type charge generation layer nCGL2. The second p-type charge generation layer pCGL2 may supply holes to the red organic light emitting layer REML. Examples of materials that may be used as the second p-type charge generation layer pCGL2 may include metals, alloys, metal oxides, reflective conductive materials, organic materials doped with p-type materials, and the like. These may be used alone or in combination with one another.
[0088] The third hole injection layer HIL3 may be disposed on the second p-type charge generation layer pCGL2. The third hole injection layer HIL3 may inject holes into the third hole transport layer HTL3. The third hole injection layer HIL3 may include a material substantially the same as that of the first hole injection layer HIL1.
[0089] The third hole transport layer HTL3 may be disposed on the third hole injection layer HIL3. The third hole transport layer HTL3 may increase the mobility of holes. For example, the third hole transport layer HTL3 may include a hole transport material.
[0090] The red organic light emitting layer REML may be disposed on the third hole transport layer HTL3. When electrons and holes are injected into the red organic light emitting layer REML, the red organic light emitting layer REML may emit light of a preset color. For example, the red organic light emitting layer REML may include an organic material that emits red light and may emit red light.
[0091] The third electron transport layer ETL3 may be disposed on the red organic light emitting layer REML. The third electron transport layer ETL3 may increase electron mobility. For example, the third electron transport layer ETL3 may include an electron transport material.
[0092] The third electron injection layer EIL3 may be disposed on the third electron transport layer ETL3. The third electron injection layer EIL3 may inject electrons into the third electron transport layer ETL3. The third electron injection layer EIL3 may include a material substantially the same as that of the second electron injection layer EIL2.
[0093] The second electrode CE may be disposed on the third electron injection layer EIL3. For example, the second electrode CE may include a metal, an alloy, a metal oxide, a reflective conductive material, etc. Examples of materials that may be used as the second electrode CE may include silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), and indium zinc oxide (IZO). These may be used alone or in combination with each other.
[0094] exist Figure 5 In FIG. 5 , the blue organic light emission layer BEML, the green organic light emission layer GEML, and the red organic light emission layer REML are shown to be sequentially disposed on the first electrode AE, but the embodiments of the present disclosure are not limited thereto. Figure 5 In the embodiment, the order of the blue organic light emitting layer BEML and the green organic light emitting layer GEML may be changed.
[0095] Figure 6 Yes Figure 5 The light emitting layer along Figure 1 An example cross-sectional view taken along line II'. Figure 7 Yes Figure 5 The light emitting layer along Figure 1 Another example cross-sectional view taken along line II' of FIG. Figure 6 Different in Figure 7A shape in which the light emitting layer EL is continuously deposited without being cut in cross section is shown. That is, since the light emitting layer EL is connected, the light emitting layer EL may be continuously deposited on the side of the partition wall SP.
[0096] Reference Figures 1 to 7 The transistor layer TL may be disposed in the display area DA on the substrate SUB. For example, the transistor layer TL may include various drivers and wirings for driving the light emitting layer EL.
[0097] The interlayer insulating layer ILD may be disposed on the transistor layer TL. The interlayer insulating layer ILD may prevent the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3 from contacting the transistor layer TL. For example, examples of materials that may be used as the interlayer insulating layer ILD may include silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ), zinc oxide (ZnO x ) etc. These may be used alone or in combination with one another.
[0098] The first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3 may be disposed on the interlayer insulating layer ILD. Specifically, the first-first electrode AE1 may be disposed in the first pixel area PA1, the first-second electrode AE2 may be disposed in the second pixel area PA2, and the first-third electrode AE3 may be disposed in the third pixel area PA3. Examples of materials that may be used as the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3 may include silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other. Each of the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3 may correspond to Figure 5 The first electrode AE.
[0099] A pixel defining layer PDL may be disposed on the interlayer insulating layer ILD. The pixel defining layer PDL may expose at least a portion of an upper surface of each of the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3. In addition, the pixel defining layer PDL may cover an edge of each of the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3.
[0100] The pixel defining layer PDL may include an organic material. Examples of the organic material may include photoresist, polyacrylic resin, polyimide resin, and acrylic resin. These may be used alone or in combination with each other.
[0101] The partition wall SP may be disposed on the pixel defining layer PDL. The partition wall SP may be disposed between the first pixel area PA1, the second pixel area PA2, and the third pixel area PA3. In addition, the partition wall SP may extend in the first direction DR1 or the second direction DR2.
[0102] In one embodiment, the partition wall SP may include a first portion SP1 made of metal. Examples of the first portion SP1 may include aluminum (Al), hafnium (Hf), zirconium (Zr), tantalum (Ta), and titanium (Ti). These may be used alone or in combination with each other.
[0103] In one embodiment, the partition wall SP may include a first portion SP1 including a metal and a second portion SP2 surrounding the first portion SP1 and including a metal oxide. After forming a preliminary partition wall including a metal, a surface of the preliminary partition wall may be oxidized to form the partition wall SP. Accordingly, the second portion SP2 may surround the first portion SP1.
[0104] For example, the second portion SP2 of the partition wall SP may include aluminum oxide (Al 2 O 3 ), hafnium oxide (HfO 2 ), zirconium oxide (ZrO 2 ), Tantalum Oxide (Ta 2 O 5 ), titanium oxide (TiO 2 ) etc. These may be used alone or in combination with one another.
[0105] In one embodiment, the second portion SP2 of the partition wall SP may have a high dielectric constant. For example, when the second portion SP2 of the partition wall SP includes aluminum oxide (Al 2 O 3 ), the second portion SP2 of the partition wall SP may have a dielectric constant of about 9 to about 12.
[0106] In one embodiment, the partition wall SP may have an upper width longer than a lower width in cross section. Specifically, the partition wall SP may have a cross-sectional shape of an inverted trapezoid. However, the embodiments of the present disclosure are not limited thereto, and the partition wall SP may have various shapes in which the upper width is longer than the lower width. This will be described later. Fig. 9 Explained in.
[0107] In one embodiment, the width of the lower portion of the partition wall SP may be substantially the same as the width of the upper portion of the pixel defining layer PDL. In another embodiment, the width of the lower portion of the partition wall SP may be different from the width of the upper portion of the pixel defining layer PDL.
[0108] The light emission layer EL may be disposed on the partition wall SP and the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3. The light emission layer EL may include a functional layer FL and an organic light emission layer EML. At least a portion of the light emission layer EL may be cut off by the partition wall SP. In one embodiment, the light emission layer EL may be completely cut off by the partition wall SP. The functional layer FL may be completely cut off by the partition wall SP.
[0109] In one implementation, the partition wall SP may be positioned at the same level as the upper surface US1 of the portion of the light emission layer EL directly disposed on the first electrode AE with respect to the upper surface US2 of the substrate SUB.
[0110] In one embodiment, if Figure 7 As shown in , the light emission layer EL may be continuously deposited without being cut off by the partition wall SP. That is, the light emission layer EL may be deposited on the side of the partition wall SP and have a continuous shape in cross section. However, the embodiments of the present disclosure are not limited thereto. The light emission layer EL may have a shape in which a portion of the light emission layer EL may be cut off by the partition wall SP and a portion of the light emission layer EL may be continuously deposited.
[0111] The second electrode CE may be disposed on the light emitting layer EL. In one embodiment, the second electrode CE may extend continuously in the display area DA. That is, the second electrode CE may extend continuously in the display area DA without being cut off by the partition wall SP. Examples of materials that can be used as the second electrode CE may include silver (Ag), alloys containing silver, molybdenum (Mo), alloys containing molybdenum, aluminum (Al), alloys containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta). Platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other.
[0112] For example, a color conversion layer and / or a color filter may be further provided on the light emission layer EL. The color conversion layer may include quantum dots and may convert the wavelength of light emitted from the organic light emission layer EML. The color filter may selectively transmit light having a specific wavelength. The color conversion layer or the color filter may be provided in at least one direction in which the light emitted from the light emission layer EL travels.
[0113] Figure 8 Yes Figure 5 The light emitting layer along Figure 1 In addition to the light emitting layer (eg, Figure 5 In addition to the light emitting layer EL, Figure 8 Can be used with Figure 6 Basically the same or similar. Below, repeated descriptions are omitted or simplified.
[0114] Reference Figure 8 , the light emission layer EL may be disposed on the side and upper surface US2 of the partition wall SP. Specifically, the light emission layer EL may be disposed on the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3, or on the partition wall SP.
[0115] In one embodiment, the upper surface US2 of the partition wall SP is relatively close to the substrate (eg, Figure 3 The level of the substrate SUB) in the substrate may be positioned to be the same as the level of the second charge generation layer CGL2 portion of the light emission layer EL disposed on the first-first electrode AE1, the first-second electrode AE2, and the first-third electrode AE3.
[0116] For example, the second electrode CE may be disposed on the light emitting layer EL. Figure 1 In the display area DA), the second electrode CE and the red organic light emitting layer REML continuously extend without being cut off by the partition wall SP. The red organic light emitting layer REML may include an organic material emitting red light.
[0117] Fig. 9 is included in Figure 1 A cross-sectional view of another example of a light emitting layer in a pixel of FIG.
[0118] Reference Fig. 9 The light emitting layer EL may include an organic light emitting layer EML and a functional layer (eg, Fig.10 In addition, the first electrode AE may be disposed under the light emission layer EL, and the second electrode CE may be disposed on the light emission layer EL. That is, in cross section, the light emission layer EL may be disposed between the first electrode AE and the second electrode CE.
[0119] The first electrode AE may include a first pixel region (eg, Fig.10 The first-first electrode AE1 in the first pixel area PA1) is disposed in the second pixel area (eg, Fig.10 The first-second electrode AE2 in the second pixel area PA2 in the pixel region, and the first-second electrode AE2 in the third pixel area (eg, Fig.10 The first to third electrodes AE3 in the third pixel area PA3).
[0120] The organic light emission layer EML may include a first organic light emission layer EML1 and a second organic light emission layer EML2. The first organic light emission layer EML1 may include a first red organic light emission layer REML1, a first green organic light emission layer GEML1, and a first blue organic light emission layer BEML1. The second organic light emission layer EML2 may include a second red organic light emission layer REML2, a second green organic light emission layer GEML2, and a second blue organic light emission layer BEML2.
[0121] Functional layers (e.g. Fig.10 The functional layer FL) in the embodiment may include a hole transport layer HTL, a charge generation layer CGL, and an electron transport layer ETL. The charge generation layer CGL may include an n-type charge generation layer nCGL and a p-type charge generation layer pCGL. The hole transport layer HTL may include a first hole transport layer HTL1 and a second hole transport layer HTL2. The electron transport layer ETL may include a first electron transport layer ETL1 and a second electron transport layer ETL2.
[0122] Functional layers (e.g. Fig.10 The functional layer FL in the display area may be completely arranged in the display area (eg, Figure 1 on the display area DA).
[0123] The first electrode AE may include metal, alloy, metal oxide, reflective conductive material, or the like.
[0124] The first hole transport layer HTL1 may be disposed on the first electrode AE. For example, the first hole transport layer HTL1 may include a hole transport material.
[0125] The first red organic light emission layer REML1, the first green organic light emission layer GEML1, and the first blue organic light emission layer BEML1 may be disposed on the first hole transport layer HTL1. The first red organic light emission layer REML1, the first green organic light emission layer GEML1, and the first blue organic light emission layer BEML1 may be disposed on the same layer. That is, the first red organic light emission layer REML1 may be disposed in the first pixel region (e.g., Fig.10 In the first pixel area PA1 in the embodiment, the first green organic light emitting layer GEML1 may be disposed in the second pixel area (eg, Fig.10 The first blue organic light emitting layer BEML1 may be disposed in the second pixel region PA2 of the embodiment of the present invention, and the first blue organic light emitting layer BEML1 may be disposed in the third pixel region (eg, Fig.10 In the third pixel area PA3).
[0126] For example, the first red organic light emitting layer REML1 may include an organic material emitting red light and may emit red light. The first green organic light emitting layer GEML1 may include an organic material emitting green light and may emit green light. The first blue organic light emitting layer BEML1 may include an organic material emitting blue light and may emit blue light.
[0127] The first electron transport layer ETL1 may be disposed on the first organic light emitting layer EML1. For example, the first electron transport layer ETL1 may include an electron transport material.
[0128] The n-type charge generation layer nCGL may be disposed on the first electron transport layer ETL1. Examples of materials that may be used as the n-type charge generation layer nCGL may include metals, alloys, metal oxides, reflective conductive materials, organic materials doped with n-type materials, etc. These materials may be used alone or in combination with each other.
[0129] The p-type charge generation layer pCGL may be disposed on the n-type charge generation layer nCGL. Examples of materials that may be used as the p-type charge generation layer pCGL may include metals, alloys, metal oxides, reflective conductive materials, organic materials doped with p-type materials, etc. These materials may be used alone or in combination with each other.
[0130] The second hole transport layer HTL2 may be disposed on the p-type charge generation layer pCGL. For example, the second hole transport layer HTL2 may include a hole transport material.
[0131] The second red organic light emission layer REML2, the second green organic light emission layer GEML2 and the second blue organic light emission layer BEML2 may be disposed on the second hole transport layer HTL2. The second red organic light emission layer REML2, the second green organic light emission layer GEML2 and the second blue organic light emission layer BEML2 may be disposed on the same layer.
[0132] For example, the second red organic light emitting layer REML2 may include an organic material emitting red light and may emit red light. The second green organic light emitting layer GEML2 may include an organic material emitting green light and may emit green light. The second blue organic light emitting layer BEML2 may include an organic material emitting blue light and may emit blue light.
[0133] The second electron transport layer ETL2 may be disposed on the second organic light emitting layer EML2. For example, the second electron transport layer ETL2 may include an electron transport material.
[0134] That is, the light emission layer EL may have a structure in which two organic light emission layers EML are stacked. However, the embodiments of the present disclosure are not limited thereto, and the light emission layer EL may have a structure in which one or three or more organic light emission layers EML are stacked.
[0135] The second electrode CE may be disposed on the second electron transport layer ETL2. For example, the second electrode CE may include a metal, an alloy, a metal oxide, a reflective conductive material, etc. These may be used alone or in combination with each other.
[0136] although Fig. 9 The light emission layer EL shown in FIG. 1 includes first and second electron transport layers ETL1 and ETL2 and first and second hole transport layers HTL1 and HTL2, but the present disclosure is not limited thereto. Figure 5 As shown in , the light emission layer EL may further include functional layers such as an electron injection layer EIL and a hole injection layer HIL in addition to the electron transport layer ETL and the hole transport layer HTL.
[0137] Fig.10 Yes Fig. 9 The light emitting layer along Figure 1 An example cross-sectional view taken along line II'.
[0138] In addition to the shape of the light emitting layer EL, Fig.10 Can be used with Figure 6 Basically the same or similar. Below, repeated descriptions are omitted or simplified.
[0139] Reference Fig. 9 and Fig.10 , the transistor layer TL may be disposed on a substrate (eg, Figure 3 The display area (eg, Figure 1 In the display area DA).
[0140] An interlayer insulating layer ILD may be disposed on the transistor layer TL. A first-first electrode AE1 , a first-second electrode AE2 , and a first-third electrode AE3 may be disposed on the interlayer insulating layer ILD.
[0141] The transistor layer TL may be electrically connected to the first-first electrode AE1 , the first-second electrode AE2 , and the first-third electrode AE3 respectively disposed in the first pixel region PA1 , the second pixel region PA2 , and the third pixel region PA3 .
[0142] The red organic light emission layer REML may be disposed in the first pixel region PA1, the green organic light emission layer GEML may be disposed in the second pixel region PA2, and the blue organic light emission layer BEML may be disposed in the third pixel region PA3. Specifically, the red organic light emission layer REML may be disposed on the first-first electrode AE1, the green organic light emission layer GEML may be disposed on the first-second electrode AE2, and the blue organic light emission layer BEML may be disposed on the first-third electrode AE3. However, embodiments of the present disclosure are not limited thereto.
[0143] In one embodiment, the red organic light emitting layer REML may correspond to Fig. 9 The green organic light emitting layer GEML may correspond to the first red organic light emitting layer REML1 and the second red organic light emitting layer REML2. Fig. 9 The blue organic light emitting layer BEML may correspond to the first green organic light emitting layer GEML1 and the second green organic light emitting layer GEML2. Fig. 9 The first blue organic light emission layer BEML1 and the second blue organic light emission layer BEML2 may be provided. That is, the red organic light emission layer REML, the green organic light emission layer GEML, and the blue organic light emission layer BEML may each include two organic light emission layers EML. In this case, a functional layer FL such as an electron transport layer ETL, a hole transport layer HTL, and a charge generation layer CGL may be provided between the organic light emission layers EML.
[0144] The partition wall SP may be disposed on the pixel defining layer PDL. The partition wall SP may be disposed between the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3. Fig.10 The partition wall SP can be Figures 6 to 8 The partition walls SP are substantially the same.
[0145] In one embodiment, the upper surface US2 of the partition wall SP may be opposite to the substrate (eg, Figure 3 The substrate SUB in the light emitting layer is positioned at the same level as that of the upper surface US1 of the light emitting layer EL.
[0146] The second electrode CE may be disposed on the functional layer FL. The second electrode CE may be continuously connected without being cut off on the display area DA.
[0147] Fig.10 The functional layer FL in corresponds to Fig. 9 Specifically, Fig.10The functional layer FL may include a first hole transport layer HTL1, a first electron transport layer ETL1, an n-type charge generation layer nCGL, a p-type charge generation layer pCGL, a second hole transport layer HTL2, and a second electron transport layer ETL2. However, the present disclosure is not limited thereto.
[0148] In one embodiment, the functional layer FL may be completely cut off by the partition wall SP.
[0149] Fig.11 Yes Fig. 9 The light emitting layer Figure 1 Another example cross-sectional view taken along line II'.
[0150] In addition to the light emitting layer (e.g. Fig. 9 In addition to the light emitting layer EL, Fig.11 Can be used with Fig.10 Basically the same or similar. Below, repeated descriptions are omitted or simplified.
[0151] Reference Fig.11 In addition to the second electron transport layer ETL2, the functional layer FL' may include Fig.10 The components of the functional layer FL are the same components.
[0152] In one embodiment, the upper surface US2 of the partition wall SP is relatively close to the substrate (eg, Figure 3 The level of the substrate SUB in the substrate SUB) may be the same as that of the light emitting layer (eg, Fig. 9 The level of the upper surface US1 of the light emitting layer EL) in the embodiment is basically the same.
[0153] In other words, the second electron transport layer ETL2 closest to the second electrode CE may be located in the display region (eg, Figure 1 It extends continuously in the display area DA).
[0154] The functional layer FL' may be cut off by the partition wall SP. In one embodiment, the entire functional layer FL' may be cut off by the partition wall SP. However, the embodiments of the present disclosure are not limited thereto. Figure 7 As shown in Fig.11 In the embodiment, the light emitting layer EL can also be continuously deposited without being cut in the cross section.
[0155] In one embodiment, the light emitting layer (e.g. Fig. 9 The second electron transport layer ETL2 of the light emitting layer EL and the second electrode CE may be formed in the display area (eg, Figure 1 The display area DA) extends continuously without being cut off.
[0156] Fig.12 is along Figure 1 In addition to the shape of the partition wall SP, Fig.12 Can be used with Figure 6 Basically the same or similar. Below, repeated descriptions are omitted or simplified.
[0157] Reference Fig.12 In one embodiment, the partition wall SP may have a T-shape in cross-section. In addition, a width of a lower portion of the partition wall SP may be substantially the same as or similar to a width of an upper portion of the pixel defining layer PDL.
[0158] Fig.13 is along Figure 1 Another example cross-sectional view taken along line II'. Fig.14 is along Figure 1 Another example cross-sectional view taken along line II'.
[0159] In addition to the insulation layer ISL, Fig.13 and Fig.14 Can be used with Figure 6 Basically the same or similar. Below, repeated descriptions are omitted or simplified.
[0160] Reference Fig.13 and Fig.14 In one embodiment, the insulating layer ISL may be disposed on the partition wall SP.
[0161] In one implementation, the light emission layer EL may be completely cut off by the partition wall SP and the insulating layer ISL.
[0162] For example, Fig.13 As shown in , the insulating layer ISL may be a single layer. In one implementation, the insulating layer ISL may include an inorganic material.
[0163] For example, the insulating layer ISL may include SiO x 、SiN x Etc. These may be used alone or in combination with each other. Alternatively, when the insulating layer ISL includes a metal material, examples of the material included in the insulating layer ISL may include aluminum (Al), hafnium (Hf), zirconium (Zr), tantalum (Ta), titanium (Ti), etc. These materials may be used alone or in combination with each other.
[0164] Alternatively, if Fig.14 As shown in FIG. 4 , the insulating layer ISL may be a multi-layer including a first insulating layer ISL1 and a second insulating layer ISL2 disposed on the first insulating layer ISL1 .
[0165] For example, the first insulating layer ISL1 may include SiOx 、SiN x The second insulating layer ISL2 may include SiO x 、SiN x Therefore, when the insulating layer ISL is a multi-layer, the insulating layer ISL may include a plurality of SiO x and SiN x Alternatively, the first insulating layer ISL1 and the second insulating layer ISL2 may include a metal material. However, the embodiments of the present disclosure are not limited thereto, and the insulating layer ISL may be a multilayer including three or more layers.
[0166] Fig.15 is a plan view showing an example of a partition wall according to an embodiment of the present disclosure. Fig.16 It is shown Fig.15 A plan view of another example of a partition wall.
[0167] Reference Fig.15 , the partition wall SP may include a first partition wall portion extending in a first direction DR1 on the display area DA and a second partition wall portion extending in a second direction DR2 intersecting the first direction DR1.
[0168] The first partition wall portion extending in the first direction DR1 and the second partition wall portion extending in the second direction DR2 may be disposed at the same layer in the display area DA.
[0169] Reference Fig.16 , the partition wall SP may have a wave shape on the display area DA, and may include a plurality of partition walls spaced apart from each other. Although the wave shape is described as a repeated “L” shape, the present disclosure is not limited thereto.
[0170] Fig.17 is a plan view for illustrating a method of inspecting a short circuit in a partition wall through a partition wall and a signal line.
[0171] Reference Figure 1 and Fig.17 , the signal line SL may be placed in the non-display area NDA.
[0172] A driver IC may be disposed in the non-display area NDA. The driver IC for applying a signal to the partition wall SP may be connected to the signal line SL. The signal line SL may be electrically connected to the partition wall SP on the display area DA.
[0173] The signal line SL electrically connected to the partition wall SP may apply a signal to one side of the partition wall SP, and the partition wall SP having received the signal may transmit the signal to the opposite signal line SL. At this time, the received signal may be transmitted to the driver IC to check whether the partition wall SP is short-circuited.
[0174] Specifically, the driver IC can compare the current values at a first point of the partition wall SP and a second point of the partition wall SP to check whether the partition wall SP has a short circuit defect. The first point may be any point where the partition wall SP and the signal line SL are connected, and the second point may be any point spaced apart from the first point on the display area DA.
[0175] In one embodiment, if the current value at the first point of the partition wall SP has a random value, and the current value at the second point of the partition wall SP is similar to the random value measured at the first point, it can be determined that a short circuit defect does not occur in the partition wall SP. On the contrary, when the current value at the first point of the partition wall SP has an arbitrary value and the current value at the second point of the partition wall SP converges to 0, it can be determined that a short circuit defect occurs in the partition wall SP.
[0176] When the partition wall SP includes an inorganic material such as silicon oxide, silicon nitride, or the like, a short defect in the partition wall SP cannot be inspected through the partition wall SP.
[0177] Refer again Figures 1 to 17 Since the display device according to the embodiment of the present disclosure includes the partition wall SP, the partition wall SP includes the first portion SP1 including the metal and the second portion SP2 including the metal oxide film, it is possible to prevent leakage current from flowing into adjacent pixel regions (e.g., the first pixel region PA1, the second pixel region PA2, and the third pixel region PA3), and to inspect whether the partition wall SP has a short-circuit defect. In addition, the process yield can be improved by inspecting the short-circuit defect in the partition wall SP during the manufacturing process of the display device.
[0178] The present disclosure can be applied to display devices and electronic devices including display devices. For example, the present disclosure can be applied to high-resolution smart phones, mobile phones, smart boards, smart watches, tablet personal computers (PCs), vehicle navigation systems, televisions, computer monitors, notebook computers, etc.
[0179] While the present disclosure has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit or scope of the present disclosure as defined by the appended claims.
Claims
1. A display device, comprising: a substrate, the substrate comprising a display area and a non-display area adjacent to the display area; a first electrode, the first electrode being disposed in the display area on the substrate; a pixel defining layer, the pixel defining layer being disposed on the substrate and exposing at least a portion of the first electrode; a partition wall disposed on the pixel defining layer and comprising: a first portion including a metal material, and a second portion surrounding the first portion and including a metal oxide; a light emitting layer provided on the first electrode and the partition wall, and at least a portion of the light emitting layer is cut off by the partition wall; and A second electrode is provided on the light emitting layer and the partition wall.
2. The display device according to claim 1, wherein: The partition wall includes at least one selected from the group consisting of aluminum, hafnium, zirconium, tantalum, and titanium.
3. The display device according to claim 1, wherein: The partition wall comprises: a first partition wall portion extending in a first direction; and A second partition wall portion extending in a second direction intersecting the first direction.
4. The display device according to claim 1, wherein: The width of the upper portion of the partition wall is greater than the width of the lower portion of the partition wall.
5. The display device according to claim 1, wherein: The light emitting layer comprises: a plurality of organic light emitting layers sequentially disposed on the first electrode and the partition wall; and A functional layer is provided between the plurality of organic light emitting layers, and the functional layer is completely cut off by the partition wall.
6. The display device according to claim 5, wherein: An upper surface of the partition wall is positioned at the same level as an upper surface of a portion of the light emitting layer directly disposed on the first electrode with respect to the substrate.
7. The display device according to claim 5, wherein: The organic light emitting layer comprises: a blue organic light emitting layer, a green organic light emitting layer, and a red organic light emitting layer, the blue organic light emitting layer, the green organic light emitting layer, and the red organic light emitting layer being disposed on the first electrode and the partition wall, and The blue organic light emitting layer and the green organic light emitting layer are cut off by the partition wall, and the red organic light emitting layer continuously extends in the display area.
8. The display device according to claim 5, wherein: The functional layer comprises: at least one hole transport layer; and at least one electron transport layer, and The electron transport layer closest to the second electrode extends continuously in the display area.
9. The display device according to claim 1, further comprising: a signal line disposed in the non-display area and electrically connected to the partition wall to apply a signal to the partition wall; as well as A driver is provided in the non-display area and measures a current value of the partition wall based on the signal.
10. The display device according to claim 1, further comprising: An insulating layer is disposed directly on the partition wall.