Display panel, method for manufacturing display panel, and display device

Abstract

This application provides a display panel, a method for manufacturing the display panel, and a display device. The display panel includes a display area and a non-display area located on at least one side of the display area. It also includes a substrate, a buffer layer, and an insulating layer. The buffer layer is disposed on one side of the substrate and includes at least two first isolation trenches located in the non-display area. The at least two first isolation trenches are spaced apart along a direction away from the display area. The insulating layer is disposed on the side of the buffer layer opposite to the substrate and includes a second isolation trench located in the non-display area. The first isolation trenches and the second isolation trenches are connected, and the orthographic projections of the at least two first isolation trenches on the substrate are within the orthographic projections of the second isolation trench on the substrate. The first and second isolation trenches can slow down the extension of cracks towards the display area. Furthermore, due to the larger size of the second isolation trench, it facilitates the cleaning of conductive materials, thereby improving the processing performance of the display panel.

Description

Technical Field

[0001] The present application relates to the technical field of display devices, and in particular to a display panel, a method for manufacturing a display panel, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display devices.

[0003] However, the process performance of current OLED display products needs to be improved. Summary of the invention

[0004] The embodiments of the present application provide a display panel, a method for manufacturing a display panel, and a display device, aiming to improve the process performance of the display panel.

[0005] An embodiment of the first aspect of the present application provides a display panel, comprising a display area and a non-display area located at least on one side of the display area, and further comprising: a substrate, a buffer layer and an insulating layer, wherein the buffer layer is arranged on one side of the substrate, the buffer layer comprises at least two first isolation grooves located in the non-display area, and the at least two first isolation grooves are arranged at intervals in a direction away from the display area; an insulating layer is arranged on a side of the buffer layer away from the substrate, the insulating layer comprises a second isolation groove located in the non-display area; wherein the first isolation groove is connected to the second isolation groove, and the orthographic projections of the at least two first isolation grooves on the substrate are located within the orthographic projections of the second isolation grooves on the substrate.

[0006] According to an embodiment of the present application, the number of the second isolation grooves is one, the number of the first isolation grooves is more than two, and the orthographic projections of the more than two first isolation grooves on the substrate are located within the orthographic projections of the second isolation grooves on the substrate.

[0007] According to an embodiment of the present application, the insulating layer includes at least two second isolation grooves arranged in the non-display area, and the second isolation grooves are arranged at intervals in a direction away from the display area. The buffer layer includes a plurality of first isolation grooves arranged in the non-display area, and the orthographic projections of at least two first isolation grooves on the substrate are located within the orthographic projection of the same second isolation groove on the substrate.

[0008] According to an embodiment of the present application, the insulating layer includes at least two sub-insulating layers stacked together.

[0009] According to an embodiment of the present application, the insulating layer includes at least one of a gate insulating layer, a dielectric layer, and an interlayer insulating layer.

[0010] According to an embodiment of the present application, the insulating layer includes a gate insulating layer, a dielectric layer, and an interlayer insulating layer that are stacked.

[0011] According to an embodiment of the present application, the gate insulating layer, the dielectric layer and the interlayer insulating layer are sequentially arranged in a direction away from the substrate.

[0012] According to an embodiment of the present application, a first crack dam is disposed between two adjacent first isolation trenches, a second crack dam is disposed between two adjacent second isolation trenches, and the second crack dam is located on a side of the first crack dam away from the substrate.

[0013] According to an embodiment of the present application, an orthographic projection of the first crack dam on the substrate at least partially overlaps with an orthographic projection of the second crack dam on the substrate.

[0014] According to an embodiment of the present application, a connecting wire is disposed on the side of the insulating layer facing away from the substrate, the insulating layer is provided with a via hole extending along the thickness direction of the display panel, and the connecting wire is at least partially located in the via hole.

[0015] According to an embodiment of the present application, the display panel also includes a semiconductor layer, which is arranged on the side of the insulating layer facing the buffer layer, the orthographic projection of the via on the substrate at least partially overlaps with the orthographic projection of the semiconductor layer on the substrate, and the connecting wire electrically connects the semiconductor layer.

[0016] According to an embodiment of the present application, the display panel further includes a planar layer, and at least a portion of the planar layer covers the first isolation trench and the second isolation trench.

[0017] According to an embodiment of the present application, at least a portion of the planar layer is located on a side of the insulating layer facing away from the substrate.

[0018] According to an embodiment of the present application, the material of the planar layer includes an organic material.

[0019] The embodiment of the second aspect of the present application further provides a method for manufacturing a display panel, wherein the display panel includes a display area and a non-display area located on at least one side of the display area, and the manufacturing method includes:

[0020] A buffer layer is formed on one side of the substrate.

[0021] An insulating layer is formed on the side of the buffer layer facing away from the substrate.

[0022] The insulating layer is patterned to form a second isolation groove located in the non-display area, so that at least a portion of the buffer layer is exposed from the second isolation groove.

[0023] The buffer layer exposed by the second isolation trench is patterned to form at least two first isolation trenches, and the orthographic projections of the at least two first isolation trenches on the substrate are located within the orthographic projections of the second isolation trench on the substrate.

[0024] According to an embodiment of the present application, before patterning the buffer layer exposed by the second isolation trench to form at least two first isolation trenches, the method further includes:

[0025] The insulating layer is patterned to form a via hole.

[0026] A conductive material layer is disposed on the side of the insulating layer away from the substrate and in the second isolation groove, and at least a portion of the conductive material layer is filled in the via hole.

[0027] The conductive material layer is patterned to form a connecting wire located on a side of the insulating layer away from the substrate, and at least a portion of the connecting wire is located in the via hole.

[0028] According to an embodiment of the present application, the via hole and the second isolation trench are formed in the same patterning process.

[0029] An embodiment of the third aspect of the present application further provides a display device, comprising a display panel in any one of the first aspects or a display panel manufactured by the manufacturing method of the display panel in any one of the second aspects.

[0030] In an embodiment of the present application, when a crack appears on the display panel, the first isolation groove and the second isolation groove can change the extension path of the crack, play a role in slowing down the extension of the crack toward the display area, prevent the display area structure from being damaged, and improve the packaging effect. The display panel includes a first isolation groove located in the buffer layer, at least two first isolation grooves are arranged in a spaced-apart direction away from the display, and the first isolation grooves are arranged to be at least two, thereby enhancing the isolation effect and slowing down the extension of the crack toward the direction close to the display area. The display panel also includes a second isolation groove located in the insulating layer, and the buffer layer and the insulating layer are stacked, that is, the first isolation groove and the second isolation groove are not arranged in the same layer, which is conducive to improving the isolation effect of the crack.

[0031] The first isolation groove is connected with the second isolation groove. When the isolation groove is manufactured, the second isolation groove can be opened to expose the buffer layer. The first isolation groove is opened on the buffer layer exposed from the second isolation groove to facilitate processing of the first isolation groove.

[0032] The orthographic projections of at least two first isolation grooves on the substrate are located within the orthographic projection of the second isolation groove on the substrate, that is, the size of the second isolation groove in the direction perpendicular to the thickness of the display panel is larger than that of the first isolation groove. In the manufacturing process of the display panel, there will be residual conductive material in the second isolation groove. Since the size of the second isolation groove is larger, it is convenient to clean the conductive material, reduce the residue, and reduce the problem of conductive material entering the display panel to cause short circuit, thereby improving the process performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Other features, objects and advantages of the present application will become more apparent by reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals represent the same or similar features.

[0034] Figure 1 is a structural schematic diagram of a display panel provided in an embodiment of the present application;

[0035] Figure 2 is a schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0036] Figure 3 is a structural schematic diagram of another display panel provided in an embodiment of the present application;

[0037] Figure 4 is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0038] Figures 5 to 8 is a schematic diagram of a method for manufacturing a display panel provided in an embodiment of the present application;

[0039] Fig. 9 is a flow chart of another method for manufacturing a display panel provided in an embodiment of the present application;

[0040] Figures 10 to 12 It is a schematic diagram of another method for manufacturing a display panel provided in an embodiment of the present application.

[0041] Explanation of the reference numerals: 10, display area; 20, non-display area; 100, substrate; 200, buffer layer; 210, first isolation groove; 220, first crack dam; 300, insulating layer; 301, via hole; 310, second isolation groove; 320, gate insulating layer; 330, dielectric layer; 340, interlayer insulating layer; 350, second crack dam; 400, conductive material layer; 410, connecting wire; 500, semiconductor layer; 510, gate; 600, flat layer; X, thickness direction. DETAILED DESCRIPTION

[0042] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In the detailed description below, many specific details are proposed to provide a comprehensive understanding of the present application. However, it is obvious to those skilled in the art that the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating examples of the present application. In the accompanying drawings and the following description, at least some of the known structures and technologies are not shown to avoid unnecessary ambiguity in the present application; and, for clarity, the size of some structures may be exaggerated. In addition, the features, structures or characteristics described below may be combined in one or more embodiments in any suitable manner.

[0043] In the description of the present application, it should be noted that, unless otherwise specified, "multiple" means more than two; the terms "upper", "lower", "left", "right", "inner", "outer", etc., indicating directions or positional relationships, are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0044] The directional words appearing in the following description are all directions shown in the figures, and do not limit the specific structure of the embodiments of the present application. In the description of the present application, it should also be noted that, unless otherwise clearly specified and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0045] In the process of realizing the present invention, the inventors found that the following problems exist in the related art: during the production and use of the display panel, cracks are easily generated in the edge area of ​​the display panel due to factors such as cutting process, transportation or bending. If the cracks extend to the inside of the display panel, important components in the display panel may be damaged, and external water, oxygen, etc. may invade the inside of the display panel, thereby affecting the product yield and increasing production costs.

[0046] Based on the above problems, the present application provides a display panel, a display device and a method for manufacturing a display panel.

[0047] like Figure 1As shown, a display panel provided by an embodiment of the first aspect of the present application includes a display area 10 and a non-display area 20 located on at least one side of the display area 10, and also includes: a substrate 100, a buffer layer 200 and an insulating layer 300, the buffer layer 200 is arranged on one side of the substrate 100, the buffer layer 200 includes at least two first isolation grooves 210 located in the non-display area 20, and the at least two first isolation grooves 210 are arranged at intervals in a direction away from the display area 10; the insulating layer 300 is arranged on the side of the buffer layer 200 away from the substrate 100, and the insulating layer 300 includes a second isolation groove 310 located in the non-display area 20; wherein the first isolation groove 210 is connected to the second isolation groove 310, and the orthographic projections of the at least two first isolation grooves 210 on the substrate 100 are located within the orthographic projections of the second isolation groove 310 on the substrate 100.

[0048] In this embodiment, when cracks appear on the display panel, the first isolation groove 210 and the second isolation groove 310 can change the extension path of the cracks, play a role in slowing down the extension of the cracks toward the display area 10, prevent the structure of the display area 10 from being damaged, and improve the packaging effect. The display panel includes a first isolation groove 210 located in the buffer layer 200, at least two first isolation grooves 210 are arranged in a spaced manner away from the display direction, and the first isolation groove 210 is arranged at least two to enhance the isolation effect and slow down the extension of the cracks toward the direction close to the display area 10. The display panel also includes a second isolation groove 310 located in the insulating layer 300, and the buffer layer 200 and the insulating layer 300 are stacked, that is, the first isolation groove 210 and the second isolation groove 310 are not arranged in the same layer, which is conducive to improving the isolation effect of the cracks.

[0049] The first isolation trench 210 is connected to the second isolation trench 310 . When the isolation trench is manufactured, the second isolation trench 310 can be opened to expose the buffer layer 200 . The first isolation trench 210 is opened on the buffer layer 200 exposed from the second isolation trench 310 , so as to facilitate the processing of the first isolation trench 210 .

[0050] The orthographic projections of at least two first isolation grooves 210 on the substrate 100 are located within the orthographic projection of the second isolation groove 310 on the substrate 100, that is, the size of the second isolation groove 310 in the direction X perpendicular to the thickness of the display panel is larger than that of the first isolation groove 210. In the manufacturing process of the display panel, there will be residual conductive material in the second isolation groove 310. Since the size of the second isolation groove 310 is larger, it is convenient to clean the conductive material, reduce the residue, and reduce the problem of conductive material entering the display panel to cause short circuit, thereby improving the process performance of the display panel.

[0051] Optionally, the extension direction of the first isolation groove 210 and the second isolation groove 310 is set along the extension direction of the boundary of the display area 10, which is conducive to extending the crack along the extension direction of the boundary of the display area 10, thereby reducing the probability of the crack extending toward the direction close to the display area 10.

[0052] like Figure 2 As shown, in some optional embodiments, the number of the second isolation trench 310 is one, the number of the first isolation trench 210 is more than two, and the orthographic projections of the more than two first isolation trenches 210 on the substrate 100 are located within the orthographic projections of the second isolation trench 310 on the substrate 100.

[0053] In these optional embodiments, the smaller the width of the non-display area 20 is, the narrower the frame of the display panel is. Under the premise that the width of the non-display area 20 is limited, relative to setting two or more second isolation grooves 310, when the number of the second isolation grooves 310 is one, the size of the second isolation groove 310 is the largest, thereby achieving a better cleaning effect on the conductive material in the second isolation groove 310. The buffer layer 200 is etched at the second isolation groove 310 to form two or more first isolation grooves 210, which can ensure the isolation effect on the cracks.

[0054] like Figure 1 As shown, in some optional embodiments, the insulating layer 300 includes at least two second isolation grooves 310 arranged in the non-display area 20, and each second isolation groove 310 is arranged at intervals in a direction away from the display area 10, and the buffer layer 200 includes a plurality of first isolation grooves 210 arranged in the non-display area 20, and the orthographic projections of at least two first isolation grooves 210 on the substrate 100 are located within the orthographic projection of the same second isolation groove 310 on the substrate 100.

[0055] In these optional embodiments, the insulating layer 300 includes at least two second isolation grooves 310, and at the same time, the number of the first isolation grooves 210 is also multiple, so as to enhance the isolation effect of the cracks. The orthographic projections of at least two first isolation grooves 210 on the substrate 100 are located within the orthographic projection of the same second isolation groove 310 on the substrate 100, that is, one second isolation groove 310 is arranged opposite to at least two first isolation grooves 210, for example, the orthographic projections of three first isolation grooves 210 on the substrate 100 are located within the orthographic projection of the same second isolation groove 310 on the substrate 100, or the orthographic projections of four first isolation grooves 210 on the substrate 100 are located within the orthographic projection of the same second isolation groove 310 on the substrate 100, etc. The dimension of the second isolation groove 310 along the direction perpendicular to the thickness direction X of the display panel is made larger, so as to facilitate cleaning of the conductive material in the second isolation groove 310.

[0056] Optionally, the number of first isolation trenches 210 corresponding to each second isolation trench 310 is equal, or the number of first isolation trenches 210 corresponding to each second isolation trench 310 is different. When the number of first isolation trenches 210 corresponding to each second isolation trench 310 is equal, the width of each second isolation trench 310 is equal, which is conducive to the manufacture of the second isolation trench 310. When the number of first isolation trenches 210 corresponding to each second isolation trench 310 is different, it is conducive to simplifying the design difficulty of the number and width of the first isolation trench 210.

[0057] Optionally, the insulating layer 300 includes at least two stacked sub-insulating layers. The insulating layer 300 in the display panel includes at least two sub-insulating layers, and the second isolation groove 310 is disposed on at least two sub-insulating layers, thereby enhancing the isolation effect on cracks.

[0058] like Figure 3 As shown, in some optional embodiments, the insulating layer 300 includes a gate insulating layer 320 , a dielectric layer 330 , and an interlayer insulating layer 340 which are stacked.

[0059] In these optional embodiments, the second isolation groove 310 is provided in the gate insulating layer 320 , the dielectric layer 330 and the interlayer insulating layer 340 , which can enhance the isolation effect on the cracks, thereby enhancing the reliability of the display area 10 of the display panel.

[0060] Optionally, the gate insulating layer 320 , the dielectric layer 330 and the interlayer insulating layer 340 are sequentially arranged in a direction away from the substrate 100 .

[0061] like Figure 3 As shown, in some optional embodiments, in the display area 10, the display panel may also include at least one thin film transistor, and the thin film transistor may include a semiconductor layer 500 located between the buffer layer 200 and the gate insulating layer 320, and a gate 510 located between the gate insulating layer 320 and the dielectric layer 330.

[0062] like Figure 3 As shown, in some optional embodiments, the insulating layer 300 includes at least one of a gate insulating layer 320 , a dielectric layer 330 , and an interlayer insulating layer 340 .

[0063] In these optional embodiments, a second isolation groove 310 is provided in at least one of the gate insulating layer 320 , the dielectric layer 330 and the interlayer insulating layer 340 , which helps to reduce the probability of cracks extending from at least one of the gate insulating layer 320 , the dielectric layer 330 and the interlayer insulating layer 340 to the display area 10 .

[0064] like Figure 3As shown, in some optional embodiments, a first crack dam 220 is provided between two adjacent first isolation grooves 210, and a second crack dam 350 is provided between two adjacent second isolation grooves 310. The second crack dam 350 is located on the side of the first crack dam 220 away from the substrate 100, and the orthographic projection of the first crack dam 220 on the substrate 100 at least partially overlaps with the orthographic projection of the second crack dam 350 on the substrate 100.

[0065] In these optional embodiments, the first crack dam 220 is the buffer layer 200 that is not etched between the two first isolation grooves 210, the second crack dam 350 is the insulating layer 300 that is not etched between the two second isolation grooves 310, the first isolation groove 210 is formed by etching the buffer layer 200 exposed in the second isolation groove 310, and the orthographic projection area of ​​the second crack dam 350 toward the substrate 100 is blocked and cannot be etched, thereby forming the first crack dam 220.

[0066] like Figure 3 As shown, in some optional embodiments, a connecting wire 410 is disposed on the side of the insulating layer 300 facing away from the substrate 100 , and the insulating layer 300 is provided with a via hole 301 extending along the thickness direction X of the display panel, and the connecting wire 410 is at least partially located in the via hole 301 .

[0067] In these optional embodiments, the insulating layer 300 is provided with a via hole 301 extending along the thickness direction X of the display panel, the connecting wire 410 is at least partially located in the via hole 301 , and the connecting wire 410 can be connected to the side of the insulating layer 300 facing the substrate 100 through the via hole 301 .

[0068] Optionally, the via hole 301 and the second isolation trench 310 may be formed in the same patterning process.

[0069] Optional, such as Figure 3 As shown, the semiconductor layer 500 of the display panel is arranged on the side of the insulating layer 300 facing the buffer layer 200, and the orthographic projection of the via hole 301 on the substrate 100 at least partially overlaps with the orthographic projection of the semiconductor layer 500 on the substrate 100. Specifically, in one embodiment, the connecting wire 410 electrically connects the source region and the drain region of the semiconductor layer 500 to form a source-drain electrode. Optionally, the connecting wire 410 electrically connects the source region and the drain region of the semiconductor layer 500 through the via hole 301 to form a source-drain electrode. In one embodiment, the source-drain electrode is insulated, that is, the source electrode and the drain electrode are insulated.

[0070] like Figure 3 As shown, in some optional embodiments, the display panel further includes a planar layer 600 , and at least a portion of the planar layer 600 covers the first isolation trench 210 and the second isolation trench 310 .

[0071] In these optional embodiments, after forming the first isolation trench 210 and the second isolation trench 310, the first isolation trench 210 and the second isolation trench 310 are covered by the planarization layer 600, so that the first isolation trench 210 and the second isolation trench 310 are planarized, which is convenient for subsequent production of other film layers. At the same time, the planarization layer 600 fills the first isolation trench 210 and the second isolation trench 310, which is conducive to enhancing the structural strength of the buffer layer 200 and the insulating layer 300.

[0072] Optional, such as Figure 3 As shown, at least part of the planarization layer 600 is located on the side of the insulating layer 300 away from the substrate 100 ; the planarization layer 600 also planarizes the side of the insulating layer 300 away from the substrate 100 , and can insulate the connecting wires 410 located on the insulating layer 300 .

[0073] Optionally, the material of the planar layer 600 includes an organic material having good ductility. Setting the planar layer 600 made of organic material in the first isolation groove 210 and the second isolation groove 310 is beneficial to improving the structural strength of the first isolation groove 210 and the second isolation groove 310, thereby improving the isolation effect on the cracks.

[0074] The second aspect of the present application also provides a method for manufacturing a display panel, wherein the display panel includes a display area 10 and a non-display area 20 located at at least one side of the display area 10. Figure 4 As shown, the manufacturing method comprises the following steps:

[0075] Step S01: Figure 5 As shown, a buffer layer 200 is formed on one side of the substrate 100 .

[0076] Step S02: Figure 6 As shown, an insulating layer 300 is formed on the side of the buffer layer 200 facing away from the substrate 100 .

[0077] Step S03: Figure 7 or Figure 8 As shown, the insulating layer 300 is patterned to form a second isolation groove 310 located in the non-display area 20 , so that at least a portion of the buffer layer 200 is exposed from the second isolation groove 310 .

[0078] Step S04: Figure 1 and Figure 2 As shown, the buffer layer 200 exposed by the second isolation trench 310 is patterned to form at least two first isolation trenches 210 , and the orthographic projections of the at least two first isolation trenches 210 on the substrate 100 are located within the orthographic projections of the second isolation trench 310 on the substrate 100 .

[0079] In this embodiment, when cracks appear on the display panel, the first isolation groove 210 and the second isolation groove 310 can change the extension path of the cracks, play a role in slowing down the extension of the cracks toward the display area 10, prevent the structure of the display area 10 from being damaged, and improve the packaging effect. When the isolation groove is made, the second isolation groove 310 is opened, and the second isolation groove 310 exposes the buffer layer 200. The first isolation groove 210 is opened on the buffer layer 200 exposed from the second isolation groove 310, so as to facilitate the processing of the first isolation groove 210. The orthographic projections of at least two first isolation grooves 210 on the substrate 100 are located within the orthographic projections of the second isolation groove 310 on the substrate 100, that is, the size of the second isolation groove 310 in the direction perpendicular to the thickness direction X of the display panel is larger than that of the first isolation groove 210. In the manufacturing process of the display panel, there will be conductive material residues in the second isolation groove 310. Since the size of the second isolation groove 310 is large, it is convenient to clean the conductive material, reduce the residue, reduce the probability of the conductive material entering the display panel to cause a short circuit, and improve the process performance of the display panel.

[0080] In some optional embodiments, before step S04, as Fig. 9 As shown, it also includes:

[0081] Step S11: Fig.10 As shown, the insulating layer 300 is patterned to form a via hole 301 .

[0082] Step S12: Fig.11 As shown, a conductive material layer 400 is disposed on the side of the insulating layer 300 facing away from the substrate 100 and in the second isolation trench 310 , and at least a portion of the conductive material layer 400 is filled in the via hole 301 .

[0083] Step S13: Fig.12 As shown, the conductive material layer 400 is patterned to form a connecting wire 410 located on the side of the insulating layer 300 away from the substrate 100 , and the connecting wire 410 is at least partially located in the via hole 301 .

[0084] In these optional embodiments, the insulating layer 300 is provided with a via 301 extending along the thickness direction X of the display panel, and the conductive material layer 400 is arranged on the side of the insulating layer 300 away from the substrate 100 and in the second isolation groove 310. The conductive material layer 400 is then patterned to form a connecting wire 410 located on the side of the insulating layer 300 away from the substrate 100. During the patterning process, the conductive material layer 400 located in the second isolation groove 310 is etched away. Since the size of the second isolation groove 310 is relatively large, it is beneficial to clean the conductive material of the conductive material layer 400 and reduce residue.

[0085] The connecting wire 410 is at least partially located in the via hole 301, and the connecting wire 410 can be connected to the side of the insulating layer 300 facing the substrate 100 through the via hole 301. Optionally, the display panel further includes a semiconductor layer 500, which is disposed on the side of the insulating layer 300 facing the buffer layer 200, and the connecting wire 410 is electrically connected to the source region and the drain region of the semiconductor layer 500 through the via hole 301 to form a source-drain electrode.

[0086] Optionally, the via hole 301 and the second isolation groove 310 are formed in the same patterning process. The via hole 301 and the second isolation groove 310 have the same depth along the thickness direction X of the display panel, which is the thickness of the insulating layer 300. When etching the second isolation groove 310, the via hole 301 is etched simultaneously, which can simplify the process.

[0087] The embodiment of the third aspect of the present application also provides a display device, including the display panel of any of the above-mentioned first aspect embodiments or the display panel manufactured by the manufacturing method of the display panel provided by any of the above-mentioned second aspect embodiments. Since the display device provided by the embodiment of the third aspect of the present application includes the display panel of any of the above-mentioned first aspect or second aspect embodiments, the display device provided by the embodiment of the third aspect of the present application has the beneficial effects of the display panel of any of the above-mentioned first and second aspects, which will not be repeated here.

[0088] The display device in the embodiments of the present application includes but is not limited to mobile phones, personal digital assistants (PDAs), tablet computers, e-books, televisions, access control systems, smart landline phones, consoles, and other devices with display functions.

[0089] Although the present application has been described with reference to preferred embodiments, various modifications may be made thereto and parts thereof may be replaced with equivalents without departing from the scope of the present application. In particular, the various technical features mentioned in the various embodiments may be combined in any manner as long as there are no structural conflicts. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a non-display area located at least on one side of the display area, and further includes: substrate; A buffer layer is disposed on one side of the substrate, wherein the buffer layer comprises at least two first isolation grooves located in the non-display area, and the at least two first isolation grooves are spaced apart in a direction away from the display area; An insulating layer, disposed on a side of the buffer layer away from the substrate, the insulating layer comprising a second isolation groove located in the non-display area; The first isolation trench is connected to the second isolation trench, and at least two orthographic projections of the first isolation trench on the substrate are located within the orthographic projection of the second isolation trench on the substrate.

2. The display panel according to claim 1, characterized in that: The number of the second isolation grooves is one, the number of the first isolation grooves is more than two, and the orthographic projections of the more than two first isolation grooves on the substrate are located within the orthographic projections of the second isolation grooves on the substrate.

3. The display panel according to claim 1, characterized in that: The insulating layer comprises at least two second isolation grooves disposed in the non-display area, and each of the second isolation grooves is spaced apart in a direction away from the display area; the buffer layer comprises a plurality of first isolation grooves disposed in the non-display area, and orthographic projections of at least two of the first isolation grooves on the substrate are located within an orthographic projection of the same second isolation groove on the substrate; Preferably, the insulating layer includes at least two sub-insulating layers stacked together.

4. The display panel according to claim 3, characterized in that: The insulating layer includes at least one of a gate insulating layer, a dielectric layer, and an interlayer insulating layer; Preferably, the insulating layer includes the gate insulating layer, the dielectric layer and the interlayer insulating layer which are stacked; Preferably, the gate insulating layer, the dielectric layer and the interlayer insulating layer are arranged in sequence in a direction away from the substrate.

5. The display panel according to claim 3, characterized in that: A first crack dam is disposed between two adjacent first isolation grooves, and a second crack dam is disposed between two adjacent second isolation grooves, wherein the second crack dam is located on a side of the first crack dam away from the substrate; Preferably, an orthographic projection of the first crack dam on the substrate at least partially overlaps with an orthographic projection of the second crack dam on the substrate.

6. The display panel according to claim 1, characterized in that: A connecting wire is arranged on a side of the insulating layer away from the substrate, the insulating layer is provided with a via hole extending along the thickness direction of the display panel, and the connecting wire is at least partially located in the via hole; Preferably, the display panel also includes a semiconductor layer, the semiconductor layer is arranged on a side of the insulating layer facing the buffer layer, the orthographic projection of the via on the substrate at least partially overlaps with the orthographic projection of the semiconductor layer on the substrate, and the connecting wire is electrically connected to the semiconductor layer.

7. The display panel according to claim 1, characterized in that: The display panel further includes a planar layer, at least a portion of which covers the first isolation trench and the second isolation trench; Preferably, at least part of the flat layer is located on a side of the insulating layer away from the substrate; Preferably, the material of the planar layer includes organic material.

8. A method for manufacturing a display panel, characterized in that: The display panel includes a display area and a non-display area located at least on one side of the display area, and the manufacturing method includes: forming a buffer layer on one side of the substrate; forming an insulating layer on a side of the buffer layer away from the substrate; Performing patterning on the insulating layer to form a second isolation groove located in the non-display area, so that at least a portion of the buffer layer is exposed from the second isolation groove; The buffer layer exposed by the second isolation trench is patterned to form at least two first isolation trenches, and the orthographic projections of at least two first isolation trenches on the substrate are located within the orthographic projection of the second isolation trench on the substrate.

9. The manufacturing method according to claim 8, characterized in that: Before patterning the buffer layer exposed by the second isolation trench to form at least two first isolation trenches, the method further includes: Performing patterning on the insulating layer to form via holes; Disposing a conductive material layer on the side of the insulating layer away from the substrate and in the second isolation groove, wherein at least a portion of the conductive material layer is filled in the via hole; Patterning the conductive material layer to form a connecting wire located on a side of the insulating layer away from the substrate, wherein at least a portion of the connecting wire is located in the via hole; Preferably, the via hole and the second isolation trench are formed in the same patterning process.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 7; or a display panel manufactured by the method for manufacturing a display panel according to any one of claims 8 to 9.

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