Display panel, display device and manufacturing method of display panel

Abstract

The invention discloses a display panel, a display device and a manufacturing method of the display panel, and generally relates to the technical field of display equipment. The display panel comprises a pixel unit, the pixel unit comprises a pixel opening area and an anode opening area, the pixel opening area comprises an anode layer, a pixel layer and a cathode layer, the anode opening area comprises the anode layer and the cathode layer, and the anode layer and the cathode layer are in lap joint in the anode opening area; a partition area is arranged between the cathode layer of each pixel unit and the cathode layer of the adjacent pixel unit.

Description

Technical Field

[0001] The present disclosure generally relates to the technical field of display devices, and more particularly to a display panel, a display device, and a method for manufacturing a display panel. Background Art

[0002] As display technology develops, display panels are also constantly evolving.

[0003] In the related art, the display circuit of the display panel is constructed by stacking film layers. For some display panels, the VSS end of the display circuit is covered by the entire cathode film layer and overlapped with other film layers that need to be electrically connected.

[0004] After the display panel is turned on, as the lighting time increases, the voltage difference of the pixel circuit of the display panel increases and the turn-on current increases in the way that the cathode film layer is covered in the entire layer. As a result, during the display process, the voltage difference and current of the driving thin film transistors in different areas of the display panel are different, resulting in uneven display in different areas of the display panel. Summary of the invention

[0005] In view of the above-mentioned defects or deficiencies in the related art, it is desired to provide a display panel, a display device and a method for manufacturing a display panel, which can solve the problem of uneven display in different areas of the display panel caused by differences in voltage difference and current driving thin film transistors in different areas of the display panel during the display process, thereby greatly improving the uniformity of the display process of the display panel.

[0006] In a first aspect, a display panel is provided, the display panel comprising a pixel unit, the pixel unit comprising a pixel opening region and an anode opening region, the pixel opening region comprising an anode layer, a pixel layer and a cathode layer, the anode opening region comprising the anode layer and the cathode layer, and the anode layer and the cathode layer are overlapped in the anode opening region; A partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit.

[0007] In the present application, the display panel includes a pixel unit, and the pixel unit includes a pixel opening area and an anode opening area; the pixel opening area includes an anode layer, a pixel layer and a cathode layer, and the anode opening area includes an anode layer and a cathode layer, and the anode layer and the cathode layer are arranged in the anode opening area; there is a partition area between the cathode layer of the pixel unit and the cathode layer of the adjacent pixel unit. In this way, by adding an anode opening area to the pixel unit, the anode film layer and the cathode film layer inside the pixel unit are overlapped, so as to form a cathode film layer overlap at the pixel level; at the same time, a cathode film layer partition area is set around the newly added anode opening area and the pixel opening area, so that the cathode overlap between different pixel units is independent.

[0008] In a second aspect, a display device is provided, which is the display panel described in the first aspect.

[0009] In a third aspect, a method for manufacturing a display panel is provided, wherein the display panel includes a pixel unit, and the method includes: A pixel opening region and an anode opening region are provided in the pixel unit, wherein the pixel opening region includes an anode layer, a pixel layer and a cathode layer, and the anode opening region includes the anode layer and the cathode layer, and the anode layer and the cathode layer are overlapped in the anode opening region; A partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit.

[0010] In a fourth aspect, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method described in the third aspect is implemented.

[0011] In a fifth aspect, a computer-readable storage medium is provided, on which a computer program is stored, characterized in that when the program is executed by a processor, the method described in the third aspect is implemented.

[0012] In a sixth aspect, a computer program product is provided, wherein the computer program product includes instructions, and the instructions are executed by a processor to implement the method described in the third aspect.

[0013] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 It is a structural schematic diagram of a display circuit in the related art; Figure 2 A schematic diagram of the structure of a display circuit according to an embodiment of the present application; Figure 3 This is one of the structural schematic diagrams of the display panel according to the embodiment of the present application; Figure 4 This is a second structural schematic diagram of a display panel according to an embodiment of the present application; Figure 5 One of the side structural diagrams of the isolation column structure in the display panel provided in the embodiment of the present application; Figure 6 A second side view structural diagram of the isolation column structure in the display panel provided in the embodiment of the present application; Figure 7 The third side view structural diagram of the isolation column structure in the display panel provided in the embodiment of the present application; Figure 8 The third structural diagram of the display panel provided in the embodiment of the present application; Fig. 9 A fourth structural schematic diagram of a display panel provided in an embodiment of the present application; Fig.10 A schematic diagram of a process for manufacturing a display panel provided in an embodiment of the present application; Fig.11 Provided in the embodiments of this application Figure 3 The display panel shown is one of the schematic diagrams of the structure of the display panel during the generation process; Fig.12 Provided in the embodiments of this application Figure 3 The display panel shown is a second schematic diagram of the structure of the display panel during the generation process; Fig.13 Provided in the embodiments of this application Figure 3 The display panel shown is a third schematic diagram of the structure of the display panel during the generation process; Fig.14 Provided in the embodiments of this application Figure 4 The display panel shown is one of the schematic diagrams of the structure of the display panel during the generation process; Fig.15 Provided in the embodiments of this application Figure 4 The display panel shown is a second schematic diagram of the structure of the display panel during the generation process; Fig.16 Provided in the embodiments of this application Fig. 9 The display panel shown is one of the schematic diagrams of the structure of the display panel during the generation process; Fig.17 The embodiments of the present application provide Fig. 9 The display panel shown is a second schematic diagram of the structure of the display panel during the generation process; Fig.18 The embodiments of the present application provide Fig. 9 The display panel shown is a third schematic diagram of the structure of the display panel during the generation process; Fig.19 The embodiments of the present application provide Fig. 9 The fourth structural schematic diagram of the display panel during the generation process is shown; Fig. 20 The embodiments of the present application provide Fig. 9 The display panel shown is a fifth structural schematic diagram of the display panel during the generation process; Fig.21 A fifth structural diagram of a display panel provided in an embodiment of the present application; Fig. 22The embodiments of the present application provide Figure 8 The display panel shown is one of the schematic diagrams of the structure of the display panel during the generation process; Fig.23 The embodiments of the present application provide Figure 8 The display panel shown is a second schematic diagram of the structure of the display panel during the generation process; Fig.24 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0015] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.

[0016] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0017] In the related art, when the display circuit is an OLED display circuit, the display circuit is often constructed in the form of stacking and overlapping different film layers. For the display circuit, the cathode VSS is a whole-surface structure. After the display panel is lit, as time accumulates, the panel temperature of the display panel continues to rise. Correspondingly, the brightness of the display panel and the VSS current rise until saturation. During the long-term lighting process, there will be brightness differences at different display positions of the display panel. The main reason is that, Figure 1 As shown, the source of the DTFT is set at the cross-voltage end of the light-emitting device (EL device). As the temperature of the display panel increases, Voled decreases, so the absolute value of the voltage at the N3 point increases, the difference Vgs between the N1 and N3 nodes increases, and the current increases. In addition, it also affects the DTFT. As the temperature increases, Vth becomes negatively biased and Ion increases. After the circuit Vth is compensated, the current increases due to the increase in I-on.

[0018] In this application, if Figure 2 As shown, in the N-type pixel circuit, by placing the OLED at the drain of the driving tube (DTFT) T3, the influence of the change of the OLED driving voltage on the gate voltage of the T3 tube is overcome, and the (thermal) afterimage is improved; the influence of IR Drop is improved, and the auxiliary electrode is replaced.

[0019] The present application proposes a display panel, a display device and a method for manufacturing a display panel, which can solve the problem of uneven display in different areas of the display panel caused by differences in voltage difference and current driving thin film transistors in different areas of the display panel during the display process, thereby greatly improving the uniformity of the display process of the display panel.

[0020] Figure 3 is a structural schematic diagram of a display panel provided in an embodiment of the present application, wherein the display panel includes a pixel unit.

[0021] It is understandable that, for a display panel, in order to achieve the display purpose, a number of pixel units are arranged in the orthographic projection direction, and adjacent pixel units emit light of different colors. The general luminous colors of pixel units include red, green and blue. The pixel unit includes a pixel driving circuit, and the pixel driving circuit is used to power the light-emitting component in the pixel unit to light it up, thereby achieving the display purpose of the display panel.

[0022] In an embodiment of the present application, the above-mentioned pixel unit includes a pixel opening area and an anode opening area, the above-mentioned pixel opening area includes an anode layer, a pixel layer and a cathode layer, the above-mentioned anode opening area includes the above-mentioned anode layer and the above-mentioned cathode layer, and the above-mentioned anode layer and the above-mentioned cathode layer are overlapped in the above-mentioned anode opening area.

[0023] It can be understood that in the embodiment of the present application, the above-mentioned pixel opening area is the area of ​​the display unit used for emitting light, and the anode opening area is used to achieve overlapping of the anode layer and the cathode layer in the pixel unit, that is, to achieve pixel-level overlapping.

[0024] Furthermore, since the display panel is formed by stacking multiple film layers, for a pixel unit, in order to fix the pixel layer for generating different colors, a recessed portion is provided, the recessed portion is set as a pixel opening area, and the pixel layer is provided in the pixel opening area; correspondingly, in order to form an overlapping area of ​​the cathode layer and the anode layer at a fixed position at the pixel level in the display panel, it is necessary to provide a recessed portion in the orthographic projection area where the pixel unit is located, and the recessed portion is set as an anode opening area, and an overlap between the anode layer and the cathode layer is formed in the anode opening area.

[0025] Furthermore, as described above, the display panel is formed by stacking multiple film layers, and the stacking of different film layers has a sequential requirement. For example, for the anode layer, pixel layer and cathode layer in the pixel opening area of ​​the pixel unit, the stacking order is to stack the anode layer first, then the pixel layer, and finally the cathode layer; correspondingly, for the anode layer and cathode layer in the anode opening area of ​​the pixel unit, the stacking order is to stack the anode layer first, and then the cathode layer.

[0026] Furthermore, in the process of stacking the above-mentioned different film layers in the pixel unit, it is often completed by coating or evaporation. For the same film layer in the above-mentioned two different opening areas in the pixel unit, it is often completed by a single coating or evaporation. For example, the anode layer in the pixel opening area and the anode opening area is formed in the same time period and belongs to the same layer structure; correspondingly, the cathode layer in the pixel opening area and the anode opening area is also formed in the same time period and also belongs to the same layer structure.

[0027] It is understandable that after forming the above-mentioned anode layer, the cathode layer may not be directly set on the adjacent side of the anode layer away from the substrate, but other layers may continue to be set, such as the electro-conductive layer, including the hole injection layer (Hole Inject Layer, HIL) / hole transport layer (Hole Transport Layer, HTL) / electron injection layer (Electron Inject Layer, EIL) / electron transport layer (Electron Transport Layer, ETL). The cathode layer is only set on the adjacent side of the electro-conductive layer away from the substrate. Therefore, in order to enable the anode layer and the cathode layer to overlap in the anode opening area, the electro-conductive layer needs to be removed, and then the cathode layer is set to achieve the purpose of overlapping the cathode layer and the anode layer.

[0028] Below through Figure 3 The above-mentioned pixel opening area and anode opening area are described as follows: like Figure 3 As shown, in Figure 3 The pixel opening region 11 and the anode opening region 12 are included, and the pixel opening region 11 includes an anode layer 111, a pixel layer 112 and a cathode layer 113. Correspondingly, the anode opening region 12 includes a lap electrode 121 and a cathode layer 122, wherein the lap electrode 121 and the cathode layer 122 are directly lapped in the anode opening region 12. It can be understood that the pixel layer 112 can be an emitting layer (EML).

[0029] Depend on Figure 3It can be seen that, in fact, the anode layer 111 and the lap electrode 121 are film layers generated in the same period, and correspondingly, the cathode layer 113 and the cathode layer 122 are also film layers generated in the same period. In the pixel opening region 11, a first electro-conductive layer 114 is spaced between the anode layer 111 and the pixel layer 112, and the first electro-conductive layer includes a hole injection layer (Hole Inject Layer, HIL) and a hole transport layer (Hole Transport Layer, HTL). A second electro-conductive layer 115 is spaced between the pixel layer 112 and the cathode layer 113, and the second electro-conductive layer 115 includes an electron injection layer (Electron Inject Layer, EIL) and an electron transport layer (Electron Transport Layer, ETL).

[0030] Correspondingly, a third electrolytic layer 123 and a fourth electrolytic layer 124 are spaced between the overlapping electrode 121 and the cathode layer 122 in the anode opening area 12. The third electrolytic layer 123 includes a hole injection layer (Hole Inject Layer, HIL) and a hole transport layer (Hole Transport Layer, HTL), and the fourth electrolytic layer 124 includes an electron injection layer (Electron Inject Layer, EIL) and an electron transport layer (Electron Transport Layer, ETL).

[0031] Furthermore, the first electrochromic layer 114 and the third electrochromic layer 123 are formed in the same period of time and belong to the same layer structure. Correspondingly, the second electrochromic layer 115 and the fourth electrochromic layer 124 are formed in the same period of time and also belong to the same layer structure.

[0032] Further, in Figure 2 The display panel also includes a substrate layer 13, an encapsulation layer 14, and a pixel definition PDL layer 15.

[0033] Exemplarily, the substrate layer 13 is a substrate including PI, and the substrate layer 13 includes a buffer layer, a TFT film layer, and a PLN film layer from the side close to the bottom of the substrate layer 13 to the side away from the bottom of the substrate layer 13, and the adjacent layer of the PLN film layer away from the substrate layer 13 includes an anode layer 111 and a lap electrode 121. Among them, the drain electrode of the TFT in the substrate 13 can be connected by vias in the PDL layer 15 and the substrate 13.

[0034] In the embodiment of the present application, a partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit.

[0035] It can be understood that in order to make the cathode layers of different pixel units independent cathode layers, a partition region can be provided between different pixel units to partition the pixel units.

[0036] In the embodiment of the present application, the partition area may be a simple partition without a film layer (such as the following Figure 3 The area shown in the figure) may also include other partition structures, such as an isolation column structure, as described later, and this application does not limit this.

[0037] Below through Figure 3 Describe the above partition area: like Figure 3 As shown, in Figure 3 The partition region 16 is included, and a cathode layer 17 is used to partition the pixel units on the left and right sides of the partition region 16. The cathode layer 17 and the cathode layer 122 and the cathode layer 113 are the same layer.

[0038] In essence, Figure 3 It can be seen that, based on the disconnection of the cathode layer 17, the fifth electro-optical layer 18 and the sixth electro-optical layer 19 on the side of the cathode layer close to the display panel are also disconnected accordingly. The fifth electro-optical layer 18, the first electro-optical layer 114 and the third electro-optical layer 123 are the same layer, and the sixth electro-optical layer 19, the second electro-optical layer 115 and the fourth electro-optical layer 124 are the same layer.

[0039] In another embodiment of the present application, a specific arrangement method of the partition area in the orthographic projection direction is also provided. Exemplarily, the projection pattern of the partition area in the orthographic projection direction surrounds the projection patterns of the pixel opening area and the anode opening area.

[0040] It can be understood that, as described above, in the orthographic projection direction of the display panel, the display panel includes a plurality of pixel units, each of which is an independently operated unit, based on which, the partition area is a surrounding area surrounding the pixel opening area and the anode opening area in the orthographic projection direction. That is, the partition area is arranged around the pixel opening area and the anode opening area.

[0041] In another embodiment of the present application, a specific arrangement method of the partition region is provided by the isolation column. Exemplarily, the partition region includes an isolation column structure, and the isolation column structure is arranged at the edge region of the pixel unit.

[0042] It can be understood that, from the foregoing content, the partition area between the above-mentioned pixel unit and the adjacent pixel unit can include an isolation column structure. At the same time, since the isolation column structure is used to isolate the above-mentioned pixel unit and the adjacent pixel unit of the above-mentioned pixel unit, it is necessary to set the isolation column structure in the edge area of ​​the pixel unit for isolation between the edge of the pixel unit and the adjacent pixel unit.

[0043] Exemplarily, one or more film layers adjacent to the cathode layer are disconnected in the isolation region.

[0044] It is understandable that the cathode layer between the pixel unit and the adjacent pixel unit must be in an isolated state, and accordingly, the adjacent film layer of the cathode layer between the pixel unit and the adjacent pixel unit, for example, the electrolytic layer between the above-mentioned pixel unit and the adjacent pixel unit may also be in an isolated state.

[0045] In the embodiment of the present application, three different isolation columns are provided, and the difference between them can be reflected in the different arrangement positions of the display panel film layer, and can also be reflected in the different arrangement structures or materials. The three different isolation columns are described in turn below.

[0046] Optionally, in an embodiment of the present application, an isolation column may be provided on the adjacent side of the substrate, and in the process of providing a pixel definition layer on the side of the isolation column away from the substrate, the pixel definition layer and the adjacent pixel unit are spaced apart by a preset distance, and the pixel definition layer is tilted toward the side of the pixel unit, so as to form a cathode layer partition between the pixel unit and the adjacent pixel unit. The isolation column provided on the adjacent side of the substrate is described below.

[0047] Exemplarily, an isolation column structure is provided on an adjacent side of the substrate in the display panel, and a pixel definition layer of the display panel is provided on a side of the isolation column structure away from the substrate, and a preset distance is provided between the pixel definition layer of the pixel unit and the pixel definition layer of the adjacent pixel unit.

[0048] Exemplarily, the pixel definition layer covers a first side of the isolation column structure and exposes a second side of the isolation column structure, wherein the first side is close to the pixel unit and the second side is far from the pixel unit.

[0049] Exemplarily, the cathode layer is disposed on a side of the pixel definition layer away from the substrate, and the cathode layer at a relative position on the second side in the orthographic projection direction is inclined toward a side close to the pixel unit.

[0050] It is understandable that during the stacking process of the film layers of the display panel, they are not stacked vertically, but rather have a certain tilt angle. Furthermore, for the electro-optical layer of the display panel, the electro-optical layer is evaporated by an evaporation process, and during the evaporation process, the electro-optical layer will form an evaporation angle, that is, the tilt angle of the film layer.

[0051] Furthermore, it can be seen from the foregoing that the isolation column itself is arranged in the edge area of ​​the pixel unit, and the isolation column structure is arranged on the adjacent side of the substrate, and the isolation column is not completely covered, but only the isolation column on the side close to the pixel unit is covered, while keeping the second side of the isolation column exposed. In this way, in the process of setting the pixel definition layer, the electro-induced layer and the cathode layer for different pixel units of the display panel on the side of the isolation column away from the substrate, the pixel definition layer, the electro-induced layer and the cathode layer all produce a certain inclination angle toward the side of the above-mentioned pixel unit, that is, the above-mentioned eaves structure. Since there are multiple film layer intervals between the isolation column and the cathode layer, the intervals between adjacent pixels generated by this inclination can be continuously accumulated, and the final cathode layer can actually be tilted to the point where adjacent pixel units are separated and not in contact.

[0052] At the same time, when the pixel definition layers for different pixel units of the display panel are set on the side of the isolation column away from the substrate, a certain distance will be spaced between the pixel definition layers of different pixel units. In this way, during the process of setting the film layers above the pixel definition layers, these film layers will be accumulated in the spacing area without connecting the cathode layer of the pixel unit to the cathode layer of the adjacent pixel unit.

[0053] Below through Figure 4 The arrangement of the above-mentioned isolation columns is described.

[0054] In the above Figure 4 The descriptions of the pixel opening region 11 and the anode opening region 12, the pixel opening region 11 including the anode layer 111, the pixel layer 112 and the cathode layer 113, the anode opening region 12 including the lap electrode 121 and the cathode layer 122, the first electro-optical layer 114, the second electro-optical layer 115, the third electro-optical layer 123 and the fourth electro-optical layer 124, the substrate layer 13, the encapsulation layer 14 and the PDL layer are the same as those described above. Figure 3 The same is not repeated here.

[0055] Further, in Figure 4 In the figure, we can see the isolation column structure 21, which includes two sides. The first side 22 (the side of the isolation column structure 21 framed by the dotted line) is the side close to the pixel unit, and the second side 23 (the other side of the isolation column structure 21 framed by the dotted line) is the side away from the pixel unit. It can be seen that the PDL layer 24 covering the side away from the substrate in the orthographic projection direction of the isolation column structure 21 only covers the first side 22, while exposing the second side 23. In this way, after the pixel definition layer 24 covers the isolation column structure 21, it will be tilted toward the side of the pixel unit. As shown in the figure, the tilt angle α25 is not 90°, but an acute angle; At the same time, the pixel definition layer 26 covering the second side 23 of the isolation column 21 is actually in a spacing area with a preset distance between adjacent pixel units, and the film layer stacked above the pixel definition layer 26 will naturally stack in the spacing area to form a stacked film layer 27 on the substrate layer 13.

[0056] At this point, the region 26 where the isolation column 21 is located is formed as a partition region, and the existence of the isolation column 21 isolates the cathode layer between the pixel unit and the adjacent pixel unit.

[0057] Optionally, in the embodiment of the present application, the material of the isolation column structure includes: metal material or organic material.

[0058] In one example, when the material of the isolation column structure is a metal material, the metal isolation column can be composed of two different metal materials. Figure 5 As shown, in Figure 5 In the embodiment, the isolation column is composed of a first structure 31, a second structure 32 and a third structure 33. When the material of the isolation column structure is a metal material, the first structure 31 is Ti, the second structure 32 is Al, and the third structure 33 is Ti.

[0059] In one example, when the material of the isolation column structure is an organic material, the organic isolation column structure can be composed of two different organic materials. Figure 5 As shown, in Figure 5 In the figure, the first structure 31 of the isolation column is SiOx, the second structure 32 is SiNX, and the third structure 33 is SiOx.

[0060] In another possible embodiment provided by the present application, two isolation column structures are also included, which correspond to the second isolation column and the third isolation column of the three isolation columns mentioned above, respectively. The two isolation column structures are the same in terms of setting positions, but are different in terms of setting materials, and at the same time, they are different in terms of manufacturing processes. The setting materials and setting positions will be introduced in the following content, and the manufacturing process will be described in the subsequent display panel manufacturing method part.

[0061] Optionally, in an embodiment of the present application, an isolation column structure is provided on an adjacent side of a pixel definition layer in the display panel away from a substrate in the display panel, and a first orthographic projection pattern of the isolation column structure close to the substrate is within a second orthographic projection pattern away from the substrate.

[0062] Exemplarily, the cathode layer is disposed on a side of the pixel definition layer away from the substrate, and a height from the cathode layer to the pixel definition layer is less than a height of the isolation column structure.

[0063] It can be understood that after setting the pixel definition layer, a relatively high isolation column structure with a larger upper part and a smaller lower part in the side view cross-sectional view can be set on the side of the pixel definition layer away from the substrate. The height can ensure that in the process of setting the electromechanical layer and the cathode layer above the pixel definition layer, the two sides of the isolation column structure, that is, the electromechanical layer and the cathode layer of different pixel units are not connected; the side view cross-sectional view is an inverted trapezoidal isolation column structure with a larger upper part and a smaller lower part, which can ensure that after the isolation column structure is away from the vapor-deposited electromechanical layer and the cathode layer, the electromechanical layer and the cathode layer between the pixel units on both sides of the isolation column will not be connected.

[0064] Furthermore, the side cross-sectional view of the above-mentioned spacer column structure is an inverted trapezoid with a larger top and a smaller bottom, which is used to indicate that the overall spacer column structure is an inverted trapezoid with a larger top and a smaller bottom, and does not require that the section of the spacer column structure closest to the display substrate is the smallest, and the section of the spacer column structure farthest from the display substrate is the largest. Figure 6 and Figure 7 As shown, Figure 6 is a side cross-sectional view of the second isolation column structure, Figure 7 It is a side sectional view of the third isolation column structure. It can be seen that the side sectional views of the two isolation column structures are generally larger at the top and smaller at the bottom. However, the cut surface 41 of the second isolation column closest to the display substrate is the smallest, and the cut surface 42 of the isolation column structure farthest from the display substrate is the largest. For the third isolation column, the cut surface 51 of the third isolation column closest to the display substrate is the smallest, and the cut surface 52 of the isolation column structure relatively far from the display substrate is the largest.

[0065] The second isolation column structure is described below. Figure 8 The following description is made.

[0066] In the above Figure 8 The descriptions of the pixel opening region 11 and the anode opening region 12, the pixel opening region 11 including the anode layer 111, the pixel layer 112 and the cathode layer 113, the anode opening region 12 including the lap electrode 121 and the cathode layer 122, the first electro-optical layer 114, the second electro-optical layer 115, the third electro-optical layer 123 and the fourth electro-optical layer 124, the substrate layer 13, the encapsulation layer 14 and the PDL layer are the same as those described above. Figure 2 The same is not repeated here.

[0067] Further, in Figure 8 It can be seen that the isolation column structure 43 is arranged between two adjacent pixel units. The isolation column structure 43 is arranged on the side of the PDL layer 15 away from the substrate. At the same time, the height of the isolation column structure 43 is significantly higher than the sum of the heights of the fifth electro-optical layer 18 and the sixth electro-optical layer 19 on both sides, and the cathode layer 17. The side cross-sectional view of the isolation column structure is a structure with a large top and a small bottom, which is similar to Figure 5 The isolation column structure shown is consistent.

[0068] The isolation column structure 43 can be formed as a partitioning region, and the existence of the isolation column structure 43 isolates the cathode layer between the pixel unit and the adjacent pixel unit.

[0069] The third isolation column structure is described below. Fig. 9 The following description is made.

[0070] In the above Fig. 9 The descriptions of the pixel opening region 11 and the anode opening region 12, the pixel opening region 11 including the anode layer 111, the pixel layer 112 and the cathode layer 113, the anode opening region 12 including the lap electrode 121 and the cathode layer 122, the first electro-optical layer 114, the second electro-optical layer 115, the third electro-optical layer 123 and the fourth electro-optical layer 124, the substrate layer 13, the encapsulation layer 14 and the PDL layer are the same as those described above. Figure 3 The same is not repeated here.

[0071] Further, in Fig. 9 It can be seen that the isolation column structure 53 is arranged between two adjacent pixel units. The isolation column structure 53 is arranged on the side of the PDL layer 15 away from the substrate. At the same time, the height of the isolation column structure 53 is significantly higher than the sum of the heights of the fifth electro-optical layer 18 and the sixth electro-optical layer 19 on both sides, and the cathode layer 17. The side cross-sectional view of the isolation column structure is a structure with a larger top and a smaller bottom as a whole, which is different from the structure of FIG. Figure 7 The isolation column structure shown is consistent.

[0072] The isolation column structure 53 can be formed as a partitioning region, and the existence of the isolation column structure 53 isolates the cathode layer between the pixel unit and the adjacent pixel unit.

[0073] Optionally, in the embodiment of the present application, the material of the isolation column structure includes: a metal material, or an organic material, or an isolation column composed of the first SL layer and the first PR layer. In one example, when the material of the isolation column structure is a metal material, the metal isolation column can be composed of two different metal materials. Figure 6 As shown, in Figure 6 In the embodiment, the isolation column 44 can be composed of a metal material (for example, a material of Ti / Al / Ti) or an organic material (for example, SiO2 / SiNx / SiO2).

[0074] In an example, when the materials of the isolation column structure are the first SL layer and the first PR layer, the above two materials are colloid materials that can be removed by photolithography technology. Figure 7 As shown, in Figure 7 The middle spacer includes a first SL layer 54 and a first PR layer 55 .

[0075] Fig.10 FIG. 1 is a flow chart of a method for manufacturing a display panel provided by an embodiment of the present application. Fig.10 As shown, the display panel includes a pixel unit, and the method includes the following steps 301 and 302: Step 301: setting a pixel opening region and an anode opening region in the above pixel unit.

[0076] In the embodiment of the present application, the pixel opening region includes an anode layer, a pixel layer and a cathode layer.

[0077] Step 302: Setting a partition region between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit.

[0078] In the embodiment of the present application, the anode opening region includes the anode layer and the cathode layer, and the anode layer and the cathode layer are overlapped in the anode opening region.

[0079] In the embodiment of the present application, the above-mentioned pixel unit, pixel opening area, anode opening area, partition area, cathode layer and anode layer can refer to the above description and will not be repeated here.

[0080] Combined with the above Figure 3 , this application will Figure 3 The generation process is described as follows.

[0081] like Figure 11-13 As shown, in Fig.11 In the display panel, the pixel opening area 11 and the anode opening area 12 have been generated. In the pixel opening area 11, the following film layers are stacked in sequence from the side close to the substrate layer 13 to the side away from the substrate layer 13: the anode layer 111, the first electro-optical layer 114, the pixel layer 112 and the second electro-optical layer 115; correspondingly, in the anode opening area 12, the following film layers are stacked in sequence from the side close to the substrate layer 13 to the side away from the substrate layer 13: the lap electrode 121, the third electro-optical layer 123 and the fourth electro-optical layer 124. The pixel opening area 11 and the anode opening area 12 are separated by a pixel definition layer 15.

[0082] Then, if Fig.12 As shown, the third electrolytic layer 123 and the fourth electrolytic layer 124 in the anode opening region 12 are removed by laser, so that the bonding electrode 121 in the anode opening region 12 is exposed.

[0083] Then, if Fig.13 As shown, a cathode layer 62 is deposited on the entire side of the display panel away from the substrate layer 13. It can be seen that the cathode layer 122 and the overlapping electrode 121 in the anode opening area 12 are overlapped.

[0084] Finally, if Figure 3 As shown, in the edge region 16 of the pixel unit, a portion of the cathode layer, a portion of the fifth electro-optical layer and a portion of the sixth electro-optical layer in the edge region 16 are removed by laser to form a Figure 3 The partition structure of the cathode layer 17, the fifth electrochemical layer 18 and the sixth electrochemical layer 19 is shown. At the same time, TFE encapsulation is performed through the three-layer stack structure 14, which is composed of three layers of organic layer, organic layer and inorganic layer.

[0085] Optionally, in an embodiment of the present application, a partition region is set between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit, and the method for manufacturing a display panel provided in the embodiment of the present application includes: setting the isolation column structure in the edge region of the pixel unit and on one side of the substrate, and setting a pixel definition layer on a side of the isolation column away from the substrate; setting an electrochromic layer on a side of the pixel definition layer away from the substrate; and setting a cathode layer on a side of the electrochromic layer away from the substrate.

[0086] Exemplarily, the cathode layer, the electrochromic layer and the pixel definition layer are inclined toward one side of the pixel unit in the edge region, so that the cathode layer between the pixel unit and the adjacent pixel unit is isolated.

[0087] Exemplarily, a preset distance is provided between the pixel definition layer of the pixel unit and the pixel definition layer of the adjacent pixel unit, the pixel definition layer covers a first side of the isolation column structure and exposes a second side of the isolation column structure, the first side is close to the pixel unit, and the second side is far away from the pixel unit.

[0088] Combine the following Figure 14-15 ,right Figure 4 The generation process is described as follows: like Figure 14-15 As shown, in Fig.14 In the display panel, the pixel opening area 11 and the anode opening area 12 have been generated. In the pixel opening area 11, the following film layers are stacked in sequence from the side close to the substrate layer 13 to the side away from the substrate layer 13: the anode layer 111, the first electro-optical layer 114, the pixel layer 112 and the second electro-optical layer 115; correspondingly, in the anode opening area 12, the following film layers are stacked in sequence from the side close to the substrate layer 13 to the side away from the substrate layer 13: the lap electrode 121, the third electro-optical layer 123 and the fourth electro-optical layer 124. The pixel opening area 11 and the anode opening area 12 are separated by a pixel definition layer 15.

[0089] exist Fig.15The middle isolation column is set in the edge area 26 of the pixel unit. Since the third electro-optical layer 123 and the fourth electro-optical layer 124 have a preset distance between the second side 23 of the isolation column and the adjacent pixel unit, they will be accumulated on the substrate layer 13 without being connected to the adjacent pixel units. At the same time, the second side 23 of the isolation column 21 is exposed, so the film layer above the isolation column 21 is inclined toward the pixel unit side. The isolation of the electro-optical layer between the pixel unit and the adjacent pixel unit is achieved.

[0090] Then, if Figure 4 As shown, the third electro-optical layer 123 and the fourth electro-optical layer 124 in the anode opening area 12 are removed by laser, so that the overlapping electrode 121 in the anode opening area 12 is exposed. The cathode layer 71 is evaporated on the side of the display panel away from the substrate layer 13. It can be seen that the cathode layer 122 in the anode opening area 12 is overlapped with the overlapping electrode 121. At the same time, the cathode layer can also be isolated between the pixel unit and the adjacent pixel unit.

[0091] Optionally, in an embodiment of the present application, the isolation column structure includes a first isolation column, a second isolation column and a third isolation column, and the isolation region is set between the cathode layer of the pixel unit and the cathode layer of the adjacent pixel unit, including: setting the first isolation column on the side of the anode layer away from the substrate in the anode opening area, and setting the second isolation column in the isolation region on the side of the pixel definition layer of the display panel away from the substrate; setting an electro-layer on the side of the first isolation column and the second isolation column away from the substrate; stripping the first isolation column and the second isolation column, exposing the anode layer of the anode opening area where the first isolation column is located, and exposing the pixel definition layer of the isolation region where the second isolation column is located; setting the third isolation column at the isolation region, and setting the cathode layer on the side of the display panel away from the substrate.

[0092] Exemplarily, the first spacer is higher than the electro-induced layer and the maximum dimension of the first spacer on the side away from the substrate in the orthographic projection direction is larger than the opening dimension of the anode opening area, and the second spacer is higher than the electro-induced layer and the maximum dimension of the second spacer on the side away from the substrate in the orthographic projection direction is larger than the opening dimension of the partition area. Exemplarily, the third isolation column is higher than the electrochromic layer and the maximum dimension of the third isolation column away from the substrate in the orthographic projection direction is larger than the opening dimension of the isolation region, so that the cathode layer between the pixel unit to which the third isolation column belongs and the adjacent pixel unit is isolated.

[0093] Exemplarily, the anode layer of the anode opening area of ​​the partition region where the first isolation column is located overlaps the cathode layer.

[0094] It can be understood that in the embodiment of the present application, not only can the pixel units and adjacent pixel units be separated by isolation columns, but the first area in the above-mentioned anode opening area opposite to the positive projection direction of the anode layer can also be provided with isolation columns so that the electro-sensitive layer is not attached to the first area, that is, not attached to the adjacent side of the anode layer away from the substrate.

[0095] Exemplarily, the first isolation column includes: a first SL layer adjacent to the pixel definition layer and away from the substrate side of the display panel, and a first PR layer adjacent to the first SL layer and away from the substrate side of the display panel.

[0096] Exemplarily, the second isolation column includes a second SL layer adjacent to the pixel definition layer and away from the substrate side of the display panel, and a second PR layer adjacent to the second SL layer and away from the substrate side of the display panel.

[0097] Exemplarily, the third isolation column includes a third SL layer adjacent to the pixel definition layer and away from the substrate side of the display panel, and a third PR layer adjacent to the third SL layer and away from the substrate side of the display panel.

[0098] Exemplarily, the first isolation column, the second isolation column and the third isolation column can be Figure 7 The spacer columns shown are of the same structure.

[0099] Below through Figure 16-Figure 20 , the display panel manufacturing process is described as follows: like Fig.16 As shown, in Fig.16 The display panel includes a pixel opening region 11 and an anode opening region 12 that have been generated, and a partition region 16. An anode layer 111 is provided in the pixel opening region 11 from a side close to the substrate layer 13 to an adjacent side away from the substrate layer 13; correspondingly, an electrode 121 is overlapped in the anode opening region 12 from a side close to the substrate layer 13 to an adjacent side away from the substrate layer 13. The pixel opening region 11 and the anode opening region 12 are partitioned by a pixel definition layer 15. Fig.16 The display panel further includes a first isolation column 71 and a second isolation column 72. The first isolation column 71 is disposed on the side of the anode opening region 12 away from the substrate layer 13 of the lap electrode 121, and the second isolation column 72 is disposed in the partition region 16 on the side of the pixel definition layer 15 of the display panel away from the substrate layer 13.

[0100] Then, if Fig.17 As shown, in Fig.17 in Fig.17 The electro-optical layer is generated by evaporation on the basis of the display panel, such as Fig.17As shown, the electroluminescent layer includes the first electroluminescent layer 114, the pixel layer 112 and the second electroluminescent layer 115 in the pixel opening region 11. However, in the anode opening region 12, due to the shielding of the first isolation column 71, there is no electroluminescent layer in the anode opening region.

[0101] Then, if Fig.18 As shown, in Fig.18 In the process, the first isolation column 71 and the second isolation column 72 are peeled off by photolithography technology (LiftOff). At this time, the bonding electrode 121 in the anode opening area 12 is exposed, waiting for the subsequent bonding of the cathode layer.

[0102] Then, if Fig.19 As shown, in order to prevent the cathode layer from being evaporated in the partition area 16 during the cathode layer overlap process, thereby causing the cathode layers between the pixel unit and the adjacent pixel unit to be connected instead of the expected disconnected structure, a third isolation column 73 is set in the partition area 16.

[0103] Then, if Fig. 20 As shown, in Fig. 20 In the embodiment, a cathode layer 74 is set by evaporation, a cathode layer 113 is formed in the pixel opening area 11, and a cathode layer 122 is formed in the anode opening area 12. At the same time, due to the obstruction of the third isolation column 73 in the partition area 16, the cathode layer is disconnected between adjacent pixel units.

[0104] Finally, if Fig. 9 As shown, in this Fig. 20 Based on this, TFE encapsulation can produce Fig. 9 The display panel has pixel-level cathode connection and cathode layer isolation between different pixel units.

[0105] Optionally, in the embodiment of the present application, after the cathode layer is provided on the side of the display panel away from the substrate, the method for manufacturing the display panel provided in the embodiment of the present application further includes: peeling off the third isolation column.

[0106] It is understandable that, for the third spacer column, if it can be peeled off by photolithography technology, in order to improve the flatness of the display panel and reduce the thickness of the display panel as much as possible, the third spacer column can be peeled off by photolithography technology.

[0107] like Fig.21 As shown, in Fig.21 In the process, the third spacer column 73 is peeled off by the photolithography technology (LiftOff), and the encapsulation layer 14 is generated by the TFE encapsulation technology to encapsulate the display panel film layer that has been generated.

[0108] Optionally, in an embodiment of the present application, in the partition area set between the cathode layer of the pixel unit and the cathode layer of the adjacent pixel unit, the method for manufacturing the display panel provided by the embodiment of the present application also includes: setting the above-mentioned isolation column in the above-mentioned partition area on the side of the pixel definition layer of the above-mentioned display panel away from the substrate; sequentially setting electro-induced layers on the side away from the substrate; removing the electro-induced layers in the above-mentioned anode opening area so that the anode layer of the above-mentioned anode opening area is exposed; and setting a cathode layer on the side of the above-mentioned display panel away from the substrate.

[0109] Exemplarily, the height of the isolation column is higher than the sum of the thickness of the electrochromic layer and the thickness of the cathode layer, so that the cathode layer between the pixel unit to which the isolation column belongs and the adjacent pixel unit is isolated, and the anode layer of the anode opening area of ​​the isolation area where the isolation column is located overlaps the cathode layer. Exemplarily, the maximum dimension of the isolation column on a side away from the substrate in the orthographic projection direction is larger than the opening dimension of the partition area.

[0110] Below through Fig. 22 and Fig.23 ,right Figure 8 The generation process of is described as follows.

[0111] like Fig. 22 As shown, in Fig. 22 In the display panel, the pixel opening area 11 and the anode opening area 12 have been generated. In the pixel opening area 11, the adjacent layer of the substrate layer 13 is the anode layer 111; correspondingly, in the anode opening area 121, the adjacent layer of the substrate layer 13 is the lap electrode 121. The pixel opening area 11 and the anode opening area 12 are separated by a pixel definition layer 15. Fig. 22 The structure also includes a partition area 16. On the side of the pixel definition layer corresponding to the partition area 16 away from the substrate layer 13, an isolation column structure 43 is provided with a height greater than the thickness of the electro-conductive layer and a side cross-sectional structure that is larger at the top and smaller at the bottom.

[0112] On this basis, an electro-optical layer is arranged above the display panel of the above-mentioned film layer structure, and the following electro-optical layer structure is formed in the pixel opening area 11, the anode opening area 12 and the partition area 16. In the pixel opening area 11, on the side of the anode layer 111 away from the substrate layer 13, the first electro-optical layer 114, the pixel layer 112 and the second electro-optical layer 115 are stacked in the following film layer sequence; correspondingly, in the anode opening area, on the side of the lap electrode 121 away from the substrate layer 13, the third electro-optical layer 123 and the fourth electro-optical layer 124 are stacked in the following film layer sequence. In the partition area 16, due to the provision of an isolation column structure 43 with a relatively high height and a larger upper part and a smaller lower part in the side cross-sectional view, the electro-optical layer in the partition area is isolated.

[0113] Then, if Fig.23 As shown, in Fig.23 In the process, the third electrolytic layer 123 and the fourth electrolytic layer 124 in the anode opening region 12 are removed by laser, so that the bonding electrode 121 in the anode opening region 12 is exposed.

[0114] Finally, if Figure 8 As shown in the above Fig.23 A cathode layer is evaporated on the basis of the formed display film layer. Since an isolation column 43 is provided in the partition area 16, the cathode layer in the partition area 16 is disconnected. At the same time, the overlapping electrode 121 and the cathode layer 122 in the anode opening area 12 are overlapped.

[0115] The present application also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the training rule determination method described in the present application is implemented. For example, the following can be executed: Fig.10 The individual steps of the method are shown.

[0116] The present invention provides a computer program product, which includes instructions that are executed by a processor when the processor executes the instructions. Fig.10 The individual steps of the method are shown.

[0117] It should be noted that although the operations of the method of the present invention are described in a particular order in the drawings, this does not require or imply that the operations must be performed in this particular order or that all illustrated operations must be performed to achieve desired results.

[0118] An embodiment of the present application further provides a display device, which includes the above-mentioned display panel.

[0119] Reference below Fig.24 , Fig.24 A schematic diagram of the structure of a computer device suitable for implementing the embodiments of the present application is shown. Fig.24 As shown, the computer system 1700 includes a central processing unit (CPU) 1701, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 1702 or the program loaded from the storage part 1708 to the random access memory (RAM) 1703. In the RAM 1703, various programs and data required for the operation instructions of the system are also stored. The CPU 1701, the ROM 1702, and the RAM 1703 are connected to each other through a bus 1704. An input / output (I / O) interface 1705 is also connected to the bus 1704.

[0120] The following components are connected to the I / O interface 1705: an input section 1706 including a keyboard, a mouse, etc.; an output section 1707 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1708 including a hard disk, etc.; and a communication section 1709 including a network interface card such as a LAN card, a modem, etc. The communication section 1709 performs communication processing via a network such as the Internet. A drive 1710 is also connected to the I / O interface 1705 as needed. A removable medium 1711, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 1710 as needed, so that a computer program read therefrom is installed into the storage section 1708 as needed.

[0121] In particular, according to an embodiment of the present application, the above reference flow chart Fig.10 The described process can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through the communication part 1709, and / or installed from a removable medium 1711. When the computer program is executed by the central processing unit (CPU) 1701, the above-mentioned functions defined in the system of the present application are executed.

[0122] It should be noted that the computer-readable medium shown in the present application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium such as a computer-readable storage medium that can send, propagate or transmit a program for use by or in conjunction with an instruction execution system, device or device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0123] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, functions and operating instructions of the system, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the aforementioned module, program segment or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, the boxes represented by two connections can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operating instruction, or can be implemented with a combination of dedicated hardware and computer instructions.

[0124] The units or modules involved in the embodiments described in the present application may be implemented by software or hardware. The units or modules described may also be set in a processor. For example, it may be described as: a processor includes a first receiving module, a second receiving module, and a sending module. The names of these units or modules do not, in some cases, constitute limitations on the units or modules themselves.

[0125] As another aspect, the present application further provides a computer-readable storage medium, which may be included in the electronic device described in the above embodiment, or may exist independently without being assembled into the electronic device. The above computer-readable storage medium stores one or more programs, and when the above programs are used by one or more processors to execute the method for manufacturing a display panel described in the present application.

[0126] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the aforementioned disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present application (but not limited to) by each other to form a technical solution.

Claims

1. A display panel, characterized in that: The display panel comprises a pixel unit, the pixel unit comprises a pixel opening region and an anode opening region, the pixel opening region comprises an anode layer, a pixel layer and a cathode layer, the anode opening region comprises the anode layer and the cathode layer, and the anode layer and the cathode layer are overlapped in the anode opening region; A partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit.

2. The display panel according to claim 1, characterized in that: The projection pattern of the partition area in the orthographic projection direction surrounds the projection patterns of the pixel opening area and the anode opening area.

3. The display panel according to claim 1, characterized in that: The partition area includes an isolation column structure, and the isolation column structure is arranged in an edge area of ​​the pixel unit.

4. The display panel according to claim 3, characterized in that: A spacer column structure is provided on one side adjacent to the substrate in the display panel, and a pixel definition layer of the display panel is provided on a side of the spacer column structure away from the substrate, and a preset distance is provided between the pixel definition layer of the pixel unit and the pixel definition layer of the adjacent pixel unit; The pixel definition layer covers a first side of the isolation column structure and exposes a second side of the isolation column structure, wherein the first side is close to the pixel unit and the second side is far from the pixel unit; The cathode layer is arranged on a side of the pixel definition layer away from the substrate, and the cathode layer at a relative position in the orthographic projection direction on the second side is inclined toward a side close to the pixel unit.

5. The display panel according to claim 4, characterized in that: The material of the isolation column structure includes: metal material or organic material.

6. The display panel according to claim 3, characterized in that: A spacer column structure is provided on a side of a pixel definition layer in the display panel away from a substrate in the display panel, wherein a first orthographic projection pattern of the spacer column structure on a side close to the substrate is within a second orthographic projection pattern on a side away from the substrate; The cathode layer is arranged on a side of the pixel definition layer away from the substrate, and a height from the cathode layer to the pixel definition layer is smaller than a height of the isolation column structure.

7. The display panel according to claim 6, characterized in that: The material of the isolation column structure includes: a metal material, or an organic material, or an isolation column composed of a first SL layer and a first PR layer.

8. A display device, characterized in that: A display panel comprising any one of claims 1 to 7.

9. A method for manufacturing a display panel, characterized in that: The display panel includes a pixel unit, and the method includes: A pixel opening region and an anode opening region are provided in the pixel unit, wherein the pixel opening region includes an anode layer, a pixel layer and a cathode layer, and the anode opening region includes the anode layer and the cathode layer, and the anode layer and the cathode layer are overlapped in the anode opening region; A partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit.

10. The method according to claim 9, characterized in that The partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit, comprising: The isolation column structure is arranged at an edge region of the pixel unit and on a side of the substrate, and a pixel definition layer is arranged on a side of the isolation column away from the substrate, a preset distance is spaced between the pixel definition layer of the pixel unit and the pixel definition layer of the adjacent pixel unit, the pixel definition layer covers a first side of the isolation column structure and exposes a second side of the isolation column structure, the first side is close to the pixel unit, and the second side is away from the pixel unit; An electrochromic layer is disposed on a side of the pixel definition layer away from the substrate; A cathode layer is arranged on a side of the electrochromic layer away from the substrate; The cathode layer, the electrochromic layer and the pixel definition layer are inclined toward one side of the pixel unit in the edge region, so that the cathode layer between the pixel unit and the adjacent pixel unit is isolated.

11. The method according to claim 9, characterized in that The isolation column structure includes a first isolation column, a second isolation column and a third isolation column, and the isolation region is provided between the cathode layer of the pixel unit and the cathode layer of the adjacent pixel unit, including: The first isolation column is arranged on a side of the anode layer away from the substrate in the anode opening region, and the second isolation column is arranged on a side of the pixel definition layer of the display panel away from the substrate in the partition region; An electrochromic layer is arranged on the side of the first isolation column and the second isolation column away from the substrate, the maximum dimension of the first isolation column which is higher than the electrochromic layer and away from the substrate in the orthographic projection direction is larger than the opening dimension of the anode opening area, and the second isolation column which is higher than the electrochromic layer and away from the substrate in the orthographic projection direction is larger than the opening dimension of the partition area; The first isolation column and the second isolation column are peeled off, so that the anode layer of the anode opening area where the first isolation column is located is exposed, and the pixel definition layer of the partition area where the second isolation column is located is exposed; A third isolation column is arranged at the partition area, and a cathode layer is arranged on the side of the display panel away from the substrate. The third isolation column is higher than the electro-optical layer and the maximum dimension of the third isolation column in the orthographic projection direction away from the substrate is larger than the opening dimension of the partition area, so that the cathode layer is isolated between the pixel unit to which the third isolation column belongs and the adjacent pixel unit, and the anode layer of the anode opening area of ​​the partition area where the first isolation column is located overlaps with the cathode layer.

12. The method according to claim 9, characterized in that The partition region is provided between the cathode layer of the pixel unit and the cathode layer of an adjacent pixel unit, comprising: The isolation column is arranged in the partition area on the side of the pixel definition layer of the display panel away from the substrate; The electro-conductive layers are sequentially arranged on the side away from the substrate, and the maximum size of the isolation column on the side away from the substrate in the orthographic projection direction is larger than the opening size of the isolation area; Removing the electrolytic layer in the anode opening area so that the anode layer in the anode opening area is exposed; A cathode layer is arranged on the side of the display panel away from the substrate, and the height of the isolation column is higher than the sum of the thickness of the electrochromic layer and the thickness of the cathode layer, so that the cathode layer between the pixel unit to which the isolation column belongs and the adjacent pixel unit is isolated, and the anode layer of the anode opening area of ​​the isolation area where the isolation column is located overlaps with the cathode layer.

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