A capacitance detection circuit, method and device

Abstract

The present invention discloses a capacitance detection circuit, method and device, belonging to the technical field of capacitive touch detection. The present invention charges / discharges the measured capacitance synchronously and then transfers the charge to the integrator synchronously, avoiding the phase difference of interference, effectively reducing the influence of interference, significantly shortening the conversion time and improving the detection accuracy; in the circuit of the present invention, the integrator and the ADC are combined, and while the charge transfer is carried out, the capacitance difference is synchronously converted into a digital value, avoiding additional system overhead; in the present invention, using the chopping principle, within each clock cycle, the charge / discharge polarity is exchanged and the residual is flipped, further improving the anti-interference ability and the requirement for zero drift of the operational amplifier.

Description

Technical Field

[0001] The present invention belongs to the technical field of capacitive touch detection, and is also applicable to fields such as capacitive pressure sensors. Specifically, it relates to a capacitive touch detection circuit and method. Background Art

[0002] In the field of capacitive touch detection, capacitance detection is the key to realizing touch detection. When a conductor, such as a finger or a wrist, approaches or touches a detection electrode, the capacitance corresponding to the detection electrode will change. By detecting the change amount of this capacitance, information about the conductor approaching or touching the detection electrode can be obtained, thereby judging the user's operation.

[0003] In the prior art, during the operation of a self-capacitance detection circuit, a detection cycle is divided into multiple time periods. In the previous time period, a cancellation capacitor is used to cancel the capacitance to be measured first, and in the subsequent time period, the capacitance is detected again; or the capacitance change value is obtained by comparing the previously recorded capacitance value with the current capacitance value. And after the circuit converts the capacitance value into voltage (or current), an additional high-precision ADC is required to convert it into a digital signal.

[0004] In the above-mentioned detection method with time periods, the interference has a phase difference in the two time periods and cannot be eliminated, which easily leads to inaccurate capacitance detection and affects the comprehensive performance of the capacitance detection circuit; in the method of comparing with the recorded value, the temperature, power supply, and interference during the recording of the initial capacitance value and the detection of the current capacitance value are not the same, which will lead to inaccurate capacitance detection and affect the comprehensive performance of the circuit. The additional high-precision ADC also increases the system overhead.

[0005] On the other hand, in traditional applications such as capacitive touch detection and capacitive pressure detection, the absolute value of the capacitance is often not concerned, but the capacitance change value before and after touch / press is concerned. And the capacitance change value before and after touch / press is very different from the absolute value of the capacitance. Therefore, a very high ADC accuracy is often required, or the accuracy of the capacitance change value will be sacrificed. Summary of the Invention

[0006] Aiming at the above deficiencies in the prior art, the capacitive touch detection circuit and method provided by the present invention solve the problem that the existing time-division detection method has inaccurate capacitance detection, which in turn affects the comprehensive performance of the circuit.

[0007] To achieve the above invention objective, the technical solution adopted by the present invention is: a capacitance detection circuit, including a measurement capacitance branch, a standard capacitance Crst, an operational amplifier OPA, and a comparator CMP;

[0008] The measurement capacitance branch includes a measurement capacitor. One end of the measurement capacitor is grounded, and the other end of the measurement capacitor is respectively connected to one end of a first charge-discharge switch, one end of a second charge-discharge switch, and one end of a charge transfer switch. The other end of the first charge-discharge switch is connected to a first reference level Vref1, the other end of the second charge-discharge switch is connected to a second reference level Vref2, and the other end of the charge transfer switch is connected to the inverting input terminal of an operational amplifier OPA;

[0009] One end of the standard capacitor Crst is grounded, and the other end of the standard capacitor Crst is respectively connected to one end of a switch K9 and one end of a switch K8. The other end of the switch K9 is connected to the inverting input terminal of the operational amplifier OPA, the other end of the switch K8 is connected to the fixed terminal of a single-pole double-throw switch K7, and the two movable terminals of the single-pole double-throw switch K7 are respectively connected to the first reference level Vref1 and the second reference level Vref2;

[0010] A reference voltage Vcm is input to the non-inverting input terminal of the operational amplifier OPA, a voltage V_ is input to the inverting input terminal of the operational amplifier OPA, and is respectively connected to one end of a switch K0, one end of a switch K11, and one end of a switch K22. The output terminal of the operational amplifier OPA is respectively connected to the other end of the switch K0, one end of a switch K12, and one end of a switch K21. The other ends of the switch K11 and the switch K12 are both connected to one end of an integrating capacitor Cf, and the other ends of the switch K22 and the switch K21 are both connected to the other end of the integrating capacitor Cf;

[0011] The output terminal of the operational amplifier OPA outputs a voltage Vout and is connected to the non-inverting input terminal of a comparator CMP. A reference voltage Vcm is input to the inverting input terminal of the comparator CMP, and the output terminal of the comparator CMP outputs Dout.

[0012] Further, when detecting the absolute capacitance value of a capacitor, the measurement capacitor in the measurement capacitance branch is the capacitor to be measured Cp;

[0013] One end of the capacitor to be measured Cp is grounded, and the other end of the capacitor to be measured Cp is respectively connected to one end of a first charge-discharge switch K1, one end of a second charge-discharge switch K2, and one end of a charge transfer switch K3. The other end of the first charge-discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge-discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input terminal of the operational amplifier OPA.

[0014] Further, when detecting the relative capacitance value of a capacitor, the measurement capacitor in the measurement capacitance branch includes the capacitor to be measured Cp and a reference capacitor Cn;

[0015] One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of a first charge and discharge switch K1, one end of a second charge and discharge switch K2, and one end of a charge transfer switch K3. The other end of the first charge and discharge switch K1 is connected to a first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to a second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input terminal of an operational amplifier OPA;

[0016] One end of the reference capacitor Cn is grounded, and the other end of the reference capacitor Cn is respectively connected to one end of a first charge and discharge switch K4, one end of a second charge and discharge switch K5, and one end of a charge transfer switch K6. The other end of the first charge and discharge switch K4 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K5 is connected to the second reference level Vref2, and the other end of the charge transfer switch K6 is connected to the inverting input terminal of the operational amplifier OPA.

[0017] The beneficial effects of the present invention are as follows:

[0018] (1) In the capacitance detection circuit of the present invention, for the detection of the relative capacitance value, the difference between the capacitor Cp to be measured and the reference capacitor Cn is converted within the same period, and is not affected by the absolute values of the capacitor Cp to be measured and the reference capacitor Cn, and the requirements for the operational amplifier OPA in the circuit are relatively low; compared with the traditional capacitance detection circuit, there is no need to separately convert the capacitor Cp to be measured and the reference capacitor Cn, and the conversion time is significantly shortened.

[0019] (2) In the capacitance detection circuit of the present invention, the ADC and the integrator are integrated, and the converted digital value is directly output in the above circuit structure.

[0020] (3) In the capacitance detection circuit of the present invention, by adding channel switches for the capacitor Cp to be measured and the reference capacitor Cn, it is possible to allow charging to different levels, and a switching switch is also introduced for the integrating capacitor Cf to reverse the residual voltage stored in the integrating capacitor Cf, adapting to the capacitance inversion during chopping, thereby eliminating the zero drift and interference effects of the operational amplifier.

[0021] A capacitance detection method includes the following steps:

[0022] S1. Clear the charge of the integrating capacitor Cf to complete the circuit initialization;

[0023] S2. During the first level of the clock cycle, charge the measurement capacitor to the corresponding reference level; simultaneously, according to the level state of the output Dout of the comparator CMP in the previous clock cycle, charge the standard capacitor Crst to the first reference level Vref1 or the second reference level Vref2;

[0024] S3. During the second level of the clock cycle, disconnect the charge and discharge switch and switch K8, then close the charge transfer switch and switch K9 to complete the charge transfer among the measurement capacitor, the standard capacitor Crst, and the integration capacitor Cf, and obtain the output voltage Vout of the operational amplifier OPA;

[0025] Among them, the first level and the second level correspond to opposite clock levels;

[0026] S4. Based on the output voltage Vout of the operational amplifier OPA, obtain the output Dout of the comparator CMP in the current clock cycle, and control the charging level of the single-pole double-throw switch K7 according to it;

[0027] S5. Based on steps S2 - S4, repeat the process of charging the measurement capacitor and charge transfer, and accumulate the output Dout of the comparator CMP in each clock cycle. After a set number of clock cycles, obtain the count value corresponding to the measurement capacitor;

[0028] S6. Calculate the capacitance value of the detection capacitor according to the count value corresponding to the measurement capacitor.

[0029] Further, when detecting the absolute capacitance value of the capacitor:

[0030] In step S1, the charge transfer switch that is disconnected is the charge transfer switch K3;

[0031] In step S2, charge the capacitor under test Cp to the first reference level Vref1;

[0032] In step S3, the charge and discharge switch that is disconnected is the first charge and discharge switch K1, and the charge transfer switch that is closed is the charge transfer switch K3;

[0033] In step S5, the obtained count value is the count value corresponding to the absolute capacitance value of the capacitor under test Cp;

[0034] When detecting the relative capacitance value:

[0035] In step S1, the charge transfer switches that are disconnected are the charge transfer switch K3 and the charge transfer switch K6;

[0036] In step S2, charge the capacitor under test Cp and the reference capacitor Cn to the first reference level Vref1 and the second reference level Vref2 respectively;

[0037] In step S3, the disconnected charge and discharge switches are the first charge and discharge switch K1 and the second charge and discharge switch K5;

[0038] In step S5, the obtained count value is the count value corresponding to the capacitance difference between the detection capacitor Cp and the reference capacitor Cn.

[0039] Further, in step S5, within N conversion cycles, the count value D corresponding to the measured capacitance satisfies:

[0040]

[0041] In the formula, V_ represents the voltage at the inverting input terminal of the operational amplifier, Vref1 represents the first reference level, Vref2 represents the second reference level, Vcm represents the reference voltage, Cp represents the capacitance value of the capacitor to be measured, Cn represents the capacitance value of the reference capacitor, Cf represents the integration capacitor used for charge transfer and temporary storage of the residual voltage of each conversion, Crst represents the internal standard capacitor for measuring and quantifying the difference between the external capacitors Cp - Cn, and Vresi represents the residual voltage finally stored on the integration capacitor;

[0042] For the count value D:

[0043] Considering the zero drift, , the obtained count value D is:

[0044]

[0045] In the formula, represents the zero drift voltage of the operational amplifier OPA, ;

[0046] When the measured capacitance is the capacitor Cp to be measured and the detected capacitance is the absolute capacitance value, the capacitance value Cn of the reference capacitor takes a value of 0.

[0047] Further, the capacitance detection method further includes: eliminating the zero drift in the capacitance detection process by introducing chopping, including the following steps:

[0048] T1. After experiencing a set clock cycle, adjust the charging direction of the measured capacitance and the standard capacitor Crst, and adjust the capacitance polarity of the integration capacitor Cf;

[0049] T2. After experiencing the set clock cycle again, adjust the charging direction of the measured capacitance and the standard capacitor Crst, and the polarity of the integration capacitor Cf to be opposite to that in T1;

[0050] T3. Repeat steps T1 - T2, and eliminate the interference in the capacitance detection process and the influence of the zero drift of the operational amplifier OPA by adjusting the charging direction and polarity.

[0051] Further, in the step T1:

[0052] When the measured capacitance is the capacitance to be measured Cp, the method for adjusting the charging direction of the measured capacitance and the standard capacitance Crst, and the capacitance polarity of the integrating capacitance Cf is as follows:

[0053] Adjust the charging switch of the detection capacitance Cp from the first charge-discharge switch K1 to the second charge-discharge switch K2, and adjust the charging voltage from the first reference level Vref1 to the second reference level Vref2;

[0054] Adjust the charging direction of the standard capacitance Crst from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1;

[0055] Switch the passing switch of the integrating capacitance Cf from the switches K11 and K21 to the switches K12 and K22;

[0056] When the measured capacitance includes the capacitance to be measured Cp and the reference capacitance Cn, the method for adjusting the charging direction of the measured capacitance standard capacitance Crst, and the capacitance polarity of the integrating capacitance Cf is as follows:

[0057] Adjust the charging switch of the detection capacitance Cp from the first charge-discharge switch K1 to the second charge-discharge switch K2, and adjust the charging voltage from the first reference level Vref1 to the second reference level Vref2;

[0058] Adjust the charging switch of the reference capacitance Cn from the second charge-discharge switch K5 to the first charge-discharge switch K4, and adjust the charging voltage from the second reference level Vref2 to the first reference level Vref1;

[0059] Adjust the charging direction of the standard capacitance Crst from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1;

[0060] Switch the passing switch of the integrating capacitance Cf from the switches K11 and K21 to the switches K12 and K22.

[0061] Further, when introducing chopping to eliminate the zero drift in the capacitance detection process, in the case of multiple adjustments of the charging direction and polarity, the final count value D is:

[0062]

[0063] In the formula, , , representing the zero-drift voltage of the operational amplifier OPA;

[0064] When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is the absolute capacitance value, the capacitance value Cn of the reference capacitance takes a value of 0.

[0065] The beneficial effects of the present invention are as follows:

[0066] In the capacitance detection method of the present invention, by charging / discharging the two-port capacitances to different levels respectively and performing corresponding difference detection, it is only sensitive to the capacitance difference, greatly improving the detection accuracy and reducing the requirements for the ADC; specifically:

[0067] (1) In the capacitance detection method of the present invention, in the process of realizing the relative capacitance value detection, corresponding to the capacitance difference detection, it has nothing to do with the absolute values of the capacitance to be measured Cp and the reference capacitance Cn, and is completed in one conversion. Compared with the traditional detection method (first detecting the value of the reference capacitance Cn and then detecting the value of the capacitance to be measured Cp), the conversion time is shortened by half, the conversion efficiency is improved, and the power consumption is reduced; and since the values of Cp and Cn are generally much larger than the change value of the capacitance to be measured (in the present invention, the initial Cp and Cn are configured to the same capacitance, so the change value of Cp is Cp - Cn), therefore, the requirement for the driving ability of the operational amplifier OPA is greatly reduced, and the power consumption is reduced. In the traditional structure, in the charge transfer stage, the operational amplifier OPA charges and discharges Cp and Cn through the capacitance Cf (taking Cp≈Cn≈Cbase), and charges and discharges the terminal voltages of Cp and Cn to Vcm + Vos within the time t, then the output current capacity required by the operational amplifier is , and in the present invention, when detecting the relative capacitance value, it has nothing to do with the absolute capacitance value and is only sensitive to the capacitance difference, (taking Cp - Cn = ), then the output current capacity required by the operational amplifier is , because is much smaller than Cbase, so the requirement for the output current of the operational amplifier is reduced a lot, saving the power consumption and area of the operational amplifier.

[0068] (2) In the capacitance detection method of the present invention, the integrator and the ADC are integrated. In traditional detection, after converting the capacitance into voltage (or current), an additional high-precision ADC is required for conversion, which not only increases the power consumption of the ADC part but also increases the area of the ADC part; in the present invention, integrating the integrator and the ADC reduces the power consumption and saves the area.

[0069] (3) In the capacitance detection method of the present invention, a chopping function is introduced. According to the formula It can be seen that the zero drift of the operational amplifier has a great impact on the output. In the present invention, by dynamically switching the charge and discharge levels (or methods) through chopping and reversing the residual stored in the integration capacitor Cf, the influence brought by zero drift is effectively overcome, and the design requirements of the operational amplifier are also reduced.

[0070] A capacitance detection device includes:

[0071] A capacitance detection circuit, which controls the turn-off and turn-on of switches in the capacitance detection circuit by using a capacitance detection method to control the output Dout of a comparator in the capacitance detection circuit;

[0072] A logic control circuit, which is used to control the switch states in the capacitance detection circuit, accumulate the output Dout of the comparator to obtain a final count value D, and calculate the capacitance value of the detected capacitance according to it.

[0073] The beneficial effects of the present invention are:

[0074] In the present invention, by deploying the above capacitance detection circuit and its corresponding detection method in the capacitance detection device, the device achieves a high-precision capacitance detection effect, reduces the requirements for the ADC at the same time, and overcomes the influence of zero drift on capacitance detection by introducing chopping to dynamically switch the charge and discharge polarities, has good linearity, and is easy to achieve high resolution at the same time. Brief Description of the Drawings

[0075] Figure 1 It is a structural diagram of the capacitance (absolute capacitance value) detection circuit provided by the present invention.

[0076] Figure 2 It is a structural diagram of the capacitance (relative capacitance value) detection circuit provided by the present invention.

[0077] Figure 3 It is a flowchart of the capacitance detection method provided by the present invention.

[0078] Figure 4 It is a comparison of the output conversion values of the traditional circuit and the circuit of the present invention with the change of the zero drift voltage of the operational amplifier provided by the present invention.

[0079] Figure 5 It is provided by the present invention with The change of the output value of the circuit of the present invention with the change of.

[0080] Figure 6 It is provided by the present invention with the change of the output value of the circuit of the present invention with the change of Cbase. Detailed Embodiments

[0081] The following describes the specific embodiments of the present invention to facilitate the understanding of those skilled in the art of this technology. However, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art of this technology, as long as various changes are within the spirit and scope of the present invention defined and determined by the appended claims, these changes are obvious, and all inventions created using the concept of the present invention are within the scope of protection.

[0082] This application provides a capacitance detection circuit, as Figure 1 - Figure 2 shown, including a measured capacitance branch, a standard capacitance Crst, an operational amplifier OPA, and a comparator CMP;

[0083] The measured capacitance branch includes a measured capacitance. One end of the measured capacitance is grounded, and the other end of the measured capacitance is respectively connected to one end of a first charge-discharge switch, one end of a second charge-discharge switch, and one end of a charge transfer switch. The other end of the first charge-discharge switch is connected to a first reference level Vref1, the other end of the second charge-discharge switch is connected to a second reference level Vref2, and the other end of the charge transfer switch is connected to the inverting input terminal of the operational amplifier OPA;

[0084] One end of the standard capacitance Crst is grounded, and the other end of the standard capacitance Crst is respectively connected to one end of a switch K9 and one end of a switch K8. The other end of the switch K9 is connected to the inverting input terminal of the operational amplifier OPA, the other end of the switch K8 is connected to the fixed terminal of a single-pole double-throw switch K7, and the two movable terminals of the single-pole double-throw switch K7 are respectively connected to the first reference level Vref1 and the second reference level Vref2;

[0085] A reference voltage Vcm is input to the non-inverting input terminal of the operational amplifier OPA, a voltage V_ is input to the inverting input terminal of the operational amplifier OPA, and is respectively connected to one end of a switch K0, one end of a switch K11, and one end of a switch K22. The output terminal of the operational amplifier OPA is respectively connected to the other end of the switch K0, one end of a switch K12, and one end of a switch K21. The other ends of the switch K11 and the switch K12 are both connected to one end of an integrating capacitor Cf, and the other ends of the switch K22 and the switch K21 are both connected to the other end of the integrating capacitor Cf;

[0086] The output terminal of the operational amplifier OPA outputs a voltage Vout and is connected to the non-inverting input terminal of the comparator CMP. A reference voltage Vcm is input to the inverting input terminal of the comparator CMP, and the output terminal of the comparator CMP outputs Dout.

[0087] Among them, for the inverting input voltage V_ of the operational amplifier OPA, this voltage is determined by the virtual short characteristic of the operational amplifier and the zero-drift voltage Vos. In an ideal situation, the voltage V_ is equal to the reference voltage Vcm; when considering the zero-drift voltage Vos, the voltage V_ is equal to the sum of the reference voltage Vcm and the zero-drift voltage Vos.

[0088] Among them, for the output voltage Vout of the operational amplifier OPA, Vout = V- + Vcf, where Vcf is the voltage across the integrating capacitor Cf; therefore, the output voltage Vout of the operational amplifier represents the residual of the previous n conversions, as well as the charge transfer amount between the differential capacitor of Cp and Cn and the Crst capacitor together with Cf.

[0089] Among them, for the output Dout of the comparator CMP, it indicates whether the OPA output voltage Vout exceeds the reference voltage Vcm.

[0090] In one embodiment, according to the applicable scenarios of capacitance detection, the above-mentioned measurement capacitance branch can be configured as a measurement capacitance branch composed of a single capacitance to be measured or a measurement capacitance branch composed of a capacitance to be measured and a reference capacitance. In different applicable scenarios, except for the configuration difference of the measurement capacitance branch, other standard capacitors Crst, operational amplifier OPA, comparator CMP and their same circuit structures are the same, and will not be elaborated here.

[0091] In one embodiment, as Figure 1 shown, when detecting the absolute capacitance value of the capacitance, the measurement capacitance in the measurement capacitance branch is the capacitance to be measured Cp;

[0092] One end of the capacitance to be measured Cp is grounded, and the other end of the capacitance to be measured Cp is respectively connected to one end of the first charge-discharge switch K1, one end of the second charge-discharge switch K2 and one end of the charge transfer switch K3. The other end of the first charge-discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge-discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input of the operational amplifier OPA.

[0093] In one embodiment, as Figure 2 shown, when detecting the relative capacitance value of the capacitance, the measurement capacitance in the measurement capacitance branch includes the capacitance to be measured Cp and the reference capacitance Cn;

[0094] One end of the capacitor \(C_p\) to be measured is grounded, and the other end of the capacitor \(C_p\) to be measured is respectively connected to one end of a first charge-discharge switch \(K1\), one end of a second charge-discharge switch \(K2\), and one end of a charge transfer switch \(K3\). The other end of the first charge-discharge switch \(K1\) is connected to a first reference level \(V_{ref1}\), the other end of the second charge-discharge switch \(K2\) is connected to a second reference level \(V_{ref2}\), and the other end of the charge transfer switch \(K3\) is connected to the inverting input terminal of an operational amplifier OPA;

[0095] One end of a reference capacitor \(C_n\) is grounded, and the other end of the reference capacitor \(C_n\) is respectively connected to one end of a first charge-discharge switch \(K4\), one end of a second charge-discharge switch \(K5\), and one end of a charge transfer switch \(K6\). The other end of the first charge-discharge switch \(K4\) is connected to the first reference level \(V_{ref1}\), the other end of the second charge-discharge switch \(K5\) is connected to the second reference level \(V_{ref2}\), and the other end of the charge transfer switch \(K6\) is connected to the inverting input terminal of the operational amplifier OPA.

[0096] In one embodiment, in the above capacitance detection circuit, for a standard capacitor \(C_{rst}\), a single-pole double-throw switch \(K7\) serves as a charge-discharge level switch, a switch \(K8\) serves as a charge-discharge switch, and a switch \(K9\) serves as a charge transfer switch; for the operational amplifier OPA, a switch \(K0\) serves as a reset switch.

[0097] In one embodiment, in the above capacitance detection circuit, considering factors such as interference and zero drift of OPA, a chopping function is introduced. During the implementation process, the charging directions of the measurement capacitor and the standard capacitor \(C_{rst}\) are periodically adjusted, and the capacitance polarity of the integrating capacitor \(C_f\) is adjusted; after another set clock cycle, the charging directions of the measurement capacitor and the standard capacitor \(C_{rst}\), and the polarity of the integrating capacitor \(C_f\) are adjusted to the initial state; this process is repeated, and by adjusting the charging directions and polarities, the influence of interference during the capacitance detection process and the zero drift of the operational amplifier OPA is eliminated.

[0098] In one embodiment, in Figure 1 and Figure 2 , the second charge-discharge switch \(K2\), the second charge-discharge switch \(K4\), the switch \(K11\), the switch \(K12\), the switch \(K21\), and the switch \(K22\) are switch devices introduced to implement the chopping function.

[0099] In a specific embodiment, when the measurement capacitor is the capacitor \(C_p\) to be measured, the method for adjusting the charging directions of the measurement capacitor and the standard capacitor \(C_{rst}\), and the capacitance polarity of the integrating capacitor \(C_f\) is as follows:

[0100] The charging switch of the detection capacitor \(C_p\) is adjusted from the first charge-discharge switch \(K1\) to the second charge-discharge switch \(K2\), and the charging voltage is adjusted from the first reference level \(V_{ref1}\) to the second reference level \(V_{ref2}\);

[0101] Adjust the charging direction of the standard capacitor Crst from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1;

[0102] Switch the passing switches of the integrating capacitor Cf from switch K11 and switch K21 to switch K12 and switch K22.

[0103] In another specific embodiment, when the measurement capacitor includes the capacitor under test Cp and the reference capacitor Cn, on the basis of the above adjustments, it further includes adjusting the charging direction of the reference capacitor Cn. The adjustment method is as follows:

[0104] Switch the charging switch of the reference capacitor Cn from the second charge-discharge switch K5 to the first charge-discharge switch K4, and adjust the charging voltage from the second reference level Vref2 to the first reference level Vref1.

[0105] In one embodiment, in the Figure 2 shown capacitance detection circuit, the difference between the capacitor under test Cp and the reference capacitor Cn is converted within the same period, without being affected by the absolute values of the capacitor under test Cp and the reference capacitor Cn; compared with the traditional capacitance detection circuit, the capacitor under test Cp and the reference capacitor Cn are respectively converted twice through channel switching, and are affected by Cp and Cn, and the requirements for the operational amplifier OPA in the circuit are relatively low. At the same time, in the circuit of the present invention, the ADC and the integrator are integrated, and the converted digital value is directly output in the above circuit structure.

[0106] As Figure 3 shown, it is a schematic flowchart of an embodiment of the capacitance detection method provided by the present application. This method is implemented based on the Figure 1 or Figure 2 shown capacitance detection circuit, and includes the following steps:

[0107] S1. Clear the charge of the integrating capacitor Cf to complete the circuit initialization;

[0108] In one embodiment, the charge of the integrating capacitor Cf is cleared by closing the switch K0, and after the circuit initialization is completed, the switch K0 is disconnected;

[0109] S2. During the first level of the clock cycle, charge the measurement capacitor to the corresponding reference level; at the same time, according to the level state of the output Dout of the comparator CMP in the previous clock cycle, charge the standard capacitor Crst to the first reference level Vref1 or the second reference level Vref2;

[0110] S3. During the second level of the clock cycle, disconnect the charge and discharge switch and switch K8, then close the charge transfer switch and switch K9 to complete the charge transfer among the measurement capacitor, the standard capacitor Crst, and the integration capacitor Cf, and obtain the output voltage Vout of the operational amplifier OPA;

[0111] Among them, the clock levels corresponding to the first level and the second level are opposite;

[0112] S4. Based on the output voltage Vout of the operational amplifier OPA, obtain the output Dout of the comparator CMP in the current clock cycle, and control the charging level of the single-pole double-throw switch K7 according to it;

[0113] S5. Based on steps S2 to S4, repeat the measurement capacitor charging and charge transfer processes, and accumulate the output Dout of the comparator CMP within each clock cycle. After a set number of clock cycles, obtain the count value D corresponding to the measurement capacitor;

[0114] S6. Calculate the capacitance value of the detection capacitor according to the count value D corresponding to the measurement capacitor.

[0115] In one embodiment, based on Figure 1 the shown circuit structure, when detecting the absolute capacitance value of the capacitor:

[0116] In step S1, the charge transfer switch to be disconnected is the charge transfer switch K3;

[0117] In step S2, charge the capacitor under test Cp to the first reference level Vref1;

[0118] In step S3, the charge and discharge switch to be disconnected is the first charge and discharge switch K1, and the charge transfer switch to be closed is the charge transfer switch K3;

[0119] In step S5, the obtained count value is the count value corresponding to the absolute capacitance value of the capacitor under test Cp.

[0120] In one embodiment, based on Figure 2 the shown circuit structure, when detecting the relative capacitance value (the difference between the capacitor under test and the reference capacitor):

[0121] In step S1, the charge transfer switches to be disconnected are the charge transfer switch K3 and the charge transfer switch K6;

[0122] In step S2, charge the capacitor under test Cp and the reference capacitor Cn to the first reference level Vref1 and the second reference level Vref2 respectively;

[0123] In step S3, the charge and discharge switches to be disconnected are the first charge and discharge switch K1 and the second charge and discharge switch K5;

[0124] In step S5, the obtained count value is the count value corresponding to the capacitance difference between the detected capacitor Cp and the reference capacitor Cn.

[0125] In one embodiment, in step S5, within N conversion cycles, the count value D corresponding to the measured capacitance satisfies:

[0126]

[0127] wherein, V_ represents the voltage at the inverting input terminal of the operational amplifier, Vref1 represents the first reference level, Vref2 represents the second reference level, Vcm represents the reference voltage, Cp represents the capacitance value of the capacitor to be measured, Cn represents the capacitance value of the reference capacitor, Cf represents the integrating capacitor for charge transfer and temporary storage of the residual voltage of each conversion, Crst represents the internal standard capacitor for measuring and quantifying the difference of the external capacitor (Cp - Cn), Vresi represents the residual voltage finally stored on the integrating capacitor. After multiple clock cycles, the influence of this residual voltage on the final result can be ignored, so it is directly taken as 0 in subsequent calculations.

[0128] In one embodiment, during the first conversion cycle of the capacitance detection process, there are two cases for the standard capacitor Crst, which are respectively: when the standard capacitor Crst is not charged and the charge is not transferred, then in the above formula remains unchanged; when the standard capacitor Crst is charged and the charge is transferred, then in the above formula is adjusted to .

[0129] In one embodiment, for the count value D:

[0130] When considering the zero drift, , the obtained count value D is:

[0131]

[0132] wherein, represents the zero drift voltage of the operational amplifier OPA, ;

[0133] It can be seen from the above formula that the output of the present invention is related to the difference between the capacitor Cp to be measured and the reference capacitor Cn, the value of the capacitor Crst, and the number of conversion cycles N, and is independent of other factors (such as power supply voltage, temperature, process, and interference).

[0134] It should be noted that when the measured capacitance is only the capacitor Cp to be measured and the detected capacitance is the absolute capacitance value, the value of the capacitance Cn of the reference capacitor in the above formula is taken as 0.

[0135] In one embodiment, in a typical scenario, in the relevant formula for introducing chopping to eliminate zero drift during the capacitance detection process above, , or , .

[0136] It can be seen from the above formula that the operational amplifier OPA will cause two parts of errors, resulting in an unsatisfactory output. One part is proportional to the ideal output, and the ratio is , and one part is independent of the ideal output, and the ratio is .

[0137] In this embodiment, considering factors such as interference and zero drift of the operational amplifier, a chopping function is introduced in the present invention. Based on this, the capacitance detection method further includes eliminating zero drift during the capacitance detection process by introducing chopping, including the following steps:

[0138] T1. After experiencing a set clock cycle, adjust the charging directions of the measured capacitance and the standard capacitance Crst, and adjust the capacitance polarity of the integrating capacitance Cf;

[0139] T2. After experiencing the set clock cycle again, adjust the charging directions of the measured capacitance and the standard capacitance Crst, and the polarity of the integrating capacitance Cf to be opposite to those in T1;

[0140] T3. Repeat steps T1 to T2, and eliminate the influence of interference and zero drift of the operational amplifier OPA during the capacitance detection process by adjusting the charging directions and polarities.

[0141] Specifically, in one embodiment, in step T1, when the measured capacitance is the capacitance to be measured Cp, the method for adjusting the charging directions of the measured capacitance and the standard capacitance Crst, and the capacitance polarity of the integrating capacitance Cf is as follows:

[0142] Adjust the charging switch of the detection capacitance Cp from the first charge-discharge switch K1 to the second charge-discharge switch K2, and adjust the charging voltage from the first reference level Vref1 to the second reference level Vref2;

[0143] Adjust the charging direction of the standard capacitance Crst from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout of the comparator is 0 / 1;

[0144] Switch the passing switches of the integrating capacitance Cf from switches K11 and K21 to switches K12 and K22;

[0145] In another embodiment, when the measured capacitance includes the capacitance to be measured Cp and the reference capacitance Cn, on the basis of the above adjustment, it further includes adjusting the charging direction of the reference capacitance Cn, and the adjustment method is as follows:

[0146] Adjust the charging switch of the reference capacitance Cn from the second charge-discharge switch K5 to the first charge-discharge switch K4, and adjust the charging voltage from the second reference level Vref2 to the first reference level Vref1.

[0147] In one embodiment, when introducing chopping to eliminate the zero drift in the capacitance detection process above, within N clock cycles, it is considered that the charging and discharging directions of the capacitance to be measured Cp, the reference capacitance Cn, and the standard capacitance Crst are opposite. When considering the zero drift, in the case of multiple polarity adjustments, the final count value D is obtained to eliminate the error introduced by the zero drift; among them, the count value D is:

[0148]

[0149] In the formula, , , representing the zero-drift voltage of the operational amplifier OPA.

[0150] The above result does not include the zero-drift Vos term. Therefore, based on the above capacitance polarity adjustment method to introduce the chopping function, the influence brought by the zero drift can be eliminated.

[0151] It should be noted that when the measured capacitance is the capacitance to be measured Cp and the detected capacitance is the absolute capacitance value, the value of the capacitance Cn of the reference capacitance in the above formula is 0.

[0152] In one embodiment, in a typical scheme, in the relevant formula for introducing chopping to eliminate the zero drift in the capacitance detection process above, , or , .

[0153] In the embodiments of the present invention, for Figure 1 - 2 the capacitance detection circuit shown and Figure 3 the capacitance detection method shown, the embodiments of the present invention provide a capacitance detection device, including the circuit elements of the above capacitance detection circuit and a logic control circuit;

[0154] Among them, the capacitance detection circuit controls the turn-off and turn-on of the switches in the capacitance detection circuit by using the above capacitance detection method to control the output Dout of the comparator in the capacitance detection circuit; the logic control circuit is used to control the switch states in the capacitance detection circuit, accumulate the output Dout of the comparator to obtain the final count value D, and calculate the capacitance value of the detected capacitance according to it.

[0155] In the embodiments of the present invention, as Figure 4 shown, as the zero-drift voltage of the operational amplifier changes from -20 mV to 20 mV, the output conversion value of the traditional structure (black) and the output conversion value after chopping introduced in the present invention (red); it can be clearly seen that the present invention has the beneficial effect of being able to effectively eliminate the error introduced by the zero-drift of the operational amplifier compared with the traditional structure.

[0156] As Figure 5 shown, it is the change of the output value with the change of the capacitance difference ; it can be seen that the result of the present invention has good linearity.

[0157] As Figure 6 shown, it is the output value with the change of Cbase (approximately equal to Cp and Cn), at this time the capacitance difference remains unchanged; it can be seen that the structure of the present invention is independent of Cbase and does not affect the output.

[0158] In the present invention, specific embodiments are used to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

[0159] Those of ordinary skill in the art will realize that the embodiments described here are for helping readers understand the principle of the present invention, and it should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those of ordinary skill in the art can make various other specific deformations and combinations that do not depart from the essence of the present invention according to these technical revelations disclosed by the present invention, and these deformations and combinations are still within the protection scope of the present invention.

Claims

1. A capacitance detection circuit, characterized in that: It includes a measuring capacitance branch, a standard capacitance Crst, an operational amplifier OPA and a comparator CMP; The measuring capacitor branch includes a measuring capacitor, one end of the measuring capacitor is grounded, the other end of the measuring capacitor is respectively connected to one end of a first charge and discharge switch, one end of a second charge and discharge switch and one end of a charge transfer switch, the other end of the first charge and discharge switch is connected to a first reference level Vref1, the other end of the second charge and discharge switch is connected to a second reference level Vref2, and the other end of the charge transfer switch is connected to an inverting input end of an operational amplifier OPA; One end of the standard capacitor Crst is grounded, the other end of the standard capacitor Crst is respectively connected to one end of a switch K9 and one end of a switch K8, the other end of the switch K9 is connected to the inverting input end of the operational amplifier OPA, the other end of the switch K8 is connected to the fixed end of a single-pole double-throw switch K7, and two active ends of the single-pole double-throw switch K7 are respectively connected to a first reference level Vref1 and a second reference level Vref2; The reference voltage Vcm is input to the non-inverting input terminal of the operational amplifier OPA, the voltage V_ is input to the inverting input terminal of the operational amplifier OPA, and they are respectively connected to one end of the switch K0, one end of the switch K11, and one end of the switch K22; the output terminal of the operational amplifier OPA is respectively connected to the other end of the switch K0, one end of the switch K12, and one end of the switch K21; the other end of the switch K11 and the other end of the switch K12 are both connected to one end of the integral capacitor Cf, and the other end of the switch K22 and the other end of the switch K21 are both connected to the other end of the integral capacitor Cf; The output terminal of the operational amplifier OPA outputs a voltage Vout and is connected to the non-inverting input terminal of the comparator CMP. The inverting input terminal of the comparator CMP inputs a reference voltage Vcm. The output terminal of the comparator CMP outputs Dout.

2. The capacitance detection circuit according to claim 1, characterized in that: When detecting the absolute capacitance value of the capacitor, the measuring capacitance in the measuring capacitance branch is the capacitance to be measured Cp; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input terminal of the operational amplifier OPA.

3. The capacitance detection circuit according to claim 1, characterized in that: When detecting the relative capacitance value of the capacitor, the measuring capacitor in the measuring capacitance branch includes the capacitance to be measured Cp and the reference capacitance Cn; One end of the capacitor Cp to be measured is grounded, and the other end of the capacitor Cp to be measured is respectively connected to one end of the first charge and discharge switch K1, one end of the second charge and discharge switch K2, and one end of the charge transfer switch K3, the other end of the first charge and discharge switch K1 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K2 is connected to the second reference level Vref2, and the other end of the charge transfer switch K3 is connected to the inverting input end of the operational amplifier OPA; One end of the reference capacitor Cn is grounded, and the other end of the reference capacitor Cn is respectively connected to one end of the first charge and discharge switch K4, one end of the second charge and discharge switch K5, and one end of the charge transfer switch K6. The other end of the first charge and discharge switch K4 is connected to the first reference level Vref1, the other end of the second charge and discharge switch K5 is connected to the second reference level Vref2, and the other end of the charge transfer switch K6 is connected to the inverting input terminal of the operational amplifier OPA.

4. A capacitance detection method, implemented based on the capacitance detection circuit according to any one of claims 1 to 3, characterized in that: The following steps are involved: S1, clear the charge of the integral capacitor Cf to complete the circuit initialization; S2, during the first level of the clock cycle, charging the measurement capacitor to a corresponding reference level; At the same time, according to the level state of the output Dout of the comparator CMP in the previous clock cycle, the standard capacitor Crst is charged to the first reference level Vref1 or the second reference level Vref2; S3, during the second level period of the clock cycle, the charge-discharge switch and the switch K8 are disconnected, and then the charge transfer switch and the switch K9 are closed, so as to complete the charge transfer between the measuring capacitor, the standard capacitor Crst and the integrating capacitor Cf, and obtain the output voltage Vout of the operational amplifier OPA; Wherein, the clock levels corresponding to the first level and the second level are opposite; S4, based on the output voltage Vout of the operational amplifier OPA, the output Dout of the comparator CMP in the current clock cycle is obtained, and the charging level of the single-pole double-throw switch K7 is controlled according to the output voltage Vout of the operational amplifier OPA; S5, based on steps S2 to S4, repeat the measurement capacitor charging and charge transfer process, and accumulate the output Dout of the comparator CMP in each clock cycle, and after the set clock cycle, obtain the count value corresponding to the measurement capacitor; S6. Calculate the capacitance value of the detection capacitor according to the count value corresponding to the measured capacitance.

5. The capacitance detection method according to claim 4, characterized in that: When detecting the absolute capacitance value of a capacitor: In the step S1, the charge transfer switch that is disconnected is the charge transfer switch K3; In the step S2, the capacitor Cp to be measured is charged to a first reference level Vref1; In step S3, the disconnected charge-discharge switch is the first charge-discharge switch K1, and the closed charge transfer switch is the charge transfer switch K3; In step S5, the count value obtained is a count value corresponding to the absolute capacitance value of the capacitor Cp to be measured; When the detected capacitance is a relative capacitance value: In step S1, the charge transfer switches that are disconnected are the charge transfer switch K3 and the charge transfer switch K6; In the step S2, the capacitor to be measured Cp and the reference capacitor Cn are charged to a first reference level Vref1 and a second reference level Vref2 respectively; In step S3, the charge and discharge switches that are disconnected are the first charge and discharge switch K1 and the second charge and discharge switch K5; In the step S5, the count value obtained is the count value corresponding to the capacitance difference between the detection capacitor Cp and the reference capacitor Cn.

6. The capacitance detection method according to claim 4, characterized in that: In step S5, within N conversion cycles, the count value D corresponding to the measured capacitance satisfies: Wherein, V_ represents the voltage at the inverting input terminal of the operational amplifier, Vref1 represents the first reference level, Vref2 represents the second reference level, Vcm represents the reference voltage, Cp represents the capacitance value of the capacitor to be measured, Cn represents the capacitance value of the reference capacitor, Cf represents the integral capacitor used for charge transfer and temporarily storing the residual voltage of each conversion, Crst represents the internal standard capacitor for measuring the difference between the external capacitor Cp and Cn, and Vresi represents the residual voltage finally stored on the integral capacitor; For the count value D: Considering the zero drift, , the count value D is: In the formula, represents the zero drift voltage of the operational amplifier OPA, ; When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance is 0.

7. The capacitance detection method according to claim 4, characterized in that: The capacitance detection method further includes: eliminating zero drift in the capacitance detection process by introducing chopping, including the following steps: T1, after a set clock cycle, adjust the charging direction of the measuring capacitor and the standard capacitor Crst, and adjust the capacitance polarity of the integral capacitor Cf; T2, after going through the set clock cycle again, the charging direction of the measuring capacitor and the standard capacitor Crst, as well as the polarity of the integral capacitor Cf are adjusted to be opposite to those in T1; T3. Repeat steps T1 to T2 to eliminate the interference of the capacitance detection process and the influence of the zero drift of the operational amplifier OPA by adjusting the charging direction and polarity.

8. The capacitance detection method according to claim 7, characterized in that: In step T1: When the measured capacitance is the capacitance to be measured Cp, the method for adjusting the charging direction of the measured capacitance and the standard capacitance Crst, and adjusting the capacitance polarity of the integral capacitance Cf is as follows: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; Switch the integral capacitor Cf from switch K11 and switch K21 to switch K12 and switch K22; When the measured capacitance includes the measured capacitance Cp and the reference capacitance Cn, the method of adjusting the charging direction of the measured capacitance standard capacitance Crst and adjusting the capacitance polarity of the integral capacitance Cf is as follows: The charging switch of the detection capacitor Cp is adjusted from the first charging and discharging switch K1 to the second charging and discharging switch K2, and the charging voltage is adjusted from the first reference level Vref1 to the second reference level Vref2; The charging switch of the reference capacitor Cn is adjusted from the second charging and discharging switch K5 to the first charging and discharging switch K4, and the charging voltage is adjusted from the second reference level Vref2 to the first reference level Vref1; The charging direction of the standard capacitor Crst is adjusted from the second / first reference level Vref2 / Vref1 when the output Dout of the comparator is 0 / 1 to the first / second reference level Vref1 / Vref2 when the output Dout is 0 / 1; The switch of the integral capacitor Cf is switched from switch K11 and switch K21 to switch K12 and switch K22.

9. The capacitance detection method according to claim 7, characterized in that: By introducing chopping to eliminate zero drift in the capacitor detection process, after adjusting the charging direction and polarity multiple times, the final count value D is obtained as follows: In the formula, , , represents the zero drift voltage of the operational amplifier OPA; When the measured capacitance is the capacitance to be measured Cp and the detected capacitance is an absolute capacitance value, the capacitance value Cn of the reference capacitance is 0.

10. A capacitance detection device, characterized in that: include: The capacitance detection circuit according to any one of claims 1 to 3, wherein the capacitance detection circuit uses the capacitance detection method according to any one of claims 4 to 9 to control the turning off and on of a switch in the capacitance detection circuit, so as to control the output Dout of the comparator in the capacitance detection circuit; The logic control circuit is used to control the switch state in the capacitance detection circuit, and accumulate the output Dout of the comparator to obtain a final count value D, and calculate the capacitance value of the detection capacitor based on the final count value D.

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