Chip testing method and chip testing system

Abstract

The invention relates to the technical field of chip testing, in particular to a chip testing method and a chip testing system. The method comprises the following steps: acquiring a thermal imaging image of a working state of a chip; global color temperature offset optimization is carried out on the thermal imaging image of the working state of the chip, and spatial heat distribution mining is carried out, so that a chip heat distribution diagram is constructed; performing multi-moment heat distribution tracking processing on the chip heat distribution diagram, performing dynamic heat distribution evolution fitting, and constructing a dynamic heat distribution trend evolution diagram; acquiring a high-definition image of a to-be-tested chip; performing chip assembly visual monitoring on the high-definition image of the to-be-tested chip, performing heat distribution trend rendering based on the dynamic heat distribution trend evolution graph, and constructing a chip assembly heat distribution trend rendering model. According to the invention, through limit working condition test analysis, the evaluation efficiency and accuracy of the chip performance are improved.

Description

Technical Field

[0001] The present invention relates to the field of chip testing technology, and in particular to a chip testing method and a chip testing system. Background Art

[0002] In the design and application of modern electronic products, chips, as core components, play a vital role. With the continuous advancement of technology, the performance requirements of chips are getting higher and higher, especially the stability and reliability under extreme conditions. Extreme conditions refer to the operating state of chips in harsh environments such as extremely high or low temperatures, high humidity, high voltage, and strong electromagnetic interference. In such environments, the working performance of chips is affected by a variety of external factors, such as temperature changes, current fluctuations, and environmental noise. These factors cause the chip to fail to function, performance degradation, and even cause system failures. Therefore, the testing and evaluation of chips under extreme conditions has become the key to ensuring their stable operation in practical applications.

[0003] Traditional chip testing methods mostly focus on performance evaluation under standard working environments, often ignoring the actual performance of chips under extreme conditions. Manual testing and simple environmental simulations often cannot fully reflect the chip's coping capabilities and potential problems under real extreme conditions. Therefore, in order to meet the requirements of high-end electronic products for chip performance and reliability, especially in the fields of aerospace, automotive electronics, industrial control, etc., there is an urgent need for a test method that can simulate and accurately evaluate the performance of chips under extreme conditions. Summary of the invention

[0004] In order to solve the above technical problems, the present invention proposes a chip testing method and a chip testing system to solve at least one of the above technical problems.

[0005] To achieve the above object, the present invention provides a chip testing method, comprising the following steps: Step S1: obtaining a thermal imaging image of a chip in working state; performing global color temperature shift optimization on the thermal imaging image of the chip in working state, and performing spatial heat distribution mining, thereby constructing a chip heat distribution map; Step S2: performing multi-time heat distribution tracking processing on the chip heat distribution map, and performing dynamic heat distribution evolution fitting to construct a dynamic heat distribution trend evolution map; Step S3: obtaining a high-definition image of the chip to be tested; performing visual monitoring of chip components on the high-definition image of the chip to be tested, rendering the heat distribution trend based on the dynamic heat distribution trend evolution diagram, and constructing a chip component heat distribution trend rendering model; Step S4: Perform multi-time point heat situation rolling prediction and extreme operating condition calculation on the heat distribution trend rendering model to generate extreme operating condition parameters of abnormal components; Step S5: Based on the extreme operating condition parameters of the abnormal component, the chip component heat distribution trend rendering model is subjected to extreme operating condition test simulation, and then the internal diffusion path of the fault is deduced to extract multiple internal diffusion paths of the fault; Step S6: Perform extreme operating condition fault diagnosis based on multiple fault internal diffusion paths, and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

[0006] The present invention obtains thermal imaging images of the chip's working state and optimizes its color temperature offset to eliminate environmental influences, improve image accuracy, and make thermal imaging images more in line with actual conditions. At the same time, spatial heat distribution mining can reveal the temperature changes of the chip in different areas, help analyze the heat dissipation characteristics of different parts, and accurately identify existing hot spots. By tracking the heat distribution at multiple times, the heat change trend of the chip in different working states is obtained. This trend evolution fitting can effectively predict the changes in the chip's heat distribution at different time points, and provide accurate data support for subsequent dynamic thermal analysis and fault warning. Through high-definition images, visual monitoring of chip components is performed, the appearance and internal structure of chip components are comprehensively analyzed, and heat distribution trend rendering is assisted. This process is combined with a dynamic heat distribution trend evolution diagram to make heat distribution rendering more accurate and intuitive, providing a data basis for thermal management optimization, and helping designers to better identify overheating problems. The rolling prediction of multiple time points and the calculation of extreme operating conditions can evaluate the thermal changes of the chip under different working conditions, especially the performance under high temperature and extreme conditions, discover the performance bottlenecks of the chip under extreme environments, provide a scientific basis for testing extreme conditions, and identify potential faults and risks in advance. Extreme operating condition test simulation helps test the heat resistance and reliability of the chip under extreme conditions. Combined with the fault diffusion path deduction, it clarifies the heat propagation process of each chip component when encountering a fault, reveals the path of the fault extending from the initial position to other areas, effectively locates the source of the fault, and optimizes the thermal management design to reduce future failure risks. Through comprehensive fault test evaluation, comprehensive fault diagnosis is performed based on multiple fault diffusion paths, the working status of the chip is comprehensively evaluated under extreme conditions, and the impact of different fault modes on the system is predicted. A detailed fault diagnosis report is formed through simulation testing, which provides strong support for chip performance improvement, thermal management optimization and fault prevention.

[0007] Preferably, step S1 comprises the following steps: Step S11: continuously acquiring thermal imaging images of the chip working status using an infrared thermal imaging camera; Step S12: performing global color temperature shift optimization on the thermal imaging image of the chip working state, thereby constructing a global color temperature optimized thermal imaging image; Step S13: performing multi-hotspot visual recognition on the global color temperature optimized thermal imaging image, marking multiple temperature hotspots in the image; Step S14: performing region division based on multiple temperature hot spots in the image to generate multiple temperature region images; Step S15: performing spatial heat distribution mining on multiple temperature region images to construct a chip heat distribution map.

[0008] The present invention continuously acquires thermal imaging images of the chip in the working state and captures the temperature changes of the chip under different working conditions in real time. Infrared thermal imaging technology can intuitively display the temperature distribution of each part of the chip, provide high-precision data for subsequent thermal analysis, and help engineers monitor the thermal performance of the chip in real time and promptly discover potential thermal anomalies. Global color temperature offset optimization can effectively reduce errors or noise in thermal imaging images, so that the image more accurately reflects the actual temperature distribution of the chip. By eliminating the influence of environmental factors (such as background temperature changes) on the image, the reliability of thermal imaging images is improved, and more accurate thermal data is provided for subsequent analysis, thereby ensuring the effectiveness of thermal distribution maps and fault analysis. Multi-hotspot visual recognition can effectively identify multiple temperature hotspot areas in thermal imaging images. These hotspots are often key locations where the chip is overheated or has potential faults. By marking temperature hotspots, analysts are helped to locate The overheating areas in the chip provide important clues for further thermal management optimization and fault prediction, and identify risk areas that may cause chip performance degradation or failure in advance. By dividing the temperature hot spots into regions, the thermal imaging images are refined into multiple temperature region images, which facilitates more detailed thermal analysis. Regional division can not only help engineers understand the local thermal conditions of the chip, but also provide basic data for further analysis of the heat distribution and heat dissipation performance of each region. By mining the spatial heat distribution of multiple temperature region images, the detailed heat distribution of each region of the chip is obtained, and then a comprehensive chip heat distribution map is constructed. The heat distribution map can show the temperature differences in different parts of the chip, revealing the heat dissipation of the chip, the heat load distribution and the hot spots. By analyzing these data, we can deeply understand the thermal behavior of the chip under working conditions, identify high-temperature areas and potential failure points, and then optimize the thermal management design and performance of the chip.

[0009] Preferably, the specific steps of step S12 are: Performing thermocouple noise recognition on the thermal imaging image of the chip in working state, and extracting the noise of the thermal imaging image; Adaptively filter and reduce noise points in thermal imaging images to obtain noise-reduced and optimized thermal imaging images; Performing camera calibration calculation on the infrared thermal imaging camera to obtain internal parameters and external parameters; Performing geometric distortion perspective transformation on the noise reduction optimized thermal imaging image according to internal parameters and external parameters, thereby generating a distortion-corrected thermal imaging image; Perform raw pixel offset analysis on the distortion-corrected thermal imaging image to identify each raw pixel offset value; Perform bilinear interpolation reconstruction based on each original pixel offset value to obtain a pixel offset reconstructed thermal imaging image; Calculate ambient lighting parameters based on infrared thermal imaging camera; Performing an ambient light color temperature characteristic analysis on the ambient light parameters to obtain ambient light color temperature characteristic data; The global color temperature shift of the pixel-shifted reconstructed thermal imaging image is optimized based on the ambient light color temperature characteristic data, thereby constructing a global color temperature optimized thermal imaging image.

[0010] The present invention uses the fact that infrared thermal imaging images are interfered by noise points during the actual acquisition process. These noise points come from thermocouple errors or environmental interference. By identifying and extracting these noise points, unnecessary interference in the image is effectively reduced, providing higher quality raw data for subsequent image optimization and analysis. Adaptive filtering noise reduction is a common method for removing noise points in images. By adjusting the parameters of the filter, the noise points can be automatically filtered out according to their characteristics, and a clearer thermal imaging image is obtained. The important thermal information in the image is retained and the redundant interference is removed, thereby improving the accuracy of thermal analysis. The camera calibration calculation is the basis for ensuring the geometric accuracy of the image, and the internal parameters of the camera (such as focal length, principal point, distortion coefficient) and external parameters (such as Camera position, orientation, etc.) provide precise reference for subsequent geometric transformation. Accurate camera calibration can effectively eliminate image distortion caused by camera position change or lens distortion, providing a reliable basis for subsequent image correction and processing. Geometric distortion perspective transformation corrects image distortion caused by camera lens or shooting angle. By applying the internal and external parameters of the camera, accurate geometric distortion correction can be performed on thermal imaging images to eliminate deformation in the image, making the thermal imaging image more consistent with the actual physical scene. Through original pixel offset analysis, the offset of each pixel in the image can be deeply understood, which is crucial for accurate pixel reconstruction. By identifying the offset value of each pixel, subtle changes in the image can be better understood. Bilinear interpolation is a commonly used image reconstruction method that integrates the offset information of the original pixel value into the new image to obtain a smoother and distortion-free thermal imaging image, which helps to eliminate the image quality degradation caused by pixel offset, making the final image more accurate and reducing the impact of errors on subsequent analysis. The calculation of ambient lighting parameters helps to understand the impact of ambient light on thermal imaging images during shooting. During the thermal imaging process, factors such as ambient light intensity and color will interfere with the authenticity of the thermal imaging image. By accurately calculating these ambient lighting parameters, a more accurate basis is provided for subsequent color temperature optimization, further improving the authenticity of the image. And reliability, ambient light color temperature feature analysis helps identify and quantify the color temperature characteristics of ambient light under different conditions, which is crucial for color temperature optimization. By analyzing the color temperature of ambient light, its impact on thermal imaging images can be accurately evaluated, thereby providing effective data support for subsequent image color temperature optimization, ensuring that the temperature distribution in the image is more realistic. Global color temperature offset optimization adjusts the overall color temperature of the image to eliminate the influence of ambient light and equipment factors, thereby making the temperature distribution in the thermal imaging image more accurate. Through optimization based on ambient light color temperature feature data, the interference of external light on the image can be eliminated, making the final image more in line with the actual thermal distribution, thereby providing more accurate data support for the extreme working condition test analysis of the chip.

[0011] Preferably, step S2 specifically comprises the following steps: Step S21: performing multi-time heat distribution tracking processing on the chip heat distribution map to generate heat distribution maps of multiple time periods; Step S22: performing dynamic heat distribution trend analysis on the heat distribution graphs of multiple time periods, thereby generating dynamic heat distribution trend features; Step S23: performing inter-regional heat gradient identification on the heat distribution diagrams of multiple time periods to generate regional heat distribution gradient data; Step S24: performing heat propagation law evolution on the regional heat distribution gradient data, thereby generating a chip heat propagation evolution law; Step S25: fitting the dynamic heat distribution evolution to the dynamic heat distribution trend characteristics according to the chip heat propagation evolution law, and constructing a dynamic heat distribution trend evolution diagram.

[0012] The present invention can comprehensively track the thermal state of the chip at different time points by generating heat distribution diagrams of multiple time periods, capture the temperature changes of the chip in the entire working cycle, and avoid dynamic changes that cannot be reflected by a single moment image. The chip has time temperature fluctuations in actual work. Through multi-moment tracking processing, more accurate heat distribution information is obtained, which helps to understand the thermal behavior of the chip under different working conditions. By dynamically analyzing the heat distribution diagrams of different time periods, the heat change trend characteristics of the chip during operation can be extracted. This trend feature can reflect the heat accumulation and dispersion law of the chip under different working conditions, and help identify abnormal temperature rise areas or uneven heat problems. Through the generation of dynamic trend features, forward-looking information can be provided for the thermal behavior of the chip in long-term operation, thereby providing valuable reference for fault diagnosis and optimization design. By identifying the heat gradient between different areas, the heat transfer state of each area of ​​the chip is clarified, and the hot spot area with relatively concentrated heat and the part with poor cooling effect are found. This helps to find the problem of uneven heat distribution on the surface or inside of the chip. The identification of heat gradients helps to accurately locate the areas where overheating and thermal damage occur, especially in complex chips, which can help to quickly find potential fault areas. Regional heat gradient data can provide a direct reference for cooling system design, optimize the heat dissipation and thermal management solutions of the chip, and improve the overall thermal efficiency of the chip. Through the evolution of heat propagation laws, a mathematical model of how the heat inside the chip propagates from one area to another can be established. This model helps to predict the heat diffusion of the chip under different workloads, so as to better understand the thermal behavior of the chip. Through the evolution of heat propagation laws, the path and speed of heat diffusion from hot spots to other areas are clearly depicted, which further helps designers identify those heat propagation paths that cause chip overheating. By combining the heat propagation evolution law with the dynamic heat distribution trend characteristics, the evolution process of heat in the chip can be fitted to obtain a more accurate heat distribution evolution diagram. This fitting can depict the dynamic change trend of heat under different workloads of the chip and predict the thermal stress area in advance. The dynamic heat distribution trend evolution diagram provides an accurate prediction of the thermal behavior of the chip in actual work, allowing engineers to optimize thermal management in the design stage to avoid overheating or insufficient heat dissipation during use. Through this image, it is possible to warn in advance of overheating or uneven temperature conditions of the chip under long-term or extreme working conditions, providing a reliable basis for fault prevention and maintenance.

[0013] Preferably, step S3 specifically comprises the following steps: Step S31: Acquire a high-definition image of the chip to be tested; Step S32: Perform chip component visual monitoring on the high-definition image of the chip to be tested, and mark each chip component point; Step S33: accurately locate the spatial position of each chip component point and generate the spatial position coordinates of each component point; Step S34: performing chip component point layout analysis according to the spatial position coordinates of each component point, thereby generating chip component point layout features; Step S35: performing three-dimensional component topology modeling on the chip component point layout features to construct a chip three-dimensional component topology model; Step S36: Rendering the heat distribution trend of the chip three-dimensional component topology model based on the dynamic heat distribution trend evolution diagram to construct a chip component heat distribution trend rendering model.

[0014] The present invention obtains detailed appearance information of the chip to be tested through high-definition images, captures tiny details on the chip surface, including the physical position, size and shape of each component, and provides high-quality basic data for subsequent analysis. The high-definition image can fully display each part of the chip to ensure that no potential heat accumulation area or structural problem is missed. By visually monitoring the high-definition image, the position and structure of each chip component can be marked to ensure accurate identification and tracking of the heat distribution, position change and other information of each component in the subsequent analysis. In the process of marking the chip component points, human errors can be reduced, ensuring that the heat analysis of each component is based on the real position, and improving the accuracy of the subsequent heat distribution analysis. By accurately locating the spatial coordinates of each component point, we can better understand the distribution relationship of each chip component in three-dimensional space, and provide accurate spatial reference for subsequent heat distribution analysis, heat transfer model, etc. The spatial position coordinates of the component provide key data support for building a three-dimensional model and conducting three-dimensional heat distribution analysis, so that the heat distribution analysis is not limited to the two-dimensional plane, but can cover the three-dimensional structure of the chip. By performing layout analysis on the spatial position of each component point, the arrangement rules of each component inside the chip, the distance between each other, the heat transfer path and other information are revealed. The extraction of layout features helps to understand the heat conduction and heat dissipation capabilities of the chip during operation. This step can identify the chip The bottleneck areas in the component layout that affect heat transfer or heat dissipation, such as overly dense component arrangement, provide a basis for subsequent optimization design. According to the chip component layout characteristics, data support is provided for the chip's heat dissipation design, cooling system design, or component arrangement optimization, improving the chip's overall thermal management capabilities. Through 3D topological modeling, the spatial position, shape and mutual relationship of each chip component are visualized to create a three-dimensional chip model, which helps to more intuitively understand the chip structure, especially in terms of heat conduction, heat dissipation path, etc. The 3D component topological model can provide more dimensional data, making the heat propagation analysis more comprehensive and detailed. The thermal interaction between chip components can be visualized through 3D topology modeling. The model can perform more accurate simulation and prediction. By rendering the heat distribution trend of the three-dimensional topology model based on the dynamic heat distribution trend evolution diagram, the heat evolution process of the chip in different time periods can be visualized, and the heat propagation path and temperature distribution inside the chip can be directly displayed. Through the heat distribution trend rendering, the thermal state of the chip under different working conditions can be predicted, especially the heat accumulation and diffusion under high load and extreme working conditions, thereby providing a scientific basis for the thermal design and fault prevention of the chip. Through the visualization effect of the rendering model, engineers and designers can more intuitively see how heat is propagated in the three-dimensional structure, and then optimize the heat dissipation solution and thermal management strategy to reduce the risk of overheating and failure.

[0015] Preferably, the specific steps of step S4 are: Step S41: performing rolling prediction of the heat situation at multiple time points on the heat distribution trend rendering model to generate heat situation prediction data of chip components at multiple time points; Step S42: identifying abnormal component temperatures based on the chip component heat situation prediction data at multiple time points, and marking abnormal chip component points; Step S43: Obtain the chip historical operation log, perform normalized operation analysis on the abnormal chip component points according to the chip historical operation log, and extract the normalized operation parameters of the abnormal components; Step S44: Calculate the extreme operating condition based on the normalized operating parameters of the abnormal component to generate the extreme operating condition parameters of the abnormal component.

[0016] The present invention can fully grasp the heat change of chip components at different time points through rolling prediction of heat distribution trend. This provides a reliable basis for subsequent temperature management and component load analysis. The heat data at different time points can help analyze the temperature change trend of the chip in long-term operation, and predict the heat anomaly of the chip under different working conditions in advance, so as to avoid the impact of overheating and other problems on chip performance and life. By predicting the heat state at multiple time points, the problem of thermal stress accumulation that occurs during the operation of the chip can be identified early, so as to take optimization measures in advance to ensure the safety and stability of the system. By marking the abnormal chip component points, it is convenient to accurately diagnose the fault location and quickly locate the specific source of the temperature anomaly, thereby reducing the time and cost of problem location. By marking the abnormal component points, the system provides accurate targets for subsequent fault warning and preventive maintenance, improves the reliability of chip components, and reduces the risk of unexpected downtime. By obtaining the historical operation log of the chip and combining the normalized operation analysis of the abnormal components, it is possible to more comprehensively understand the performance of the chip under normal working conditions and provide data support for subsequent abnormal analysis. Normalized operation analysis helps to analyze the actual performance of the chip under various typical working conditions, eliminate some non-abnormal temperature fluctuations, and more accurately evaluate which temperature changes are caused by faults. By analyzing historical operation data, the normal working parameters of the chip are extracted as benchmark data to provide reliable reference values ​​for subsequent extreme working condition calculations to ensure that the chip operates within a reasonable range. By predicting the performance of the chip under extreme working conditions based on the extreme working condition calculations based on normalized operating parameters, it helps chip designers identify potential design defects and ensure the stability of the chip under various extreme working conditions. Based on the calculated extreme operating condition parameters, the chip is further optimized and debugged to improve the chip's tolerance, load capacity and overheating resistance, and enhance the chip's adaptability and life. Extreme working condition calculations help to identify the chip's vulnerabilities in extreme environments in advance, so that measures can be taken to avoid chip failures under extreme working conditions, ensure the normal operation of the system, and reduce system crashes caused by overheating, overload and other problems.

[0017] Preferably, the specific steps of step S5 are: Step S51: performing an extreme operating condition test simulation on the chip component heat distribution trend rendering model based on the extreme operating condition parameters of the abnormal component, and collecting extreme operating condition test simulation response data; Step S52: Perform deep mining of component operating status on extreme condition test simulation response data to generate extreme condition component operating status characteristics; Step S53: predicting the chip failure probability trend based on the extreme operating condition component operation status characteristics, thereby constructing component failure probability heat maps in different areas; Step S54: perform fault internal diffusion path deduction on component failure probability heat maps in different areas, and extract multiple fault internal diffusion paths.

[0018] The present invention simulates the extreme operating condition test of the heat distribution trend rendering model of the chip component based on the extreme operating condition parameters of the abnormal component, and can simulate the real heat distribution and performance response of the chip under extreme working conditions. This helps to identify the hot spots, overheating risks and other problems that occur in actual operation in advance. By comparing the simulation data with the actual test results, the accuracy and reliability of the heat distribution trend rendering model can be verified, thereby providing a higher reliability model support for subsequent chip fault prediction. By deeply mining the extreme operating condition test simulation response data, the operating state of the chip component under extreme conditions can be analyzed from multiple dimensions (such as temperature, load, power, etc.). This provides an accurate basis for understanding the specific performance of the chip under extreme conditions. Deep mining reveals the potential weaknesses of chip components under high load, high temperature and other conditions, and helps engineers identify the factors that have the greatest impact on chip performance, such as frequency reduction and system instability in some areas due to excessive heat accumulation. By mining the state characteristics under extreme conditions, detailed parameter input is provided for subsequent fault prediction, helping designers optimize product design and enhance the stability of chips in extreme environments. By predicting the chip failure probability trend based on the operating status characteristics of extreme working condition components, the failure probability of the chip under extreme conditions can be predicted, and a component failure probability heat map can be generated. The heat map intuitively shows the failure risks in different areas, providing important reference information for engineers. The failure probability heat map helps to quickly identify the areas or components in the chip that are most prone to failure. It helps to locate the risk areas in advance, and then take improvement measures to avoid catastrophic failures. Through the heat map, the engineering team can clearly identify which areas have a higher failure risk, so as to carry out more targeted monitoring, testing and optimization, reasonably allocate test resources, and improve test efficiency. By deducing the internal diffusion path of the component failure probability heat map in different areas, the propagation path of the fault within the chip system can be predicted. For example, when a certain area fails, it will cause failures in adjacent areas or a complete collapse of the system. Extracting the fault diffusion path helps prevent the full expansion of the fault in advance. Understanding the fault diffusion path helps to formulate more effective protection measures, such as strengthening the heat dissipation design of certain high-risk areas, adding redundant backups, setting up fault alarms, and other measures to minimize the irreversible system collapse of the chip. After deducing the spread path of the fault, it helps enterprises formulate emergency response plans in advance, such as phased repair, isolation of fault areas, and performance evaluation before and after repair, thereby reducing system downtime and fault repair costs.

[0019] Preferably, the specific steps of step S53 are: Predict the chip failure probability trend based on the operating status characteristics of the extreme working condition components to obtain chip failure probability trend prediction data; Perform fault probability time series fitting on chip fault probability trend prediction data to construct chip fault probability time series curve; Identify the faulty component area based on the operating status characteristics of the extreme operating condition components and mark the faulty component area; According to the chip failure probability timing curve, the failure probability trend of the faulty component area is mapped, so as to construct the component failure probability heat map in different areas.

[0020] The present invention predicts the chip failure probability trend through the component operation status characteristics under extreme working conditions, accurately quantifies the chip failure probability under different working conditions, and provides a scientific basis for subsequent fault prevention by dynamically capturing the potential risks in the chip operation process. The failure probability trend prediction can analyze the chip failure trend in different time periods based on the operation data, and provide early warning of system crashes or performance degradation, which helps to monitor the chip status in real time and take repair or replacement measures in time, thereby reducing system downtime. The curve after timing fitting can reveal the potential fluctuations and peaks of the failure risk, thereby helping engineers analyze the failure probability of the chip at a specific time or under specific working conditions, so as to facilitate timely taking of necessary countermeasures. By analyzing the key time nodes in the timing curve, the test team determines the test phases to focus on, such as strengthening monitoring during high-risk periods or focusing on testing specific areas to improve the overall test efficiency and accuracy. By identifying the faulty component area based on the extreme working condition component operation status characteristics, the areas or components in the chip with failure risks are accurately marked. This process helps to detect and effectively prevent fault problems at an early stage, identify the fault area in advance, and provide the maintenance team with accurate objectives. Marking areas, reducing unnecessary inspection and repair work, saving time and resources, and improving repair efficiency. By identifying the faulty component area, the cause of the failure can be analyzed in a targeted manner, the design or function of the area can be optimized, and the reliability of the chip under extreme working conditions can be improved. By mapping the fault probability trend of the faulty component area according to the chip failure probability timing curve, the generated fault probability heat map intuitively displays the failure risk of different areas and helps the team quickly locate high-risk areas. The heat map can not only provide spatial distribution information of the failure probability, but also help the team identify the "failure hotspot" areas in the chip. These areas are high-frequency areas where chip failures occur. As the focus of subsequent design optimization, through the failure probability heat map, the engineering team can make more data-driven decisions during the design, manufacturing and maintenance processes. For example, in the chip design stage, the thermal management and heat dissipation design of high-risk areas can be strengthened, or more quality control tests can be performed on high-risk areas in the production stage. The heat map provides continuous support for subsequent chip optimization and risk management. With the collection and analysis of new data, the heat map is dynamically updated to help the team keep abreast of the latest failure risk information of the chip under extreme working conditions and formulate long-term maintenance and optimization strategies.

[0021] Preferably, the specific steps of step S6 are: Step S61: performing diffusion path cross component point analysis on multiple internal fault diffusion paths to extract key fault diffusion component points; Step S62: Perform extreme operating condition fault diagnosis on the key fault diffusion component points to obtain component extreme operating condition fault diagnosis data; Step S63: performing a quantitative analysis of the fault repairability of the component extreme operating condition fault diagnosis data, thereby obtaining a quantitative value of the repairability of key component points; Step S64: Perform a comprehensive fault test evaluation based on the quantitative values ​​of the repairability of key component points to obtain a chip extreme operating condition fault test report.

[0022] The present invention can find the key component points where multiple fault paths intersect by performing cross-component point analysis on multiple internal fault diffusion paths. These component points are usually bottlenecks or key nodes for fault diffusion and play an important role in multiple fault paths. Identifying these key components helps to prioritize high-risk components. By cross-analyzing different fault paths, the source and development process of fault diffusion can be accurately tracked, which provides a scientific basis for subsequent fault location and diagnosis, helps to identify which areas or components are most susceptible to faults, and helps the design team improve these areas. By comprehensively analyzing multiple fault paths, the accuracy of fault diffusion prediction is improved. Especially in complex systems, this helps to accurately predict the chain reactions that occur in the system under extreme conditions, thereby Reduce the risk of system crashes, perform extreme fault diagnosis on key components where faults spread, simulate the performance of chips under extreme loads, temperatures or other extreme environmental conditions, and accurately diagnose which components will fail under these conditions. This provides important feedback for chip design optimization. Extreme fault diagnosis helps engineers not only identify faulty components, but also further locate the specific cause of the fault, such as overheating, insufficient power, electrical failure, etc., thereby avoiding unsolvable problems. The diagnostic results provide clear directions for subsequent repair plans, such as heat dissipation design optimization for overheating problems, or circuit improvements for electrical failures, thereby improving the reliability and durability of the chip under extreme conditions. Repairs are performed by diagnosing component extreme fault diagnosis data. Quantitative analysis of repairability can quantitatively evaluate the difficulty, cost and time of repairing each faulty component. This helps the engineering team determine the priority of fault repair and decide which faults need to be solved as soon as possible and which ones need to be postponed. By quantifying the repairability of key component points, a more scientific and accurate basis is provided for repair work, and maintenance processes and plans are optimized to avoid excessive or missed repairs. Quantitative analysis can also help the design team selectively adjust the design to reduce the frequency of future failures. Quantitative analysis of repairability can effectively evaluate the resource requirements of repair work, help control maintenance costs, and improve resource utilization efficiency. For large-scale production chips, quantitative analysis of repairability can significantly reduce the cost of maintenance and repair, and improve overall production efficiency. Based on the quantitative value of the repairability of key component points, Comprehensive fault test evaluation comprehensively evaluates the fault performance and repair strategy of the entire chip under extreme working conditions. This not only covers single fault points, but also comprehensively considers the interaction and overall impact of multiple fault paths, providing a comprehensive perspective for chip reliability evaluation. Through comprehensive fault test evaluation, the fault test report finally generated can record in detail the performance of the chip under extreme working conditions, fault analysis, repair plan, etc., and provide detailed decision-making basis for the engineering team. The report content helps the design and manufacturing team to identify which areas or components have potential performance problems under extreme conditions. The test report can reveal the weak links in the design and production process, and provide guidance for subsequent design optimization and quality control. Through regular comprehensive evaluation, the quality of the chip is continuously optimized.Improve production efficiency and reduce the cost of subsequent maintenance and testing.

[0023] In this specification, a chip testing system is provided, which is used to perform the chip testing method as described above, including: An image enhancement module is used to obtain a thermal imaging image of the chip working state; perform global color temperature shift optimization on the thermal imaging image of the chip working state, and perform spatial heat distribution mining to construct a chip heat distribution map; The heat distribution trend module is used to track the heat distribution of the chip at multiple times, perform dynamic heat distribution evolution fitting, and construct a dynamic heat distribution trend evolution diagram; The chip component layout module is used to obtain a high-definition image of the chip to be tested; the high-definition image of the chip to be tested is used to visually monitor the chip components, and the heat distribution trend is rendered based on the dynamic heat distribution trend evolution diagram to build a chip component heat distribution trend rendering model; The heat situation prediction module is used to perform rolling prediction of the heat situation at multiple time points and calculate the extreme operating conditions of the heat distribution trend rendering model to generate the extreme operating condition parameters of the abnormal components; The extreme operating condition test module is used to simulate the extreme operating condition test of the chip component heat distribution trend rendering model based on the extreme operating condition parameters of the abnormal component, and then deduce the internal diffusion path of the fault to extract multiple internal diffusion paths of the fault; The fault diagnosis module is used to perform extreme operating condition fault diagnosis based on multiple internal fault diffusion paths and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

[0024] The present invention acquires thermal imaging images, monitors the working status of the chip in real time, and acquires the heat distribution of each component of the chip, which is crucial for discovering potential overheating problems. Global color temperature offset optimization eliminates noise and color difference in thermal imaging images, making the visualization of heat distribution more accurate, and improving the accuracy of subsequent analysis. Through heat distribution mining, it is possible to deeply analyze the spatial distribution of chip surface temperature and reveal the heat accumulation in various areas of the chip, which is crucial for identifying high-temperature hot spots and areas with insufficient heat dissipation, and helps to optimize the heat dissipation design of the chip. Through multi-time heat distribution tracking processing, the heat change trend of the chip under different working conditions is observed, which is very important for predicting the performance of the chip after long-term operation, as well as for dealing with temperature fluctuations and Load changes are very critical. Dynamic heat distribution evolution fitting can generate accurate heat evolution curves and provide engineers with long-term heat evolution trends of chips under extreme working conditions. This helps to analyze the impact of heat accumulation on chip performance and identify potential overheating risks. The heat distribution trend chart can predict the temperature change trajectory of the chip under different working conditions and provide decision support for subsequent fault diagnosis and design optimization. By acquiring the component layout of the chip through high-definition images and performing visual monitoring, the various components inside the chip and their heat distribution can be accurately identified. In this way, the design team can identify which components are susceptible to overheating and which are potential failure points. Combined with the dynamic heat distribution trend evolution chart, heat distribution trend rendering is performed to provide information for each chip component. It provides more accurate temperature change trajectories, which provides specific data support for the heat dissipation design of chip components and the optimization of temperature control systems. Based on the heat distribution rendering model, it can identify which components have performance bottlenecks such as overheating and frequency reduction under specific working conditions, and help designers optimize component layout and heat dissipation solutions. Through the rolling prediction of the heat distribution trend rendering model, it dynamically monitors the heat changes of the chip at different time points, and evaluates the heat performance of the chip under different load conditions in real time. It effectively predicts the performance of the chip under extreme working conditions and discovers overheating problems in advance. Through extreme working condition calculations, it simulates the operating status of the chip under the most extreme conditions, predicts the high temperature and failure risks of abnormal components, provides data support for the fault warning system, and reduces the occurrence of failures in actual work. The generation of extreme operating condition parameters can help the design team conduct risk assessment during the product development stage, avoid problems that may lead to overheating and uneven heat dissipation in the design, and optimize the thermal management design of the chip. Through test simulation based on extreme operating condition parameters, we can gain an in-depth understanding of the performance of the chip under extreme conditions, especially the performance and stability under high load and high temperature conditions. This helps to identify the source of faults and weak links in advance. By deducing the internal diffusion path of the fault, we can simulate the diffusion process after the fault occurs and identify which components will be affected. This helps to determine the propagation mode of the fault inside the chip and provide support for fault warning and repair. By extracting multiple fault diffusion paths, we can provide a scientific basis for fault prevention measures and help the design team optimize the chip structure and heat dissipation design.Prevent faults from spreading to other key components. By analyzing multiple fault diffusion paths, the fault type, cause and impact range of the chip under extreme working conditions can be accurately diagnosed, ensuring comprehensive identification of chip faults and proposing targeted solutions. Through comprehensive fault test evaluation, the fault performance of the chip under extreme working conditions can be comprehensively evaluated and a detailed test report can be generated, which provides data support for subsequent design optimization, production quality control and maintenance strategies. The extreme working condition fault test report provides an important decision-making basis for the chip design and production team, helping to improve chip design, optimize the manufacturing process, and carry out targeted fault repair and performance improvement. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 A schematic diagram of the steps of a chip testing method of the present invention; Figure 2 Detailed implementation flow chart of step S1; Figure 3 Detailed implementation flow chart of step S2; Figure 4 Detailed implementation flow chart of step S3. DETAILED DESCRIPTION

[0026] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.

[0027] The present application example provides a chip testing method and a chip testing system. The execution subjects of the chip testing method and the chip testing system include but are not limited to: mechanical equipment, data processing platform, cloud server node, network upload device, etc. equipped with the system can be regarded as the general computing node of the present application, and the data processing platform includes but is not limited to: at least one of an audio and image management system, an information management system, and a cloud data management system.

[0028] See also Figures 1 to 4 The present invention provides a chip testing method, which comprises the following steps: Step S1: obtaining a thermal imaging image of a chip in working state; performing global color temperature shift optimization on the thermal imaging image of the chip in working state, and performing spatial heat distribution mining, thereby constructing a chip heat distribution map; Step S2: performing multi-time heat distribution tracking processing on the chip heat distribution map, and performing dynamic heat distribution evolution fitting to construct a dynamic heat distribution trend evolution map; Step S3: obtaining a high-definition image of the chip to be tested; performing visual monitoring of chip components on the high-definition image of the chip to be tested, rendering the heat distribution trend based on the dynamic heat distribution trend evolution diagram, and constructing a chip component heat distribution trend rendering model; Step S4: Perform multi-time point heat situation rolling prediction and extreme operating condition calculation on the heat distribution trend rendering model to generate extreme operating condition parameters of abnormal components; Step S5: Based on the extreme operating condition parameters of the abnormal component, the chip component heat distribution trend rendering model is subjected to extreme operating condition test simulation, and then the internal diffusion path of the fault is deduced to extract multiple internal diffusion paths of the fault; Step S6: Perform extreme operating condition fault diagnosis based on multiple fault internal diffusion paths, and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

[0029] The present invention obtains thermal imaging images of the chip's working state and optimizes its color temperature offset to eliminate environmental influences, improve image accuracy, and make thermal imaging images more in line with actual conditions. At the same time, spatial heat distribution mining can reveal the temperature changes of the chip in different areas, help analyze the heat dissipation characteristics of different parts, and accurately identify existing hot spots. By tracking the heat distribution at multiple times, the heat change trend of the chip in different working states is obtained. This trend evolution fitting can effectively predict the changes in the chip's heat distribution at different time points, and provide accurate data support for subsequent dynamic thermal analysis and fault warning. Through high-definition images, visual monitoring of chip components is performed, the appearance and internal structure of chip components are comprehensively analyzed, and heat distribution trend rendering is assisted. This process is combined with a dynamic heat distribution trend evolution diagram to make heat distribution rendering more accurate and intuitive, providing a data basis for thermal management optimization, and helping designers to better identify overheating problems. The rolling prediction of multiple time points and the calculation of extreme operating conditions can evaluate the thermal changes of the chip under different working conditions, especially the performance under high temperature and extreme conditions, and discover the performance bottlenecks of the chip under extreme environments, providing a scientific basis for testing extreme conditions and identifying potential faults and risks in advance. Extreme condition test simulation helps test the heat resistance and reliability of the chip under extreme conditions. Combined with the fault diffusion path deduction, it clarifies the heat propagation process of each chip component when encountering a fault, reveals the path of the fault extending from the initial position to other areas, effectively locates the source of the fault, and optimizes the thermal management design to reduce future failure risks. Through comprehensive fault test evaluation, comprehensive fault diagnosis is performed based on multiple fault diffusion paths, the working status of the chip is comprehensively evaluated under extreme conditions, the impact of different fault modes on the system is predicted, and a detailed fault diagnosis report is formed through simulation testing, which provides strong support for chip performance improvement, thermal management optimization and fault prevention.

[0030] In the embodiment of the present invention, refer to Figure 1 , is a schematic flow chart of the steps of a chip testing method of the present invention. In this example, the steps of the chip testing method include: Step S1: obtaining a thermal imaging image of a chip in working state; performing global color temperature shift optimization on the thermal imaging image of the chip in working state, and performing spatial heat distribution mining, thereby constructing a chip heat distribution map; In this embodiment, a device with a resolution of ≥320x240 pixels and a temperature measurement accuracy of ±2°C is used to ensure that the band of the thermal imager is suitable (usually 8-14μm) to capture the infrared radiation on the chip surface. The test is carried out in a stable environment. The ideal ambient temperature should be maintained at 20-25°C, and the humidity should be controlled between 40%-60%. The influence of external temperature changes and airflow on the measurement results is avoided. The stability of the test environment is ensured. The chip is placed within the field of view of the thermal imager, the working mode of the chip is started, and its working voltage (such as 3.3V or 5V) and working frequency (such as 1GHz) are recorded. The thermal imager captures the heat distribution on the chip surface in real time. The thermal image is generated and the image data of the thermal imager is saved in real time. It is usually transferred to a computer via a USB interface or Wi-Fi for subsequent analysis. The time of each test (e.g., 10 minutes) is recorded for subsequent comparative analysis. The acquired thermal image is imported into the system using image processing software (e.g., MATLAB or Python's OpenCV library). The image is denoised and denoising parameters are set (e.g., a Gaussian blur radius of 2) to eliminate noise caused by environmental interference and improve image quality. The color temperature in the image is analyzed and the average color temperature of the image is calculated, which is usually between 25°C and 100°C. The formula is used. =255 / R×K, where R is the pixel value of the red channel and K is the correction factor. According to the calculated average color temperature value, a target color temperature value (such as 40°C) is set. The original image is subjected to global color temperature shift processing through the image processing algorithm, so that the color temperature value of each pixel in the image is close to the target color temperature value. The linear interpolation algorithm is used to achieve color temperature adjustment to ensure that the color temperature distribution is more uniform. After optimization, the image is analyzed again to ensure that the effect of color temperature shift reaches the expected effect. By comparing the color temperature distribution diagrams before and after optimization, the mean square error (MSE) and other indicators are used for verification to ensure that the optimization effect is significant. The temperature data is extracted from the optimized thermal imaging image using image processing tools. The temperature value of each pixel (such as between 30°C and 90°C) represents the heat distribution information on the chip surface. The extracted temperature The temperature data is sorted and analyzed, and the temperature data is stored in matrix form for subsequent visualization of heat distribution. The data is processed using Python's NumPy library. According to the processed temperature data, a heat distribution map is constructed using data visualization tools (such as MATLAB, Python's Matplotlib library, etc.). The discrete temperature data is converted into a continuous heat distribution map through interpolation algorithms (such as bilinear interpolation or Kriging interpolation). The color mapping range (for example, 30°C-90°C) is set to intuitively display temperature changes. The constructed heat distribution map is analyzed to identify heat concentration areas and parts with insufficient heat dissipation. Combined with the design and working principle of the chip, optimization suggestions are put forward, such as improving the heat dissipation design or adjusting the power distribution, to improve the thermal management efficiency of the chip.

[0031] Step S2: performing multi-time heat distribution tracking processing on the chip heat distribution map, and performing dynamic heat distribution evolution fitting to construct a dynamic heat distribution trend evolution map; In this embodiment, when the chip is in working state, thermal imaging images are collected at preset time intervals (for example, every 1 minute), the time label of each collection is recorded, and the test environment of each collection is ensured to be stable. The experiment duration is set to 10 minutes to 30 minutes to ensure that enough heat distribution images are collected, and the thermal imaging data obtained at each time point are sorted and stored as a time series data set. Each data contains a timestamp and a corresponding heat distribution matrix (such as 320x240 pixels). A structured data format (such as CSV or HDF5) is used to facilitate subsequent analysis. The heat distribution image at each time point is processed to extract core data information. By setting a threshold (for example, 35°C), the heat distribution map is converted into a binary image, and the area with higher heat is identified. Image processing technology (such as region growing algorithm) is used to track changes in the heat peak area and record its Changes in position and temperature values, compare the heat distribution data at each time point, analyze the heat change trend between different time points, use statistical analysis methods (such as mean, variance) to calculate the changes in each high-temperature area at different time points, identify the evolution trajectory of the heat concentration area, and select an appropriate mathematical model (such as linear regression, nonlinear regression or polynomial fitting) to describe the change of heat distribution over time based on the tracked heat distribution data. The choice of model should be based on the characteristics and change trend of the data. For example, if the heat distribution shows exponential growth or decay characteristics, an exponential fitting model can be selected. Use data analysis software (such as Python's SciPy or MATLAB) to fit the tracked heat distribution data, estimate the model parameters through algorithms such as the least squares method, and obtain the functional relationship of heat distribution over time. For example, fit the temperature T(t)=a⋅ +c, where abc is the parameter to be fitted, and t is the time. The fitting effect is verified by visualization means (such as the overlap of the scatter plot and the fitting curve), and the goodness of fit (such as the R² value) is calculated to ensure that the model can better describe the dynamic changes of the heat distribution. If the fitting effect is not good, the model needs to be adjusted or a different fitting method needs to be selected to construct a dynamic heat distribution trend evolution diagram: the fitting results are combined with the original data to construct a dynamic heat distribution trend evolution diagram. The diagram can show the heat distribution at different time points and the fitting curve to help more intuitively understand the trend of heat evolution. Color gradients and legends are used to identify different temperature ranges for easy analysis.

[0032] Step S3: obtaining a high-definition image of the chip to be tested; performing visual monitoring of chip components on the high-definition image of the chip to be tested, rendering the heat distribution trend based on the dynamic heat distribution trend evolution diagram, and constructing a chip component heat distribution trend rendering model; In this embodiment, a suitable high-definition camera (such as a camera with a resolution of 12MP or above) is selected to ensure that it has good macro shooting capabilities so that the details of the chip can be clearly captured. The camera should be equipped with an appropriate lens (such as a macro lens) to ensure that it can be shot at close range. The high-definition image is collected in a stable experimental environment. The ideal ambient temperature should be maintained at 20-25°C, and strong light and reflection should be avoided to avoid affecting the image quality. Ensure that the light in the acquisition environment is uniform and use a soft light for auxiliary lighting. After ensuring that the camera is focused and the exposure parameters are set, take a high-definition image of the chip to be tested. Each image should cover different parts of the chip to obtain the overall picture of the entire chip and the details of its key components (such as power supply, heat sink, connector, etc.). It is recommended to take at least three images of each component so that the best image can be selected later. The captured high-definition images are stored in a computer in a lossless format (such as TIFF or PNG) for subsequent image processing and analysis. Use image processing software (such as MATLAB, OpenCV) to perform preliminary processing on the image to ensure that the image is clear and remove background noise. Computer vision algorithms (such as edge detection, contour extraction, etc.) are used to analyze chip components in high-definition images. First, edge detection algorithms (such as Canny edge detection) are used to identify the edges and main components of the chip. Then, the components are further processed in combination with morphological operations (such as dilation and corrosion) to extract clear contours. The previously generated dynamic heat distribution trend evolution map is used as the heat distribution data input, and the heat data is mapped to the components of the chip using interpolation methods (such as bilinear interpolation). Ensure that the heat data matches the component position for subsequent rendering. Use data visualization tools (such as Matplotlib, Plotly, or MATLAB) to render the heat distribution trend. By combining heat values ​​with color mapping, gradient colors (such as from blue to red) are used to represent different temperature ranges. Set heat thresholds to highlight high-temperature areas and enhance the visual effect of the image. Integrate the rendering results into a complete heat distribution trend model to form an interactive interface that allows users to view the heat distribution at different time points. Use graphical user interface (GUI) tools such as PyQt or Tkinter to build a visualization interface that enables users to select different time points to dynamically display changes in heat distribution.

[0033] Step S4: Perform multi-time point heat situation rolling prediction and extreme operating condition calculation on the heat distribution trend rendering model to generate extreme operating condition parameters of abnormal components; In this embodiment, the existing heat distribution data and the corresponding time tags are collected to construct a complete data set. In order to perform rolling prediction, a suitable regression model (such as linear regression, support vector regression or long short-term memory network (LSTM)) is selected to predict the heat distribution at future time points. LSTM is particularly suitable for processing time series data. Therefore, when there is obvious time dependence, it is given priority. The historical heat distribution data is divided into a training set and a test set. The training set is used to train the selected regression model, and the model parameters are optimized to improve the prediction accuracy. During the training process, the mean square error (MSE) is used as the loss function to evaluate the prediction of the model. The model is used to perform rolling predictions on future heat distributions, and a rolling window is set (for example, predictions are made every 1 minute). The heat distribution at the next moment is predicted based on the heat distribution at the previous moment and environmental factors (such as temperature, load, etc.). Through continuous iteration, the heat distribution trend at several future time points is generated. After the heat situation prediction is performed, the abnormal heat distribution that occurs during the prediction process is identified, and a threshold is set (such as a component temperature exceeding 85°C) to determine whether it is abnormal. For the identified abnormal components, the extreme working condition calculation method is applied to consider different working conditions. The load changes, heat dissipation conditions and other factors under certain conditions are used to deduce the extreme operating parameters of the component (such as maximum operating temperature, maximum power consumption, etc.). Monte Carlo simulation and other methods are used to consider the randomness of different variables, evaluate the performance of the component under extreme conditions, and clarify the extreme operating parameters that need to be derived, including maximum operating temperature, maximum current, maximum power consumption, etc. Through literature review or historical data analysis, the specifications and limit values ​​of each component are understood to provide a basis for subsequent deductions. Based on the predicted heat distribution trend, key operating factors are selected for simulation, including load changes, power supply voltage fluctuations, etc. Thermal simulation software (such as ANSYS or COMSOL) is used to simulate the load changes and power supply voltage fluctuations. Multiphysics) is used to simulate the heat distribution under different working conditions and obtain the thermal response of each component under extreme conditions. During the simulation process, the temperature data of each component under different working conditions is collected and statistically analyzed. The results are classified using data mining techniques (such as cluster analysis) to identify components that perform poorly under extreme conditions. Finally, the calculated extreme operating condition parameters of abnormal components are compiled into a report, and corresponding optimization suggestions are put forward. For example, for the overheating problem of a certain component, it is recommended to improve the heat dissipation design or reduce the workload. This information is fed back to the engineering team so that necessary adjustments can be made during the product design and testing phases.

[0034] Step S5: Based on the extreme operating condition parameters of the abnormal component, the chip component heat distribution trend rendering model is subjected to extreme operating condition test simulation, and then the internal diffusion path of the fault is deduced to extract multiple internal diffusion paths of the fault; In this embodiment, the workload of the chip is set at its limit value (such as 100% CPU usage) to simulate high-intensity working conditions, the ambient temperature is adjusted to the limit value (such as 40°C) to evaluate the performance in a high-temperature environment, and the power supply fluctuation is simulated. The voltage is set slightly higher than the normal working voltage (such as 5%) to increase the breadth of the stress test. A three-dimensional model of the chip is constructed in the simulation software to ensure that the model details can reflect the actual structure of the chip. According to the set extreme working conditions, the boundary conditions of the model are set, including heat flow, convection and radiation, etc., the simulation is started, and the temperature distribution and heat concentration of each component under the extreme working conditions are observed, and key data such as the temperature, power consumption and heat conduction path of each component are recorded. The defined failure modes, such as short circuit, overheating or material aging, etc., are analyzed for each failure mode. The heat distribution data and material characteristics are used to analyze the potential impact on the chip. The fault diffusion path is deduced. The finite element analysis (FEA) method is used to simulate how heat propagates inside the chip after a fault occurs. By observing the temperature change, the area where heat diffuses after the fault occurs is identified. Combined with the heat conduction formula (such as Fourier's law), the heat transfer efficiency between components is calculated, and multiple fault diffusion paths are deduced. The deduced fault diffusion paths are visualized, and a graphics drawing software (such as MATLAB or Python's Matplotlib) is used to draw a fault propagation path map, marking the area with significant temperature changes. The characteristics of different fault paths are analyzed to identify high-risk components. For example, if the temperature of a component rises rapidly after a fault occurs, the component is considered to be a high-risk component. The analysis results are organized into a report, including failure mode, diffusion path, affected components, and potential risk assessment, to provide a basis for subsequent design optimization and fault prevention.

[0035] Step S6: Perform extreme operating condition fault diagnosis based on multiple fault internal diffusion paths, and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

[0036] In this embodiment, the multiple fault diffusion paths extracted previously are classified, different types of fault modes (such as overheating, short circuit, material aging, etc.) are identified, and they are associated with the corresponding heat distribution data, and the impact of each diffusion path on the chip function and performance is evaluated. The chip response under different fault modes is simulated using thermal simulation software, and the key impact area of ​​each path is identified to determine its importance. For each fault mode, its typical thermal characteristics are defined. For example, overheating faults cause the temperature of certain components to rise rapidly, while short circuit faults cause local temperatures to increase sharply. The heat distribution map under extreme working conditions is compared with the heat distribution map under normal working conditions, and the temperature abnormality area is identified. A threshold value (such as a temperature exceeding 85°C) is set to indicate the occurrence of a fault. Machine learning algorithms (such as decision trees and random forests) are applied to classify and diagnose the fault modes. Through training models, the fault mode in the current state is automatically identified based on historical fault data, and a comprehensive fault test plan is formulated based on the diagnosis results. Determine the test items, test environment and test methods. The test items should cover all identified failure modes to ensure that there are no omissions. Perform actual tests on the chip under specified extreme environments (such as high temperature, high load, etc.), observe the performance of each component, record key data such as temperature, power consumption and response time of each component under different working conditions, analyze the data collected during the test, use statistical tools (such as MATLAB, Python's NumPy and Pandas libraries) for data processing, identify key performance indicators and failure points, describe the purpose, methods and environment settings of the test in detail, ensure that readers understand the background of the test, summarize the results of fault diagnosis, list the main identified failure modes and their corresponding diffusion paths, attach relevant heat distribution diagrams, provide the results of comprehensive fault testing, including the performance of each component under extreme conditions, and comparison with normal conditions, and based on the test results, put forward targeted rectification suggestions to help the design team optimize chip design and improve its reliability under extreme conditions.

[0037] In this embodiment, refer to Figure 2 , is a flowchart of detailed implementation steps of step S1. In this embodiment, the detailed implementation steps of step S1 include: Step S11: continuously acquiring thermal imaging images of the chip working status using an infrared thermal imaging camera; Step S12: performing global color temperature shift optimization on the thermal imaging image of the chip working state, thereby constructing a global color temperature optimized thermal imaging image; Step S13: performing multi-hotspot visual recognition on the global color temperature optimized thermal imaging image, marking multiple temperature hotspots in the image; Step S14: performing region division based on multiple temperature hot spots in the image to generate multiple temperature region images; Step S15: performing spatial heat distribution mining on multiple temperature region images to construct a chip heat distribution map.

[0038] In this embodiment, a suitable infrared thermal imaging camera (such as the FLIR series) is selected to ensure that its resolution and sensitivity can meet the needs of chip monitoring, the focal length and field of view of the camera are configured so that the thermal radiation of the chip can be clearly captured, the camera is fixed in a suitable position to ensure that its viewing angle can cover the entire chip surface, and is connected to the control system to be able to transmit image data in real time, the camera's acquisition parameters are configured, including frame rate, exposure time, and gain settings, to adapt to different working environments and lighting conditions, to ensure that the thermal imaging image of the chip can be accurately captured under different working conditions, the infrared thermal imaging camera is started, the automatic shooting mode is set, the thermal imaging image of the chip in the working state is continuously acquired, and the timestamp and related parameters of each image are recorded. , transfer the acquired thermal imaging images to the data storage system in real time, use local hard disk or cloud storage to ensure the security and accessibility of the data, design a data management system, classify and store images by time and image characteristics to facilitate subsequent retrieval and analysis, determine the standard value of color temperature in thermal imaging images, use a standard black body radiation source for calibration measurement, so as to facilitate subsequent color temperature offset optimization, and identify the color temperature offset phenomenon in the image by analyzing the color distribution in the thermal imaging image, such as color cast caused by ambient light, design an optimization algorithm, calculate the difference between the color temperature value of each pixel in the image and the standard color temperature value, and use an image processing library (such as OpenCV) to implement this process, using linear or nonlinear transformation methods to transform the image The color temperature is adjusted to eliminate the influence of ambient light on the image, ensuring that the color temperature distribution of the thermal imaging image is more realistic, and the optimized color temperature data is remapped to the thermal imaging image to generate a global color temperature optimized thermal imaging image, ensuring that the temperature information in the image is clearer and easier to understand. The optimized image is visualized so that the operator can intuitively understand the working status of the chip, select a suitable image processing algorithm for hotspot identification, use a threshold-based method, a regional growing algorithm, or a machine learning method (such as a convolutional neural network) to identify temperature hotspots, determine the identification threshold of temperature hotspots, set a suitable temperature range according to the actual situation, so as to accurately capture the hotspot area, process the optimized thermal imaging image, and use The selected algorithm detects the temperature hot spots, marks the hot spots and records their temperature values, adds marks (such as rectangular boxes or circles) to the image to make the hot spots easy to identify in subsequent analysis, checks the accuracy of the recognition results, and ensures that the marked hot spots truly reflect the temperature distribution in the image. If the recognition effect is not ideal, adjust the parameters of the recognition algorithm (such as temperature threshold and algorithm type) and re-identify, select a suitable region partitioning algorithm, such as K-means clustering or DBSCAN algorithm, to identify and partition the temperature regions in the image, determine the parameters required for region partitioning, such as the number of clusters or the minimum neighborhood distance, run the selected region partitioning algorithm based on the marked hot spots, identify different temperature regions and group them,The boundary of each temperature zone should be determined based on the distance between the temperature distribution and the hotspot. Generate an independent image for each divided temperature zone to ensure that the temperature range and distribution of each zone are clearly displayed. Add a temperature range label to each zone image to facilitate subsequent analysis. For each temperature zone, calculate its average temperature and total heat. Total heat = ∑ (temperature of each point in the zone × area of ​​the point). Use the temperature value of each pixel in the image and the pixel area to estimate the total heat. Visualize the calculated heat distribution data to generate a heat distribution map. Different colors represent different temperatures and heat distributions, which is convenient for users to understand intuitively. Use heat maps to express it. Red represents high temperature areas and blue represents low temperature areas. Analyze the generated heat distribution map, identify overheating areas and potential fault points, and generate a detailed report based on the analysis results, including temperature distribution, hot spot analysis and recommended measures, and provide it to the technical team for subsequent processing. ,

[0039] In this embodiment, the specific steps of step S12 are: Performing thermocouple noise recognition on the thermal imaging image of the chip in working state, and extracting the noise of the thermal imaging image; Adaptively filter and reduce noise points in thermal imaging images to obtain noise-reduced and optimized thermal imaging images; Performing camera calibration calculation on the infrared thermal imaging camera to obtain internal parameters and external parameters; Performing geometric distortion perspective transformation on the noise reduction optimized thermal imaging image according to internal parameters and external parameters, thereby generating a distortion-corrected thermal imaging image; Perform raw pixel offset analysis on the distortion-corrected thermal imaging image to identify each raw pixel offset value; Perform bilinear interpolation reconstruction based on each original pixel offset value to obtain a pixel offset reconstructed thermal imaging image; Calculate ambient lighting parameters based on infrared thermal imaging camera; Performing an ambient light color temperature characteristic analysis on the ambient light parameters to obtain ambient light color temperature characteristic data; The global color temperature shift of the pixel-shifted reconstructed thermal imaging image is optimized based on the ambient light color temperature characteristic data, thereby constructing a global color temperature optimized thermal imaging image.

[0040] In this embodiment, a statistical method (such as mean and standard deviation) is used to identify abnormal points in a thermal image. Generally, noise points appear as values ​​that are significantly different from the temperature of surrounding pixels. This process is implemented using functions in an image processing library (such as OpenCV), and a threshold is set to determine whether the temperature is abnormal. The thermal image is traversed and all pixels identified as noise points are marked. The coordinates of these pixels and their temperature values ​​are recorded. The extracted noise information is stored in a list or array for subsequent noise reduction processing. The identified noise points are visualized to ensure the accuracy of the identification. The noise points are marked with different colors on the original image to verify whether they meet expectations. A suitable filter is selected, such as an adaptive median filter or a Gaussian filter. The adaptive filter can be adjusted according to the statistical characteristics of local pixels, effectively removing noise while retaining edge information. The window size of the filter is set. The larger the window, the more obvious the filtering effect, but details will be lost. Traverse each pixel of the thermal image and apply the adaptive filter for processing. Calculate the weighted average of each pixel to replace the original pixel value. During the processing, the location of the noise points needs to be taken into account to ensure that the pixels within the normal temperature range are not affected during the filtering process. Compare the denoised image with the original image to check whether the noise has been effectively removed while maintaining the overall quality of the image. Record the filtering parameters and effects, and save the processed image for subsequent use. Prepare a calibration plate (such as a chessboard) and take multiple images at different angles and positions. Ensure that the images at different viewing angles can cover the entire camera field of view. Use the Zhang Zhengyou calibration method or other camera calibration algorithms to calculate the camera's intrinsic parameters (focal length, principal point position, distortion coefficient) and extrinsic parameters (camera position and orientation) by extracting the corner points in the calibration image. Use computer vision tools (such as OpenCV) to automatically process the calibration image and calculate the camera's intrinsic and extrinsic parameter matrix. Record the calculated parameters for geometric correction in subsequent image processing. According to the distortion coefficients obtained from the camera calibration, establish the corresponding distortion model. Usually, radial distortion and tangential distortion models are used. Use the camera's intrinsic and extrinsic parameter matrix to perform perspective transformation on the denoised and optimized thermal imaging image. Use OpenCV's cv2.undistort method to implement geometric correction and generate the corrected image. Compare the distortion-corrected image with the original image to ensure that the geometric distortion is effectively corrected. Check whether the straight lines in the image are restored to straight lines. Compare the images before and after distortion correction and calculate the offset of each pixel. This is achieved by calculating the difference between the corrected position of each pixel and the original position. Record the offset value of each original pixel in an array for subsequent interpolation and reconstruction. The offset value should include displacement information in the horizontal and vertical directions. Check the calculated offset value to ensure that it meets the expectations and avoid inaccurate subsequent processing due to calculation errors. Select the bilinear interpolation algorithm and reconstruct according to the pixel offset values ​​of the original image.The algorithm calculates the new pixel value based on the offset by considering the values ​​of the four adjacent pixels. It traverses each pixel and calculates the new position based on its offset value. It uses bilinear interpolation to calculate the temperature value of the new position and assigns it to the corresponding pixel of the reconstructed image. The reconstructed thermal imaging image is compared with the previous image to ensure that the reconstruction effect is good and the temperature distribution is reasonable. The current environmental lighting information, including the type, intensity and color temperature of the light source, is obtained through a sensor or camera. It is measured using a photometer or color thermometer. The intensity and color temperature data of the ambient light are recorded for subsequent analysis. Data is collected multiple times according to different time periods and environmental conditions to improve accuracy. Ensure that the collected lighting data is accurate and consistent with the actual environmental conditions. If there are any abnormalities, it needs to be re-detected and recorded. The ambient lighting parameters are feature extracted using statistical analysis methods. The mean, standard deviation and distribution range of the color temperature are calculated. Based on the collected lighting data, the color temperature characteristics of the ambient light are analyzed. The changes in the ambient color temperature in different time periods are obtained and its impact on the thermal imaging image is evaluated. The ambient light color temperature feature data is saved for reference when the thermal imaging image is subsequently corrected for color temperature. Calculate the required global color temperature offset based on the ambient lighting signature data and the color temperature distribution of the thermal image. This is done by comparing the average color temperature of the image with the ambient color temperature. Apply a color temperature adjustment algorithm to optimize the global color temperature offset of the reconstructed thermal image. This typically involves adjusting the RGB channel values ​​of the image to achieve an accurate representation of the temperature regions. Compare the optimized thermal image with the original reconstructed image to check the effect of the color temperature offset optimization. Ensure that the different temperature regions are more visually distinct and save the optimized image for later use.

[0041] In this embodiment, refer to Figure 3 , is a flowchart of detailed implementation steps of step S2. In this embodiment, the detailed implementation steps of step S2 include: Step S21: performing multi-time heat distribution tracking processing on the chip heat distribution map to generate heat distribution maps of multiple time periods; Step S22: performing dynamic heat distribution trend analysis on the heat distribution graphs of multiple time periods, thereby generating dynamic heat distribution trend features; Step S23: performing inter-regional heat gradient identification on the heat distribution diagrams of multiple time periods to generate regional heat distribution gradient data; Step S24: performing heat propagation law evolution on the regional heat distribution gradient data, thereby generating a chip heat propagation evolution law; Step S25: fitting the dynamic heat distribution evolution to the dynamic heat distribution trend characteristics according to the chip heat propagation evolution law, and constructing a dynamic heat distribution trend evolution diagram.

[0042] In this embodiment, data of multiple time periods are extracted from the previously generated thermal distribution map. These time periods should cover the working cycle of the chip, including the startup, stable operation and shutdown stages. The data of each time period is ensured to be complete and accurate. The environmental conditions and chip working status at each time point are recorded. The thermal data of each time period is visualized as a thermal distribution map using image processing software (such as Matplotlib in MATLAB or Python). Images of different time periods should be standardized with the same color scale for easy comparison. The images are ensured to be clear and can accurately reflect the temperature distribution and hot spots. Important temperature areas and hot spots are marked on each thermal distribution map, and the timestamp is recorded. Different colors or graphics are used to mark the time periods. Data, store all generated heat distribution maps in the database for subsequent access and analysis, compare heat distribution maps of different time periods, analyze temperature changes in various areas, and calculate the average temperature change and standard deviation of each area to identify areas with significant heat changes and record their change trends (such as rising, falling, or stable). Use data analysis tools (such as the Pandas library in Python) to extract dynamic heat distribution features, calculate the heat change rate and change amplitude, and record them as trend feature data. Use visualization tools to display dynamic features as trend graphs to facilitate observation of the law of heat change, check the accuracy of the extracted dynamic feature data, and ensure that it can truly reflect the changing trend of heat distribution. If necessary, logarithm The data is further smoothed to improve the reliability of the analysis results, the analysis results are recorded, and data support is provided for subsequent steps. The heat distribution map of each time period is processed, the heat difference between adjacent areas is calculated, and the gradient calculation method (such as Sobel operator) is used to extract the heat gradient information, identify the areas with significant heat changes, and record their temperature gradients. The calculated regional heat gradient data is organized into a table form, recording the temperature value of each area and the heat difference between adjacent areas, ensuring a clear data structure for subsequent analysis. The heat gradient data is visualized as a heat map or vector map to intuitively display the heat distribution gradient between different areas. This will help technicians quickly identify the direction and intensity of heat propagation and determine the direction and intensity of heat propagation based on the regional heat distribution. Distribute gradient data, establish a heat propagation model, use physical models (such as heat conduction equations) or data-based models to describe the laws of heat propagation, set model parameters, such as thermal conductivity and thermal diffusion coefficient, to better simulate the heat propagation process, analyze the heat distribution in different time periods, study the heat propagation trend in different areas, determine the evolution of heat in time and space, identify the rate and mode of heat propagation through fitting analysis, record it as evolution law data, summarize the heat propagation law, and generate a report to describe the heat propagation characteristics of the chip, ensure the repeatability of the results, and provide a reference for subsequent research, select a suitable fitting algorithm (such as polynomial fitting or exponential fitting) to model the dynamic heat distribution trend characteristics,The selected algorithm should be able to better capture the nonlinear characteristics of heat changes, input the dynamic heat distribution trend characteristic data into the fitting algorithm, perform parameter estimation and model training, ensure that the fitting results can accurately reflect the trend of the data, record the fitting parameters, and use them to generate a trend evolution graph, visualize the fitting results as a trend evolution graph, and show the changes of heat distribution over time. This graph should clearly show the evolution trend of heat distribution, which is easy for technicians to understand and analyze, verify the fitting results, ensure that they are consistent with the actual data, and analyze the reasons for the deviation.

[0043] In this embodiment, refer to Figure 4 , is a flowchart of detailed implementation steps of step S3. In this embodiment, the detailed implementation steps of step S3 include: Step S31: Acquire a high-definition image of the chip to be tested; Step S32: Perform chip component visual monitoring on the high-definition image of the chip to be tested, and mark each chip component point; Step S33: accurately locate the spatial position of each chip component point and generate the spatial position coordinates of each component point; Step S34: performing chip component point layout analysis according to the spatial position coordinates of each component point, thereby generating chip component point layout features; Step S35: performing three-dimensional component topology modeling on the chip component point layout features to construct a chip three-dimensional component topology model; Step S36: Rendering the heat distribution trend of the chip three-dimensional component topology model based on the dynamic heat distribution trend evolution diagram to construct a chip component heat distribution trend rendering model.

[0044] In this embodiment, a high-definition camera is prepared to ensure that it has sufficient resolution (such as 20MP or more) and an appropriate lens (such as a macro lens) to capture the subtle features of the chip components, ensure the stability of the camera, use a tripod or fixed bracket to avoid blurring during shooting, shoot under good lighting conditions to avoid strong shadows and reflections, use a uniform LED light source to ensure uniform light distribution, adjust camera settings, including exposure time, ISO value, and white balance to obtain the best image quality, shoot multiple angles and different areas of the chip to be tested through the camera to ensure that the clarity and details of each component can be fully captured, and after shooting, store the image in a high-quality image format (such as TIFF or PNG) to obtain the best image quality. Keep more image information, check the acquired images to ensure that each image meets the quality standards and is not blurred or out of focus. If any problems are found, retake the image. Use image processing software (such as OpenCV or MATLAB) to preprocess the high-definition images, including denoising and contrast enhancement, to improve the accuracy of component recognition. Visualize the edges of different components in the image to help clarify the outlines of each component. Select appropriate visual monitoring algorithms, such as template matching-based algorithms, edge detection algorithms (such as Canny edge detection) or machine learning algorithms (such as convolutional neural networks) for component recognition. Design the recognition process to ensure that all chip components can be accurately identified and can handle different lighting and background interference situations. Mark each component identified, record its position in the image, use different symbols or colors to mark different types of components, store the marked information in the form of coordinates in a data structure to facilitate subsequent spatial positioning and analysis, and visually check the marking results to ensure that all components are correctly identified and marked. If omissions or errors are found, adjust the recognition parameters and re-mark, select a suitable coordinate system, usually use a three-dimensional coordinate system (X, Y, Z) to represent the spatial position of each component, and ensure that the definition of the coordinate origin is consistent with the actual physical position of the chip. Use image processing techniques such as camera calibration and perspective transformation to convert two-dimensional image coordinates into three-dimensional space coordinates, use known reference points or dimensions for correction, and combine internal parameters (such as focal length, principal point position) and external parameters (such as camera position), calculate the spatial coordinates of each marked component, record the spatial coordinates of each component in the data table, ensure the systematic and queryability of information, each component should contain its identifier and corresponding three-dimensional coordinates, check the accuracy of the spatial coordinates, ensure that the coordinate value of each component is consistent with the actual position, if deviation is found, recalculate and adjust the coordinates, determine the key parameters of the layout features, such as component spacing, relative position, density and distribution, etc. These features will reflect the design rationality and performance of the chip, use cluster analysis, principal component analysis (PCA) or heat map analysis and other techniques to analyze the spatial layout of component points, identify the layout pattern by calculating the distance and angle between components, and according to the spatial coordinate data,Calculate the relative position and layout features of each component, such as the center point position, distribution range, density, etc. of each component, organize the output layout feature data for subsequent use, and display the layout features in a graphical way, such as using scatter plots, heat maps or three-dimensional graphics to facilitate intuitive understanding. Generate a report that describes the layout features of chip components and their impact on heat distribution and function. Select suitable three-dimensional modeling software (such as Blender, SolidWorks or AutoCAD) for component topology modeling. These tools can process complex three-dimensional data and generate high-quality models. Input the extracted component spatial position coordinates into the modeling software, generate three-dimensional objects according to the type and size of the component, define the connection relationship between components, such as welding points, wires, etc., to ensure that the topological structure of the model reflects the actual chip design, optimize the generated three-dimensional model to ensure that it meets the actual design requirements in shape and size, and make detailed adjustments to ensure the spacing between components. The distance and connection are accurate, and surface smoothing and texture mapping are performed to improve the visual effect of the model. The dynamic heat distribution trend data generated previously are collected and associated with the 3D model to ensure that the heat information of each component can be mapped to the model. The appropriate rendering software (such as Maya, Blender or Unity) is selected for visualization of heat distribution. These tools can handle complex 3D scenes and generate realistic images. Set heat distribution mapping rules to map heat values ​​to the surface of the 3D model. Use color gradients or heat map styles, with red representing high-temperature areas and blue representing low-temperature areas. Adjust the lighting and reflection effects of the model surface through material settings to enhance the realism of the rendering. Render the heat distribution, generate visualization images or animations of dynamic heat distribution trends, ensure that the rendering effect can clearly show the changes in heat distribution, and export the rendering results to an appropriate format (such as video or image sequence) for easy display and analysis.

[0045] In this embodiment, step S4 includes the following steps: Step S41: performing rolling prediction of the heat situation at multiple time points on the heat distribution trend rendering model to generate heat situation prediction data of chip components at multiple time points; Step S42: identifying abnormal component temperatures based on the chip component heat situation prediction data at multiple time points, and marking abnormal chip component points; Step S43: Obtain the chip historical operation log, perform normalized operation analysis on the abnormal chip component points according to the chip historical operation log, and extract the normalized operation parameters of the abnormal components; Step S44: Calculate the extreme operating condition based on the normalized operating parameters of the abnormal component to generate the extreme operating condition parameters of the abnormal component.

[0046] In this embodiment, previously generated dynamic heat distribution trend data is collected to ensure that the data includes heat distribution information for multiple time periods, and a suitable prediction model is selected. Common methods include time series analysis (such as ARIMA model), machine learning regression model (such as random forest regression) or deep learning model (such as LSTM network). Feature variables related to heat situation are extracted, such as ambient temperature, chip workload, historical heat distribution, etc. These features will be used as inputs of the model for prediction. The data is preprocessed, including normalization and missing value filling, to improve the training effect of the model. The selected model is trained using historical heat data, and the model parameters are adjusted to optimize the prediction effect. The performance of the model is evaluated using the cross-validation method to ensure Its generalization ability on unseen data is verified by calculating the prediction error (such as root mean square error or mean absolute error) to verify the accuracy of the model and make necessary adjustments. The trained model is applied to new input data to generate heat prediction data at multiple time points. These data should include the predicted temperature value of each component and the change in heat distribution. The prediction results are visualized to intuitively show the changing trend of the heat situation and help identify potential heat anomalies. Suitable anomaly detection algorithms are selected, such as statistical-based methods (such as Z-score) or machine learning-based methods (such as isolation forest or support vector machine) to identify abnormal temperature values. Reasonable anomaly thresholds are set, which are usually determined by analyzing the distribution of historical data. Heat at multiple time points Analyze the situation prediction data, calculate the temperature value of each component, and compare it with the set threshold, identify the components that exceed the threshold, mark them as abnormal components, record the identified abnormal components in the database, ensure that the component ID, abnormal temperature value and predicted time point are included, and display the location and temperature distribution of abnormal components through visualization tools (such as heat maps or bar charts) to facilitate rapid identification and evaluation. Check the accuracy of abnormal identification to ensure that the identified abnormal components are consistent with the actual situation. If errors are found, adjust the detection algorithm and threshold, obtain historical operation logs from the chip control system or monitoring system, ensure that the log data contains sufficient time range and relevant information, such as temperature, power, workload and fault records, and select appropriate Format (such as CSV or JSON) for data storage for subsequent analysis; clean the collected historical operation logs, remove duplicate or irrelevant data, fill in missing values ​​to improve data integrity; convert the data into a structured format for subsequent analysis and processing; extract the operating parameters of abnormal components under normal working conditions, including normal temperature range, workload, environmental conditions, etc.; identify the characteristics of abnormal components under normal operation by analyzing the log data during normal operation, and provide data support for subsequent analysis; record the extracted normalized operation parameters in the database to ensure the systematicness and queryability of information; generate reports to summarize the normalized operation characteristics and related parameters of abnormal components, and provide a basis for subsequent steps;Determine the extreme operating conditions for analysis, such as the maximum operating temperature, maximum power load, and environmental changes (such as high temperature and high humidity), set the calculation model, usually using a thermodynamic model or material strength analysis model to simulate the performance under extreme conditions, select a suitable mathematical model or simulation tool (such as ANSYS, COMSOL, or MATLAB) to calculate the extreme operating parameters, input the normalized operating parameters of the abnormal component into the model for calculation, evaluate the temperature response and heat distribution under extreme conditions, analyze the simulation results, generate the operating parameters of the abnormal component under extreme conditions, such as maximum temperature, thermal stress, and failure mode, compare the calculation results with the normalized operating parameters, evaluate the safety and reliability of the abnormal component under extreme conditions, record the calculated extreme operating parameters in the database, ensure the systematic and queryable information, generate a report, and describe in detail the extreme operating condition evaluation results of the abnormal component to provide a basis for subsequent risk management and decision-making.

[0047] In this embodiment, the specific steps of step S5 are: Step S51: performing an extreme operating condition test simulation on the chip component heat distribution trend rendering model based on the extreme operating condition parameters of the abnormal component, and collecting extreme operating condition test simulation response data; Step S52: Perform deep mining of component operating status on extreme condition test simulation response data to generate extreme condition component operating status characteristics; Step S53: predicting the chip failure probability trend based on the extreme operating condition component operation status characteristics, thereby constructing component failure probability heat maps in different areas; Step S54: perform fault internal diffusion path deduction on component failure probability heat maps in different areas, and extract multiple fault internal diffusion paths.

[0048] In this embodiment, the heat distribution trend rendering model is updated according to the obtained extreme operating condition parameters of the abnormal component. Ensure that the model can reflect the heat changes under extreme conditions. Determine the boundary conditions and initial conditions of the simulation, such as ambient temperature, power load and cooling conditions. Select suitable simulation tools (such as ANSYS, COMSOL Multiphysics or Fluent), which can handle complex heat conduction and fluid dynamics problems. Ensure that the simulation software supports multi-physics coupling analysis to simulate the interaction between heat and the environment. Input the extreme operating condition parameters into the simulation model and start the simulation. Observe the thermal response of the model under extreme conditions and record key data such as temperature distribution, heat flux density and component stress. Perform long-term simulation to ensure that the dynamic process of heat change is captured, especially the heat propagation under extreme conditions. During the simulation process, regularly collect and save heat response data, including temperature change trends and heat distribution diagrams of each component. Generate a simulation result report, record the simulation conditions, results and observed abnormal phenomena in detail, and provide data support for subsequent analysis. Clean and organize the collected extreme operating condition test simulation response data, remove irrelevant information and outliers, and ensure the accuracy of the data. Standardize the data for subsequent analysis and comparison. Use data mining techniques (such as principal component analysis and feature selection algorithms) to extract operating status features and identify key indicators related to component performance, such as maximum temperature, temperature fluctuation, thermal stress, etc. Combined with the heat distribution diagram, analyze the temperature distribution and heat changes of different components under extreme conditions to identify high-risk components. Perform cluster analysis on the extracted status features to identify component behavior patterns under different operating conditions. Use K-means or hierarchical clustering algorithms for classification. Generate an operating status feature report to summarize the performance of each component under extreme conditions, including normal, abnormal, and potential fault states. Select a suitable failure probability prediction model, such as logistic regression, Bayesian network, or machine learning model (such as random forest, support vector machine). Determine the input features required for the model, including the operating status features and historical fault data extracted from the previous step. Train the selected model using historical fault data and operating status features. Optimize the prediction performance of the model by adjusting model parameters and using cross-validation methods. Calculate the accuracy and other performance indicators of the model to ensure the reliability and effectiveness of the model. Apply the trained model to the new operating status feature data to generate the predicted values ​​of the failure probability of each component. These values ​​should reflect the failure risk of the component under extreme conditions. Organize the prediction results into a data table for subsequent analysis and visualization. Use data visualization tools (such as Matplotlib or Tableau) to generate a failure probability heat map to intuitively display the distribution of failure probability in different areas. Through heat map analysis, identify areas with higher failure risks, providing a basis for subsequent failure prevention and management.According to the failure probability heat map, establish a fault diffusion model to analyze the propagation mechanism of faults between components. Use network-based models or diffusion equations for analysis. Determine the key factors of the diffusion path, such as thermal coupling, physical connections, and functional dependencies between components. Select a suitable inference algorithm, such as the shortest path algorithm in graph theory, Monte Carlo simulation, or particle swarm optimization method, to deduce the diffusion path of the fault. Set the starting point of the deduction, usually selecting the area with the highest probability of failure as the starting point of the fault propagation. Run the fault diffusion simulation to generate multiple fault propagation paths, and record the propagation time, impact range, and final affected components of each path. Analyze the characteristics of the path, such as propagation speed, propagation range, and potential losses, to evaluate the impact of the fault on the overall system. Use visualization tools to display the fault diffusion path to help technicians intuitively understand the propagation mechanism and impact range of the fault. Generate a report to record the deduction process, results, and suggestions in detail to provide support for subsequent fault management and prevention strategies.

[0049] In this embodiment, the specific steps of step S53 are: Predict the chip failure probability trend based on the operating status characteristics of the extreme working condition components to obtain chip failure probability trend prediction data; Perform fault probability time series fitting on chip fault probability trend prediction data to construct chip fault probability time series curve; Identify the faulty component area based on the operating status characteristics of the extreme operating condition components and mark the faulty component area; According to the chip failure probability timing curve, the failure probability trend of the faulty component area is mapped, so as to construct the component failure probability heat map in different areas.

[0050] In this embodiment, the operating state characteristic data of the extreme operating condition component is collected to ensure that the data includes parameters such as temperature, pressure, and current, and these characteristics should be associated with historical fault data. Data cleaning is performed to remove outliers and missing values ​​to ensure the integrity and accuracy of the data. Select a suitable prediction model, such as logistic regression, support vector machine (SVM), or random forest. These models can handle nonlinear relationships and provide probabilistic outputs. Determine the model input features, such as operating state characteristics, workload, environmental conditions, etc. Use historical fault data to train the selected model and use cross-validation methods to evaluate the accuracy of the model. Ensure the generalization ability of the model on unseen data. Adjust the model parameters to optimize performance, and calculate the accuracy, sensitivity, and specificity of the model to ensure reliability. Apply the trained model to the new operating state characteristic data to generate failure probability prediction data at each time point. Record the failure probability of each component and generate a data table for subsequent analysis and use. Collect and organize the chip failure probability prediction data, sort it in a time series manner, and ensure the time consistency of the data. Ensure that the frequency of the data is consistent, such as sampling by hour, day, or week. Select a suitable time series fitting model. Common models include polynomial regression, exponential smoothing, or autoregressive integrated moving average (ARIMA). Select a suitable model based on the characteristics of the data to ensure that the dynamic changes in the probability of failure can be captured. Input the sorted time series data into the selected fitting model for training and calculate the fitting parameters of the model. Evaluate the performance of the model through goodness of fit (such as R² value) to ensure that the fitting results can effectively reflect the trend of the probability of failure. Generate a time series curve of the probability of failure based on the fitting results and use visualization tools (such as Matplotlib or Seaborn) for plotting. Mark key points, such as the time points when the probability of failure increases or decreases, for subsequent analysis. Use the operating status characteristic data of the extreme operating condition component obtained in the previous step to ensure that the data contains all relevant features. Clean and standardize the data to improve the accuracy of recognition. Select a suitable region recognition algorithm, such as cluster analysis (such as K-means), heat map analysis, or machine learning classification algorithm (such as decision tree). Set the recognition threshold and parameters to ensure that the fault area can be accurately identified. Run the selected algorithm to analyze the operating status characteristic data and identify outliers or areas with high probability of failure. Mark the identified faulty areas and record the characteristics and locations of the areas. Verify the identified faulty component areas to ensure that they match the actual situation. If problems are found, adjust the algorithm parameters and rerun. Record the identification results of the faulty areas in the database for subsequent use. Collect the fault probability time series curve data and the faulty component area identification results to ensure that the two correspond. Organize the data and associate the fault probability with the specific area to form a data set. Select an appropriate visualization tool, such as Matplotlib, Seaborn, or Tableau, to generate a heat map.According to the requirements of the heat map, select the appropriate color mapping scheme to clearly display the distribution of the probability of failure. Use the collected data to generate a heat map of the probability of failure, ensuring that the probability of failure in different areas can be clearly seen. Match the colors in the heat map with the probability of failure, using gradient colors to represent different levels of probability of failure. Analyze the generated heat map of the probability of failure and identify high-risk areas to provide a basis for subsequent fault management and maintenance strategies. Generate a report that describes in detail the generation process, results, and application value of the heat map.

[0051] In this embodiment, the specific steps of step S6 are: Step S61: performing diffusion path cross component point analysis on multiple internal fault diffusion paths to extract key fault diffusion component points; Step S62: Perform extreme operating condition fault diagnosis on the key fault diffusion component points to obtain component extreme operating condition fault diagnosis data; Step S63: performing a quantitative analysis of the fault repairability of the component extreme operating condition fault diagnosis data, thereby obtaining a quantitative value of the repairability of key component points; Step S64: Perform a comprehensive fault test evaluation based on the quantitative values ​​of the repairability of key component points to obtain a chip extreme operating condition fault test report.

[0052] In this embodiment, data of multiple fault internal diffusion paths are collected and sorted to ensure that each path contains relevant component point information, fault type and its propagation order. The path information is stored in a structured database for subsequent analysis. An appropriate analysis method is selected, such as intersection analysis or network analysis method in graph theory, to identify the cross component points in the fault propagation path, determine the cross analysis criteria, such as the connection strength between components, the speed of fault propagation and the scope of influence, and identify the cross component points appearing in multiple fault propagation paths by calculating and comparing the component points in different paths. The characteristic information of these cross component points, such as the number of fault propagation times, the associated fault type and the importance of the component, is recorded, and the identified cross component points are classified. Analyze and extract the component points that play a key role in the spread of faults. Summarize the information of these key component points to provide basic data for subsequent extreme working condition fault diagnosis. Select the appropriate fault diagnosis model. Commonly used methods include rule-based expert systems, statistical learning methods (such as decision trees) or deep learning methods (such as convolutional neural networks). Determine the model input features, including operating status data and historical fault records from key component points. Use historical fault data to train the selected fault diagnosis model to ensure that the model can accurately identify different fault modes. Evaluate the model performance through cross-validation methods to ensure its reliability in practical applications. Input the extreme working condition data of key component points into the trained model for fault diagnosis. Record each fault. The fault type, cause and severity of each component are analyzed, and the component extreme condition fault diagnosis data is generated. The diagnosis results are analyzed, and the main fault characteristics of key components are identified, and recorded in the database for subsequent use. A preliminary fault diagnosis report is generated, describing the fault conditions and diagnostic methods of each key component, and determining the standards and indicators for quantitative analysis of repairability. Commonly used ones include fault recovery time, repair cost, and repairability score (such as a score from 1 to 10). Combined with industry standards and historical data, a reasonable repairability evaluation model is set, and the fault diagnosis data of key components is collected, including information such as fault type, historical repair records and repair time. These data are sorted and cleaned to ensure the accuracy and completeness of the data, and the repair is carried out according to the set The repairability quantitative standard is used to evaluate each key component and calculate the repairability quantitative value. By comparing the repairability quantitative values ​​of different components, the components that are easiest to repair and the most difficult to repair are identified. The repairability quantitative values ​​are recorded in the database, and a repairability analysis report is generated. The repairability evaluation results of each key component are described in detail to provide data support for subsequent fault management and maintenance strategies. Based on the repairability quantitative value and fault diagnosis data, a comprehensive fault test evaluation model is established. Based on factors such as failure probability, repair difficulty and impact range, evaluation indicators such as failure risk index, repair priority and overall reliability score are determined. The fault diagnosis data, repairability quantitative values ​​and historical fault records of all key components are integrated to form a complete data set for data analysis.Calculate the comprehensive failure risk of each component, evaluate the failure risk level of the overall chip, and organize the test evaluation results into a report, including the failure status, repair suggestions and priority ranking of each key component. The report should include comprehensive evaluation charts and data to intuitively display the failure status of the chip. Share the generated failure test evaluation report with the relevant technical team and management to formulate subsequent maintenance and repair strategies. According to the recommendations of the report, optimize the maintenance plan, give priority to high-risk components, and ensure the reliability and safety of the chip.

[0053] In this embodiment, a chip testing system is provided, which is used to execute the chip testing method as described above, including: An image enhancement module is used to obtain a thermal imaging image of the chip working state; perform global color temperature shift optimization on the thermal imaging image of the chip working state, and perform spatial heat distribution mining to construct a chip heat distribution map; The heat distribution trend module is used to track the heat distribution of the chip at multiple times, perform dynamic heat distribution evolution fitting, and construct a dynamic heat distribution trend evolution diagram; The chip component layout module is used to obtain a high-definition image of the chip to be tested; the high-definition image of the chip to be tested is used to visually monitor the chip components, and the heat distribution trend is rendered based on the dynamic heat distribution trend evolution diagram to build a chip component heat distribution trend rendering model; The heat situation prediction module is used to perform rolling prediction of the heat situation at multiple time points and calculate the extreme operating conditions of the heat distribution trend rendering model to generate the extreme operating condition parameters of the abnormal components; The extreme operating condition test module is used to simulate the extreme operating condition test of the chip component heat distribution trend rendering model based on the extreme operating condition parameters of the abnormal component, and then deduce the internal diffusion path of the fault to extract multiple internal diffusion paths of the fault; The fault diagnosis module is used to perform extreme operating condition fault diagnosis based on multiple internal fault diffusion paths and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

[0054] The present invention acquires thermal imaging images, monitors the working status of the chip in real time, and acquires the heat distribution of each component of the chip, which is crucial for discovering potential overheating problems. Global color temperature offset optimization eliminates noise and color difference in thermal imaging images, making the visualization of heat distribution more accurate, and improving the accuracy of subsequent analysis. Through heat distribution mining, it is possible to deeply analyze the spatial distribution of chip surface temperature and reveal the heat accumulation in various areas of the chip, which is crucial for identifying high-temperature hot spots and areas with insufficient heat dissipation, and helps to optimize the heat dissipation design of the chip. Through multi-time heat distribution tracking processing, the heat change trend of the chip under different working conditions is observed, which is very important for predicting the performance of the chip after long-term operation, as well as for dealing with temperature fluctuations and Load changes are very critical. Dynamic heat distribution evolution fitting can generate accurate heat evolution curves and provide engineers with long-term heat evolution trends of chips under extreme working conditions. This helps analyze the impact of heat accumulation on chip performance and identify potential overheating risks. The heat distribution trend chart can predict the temperature change trajectory of the chip under different working conditions and provide decision support for subsequent fault diagnosis and design optimization. The component layout of the chip is obtained through high-definition images, and visual monitoring is performed to accurately identify the various components inside the chip and their heat distribution. The design team identifies which components are susceptible to overheating and which are potential failure points. Combined with the dynamic heat distribution trend evolution chart, heat distribution trend rendering is performed to provide more accurate information for each chip component. For the precise temperature change trajectory, this provides specific data support for the heat dissipation design and temperature control system optimization of chip components. Based on the heat distribution rendering model, it can identify which components have performance bottlenecks such as overheating and frequency reduction under specific working conditions, and help designers optimize component layout and heat dissipation solutions. Through the rolling prediction of the heat distribution trend rendering model, it dynamically monitors the heat changes of the chip at different time points, and evaluates the heat performance of the chip under different load conditions in real time. It effectively predicts the performance of the chip under extreme working conditions and discovers overheating problems in advance. Through extreme working condition calculation, it simulates the operating status of the chip under the most extreme conditions, predicts the high temperature and failure risks of abnormal components, provides data support for the fault warning system, and reduces the occurrence of failures in actual work. The generation of extreme operating condition parameters can help the design team conduct risk assessments during the product development phase, avoid problems that may lead to overheating and uneven heat dissipation in the design, and optimize the thermal management design of the chip. Through test simulations based on extreme operating condition parameters, we can gain an in-depth understanding of the chip's performance under extreme conditions, especially its performance and stability under high load and high temperature conditions. This helps to identify the source of faults and weak links in advance. By deducing the internal diffusion path of the fault, we can simulate the diffusion process after the fault occurs and identify which components will be affected. This helps to determine the propagation mode of the fault within the chip and provide support for fault warning and repair. By extracting multiple fault diffusion paths, we can provide a scientific basis for fault prevention measures and help the design team optimize the chip structure and heat dissipation design.Prevent faults from spreading to other key components. By analyzing multiple fault diffusion paths, the fault type, cause and impact range of the chip under extreme working conditions can be accurately diagnosed, ensuring comprehensive identification of chip faults and proposing targeted solutions. Through comprehensive fault test evaluation, the fault performance of the chip under extreme working conditions can be comprehensively evaluated and a detailed test report can be generated, which provides data support for subsequent design optimization, production quality control and maintenance strategies. The extreme working condition fault test report provides an important decision-making basis for the chip design and production team, helping to improve chip design, optimize the manufacturing process, and carry out targeted fault repair and performance improvement.

[0055] Therefore, the embodiments should be regarded as illustrative and non-restrictive from all points, and the scope of the present invention is limited by the appended claims rather than the above description, and it is therefore intended that all changes falling within the meaning and range of equivalent elements of the application documents are included in the present invention.

[0056] The above is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features invented herein.

Claims

1. A chip testing method, characterized in that: The following steps are involved: Step S1: obtaining a thermal imaging image of a chip in working state; performing global color temperature shift optimization on the thermal imaging image of the chip in working state, and performing spatial heat distribution mining, thereby constructing a chip heat distribution map; Step S2: performing multi-time heat distribution tracking processing on the chip heat distribution map, and performing dynamic heat distribution evolution fitting to construct a dynamic heat distribution trend evolution map; Step S3: Acquire a high-definition image of the chip to be tested; Perform visual monitoring of chip components on the high-definition image of the chip to be tested, render the heat distribution trend based on the dynamic heat distribution trend evolution diagram, and build a chip component heat distribution trend rendering model; Step S4: Perform multi-time point heat situation rolling prediction and extreme operating condition calculation on the heat distribution trend rendering model to generate extreme operating condition parameters of abnormal components; Step S5: Based on the extreme operating condition parameters of the abnormal component, the chip component heat distribution trend rendering model is subjected to extreme operating condition test simulation, and then the internal diffusion path of the fault is deduced to extract multiple internal diffusion paths of the fault; Step S6: Perform extreme operating condition fault diagnosis based on multiple fault internal diffusion paths, and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

2. The chip testing method according to claim 1, characterized in that: The specific steps of step S1 are: Step S11: continuously acquiring thermal imaging images of the chip working status using an infrared thermal imaging camera; Step S12: performing global color temperature shift optimization on the thermal imaging image of the chip working state, thereby constructing a global color temperature optimized thermal imaging image; Step S13: performing multi-hotspot visual recognition on the global color temperature optimized thermal imaging image, marking multiple temperature hotspots in the image; Step S14: performing region division based on multiple temperature hot spots in the image to generate multiple temperature region images; Step S15: performing spatial heat distribution mining on multiple temperature region images to construct a chip heat distribution map.

3. The chip testing method according to claim 2, characterized in that: The specific steps of step S12 are: Performing thermocouple noise recognition on the thermal imaging image of the chip in working state, and extracting the noise of the thermal imaging image; Adaptively filter and reduce noise points in thermal imaging images to obtain noise-reduced and optimized thermal imaging images; Performing camera calibration calculation on the infrared thermal imaging camera to obtain internal parameters and external parameters; Performing geometric distortion perspective transformation on the noise reduction optimized thermal imaging image according to internal parameters and external parameters, thereby generating a distortion corrected thermal imaging image; Perform raw pixel offset analysis on the distortion-corrected thermal imaging image to identify each raw pixel offset value; Perform bilinear interpolation reconstruction based on each original pixel offset value to obtain a pixel offset reconstructed thermal imaging image; Calculate ambient lighting parameters based on infrared thermal imaging camera; Performing an ambient light color temperature characteristic analysis on the ambient light parameters to obtain ambient light color temperature characteristic data; The global color temperature shift of the pixel-shifted reconstructed thermal imaging image is optimized based on the ambient light color temperature characteristic data, thereby constructing a global color temperature optimized thermal imaging image.

4. The chip testing method according to claim 1, characterized in that: The specific steps of step S2 are: Step S21: performing multi-time heat distribution tracking processing on the chip heat distribution map to generate heat distribution maps of multiple time periods; Step S22: performing dynamic heat distribution trend analysis on the heat distribution graphs of multiple time periods, thereby generating dynamic heat distribution trend features; Step S23: performing inter-regional heat gradient identification on the heat distribution diagrams of multiple time periods to generate regional heat distribution gradient data; Step S24: performing heat propagation law evolution on the regional heat distribution gradient data, thereby generating a chip heat propagation evolution law; Step S25: fitting the dynamic heat distribution evolution to the dynamic heat distribution trend characteristics according to the chip heat propagation evolution law, and constructing a dynamic heat distribution trend evolution diagram.

5. The chip testing method according to claim 1, characterized in that: The specific steps of step S3 are: Step S31: Acquire a high-definition image of the chip to be tested; Step S32: Perform chip component visual monitoring on the high-definition image of the chip to be tested, and mark each chip component point; Step S33: accurately locate the spatial position of each chip component point and generate the spatial position coordinates of each component point; Step S34: performing chip component point layout analysis according to the spatial position coordinates of each component point, thereby generating chip component point layout features; Step S35: performing three-dimensional component topology modeling on the chip component point layout features to construct a chip three-dimensional component topology model; Step S36: Rendering the heat distribution trend of the chip three-dimensional component topology model based on the dynamic heat distribution trend evolution diagram to construct a chip component heat distribution trend rendering model.

6. The chip testing method according to claim 1, characterized in that: The specific steps of step S4 are: Step S41: performing rolling prediction of the heat situation at multiple time points on the heat distribution trend rendering model to generate heat situation prediction data of chip components at multiple time points; Step S42: identifying abnormal component temperatures based on the chip component heat situation prediction data at multiple time points, and marking abnormal chip component points; Step S43: Obtain the chip historical operation log, perform normalized operation analysis on the abnormal chip component points according to the chip historical operation log, and extract the normalized operation parameters of the abnormal components; Step S44: Calculate the extreme operating condition based on the normalized operating parameters of the abnormal component to generate the extreme operating condition parameters of the abnormal component.

7. The chip testing method according to claim 1, characterized in that: The specific steps of step S5 are: Step S51: performing an extreme operating condition test simulation on the chip component heat distribution trend rendering model based on the extreme operating condition parameters of the abnormal component, and collecting extreme operating condition test simulation response data; Step S52: Perform deep mining of component operating status on extreme condition test simulation response data to generate extreme condition component operating status characteristics; Step S53: predicting the chip failure probability trend based on the extreme operating condition component operation status characteristics, thereby constructing component failure probability heat maps in different areas; Step S54: perform fault internal diffusion path deduction on component failure probability heat maps in different areas, and extract multiple fault internal diffusion paths.

8. The chip testing method according to claim 7, characterized in that: The specific steps of step S53 are: Predict the chip failure probability trend based on the operating status characteristics of the extreme working condition components to obtain chip failure probability trend prediction data; Perform fault probability time series fitting on chip fault probability trend prediction data to construct chip fault probability time series curve; Identify the faulty component area based on the operating status characteristics of the extreme operating condition components and mark the faulty component area; According to the chip failure probability timing curve, the failure probability trend of the faulty component area is mapped, so as to construct the component failure probability heat map in different areas.

9. The chip testing method according to claim 1, characterized in that: The specific steps of step S6 are: Step S61: performing diffusion path cross component point analysis on multiple internal fault diffusion paths to extract key fault diffusion component points; Step S62: Perform extreme operating condition fault diagnosis on the key fault diffusion component points to obtain component extreme operating condition fault diagnosis data; Step S63: performing a quantitative analysis of the fault repairability of the component extreme operating condition fault diagnosis data, thereby obtaining a quantitative value of the repairability of key component points; Step S64: Perform a comprehensive fault test evaluation based on the quantitative values ​​of the repairability of key component points to obtain a chip extreme operating condition fault test report.

10. A chip testing system, characterized in that: Used to perform the chip testing method as claimed in claim 1, comprising: An image enhancement module is used to obtain a thermal imaging image of the chip working state; perform global color temperature shift optimization on the thermal imaging image of the chip working state, and perform spatial heat distribution mining to construct a chip heat distribution map; The heat distribution trend module is used to track the heat distribution of the chip at multiple times, perform dynamic heat distribution evolution fitting, and construct a dynamic heat distribution trend evolution diagram; The chip component layout module is used to obtain a high-definition image of the chip to be tested; the high-definition image of the chip to be tested is used to visually monitor the chip components, and the heat distribution trend is rendered based on the dynamic heat distribution trend evolution diagram to build a chip component heat distribution trend rendering model; The heat situation prediction module is used to perform rolling prediction of the heat situation at multiple time points and calculate the extreme operating conditions of the heat distribution trend rendering model to generate the extreme operating condition parameters of the abnormal components; The extreme operating condition test module is used to simulate the extreme operating condition test of the chip component heat distribution trend rendering model based on the extreme operating condition parameters of the abnormal component, and then deduce the internal diffusion path of the fault to extract multiple internal diffusion paths of the fault; The fault diagnosis module is used to perform extreme operating condition fault diagnosis based on multiple internal fault diffusion paths and perform comprehensive fault test evaluation to obtain a chip extreme operating condition fault test report.

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