Self-adaptive contact test state and jitter fault test device and method

Abstract

The embodiment of the invention provides a self-adaptive contact test state and jitter fault test device and method, and the device converts a signal of a to-be-tested contact into a proper voltage signal UA through a voltage dividing module, compares a voltage signal UC with the voltage signal UA through two set voltage signals UB, converts the voltage signal UB into a pulse signal, and carries out the judgment. A power supply mode does not need to be changed, signal sources do not need to be distinguished, multi-contact rapid jitter detection can be directly carried out, and the signal sources carried by the contacts can be accurately recognized through one-time detection. The embodiment of the invention further provides a corresponding method and a computer readable storage medium.

Description

Technical Field

[0001] The present invention relates to the technical field of instrument detection, and in particular to an adaptive contact test state and jitter fault test device and method. Background Art

[0002] With the improvement of the degree of electrification, informatization and automation of military equipment and weapon systems, the role of relays has become increasingly important, the amount of use has increased day by day, and the scope of use has continued to expand. For example, a large military transport aircraft requires more than 200 general-purpose relays alone, a new missile uses up to 970 relays of various types, and a high-performance fighter uses up to thousands of relays of various types. With the continuous increase in the scope of application of relay technology, there are increasingly higher requirements for relay performance, reliability and service life in practical applications. The working environment of relays is mostly an environment with high vibration levels, which often leads to contact failure problems in relays, delaying the production deadline. Therefore, effectively solving the problem of contact jitter in relays is of great significance to ensuring the safe and reliable operation of products.

[0003] Most of the existing relay switch contact jitter detection equipment are civilian instruments with low detection accuracy, few circuits, complex operation and high failure rate affected by the test environment. When the switch contacts are active contacts, direct detection may cause product short circuit or jitter detection failure. Therefore, contact signal source analysis must be performed in advance during detection, resulting in low efficiency and poor reliability of relay switch contact jitter detection, which cannot meet the current needs of fast, large-scale and high-quality production of military products. Summary of the invention

[0004] The embodiment of the present invention provides an adaptive contact test state and jitter fault test device and method, which converts the signal of the contact to be tested into a suitable voltage signal UA through a voltage divider module, and converts it into a pulse signal for judgment by comparing two set voltage signals UB and UC with the voltage signal UA. There is no need to change the power supply mode or distinguish the signal source, and multiple contacts can be directly tested for rapid jitter, and the signal source of the contact can be accurately identified in one test. The embodiment of the present application also provides a corresponding method and a computer-readable storage medium.

[0005] In a first aspect, an embodiment of the present application provides an adaptive contact test state and jitter fault test device, including: a voltage division module, a voltage comparison module, and a contact jitter module;

[0006] The contact to be tested is connected to the input terminal XIN of the voltage divider module, and the contact to be tested is also connected to the power supply terminal VIN or GND;

[0007] The input power supply terminal VIN of the voltage divider module is connected to the ground in series through the resistor R1, the resistor R2 and the resistor R3 in sequence, the input terminal XIN is connected between the resistor R1 and the resistor R2, and the output terminal A of the voltage divider module is connected between the resistor R2 and the resistor R3, so that when the contact to be tested is normally connected, the voltage signal UA of the A terminal is R3*XIN / (R2+R3), and when the contact to be tested is jittered, the voltage signal UA of the A terminal is R3*VIN / (R1+R2+R3);

[0008] The input terminal -INA and the +INB terminal of the voltage comparison module are connected to the A terminal, the input terminal +INA terminal receives the voltage signal UB, and the input terminal -INB terminal receives the voltage signal UC;

[0009] The voltage divider module further includes a resistor R4 and a resistor R5, the VIN terminal is connected to the ground in series through the resistor R4 and the resistor R5 in sequence, the output terminal C of the voltage divider module is connected between the resistor R4 and the resistor R5, and the C terminal is used to output the voltage signal UC=R5*VIN / (R4+R5);

[0010] The voltage divider module further includes a resistor R6 and a resistor R7, the VIN terminal is connected to the ground in series through the resistor R6 and the resistor R7 in sequence, the output terminal B of the voltage divider module is connected between the resistor R6 and the resistor R7, and the B terminal is used to output the voltage signal UB=R7*VIN / (R6+R7);

[0011] The output terminal OUTA of the voltage comparison module is a voltage comparison output of the -INA terminal and the +INA terminal, the output terminal OUTB is a voltage comparison output of the -INB terminal and the +INB terminal, and the output terminal OUTW is a NAND output of the OUTA terminal and the OUTB terminal;

[0012] The contact jitter module obtains the jitter detection signal IN1 outputted from the OUTA terminal, the jitter detection signal IN2 outputted from the OUTB terminal, and the jitter detection signal IN3 outputted from the OUTW terminal, and performs the following determination steps:

[0013] When the jitter detection signal IN3 has a falling edge pulse signal but the pulse width u3 is less than the set threshold u, it is determined that the contact to be tested does not jitter;

[0014] When the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested has jittered and the signal source of the contact to be tested is VCC;

[0015] When the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested is jittering and the signal source of the contact to be tested is GND.

[0016] In combination with the first aspect, in an implementation of the embodiment of the present application, when the signal source of the contact to be tested is GND, the input terminal XIN of the voltage divider module is GND, and the input power terminal VIN of the voltage divider module is +B,

[0017] The voltage value of the voltage signal UB is is a certain value,

[0018] The voltage value of the voltage signal UC is is a certain value,

[0019] When the contact to be tested works normally, the voltage value of the voltage signal UA is R3*GND / (R2+R3)=0V. At this time, the voltage signal UA is smaller than the voltage signal UC.

[0020] When the contact to be tested shakes abnormally, the voltage value of the voltage signal UA is At this time, the voltage signal UA is greater than the voltage signal UC.

[0021] When the contact to be tested resumes normal operation, the voltage value of the voltage signal UA is R3*GND / (R2+R3)=0V. At this time, the voltage signal UA is less than the voltage signal UC. During the jittering process of the contact to be tested, the jitter detection signal IN2 at the OUTB end appears a rising edge pulse width signal, and the jitter detection signal IN3 at the OUTW end begins to appear a falling edge pulse signal;

[0022] It can be understood that, in the embodiment of the present application, the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6 and the resistor R7 meet the following conditions:

[0023]

[0024] When the signal source of the contact to be tested is +B, the input terminal XIN of the voltage divider module is +B, and the input power terminal VIN of the voltage divider module is +B.

[0025] The voltage value of the voltage signal UB is is a certain value,

[0026] The voltage value of the voltage signal UC is is a certain value,

[0027] When the contact to be tested works normally, the voltage value of the voltage signal UA is At this time, the voltage signal UA is greater than the voltage signal UB. When the contact to be tested shakes abnormally, the voltage value of the voltage signal UA is The voltage signal UA is smaller than the voltage signal UB,

[0028] When the contact to be tested resumes normal operation, the voltage value of the voltage signal UA is At this time, the voltage signal UA is greater than the voltage signal UB, and during the shaking process of the contact to be tested, the shaking detection signal IN1 at the OUTA end appears a rising edge pulse width signal, and the shaking detection signal IN3 at the OUTW end begins to appear a falling edge pulse signal.

[0029] It can be understood that, in the embodiment of the present application, the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6 and the resistor R7 meet the following conditions:

[0030]

[0031] In combination with the first aspect, in an implementation of the embodiment of the present application, the ratio of the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6 and the resistor R7 is 28:26.7:1.5:28:0.51:27:1.

[0032] In combination with the first aspect, in an implementation of the embodiment of the present application, the resistor R1 is 28KΩ, the resistor R2 is 26.7KΩ, the resistor R3 is 1.5KΩ, the resistor R4 is 28KΩ, the resistor R5 is 0.51KΩ, the resistor R6 is 27KΩ, and the resistor R7 is 1KΩ.

[0033] In combination with the first aspect, in an implementation of the embodiment of the present application, the contact jitter module is further used for:

[0034] When the jitter detection signal IN1 appears a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 appears a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN1 appears a rising edge pulse width signal is detected as the contact jitter time, or the time when the jitter detection signal IN3 begins to appear a falling edge pulse signal is detected as the contact jitter time.

[0035] In combination with the first aspect, in an implementation of the embodiment of the present application, the contact jitter module is further used for:

[0036] When the jitter detection signal IN1 remains unchanged, a rising edge pulse width signal appears in the jitter detection signal IN2, a falling edge pulse signal appears in the jitter detection signal IN3 and the pulse width u3 is greater than the set threshold u, the time when the rising edge pulse width signal appears in the jitter detection signal IN2 is detected as the contact jitter time, or the time when the falling edge pulse signal begins to appear in the jitter detection signal IN3 is detected as the contact jitter time.

[0037] In combination with the first aspect, in an implementation of the embodiment of the present application, the device further includes a communication module and a host computer;

[0038] The host computer is connected to a plurality of the contact jitter modules via the communication module, so as to realize simultaneous monitoring of a plurality of the contacts to be tested.

[0039] In a second aspect, an embodiment of the present application provides an adaptive contact test state and jitter fault test method, which is performed based on the above-mentioned adaptive contact test state and jitter fault test device, and includes the following steps:

[0040] Obtaining a voltage signal of a contact to be tested;

[0041] The voltage signal of the contact to be tested is divided by a voltage dividing module to obtain a voltage signal UA, a voltage signal UB and a voltage signal UC;

[0042] Processing the voltage signal UA, the voltage signal UB and the voltage signal UC through a voltage comparison module to obtain a jitter detection signal IN1, a jitter detection signal IN2 and a jitter detection signal IN3;

[0043] The contact jitter module is used to make the following judgments:

[0044] When the jitter detection signal IN3 has a falling edge pulse signal but the pulse width u3 is less than the set threshold u, it is determined that the contact to be tested does not jitter;

[0045] When the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested has jittered and the signal source of the contact to be tested is VCC;

[0046] When the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested is jittering and the signal source of the contact to be tested is GND.

[0047] In conjunction with the second aspect, in an implementation manner of the embodiment of the present application, the method further includes:

[0048] When the jitter detection signal IN1 appears a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 appears a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN1 appears a rising edge pulse width signal is detected as the contact jitter time, or the time when the jitter detection signal IN3 begins to appear a falling edge pulse signal is detected as the contact jitter time.

[0049] In conjunction with the second aspect, in an implementation manner of the embodiment of the present application, the method further includes:

[0050] When the jitter detection signal IN1 remains unchanged, a rising edge pulse width signal appears in the jitter detection signal IN2, a falling edge pulse signal appears in the jitter detection signal IN3 and the pulse width u3 is greater than the set threshold u, the time when the rising edge pulse width signal appears in the jitter detection signal IN2 is detected as the contact jitter time, or the time when the falling edge pulse signal begins to appear in the jitter detection signal IN3 is detected as the contact jitter time.

[0051] In a third aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method of the second aspect is implemented.

[0052] It can be seen from the above technical solutions that the embodiments of the present invention have the following advantages:

[0053] The embodiment of the present invention provides an adaptive contact test state and jitter fault test device and method, which converts the signal of the contact to be tested into a suitable voltage signal UA through a voltage divider module, and converts it into a pulse signal for judgment by comparing the voltage signal UA with two set voltage signals UB and UC. There is no need to change the power supply mode or distinguish the signal source. It can directly perform fast jitter detection of multiple contacts and accurately identify the signal source of the contact in one test. The relay contact detection has strong versatility and high test efficiency, and can realize fast jitter detection of contacts of any signal source, eliminating the drawbacks of using existing equipment to perform relay active switch contact jitter detection. There is no need to change the power supply mode or distinguish the signal source, and direct detection can be performed, which greatly improves the efficiency of relay switch contact jitter detection, and significantly improves the reliability and versatility of relay switch contact jitter detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0055] Figure 1 A schematic diagram of an adaptive contact test state and jitter fault test device provided in an embodiment of the present application;

[0056] Figure 2 is a schematic diagram of an implementation method of the voltage dividing module 102 in the embodiment of the present application;

[0057] Figure 3 This is a schematic diagram of external wiring of an embodiment of the voltage comparison module 103 in the embodiment of the present application;

[0058] Figure 4 This is an internal schematic diagram of an embodiment of the voltage comparison module 103 in the embodiment of the present application;

[0059] Figure 5 A schematic diagram of the steps provided for the embodiments of the present application;

[0060] Figure 6 This is a system principle framework diagram of the embodiment of the present application that realizes simultaneous monitoring of multiple contacts to be tested through a host computer and a communication module;

[0061] Figure 7 An embodiment of an adaptive contact test state and jitter fault test method provided in an embodiment of the present application;

[0062] Figure 8 A schematic diagram of a terminal device provided in an embodiment of the present application;

[0063] Among them, the reference numerals are: 101, product under test, 102, voltage divider module, 103, voltage conversion comparison module, 104, contact jitter module, 105, communication module, 106, host computer. DETAILED DESCRIPTION

[0064] An embodiment of the present invention provides an adaptive contact test state and jitter fault test device and method, which converts the signal of the contact to be tested into a suitable voltage signal UA through a voltage divider module, and converts it into a pulse signal for judgment by comparing two set voltage signals UB and voltage signal UC with the voltage signal UA.

[0065] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0066] Figure 1 A schematic diagram of an adaptive contact test state and jitter fault test device provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the adaptive contact test state and jitter fault test device at least includes: a voltage division module 102, a voltage comparison module 103 and a contact jitter module 104;

[0067] In the embodiment of the present application, the contact to be tested of the tested product 101 is connected to the input terminal XIN of the voltage divider module 102;

[0068] The input power supply terminal VIN of the voltage divider module 102 is connected to the ground in series through the resistors R1, R2 and R3 in sequence, the input terminal XIN is connected between the resistors R1 and R2, and the output terminal A of the voltage divider module is connected between the resistors R2 and R3, so that when the contact to be tested is normally connected, the voltage signal UA at the A terminal is R3*XIN / (R2+R3), and when the contact to be tested is jittered, the voltage signal UA at the A terminal is R3*VIN / (R1+R2+R3);

[0069] Figure 2 FIG. 1 is a schematic diagram of an implementation method of the voltage divider module 102 in the embodiment of the present application. Figure 2 As shown, the VIN terminal is connected to the ground in series through resistors R1, R2 and R3, the XIN terminal is connected between resistors R1 and R2, and the A terminal is connected between resistors R2 and R3. Therefore, when the XIN terminal is connected to a voltage (the contact to be tested is normally connected), the output voltage of the A terminal is determined by the voltage of the XIN terminal, that is, the voltage signal UA of the A terminal is R3*XIN / (R2+R3); when the XIN terminal is not connected (the contact to be tested is jittering), the output voltage of the A terminal is determined by the voltage of the VIN terminal, that is, the voltage signal UA of the A terminal is R3*VIN / (R1+R2+R3).

[0070] Figure 3 This is a schematic diagram of external wiring of an embodiment of the voltage comparison module 103 in the embodiment of the present application. Figure 4 FIG. 1 is an internal schematic diagram of an embodiment of the voltage comparison module 103 in the present application. Figure 3 and Figure 4In the embodiment of the present application, the input terminals -INA and +INB of the voltage comparison module 103 are connected to the A terminal, the input terminal +INA receives the voltage signal UB, and the input terminal -INB receives the voltage signal UC.

[0071] In the embodiment of the present application, the voltage signal UB and the voltage signal UC are constant voltages, the voltage signal UB = R7*VIN / (R6+R7), the voltage signal UC = R5*VIN / (R4+R5);

[0072] The voltage signal UC is provided by the voltage dividing module 102, such as Figure 2 As shown, the voltage divider module 102 also includes a resistor R4 and a resistor R5, and has the following circuit structure: the VIN terminal is connected to the ground in series through the resistor R4 and the resistor R5 in turn, the output terminal C of the voltage divider module 102 is connected between the resistor R4 and the resistor R5, and the C terminal is used to output the voltage signal UC=R5*VIN / (R4+R5). By adjusting the voltage of the VIN terminal and the resistance values ​​of the resistor R4 and the resistor R5, the fixed value of the voltage signal UC can be made smaller than R3*VIN / (R1+R2+R3).

[0073] Specifically, the voltage signal The following conditions should be met:

[0074]

[0075] The voltage at the VIN terminal in the above formula can be omitted, that is, the resistance values ​​of resistors R1, R2, R3, R4 and R5 meet the following conditions:

[0076]

[0077] Therefore, the resistors in the voltage divider module satisfying the above conditions can achieve the effect of the embodiment of the present application.

[0078] In this implementation, the voltage signal UC is provided by the voltage dividing module 102, which can simplify the modules, improve the integration level and reduce the cost.

[0079] The voltage signal UB is provided by the voltage divider module 102, such as Figure 2 As shown, the voltage divider module 102 also includes a resistor R6 and a resistor R7, and the VIN terminal is connected to the ground in series through the resistor R6 and the resistor R7 in turn. The output terminal B of the voltage divider module 102 is connected between the resistor R6 and the resistor R7, and the B terminal is used to output the voltage signal UB=R7*VIN / (R6+R7). The resistance values ​​of the resistors R1, R2, R3, R6, and R7 can make the fixed value of the voltage signal UB greater than R3*VIN / (R1+R2+R3) and less than R3*VIN / (R2+R3).

[0080] Specifically, the voltage signal The following conditions should be met:

[0081]

[0082] The voltage at the VIN terminal in the above formula can be omitted, that is, the resistance values ​​of resistors R1, R2, R3, R6 and R7 meet the following conditions:

[0083]

[0084] Therefore, the resistors in the voltage divider module satisfying the above conditions can achieve the effect of the embodiment of the present application.

[0085] In this implementation, the voltage signal UB is provided by the voltage dividing module 102, which can simplify the modules, improve the integration level and reduce the cost.

[0086] Please refer to Figure 4 It can be seen that the output terminal OUTA of the voltage comparison module 103 is the voltage comparison output of the -INA terminal (connected to the voltage signal UA) and the +INA terminal (connected to the voltage signal UB), the output terminal OUTB is the voltage comparison output of the -INB terminal (connected to the voltage signal UC) and the +INB terminal (connected to the voltage signal UA), and the output terminal OUTW is the NAND output of the OUTA terminal and the OUTB terminal;

[0087] The principles of the embodiments of the present application are explained below:

[0088] The first scenario: The contact XIN to be tested is connected to -B power supply (or GND).

[0089] When connected normally, combined Figure 2 , Figure 3 , Figure 4 It can be seen that the voltage signal UA = R3*XIN / (R2+R3) = 0. At this time, the voltage signal UB and the voltage signal UC are both greater than the voltage signal UA, then the OUTA terminal outputs a high level, the OUTB terminal outputs a low level, and the OUTW terminal outputs a high level;

[0090] When the contact is abnormally jittering (contact disconnected), the voltage signal UA = R3*VIN / (R1+R2+R3). At this time, according to the setting of the voltage signal UB, the voltage signal UB is greater than the voltage signal UA, and the OUTA terminal outputs a high level; according to the setting of the voltage signal UC, the voltage signal UC is less than the voltage signal UA, and the OUTB terminal outputs a high level. Therefore, the OUTW terminal outputs a low level.

[0091] When the contacts are restored, the voltages return to the normal connection state, then the OUTA terminal outputs a high level, the OUTB terminal outputs a low level, and the OUTW terminal outputs a high level;

[0092] It can be seen from Table 1:

[0093]

[0094]

[0095] Table 1

[0096] Therefore, the state of the contact to be tested can be determined by analyzing the jitter detection signal IN1 outputted from the OUTA terminal, the jitter detection signal IN2 outputted from the OUTB terminal, and the jitter detection signal IN3 outputted from the OUTW terminal.

[0097] The second scenario: The contact XIN to be tested is connected to the +B power supply (or VIN).

[0098] When connected normally, combined Figure 2 , Figure 3 , Figure 4 It can be seen that the voltage signal UA = R3*VIN / (R2+R3). At this time, the voltage signal UB and the voltage signal UC are both less than the voltage signal UA, so the OUTA terminal outputs a low level, the OUTB terminal outputs a high level, and the OUTW terminal outputs a high level.

[0099] When the contact is abnormally jittering (contact disconnected), the voltage signal UA = R3*VIN / (R1+R2+R3). At this time, according to the setting of the voltage signal UB, the voltage signal UB is greater than the voltage signal UA, and the OUTA terminal outputs a high level; according to the setting of the voltage signal UC, the voltage signal UC is less than the voltage signal UA, and the OUTB terminal outputs a high level. Therefore, the OUTW terminal outputs a low level.

[0100] When the contacts are restored, the voltages return to the normal connection state, then the OUTA terminal outputs a low level, the OUTB terminal outputs a high level, and the OUTW terminal outputs a high level;

[0101] It can be seen from Table 2:

[0102]

[0103] Table 2

[0104] Therefore, the state of the contact to be tested can be determined by analyzing the jitter detection signal IN1 outputted from the OUTA terminal, the jitter detection signal IN2 outputted from the OUTB terminal, and the jitter detection signal IN3 outputted from the OUTW terminal.

[0105] The specific analysis steps are performed by the contact jitter module. Figure 5 The schematic diagram of the steps provided in the embodiment of the present application is combined with Figure 5 As shown, the specific process includes the following:

[0106] The contact jitter module obtains the jitter detection signal IN1 output from the OUTA terminal, the jitter detection signal IN2 from the OUTB terminal, and the jitter detection signal IN3 from the OUTW terminal, and performs the following determination steps:

[0107] When a falling edge pulse signal appears in the jitter detection signal IN3 but the pulse width u3 is less than the set threshold u, it is judged that the contact to be tested has not jittered; it should be noted that the principle of this judgment is that since the pulse width u3 is less than the set threshold u, it may be a measurement error, so it is still judged that the contact has not jittered.

[0108] When a rising edge pulse width signal appears in the jitter detection signal IN1, the jitter detection signal IN2 remains unchanged, and a falling edge pulse signal appears in the jitter detection signal IN3 and the pulse width u3 is greater than the set threshold value u, it is determined that the contact to be tested is jittering and the signal source carried by the contact to be tested is VCC; it should be noted that, according to the inference of Table 1 and Table 2, the jitter detection signal IN1 appears a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 appears a falling edge pulse signal, which belongs to the state where the normal operation of the contact in Table 2 is converted to abnormal jitter, so it can be determined that the active contact is jittering and the signal source carried by the contact to be tested is VCC.

[0109] When the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested is jittering and the signal source of the contact to be tested is GND. It should be noted that, according to the inference of Table 1 and Table 2, the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, and the jitter detection signal IN3 has a falling edge pulse signal, which belongs to the state where the normal working state of the contact in Table 1 is converted to abnormal jitter. Therefore, it can be determined that the active contact is jittering and the signal source of the contact to be tested is GND.

[0110] In some embodiments, the device can also detect the contact bounce time.

[0111] Specifically, when the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN2 has a rising edge pulse width signal is the contact jitter time, or the time when the jitter detection signal IN3 starts to have a pulse signal is the contact jitter time. It should be noted that the time when the jitter detection signal IN2 has a rising edge pulse width signal and the time when the jitter detection signal IN3 starts to have a falling edge pulse signal are generally the same time.

[0112] When the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN1 has a rising edge pulse width signal is the contact jitter time, or the time when the jitter detection signal IN3 starts to have a falling edge pulse signal is the contact jitter time. It should be noted that the time when the jitter detection signal IN1 has a rising edge pulse width signal and the time when the jitter detection signal IN3 starts to have a falling edge pulse signal are generally the same time.

[0113] In some embodiments, the host computer and the communication module can also be used to simultaneously monitor multiple contact points to be tested. Specifically, the host computer is connected to multiple contact jitter modules through the communication module to simultaneously monitor multiple contact points to be tested. Figure 6 This is a system principle framework diagram for realizing simultaneous monitoring of multiple contacts to be tested through a host computer and a communication module in an embodiment of the present application. Figure 6 As shown, the contacts of the cable or instrument are connected to the multi-way input unit, and the multi-way input unit is connected to the jitter interface unit through the jitter interface module, and then connected to the jitter control module through the board connector. Specifically, the multi-way input unit may include the above-mentioned voltage divider module 102, the jitter interface unit may include the above-mentioned voltage comparison module 103, and the jitter control module may include the above-mentioned contact jitter module 104. Of course, in practical applications, other circuit methods can also be used according to actual conditions, and the embodiments of the present application are not limited to this. It can be understood that in Figure 6 In the principle framework diagram shown in FIG. 1 , multiple jitter interface units can be connected to a jitter control module, so that a jitter control module can distinguish multiple jitter interface units, that is, multiple cables or instruments can be detected and monitored simultaneously. In this embodiment, the host computer can also communicate with the communication module ( Figure 6 The jitter control module can be connected to multiple jitter control modules to achieve simultaneous detection and monitoring of more cables or instruments. In this embodiment, the jitter control module can also be connected to an intelligent serial port capacitor liquid crystal display to display various voltage signals for easy adjustment.

[0114] In practical applications, the contact jitter module 104 can be implemented by an FPGA core board, and the specific model can be AC4040. The FPGA core board AC4040 code is designed by Verilog language. The FPGA core board AC4040 distinguishes the 50 input signals, calculates the contact jitter time, and sends the contact jitter to the jitter control board through the serial port and the inter-board connector. By calling multiple contact jitter modules, the working status of multiple (for example, 500) contacts can be monitored at the same time.

[0115] An application example provided by this application is described below:

[0116] Please combine Figure 1 , Figure 2 , Figure 3 , Figure 4 and Figure 5 In the application example of the present application, the VIN terminal of the voltage divider module 2 is connected to a 28V voltage, the resistor R1 is 28KΩ, the resistor R2 is 26.7KΩ, the resistor R3 is 1.5KΩ, the resistor R4 is 28KΩ, the resistor R5 is 0.51KΩ, the resistor R6 is 27KΩ, and the resistor R7 is 1.0KΩ.

[0117] Therefore, when the contacts are normal:

[0118] UA=R3*XIN / (R2+R3)=0.0532*0=0V State 1 Active contact connected to -B (GND)

[0119] UA=R3*XIN / (R2+R3)=0.0532*28=1.5V State 2 Active contact connected to +B(VIN) (28V in this application example)

[0120] UB=R7*VIN / (R6+R7)=0.0357*28=1V

[0121] UC=R5*VIN / (R4+R5)=0.0179*28=0.5V

[0122] When the contact vibrates abnormally:

[0123] UA=R3*VIN / (R1+R2+R3)=0.0267*28=0.75VState 1 or State 2

[0124] UB=R7*VIN / (R6+R7)=0.0357*28=1V

[0125] UC=R5*VIN / (R4+R5)=0.0179*28=0.5V

[0126] In this application example, the voltage comparison module can use the SGM8772 model, which can be powered by 3.3V. Therefore, if the OUTA, OUTB, and OUTW terminals output a high level, the corresponding voltage is 3.3V. Therefore, the various voltage signals are shown in Table 3 below:

[0127]

[0128]

[0129] Table 3

[0130] Since SGM8772 is powered by 3.3V in this application example, the UA, UB, and UC input voltages of SGM8772 should not exceed 3.3V.

[0131] Because when the active contact is connected to +B (VIN), VIN and XIN have the same input voltage.

[0132] When UA=3.3V, XIN=62.04V, VIN=62.04V, UB=2.21V, UC=1.11V

[0133] When UB=3.3V, VIN=92.4V, XIN=92.4V, UA=4.9V, UC=1.65V

[0134] When UC=3.3V, VIN=184.3V, XIN=184.3V, UA=9.8V, UB=6.58V

[0135] Therefore, when SGM8772 is powered by 3.3V:

[0136] The maximum input voltage of VIN and XIN can reach 62.04V.

[0137] The following is a comparison with the traditional solution to illustrate the beneficial effects of the embodiments of the present application:

[0138] The first traditional solution is to start the jitter test software from the microcomputer to initialize the FPGA, and continuously sample the mechanical switch contact state value and accumulate the jitter time to send it to the host computer for analysis and processing, thereby realizing the mechanical switch contact jitter detection. This method has poor versatility and complex operation, and can only realize the detection of passive contacts of mechanical switches. The detection of active contacts requires advance signal source identification, and the test efficiency is low. It is impossible to realize fast jitter detection of multiple types of active contacts. Once the source signal of the contact is GND and it is not effectively identified in advance, direct testing will cause the jitter detection to fail or even directly damage the test product.

[0139] The second traditional solution achieves the conversion of the signal source of the relay switch contact by changing the relay power supply mode, and then uses the first optocoupler and the second optocoupler to form an interconnected optocoupler group, and the first optocoupler and the second optocoupler are redundantly connected to each other so that equal and opposite voltage differences are formed at both ends of the first optocoupler and the second optocoupler. Rapid jitter detection of multiple contacts can be performed directly without prior identification, and the signal source of the contact can be accurately identified in one test. Although this method has certain advancements and avoids the risk of jitter detection failure or even direct damage to the test product due to direct testing, the premise of this method is that the power supply mode needs to be manually changed and ΔV needs to be adjusted according to the product power supply voltage. First, the operation process is complicated and cumbersome, and second, the manual change of the power supply mode increases the risk of product damage due to product voltage mismatch.

[0140]

[0141] Table 4

[0142] Table 4 is a comparison table of advantages and disadvantages. It can be seen from Table 4 that in the first traditional solution (the first row of Table 4), when the product is powered by a conventional single power supply, the signal source type of the relay switch contact is VCC, GND or passive. When the relay switch contact shakes, if the signal source of the relay switch contact is VCC, the optocoupler is turned on, and the FPGA module inputs a low-level signal, the relay switch contact shake can be evaluated by obtaining the signal pulse width through the host computer. Once the signal source of the relay switch is GND, even if the relay has a shake failure, the optocoupler is still not turned on, so the shake detection will fail, and due to the limitation of related circuits, it may directly short-circuit and damage the product;

[0143] The second traditional solution (the second row of Table 4) changes the product power supply mode to dual power supply. The signal source types of the relay switch contacts are V+ and V-. When the relay switch contacts shake, no matter whether the signal source of the relay switch contacts is V+ or V-, one of the first optocoupler and the second optocoupler must be turned on. The signal pulse width can be obtained by the host computer monitoring module at the same time to accurately identify the jitter of the relay switch contacts, and the type of signal source of the relay switch contacts can be directly determined. However, this method requires manually changing the product power supply mode from a single power supply to a dual power supply. Once the power supply is not compatible, it may cause product damage;

[0144] The method provided in the embodiment of the present application (the third row of Table 4) converts the input signal (.B / +B) into UA, UB and UC voltage signals through a voltage divider module, and then sends them to the voltage comparison module to convert the voltage into a corresponding pulse signal and send it to the core board of the jitter interface board for judgment. There is no need to change the power supply method or distinguish the signal source. Rapid jitter detection of multiple contacts can be performed directly, and the signal source of the contact can be accurately identified in one detection.

[0145] Figure 7 An embodiment of an adaptive contact test state and jitter fault test method provided in an embodiment of the present application comprises the following steps:

[0146] 701. Obtain a voltage signal of a contact to be tested;

[0147] 702. Divide the voltage signal of the contact to be tested by a voltage dividing module to obtain a voltage signal UA, a voltage signal UB and a voltage signal UC;

[0148] Specifically, the active contact (-B / +B) may be connected to the input terminal XIN of the voltage divider module to convert the input terminal signal into UA, UB and UC voltage signals.

[0149] 703. Process the voltage signal UA, the voltage signal UB and the voltage signal UC through a voltage comparison module to obtain a jitter detection signal IN1, a jitter detection signal IN2 and a jitter detection signal IN3;

[0150] Specifically, as described above in the voltage comparison module 103 , the UA, UB, and UC voltage signals are converted into OUTA, OUTB, and OUTW output signals by the voltage comparator;

[0151] Connect the OUTA, OUTB and OUTW output signals to the IN1, IN2 and IN3 input terminals of the contact jitter module respectively, obtain their output states respectively, and then make the following judgments through the contact jitter module:

[0152] 704. When the jitter detection signal IN3 has a falling edge pulse signal but the pulse width u3 is less than the set threshold u, it is determined that the contact to be tested does not jitter;

[0153] 705. When the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested has jittered and the signal source of the contact to be tested is VCC;

[0154] When the IN2 signal remains unchanged, the IN1 signal has a rising edge pulse width signal, and the IN3 signal has a falling edge pulse width signal, it means that the type of signal source connected to the active contact is +B, and the rising edge pulse width time T1 of the IN1 signal and the falling edge pulse width time T3 of the IN3 signal should meet T1=T3, which is the contact jitter time. Or it can be expressed as: when the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN1 appears the rising edge pulse width signal is the contact jitter time, or the time when the jitter detection signal IN3 begins to appear the falling edge pulse signal is the contact jitter time.

[0155] 706. When the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested has jittered and the signal source of the contact to be tested is GND.

[0156] When the IN1 signal remains unchanged, a rising edge pulse width signal appears in the IN2 signal, and a falling edge pulse width signal appears in the IN3 signal, it indicates that the type of signal source connected to the active contact is -B, and the rising edge pulse width time T2 of the IN2 signal and the falling edge pulse width time T3 of the IN3 signal should satisfy T2=T3, which is the contact jitter time; or it can be expressed as when a rising edge pulse width signal appears in the jitter detection signal IN2, the jitter detection signal IN1 remains unchanged, a falling edge pulse signal appears in the jitter detection signal IN3 and the pulse width u3 is greater than the set threshold u, the time when the rising edge pulse width signal appears in the jitter detection signal IN2 is the contact jitter time, or the time when the falling edge pulse signal begins to appear in the jitter detection signal IN3 is the contact jitter time.

[0157] Figure 8 Schematic diagram of a terminal device provided in an embodiment of the present application. The terminal device 800 includes a memory 802, a processor 801, and a computer program 803 stored in the memory 802 and executable on the processor 801. When the processor 801 executes the computer program 803, the following is achieved: Figure 1 The corresponding methods of each embodiment.

[0158] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0159] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0160] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0161] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0162] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0163] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. An adaptive contact test state and jitter fault test device, characterized in that: include: Voltage division module, voltage comparison module, contact jitter module; The contact to be tested is connected to the input terminal XIN of the voltage divider module, and the contact to be tested is also connected to the power supply terminal VIN or GND; The input power supply terminal VIN of the voltage divider module is connected to ground in series through resistors R1, R2 and R3 in sequence, the input terminal XIN is connected between the resistor R1 and the resistor R2, and the output terminal A of the voltage divider module is connected between the resistor R2 and the resistor R3, so that when the contact to be tested is normally connected, the voltage signal UA at the A terminal is R3*XIN / (R2+R3), and when the contact to be tested is jittered, the voltage signal UA at the A terminal is R3*VIN / (R1+R2+R3): The input terminal -INA and the +INB terminal of the voltage comparison module are connected to the A terminal, the input terminal +INA terminal receives the voltage signal UB, and the input terminal -INB terminal receives the voltage signal UC; The voltage divider module further includes a resistor R4 and a resistor R5, the VIN terminal is connected to the ground in series through the resistor R4 and the resistor R5 in sequence, the output terminal C of the voltage divider module is connected between the resistor R4 and the resistor R5, and the C terminal is used to output the voltage signal UC=R5*VIN / (R4+R5); The voltage divider module further includes a resistor R6 and a resistor R7, the VIN terminal is connected to the ground in series through the resistor R6 and the resistor R7 in sequence, the output terminal B of the voltage divider module is connected between the resistor R6 and the resistor R7, and the B terminal is used to output the voltage signal UB=R7*VIN / (R6+R7); The output terminal OUTA of the voltage comparison module is a voltage comparison output of the -INA terminal and the +INA terminal, the output terminal OUTB is a voltage comparison output of the -INB terminal and the +INB terminal, and the output terminal OUTW is a NAND output of the OUTA terminal and the OUTB terminal; The contact jitter module obtains the jitter detection signal IN1 outputted from the OUTA terminal, the jitter detection signal IN2 outputted from the OUTB terminal, and the jitter detection signal IN3 outputted from the OUTW terminal, and performs the following determination steps: When the jitter detection signal IN3 has a falling edge pulse signal but the pulse width u3 is less than the set threshold u, it is determined that the contact to be tested does not jitter; When the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested has jittered and the signal source of the contact to be tested is VCC; When the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested is jittering and the signal source of the contact to be tested is GND.

2. The device according to claim 1, characterized in that The contact jitter module is also used for: When the jitter detection signal IN1 appears a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 appears a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN1 appears a rising edge pulse width signal is detected as the contact jitter time, or the time when the jitter detection signal IN3 begins to appear a falling edge pulse signal is detected as the contact jitter time.

3. The device according to claim 1, characterized in that The contact jitter module is also used for: When the jitter detection signal IN1 remains unchanged, a rising edge pulse width signal appears in the jitter detection signal IN2, a falling edge pulse signal appears in the jitter detection signal IN3 and the pulse width u3 is greater than the set threshold u, the time when the rising edge pulse width signal appears in the jitter detection signal IN2 is detected as the contact jitter time, or the time when the falling edge pulse signal begins to appear in the jitter detection signal IN3 is detected as the contact jitter time.

4. The device according to claim 1, characterized in that When the signal source of the contact to be tested is GND, the input terminal XIN of the voltage divider module is GND, and the input power terminal VIN of the voltage divider module is +B. The voltage value of the voltage signal UB is is a certain value, The voltage value of the voltage signal UC is is a certain value, When the contact to be tested works normally, the voltage value of the voltage signal UA is R3*GND / (R2+R3)=0V. At this time, the voltage signal UA is smaller than the voltage signal UC. When the contact to be tested shakes abnormally, the voltage value of the voltage signal UA is At this time, the voltage signal UA is greater than the voltage signal UC. When the contact to be tested resumes normal operation, the voltage value of the voltage signal UA is R3*GND / (R2+R3)=0V. At this time, the voltage signal UA is less than the voltage signal UC. During the jittering process of the contact to be tested, the jitter detection signal IN2 at the OUTB end appears a rising edge pulse width signal, and the jitter detection signal IN3 at the OUTW end begins to appear a falling edge pulse signal; When the signal source of the contact to be tested is +B, the input terminal XIN of the voltage divider module is +B, and the input power terminal VIN of the voltage divider module is +B. The voltage value of the voltage signal UB is is a certain value, The voltage value of the voltage signal UC is is a certain value, When the contact to be tested works normally, the voltage value of the voltage signal UA is At this time, the voltage signal UA is greater than the voltage signal UB. When the contact to be tested shakes abnormally, the voltage value of the voltage signal UA is The voltage signal UA is smaller than the voltage signal UB, When the contact to be tested resumes normal operation, the voltage value of the voltage signal UA is At this time, the voltage signal UA is greater than the voltage signal UB, and during the shaking process of the contact to be tested, the shaking detection signal IN1 at the OUTA end appears a rising edge pulse width signal, and the shaking detection signal IN3 at the OUTW end begins to appear a falling edge pulse signal.

5. The device according to claim 1, characterized in that The ratio of the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6 and the resistor R7 is 28: 26.7：1.5：28：0.51：27：1。 6. The device according to claim 1, characterized in that It also includes a communication module and a host computer; The host computer is connected to a plurality of the contact jitter modules via the communication module, so as to realize simultaneous monitoring of a plurality of the contacts to be tested.

7. An adaptive contact test state and jitter fault test method, based on the adaptive contact test state and jitter fault test device according to any one of claims 1 to 6, characterized in that: include: Obtaining a voltage signal of a contact to be tested; The voltage signal of the contact to be tested is divided by a voltage dividing module to obtain a voltage signal UA, a voltage signal UB and a voltage signal UC; Processing the voltage signal UA, the voltage signal UB and the voltage signal UC through a voltage comparison module to obtain a jitter detection signal IN1, a jitter detection signal IN2 and a jitter detection signal IN3; The contact jitter module is used to make the following judgments: When the jitter detection signal IN3 has a falling edge pulse signal but the pulse width u3 is less than the set threshold u, it is determined that the contact to be tested does not jitter; When the jitter detection signal IN1 has a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested is jittering and the signal source of the contact to be tested is VCC: When the jitter detection signal IN1 remains unchanged, the jitter detection signal IN2 has a rising edge pulse width signal, and the jitter detection signal IN3 has a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, it is determined that the contact to be tested is jittering and the signal source of the contact to be tested is GND.

8. The method according to claim 7, characterized in that The method further comprises: When the jitter detection signal IN1 appears a rising edge pulse width signal, the jitter detection signal IN2 remains unchanged, and the jitter detection signal IN3 appears a falling edge pulse signal and the pulse width u3 is greater than the set threshold u, the time when the jitter detection signal IN1 appears a rising edge pulse width signal is detected as the contact jitter time, or the time when the jitter detection signal IN3 begins to appear a falling edge pulse signal is detected as the contact jitter time.

9. The method according to claim 7, characterized in that: The method further comprises: When the jitter detection signal IN1 remains unchanged, a rising edge pulse width signal appears in the jitter detection signal IN2, a falling edge pulse signal appears in the jitter detection signal IN3 and the pulse width u3 is greater than the set threshold u, the time when the rising edge pulse width signal appears in the jitter detection signal IN2 is detected as the contact jitter time, or the time when the falling edge pulse signal begins to appear in the jitter detection signal IN3 is detected as the contact jitter time.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 7 to 9 is implemented.

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