Adjustable optical attenuator chip and manufacturing method

Abstract

The application provides an adjustable optical attenuator chip and a manufacturing method, comprising: a waveguide core layer and at least two temperature control electrode groups, wherein: at least two temperature control electrode groups are arranged above and / or below the waveguide core layer, and all the temperature control electrode groups are docked with an external PCB board; the temperature control electrode groups are used to generate heat by applying voltage through the external PCB board, so as to change the temperature of the waveguide core layer to achieve corresponding optical power attenuation; by arranging multiple temperature control electrode groups, the power consumption of a single temperature control electrode group is reduced when a fixed amount of heat is output, the intrinsic temperature of the single temperature control electrode group is synchronously reduced, the degree of creep of each temperature control electrode group is slowed down, and the service life of the whole device is prolonged.

Description

Technical Field

[0001] The present invention relates to the technical field of optical communications, and in particular to an adjustable optical attenuator chip and a manufacturing method thereof. Background Art

[0002] Planar optical waveguide variable optical attenuators have the advantages of simple fabrication, good stability, small size, low cost, easy integration, and suitability for large-scale production. With the development and maturity of technology, they have become one of the most critical optical devices in optical communication systems.

[0003] At present, planar optical waveguide-type variable optical attenuators are usually based on silicon-based silica technology and adopt a Mach-Zehnder interferometer structure, that is, they are implemented using a waveguide core layer. A heating electrode is set above the waveguide core layer. By applying voltage to the heating electrode, the heating electrode is heated, and the heat is transferred to the waveguide core layer to achieve optical power attenuation through the thermo-optical effect of the waveguide.

[0004] The existing heating electrode 2' is as follows Figure 1 and Figure 2 As shown, it is usually a long metal film of a certain thickness, and is only arranged above the waveguide core layer 1'. However, because the thermal expansion coefficient of the heating electrode 2' is much larger than that of the upper cladding layer 3' above the waveguide core layer 1', when the operating temperature rises, the heating electrode 2' will be subjected to external stress from the upper cladding layer 3'. Under the long-term effect of stress, the heating electrode 2' will slowly creep. Among them, temperature is another important factor affecting the creep process of the heating electrode 2'. The higher the intrinsic temperature of the heating electrode 2', the more obvious the creep phenomenon of the metal film of the heating electrode 2'. As the degree of creep of the metal film of the heating electrode 2' gradually increases, it will eventually cause the metal film to break. In fact, during the creep process, the corresponding device may fail prematurely and end its service life.

[0005] In view of this, overcoming the defects of the prior art is an urgent problem to be solved in this technical field. Summary of the Invention

[0006] The technical problem to be solved by the present invention is how to reduce the intrinsic temperature of the heating electrode in a variable optical attenuator under the premise of meeting a fixed heat quantity, so as to reduce the creep phenomenon of the metal film of the heating electrode.

[0007] The present invention adopts the following technical solutions:

[0008] In a first aspect, a variable optical attenuator chip is provided, comprising: a waveguide core layer 1 and at least two temperature-controlled electrode groups 2, wherein:

[0009] At least two temperature control electrode groups 2 are provided above and / or below the waveguide core layer 1, and all the temperature control electrode groups 2 are connected to the external PCB board;

[0010] The temperature control electrode group 2 is used to apply voltage through an external PCB board to generate heat, thereby changing the temperature of the waveguide core layer 1 to achieve corresponding optical power attenuation.

[0011] Preferably, when at least two temperature-controlled electrode groups 2 are arranged above the waveguide core layer 1 and at least two temperature-controlled electrode groups 2 are arranged below the waveguide core layer 1, the at least two temperature-controlled electrode groups 2 above the waveguide core layer 1 are connected in parallel with the at least two temperature-controlled electrode groups 2 below the waveguide core layer 1.

[0012] Preferably, the at least two temperature-controlled electrode groups 2 above the waveguide core layer 1 and the at least two temperature-controlled electrode groups 2 below the waveguide core layer 1 are arranged symmetrically with each other.

[0013] Preferably, the temperature control electrode group 2 includes a heating electrode 21 and a wire electrode 22, and the heating electrode 21 is connected to an external PCB board through the wire electrode 22;

[0014] The wire electrode 22 is used to transmit the current of the PCB board to the heating electrode 21 . The heating electrode 21 is used to generate heat according to the applied voltage and transfer the heat to the waveguide core layer 1 .

[0015] Preferably, the heating electrode 21 includes an arc-shaped sub-electrode 211 and at least two strip-shaped sub-electrodes 212, wherein:

[0016] The at least two strip-shaped sub-electrodes 212 are respectively disposed at two ends of the arc-shaped sub-electrode 211 ; the width of the arc-shaped sub-electrode 211 is greater than the width of the strip-shaped sub-electrode 212 .

[0017] Preferably, the variable optical attenuator chip further comprises: an upper cladding layer 3, a lower cladding layer 4 and a substrate 5, wherein:

[0018] The upper cladding layer 3 is arranged above the waveguide core layer 1, the lower cladding layer 4 is arranged below the waveguide core layer 1, and the substrate 5 is arranged below the lower cladding layer 4;

[0019] The at least two temperature-controlled electrode groups 2 are arranged in the upper cladding 3 and / or the lower cladding 4 .

[0020] Preferably, the waveguide core layer 1 comprises: an input optical waveguide 11, an up-modulation optical waveguide 12, a down-modulation optical waveguide 13 and an output optical waveguide 14, wherein:

[0021] The input optical waveguide 11 is connected to the up-modulation optical waveguide 12 and the down-modulation optical waveguide 13 respectively, and the up-modulation optical waveguide 12 and the down-modulation optical waveguide 13 are both connected to the output optical waveguide 14;

[0022] At least two temperature-controlled electrode groups 2 are disposed above and / or below the upper modulation optical waveguide 12 ; at least two temperature-controlled electrode groups 2 are disposed above and / or below the lower modulation optical waveguide 13 .

[0023] In a second aspect, a method for manufacturing an adjustable optical attenuator chip is provided, comprising:

[0024] The number a of the temperature control electrode groups 2 below the waveguide core layer 1 and the number b of the temperature control electrode groups 2 above the waveguide core layer 1 are set, wherein a+b≥2;

[0025] Depositing a first lower cladding layer 41 on the substrate 5;

[0026] When a is greater than or equal to 1, a lower temperature control layer 6 is prepared on the first lower cladding layer 41 to deposit a layer of lower temperature control layer 6 on the first lower cladding layer 41; when a is less than 1, a second lower cladding layer 42 is deposited on the first lower cladding layer 41;

[0027] Depositing the waveguide core layer 1 on the uppermost lower temperature control layer 6 or the second lower cladding layer 42;

[0028] When b is greater than or equal to 1, a first upper cladding layer 31 is deposited on the waveguide core layer 1, and b upper temperature control layers 7 are prepared on the first upper cladding layer 31 to deposit b layers of upper temperature control layers 7 on the waveguide core layer 1; when b is less than 1, a first upper cladding layer 31 is deposited on the waveguide core layer 1;

[0029] An anti-oxidation protection layer is deposited on the upper temperature control layer 7 or the first upper cladding layer 31 .

[0030] Preferably, when a is greater than or equal to 1, preparing a lower temperature control layer 6 on the first lower cladding layer 41 to deposit a layer of lower temperature control layer 6 on the first lower cladding layer 41 specifically includes:

[0031] When a is 1, a wire electrode 22 and a heating electrode 21 are deposited on the first lower cladding layer 41, and then a third lower cladding layer 43 is deposited on the wire electrode 22 and the heating electrode 21 to prepare a lower temperature control layer 6;

[0032] When a is greater than 1, the wire electrode 22 and the heating electrode 21 are deposited on the first lower cladding layer 41, and then the third lower cladding layer 43 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the first lower temperature control layer 6; the preparation of the second lower temperature control layer 6 to the a-th lower temperature control layer 6 is to deposit the wire electrode 22 and the heating electrode 21 on the third lower cladding layer 43 of the previous lower temperature control layer 6, and then deposit the third lower cladding layer 43 on the wire electrode 22 and the heating electrode 21.

[0033] Preferably, when b is greater than or equal to 1, depositing a first upper cladding layer 31 on the waveguide core layer 1, and performing b times of upper temperature control layer 7 preparation on the first upper cladding layer 31, so as to deposit b layers of upper temperature control layer 7 on the waveguide core layer 1, specifically includes:

[0034] When b is 1, the wire electrode 22 and the heating electrode 21 are deposited on the first upper cladding layer 31, and then the second upper cladding layer 32 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the upper temperature control layer 7;

[0035] When b is greater than 1, the wire electrode 22 and the heating electrode 21 are deposited on the first upper cladding layer 31, and then the second upper cladding layer 32 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the first upper temperature control layer 7; the preparation of the second upper temperature control layer 7 to the b-th upper temperature control layer 7 is to deposit the wire electrode 22 and the heating electrode on the second upper cladding layer 32 in the previous upper temperature control layer 7, and then deposit the second upper cladding layer 32 on the wire electrode 22 and the heating electrode.

[0036] The present invention provides an adjustable optical attenuator chip and a manufacturing method, comprising: a waveguide core layer 1 and at least two temperature-controlled electrode groups 2, wherein: at least two temperature-controlled electrode groups 2 are provided above and / or below the waveguide core layer 1, and all the temperature-controlled electrode groups 2 are connected to an external PCB board; the temperature-controlled electrode groups 2 are used to apply voltage through the external PCB board to generate heat, thereby changing the temperature of the waveguide core layer 1 to achieve corresponding optical power attenuation; by providing multiple temperature-controlled electrode groups 2, when outputting a fixed amount of heat, the power consumption of a single temperature-controlled electrode group 2 is reduced, and the intrinsic temperature of each temperature-controlled electrode group 2 is simultaneously reduced, thereby reducing the degree of creep of each temperature-controlled electrode group 2 and extending the life of the entire device. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0038] Figure 1 This is a schematic structural diagram of an existing adjustable optical attenuator chip provided by an embodiment of the present invention;

[0039] Figure 2 This is a schematic structural diagram of another existing adjustable optical attenuator chip provided by an embodiment of the present invention;

[0040] Figure 3 This is a schematic structural diagram of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0041] Figure 4 This is a schematic structural diagram of another adjustable optical attenuator chip provided by an embodiment of the present invention;

[0042] Figure 5 Schematic diagram of a waveguide core layer in a variable optical attenuator chip provided by an embodiment of the present invention;

[0043] Figure 6 Schematic diagram of a heating electrode in an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0044] Figure 7 This is a flow chart of a method for manufacturing an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0045] Figure 8 This is a schematic structural diagram of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0046] Figure 9 This is a schematic structural diagram of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0047] Figure 10 This is a schematic structural diagram of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0048] Figure 11 This is a schematic structural diagram of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0049] Figure 12 This is a schematic structural diagram of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0050] Figure 13 This is a schematic diagram of a manufacturing process of an adjustable optical attenuator chip provided by an embodiment of the present invention;

[0051] The diagram numbers are as follows:

[0052] Waveguide core layer 1'; heating electrode 2'; upper cladding layer 3'; lower cladding layer 4';

[0053] Waveguide core layer 1; input optical waveguide 11; upper modulation optical waveguide 12; lower modulation optical waveguide 13; output optical waveguide 14; temperature control electrode group 2; heating electrode 21; arc sub-electrode 211; strip sub-electrode 212; wire electrode 22; upper cladding 3; first upper cladding 31; second upper cladding 32; lower cladding 4; first lower cladding 41; second lower cladding 42; third lower cladding 43; substrate 5; lower temperature control layer 6; upper temperature control layer 7. DETAILED DESCRIPTION

[0054] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0055] In the description of the present invention, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0056] In the description of the present invention, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "multiple" means two or more. In addition, for example, the description may also use the method of adding "A" and "B" at the end to describe the same type of nouns as two independent individuals. In this case, the corresponding features defined as "A" and "B" are only used to distinguish the description purposes of the same type of individuals, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated.

[0057] As used herein, "about," "substantially," or "approximately" includes the stated value and an average value that is within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity, i.e., the limitations of the measurement system.

[0058] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as meaning open inclusion, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that the specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner, that is, although they may be carried in the embodiments or examples of the above terms due to reasons such as the order and position of appearance, it is not limited to that they can be carried in combination by one embodiment or example.

[0059] In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0060] Embodiment 1:

[0061] Embodiment 1 of the present invention provides an adjustable optical attenuator chip, such as Figure 3 As shown, it includes: a waveguide core layer 1, at least two temperature control electrode groups 2, wherein:

[0062] At least two temperature-controlled electrode groups 2 are provided above and / or below the waveguide core layer 1, and all the temperature-controlled electrode groups 2 are connected to the external PCB board; the temperature-controlled electrode groups 2 are used to apply voltage through the external PCB board to generate heat, thereby changing the temperature of the waveguide core layer 1 to achieve corresponding optical power attenuation.

[0063] like Figure 3 and Figure 4 As shown, the waveguide core layer 1 includes an adjustable optical attenuator optical path for realizing the basic functions of the adjustable attenuator. The temperature control electrode group 2 includes a wire electrode 22 and a heating electrode 21. The heating electrode 21 is connected to an external PCB board through the wire electrode 22. The PCB board provides a corresponding voltage to the heating electrode 21 to regulate the temperature of the heating electrode 21. The heat is transferred to the waveguide core layer 1 through the heating electrode 21. The waveguide core layer 1 realizes the attenuation of optical power through the thermo-optical effect.

[0064] Since the heater electrode 21 is typically made of a metal film deposited on the waveguide core layer 1, the metal film typically creeps due to the influence of temperature. Generally, the higher the temperature, the more severe the creep of the metal film. The metal film may eventually break after prolonged creep deformation. Furthermore, creep of the metal film significantly affects the lifespan of the heater electrode 21. When a fixed amount of heat needs to be generated, if there is only one heater electrode 21, the power required for the heater electrode 21 is high, the temperature of the heater electrode 21 is also high, and the corresponding creep degree is greater, resulting in a relatively shorter lifespan. If two or more heater electrodes 21 are provided, the power required for a single heater electrode 21 is significantly reduced. Therefore, in this embodiment, the variable optical attenuator chip is provided with at least two temperature-controlled electrode groups 2 to reduce the power required for each heater electrode 21. When the power consumption of a single heater electrode 21 decreases, the intrinsic temperature of the single heater electrode 21 also decreases, thereby slowing down the creep of each heater electrode 21 and extending the lifespan of the entire device.

[0065] Furthermore, in this embodiment, the optical path of the adjustable optical attenuator in the waveguide core layer 1 needs to realize the corresponding adjustable optical attenuation function, so the optical path of the adjustable optical attenuator includes the following design:

[0066] like Figure 5 As shown, the waveguide core layer 1 includes: an input optical waveguide 11, an up-modulation optical waveguide 12, a down-modulation optical waveguide 13 and an output optical waveguide 14, wherein: the input optical waveguide 11 is connected to the up-modulation optical waveguide 12 and the down-modulation optical waveguide 13 respectively, and the up-modulation optical waveguide 12 and the down-modulation optical waveguide 13 are both connected to the output optical waveguide 14; at least two temperature-controlled electrode groups 2 are provided above and / or below the up-modulation optical waveguide 12; and at least two temperature-controlled electrode groups 2 are provided above and / or below the down-modulation optical waveguide 13.

[0067] At the same time, in order to meet the basic structure of the adjustable optical attenuator chip, the adjustable optical attenuator chip also includes: an upper cladding 3, a lower cladding 4 and a substrate 5, wherein: the upper cladding 3 is located above the waveguide core layer 1, the lower cladding 4 is located below the waveguide core layer 1, and the substrate 5 is arranged below the lower cladding 4; the at least two heating electrodes 21 are arranged in the upper cladding 3 and / or the lower cladding 4.

[0068] In this embodiment, the refractive index of the waveguide core layer 1 is slightly greater than that of the lower cladding layer 4 and the upper cladding layer 3. The waveguide core layer 1, the lower cladding layer 4, and the upper cladding layer 3 may be made of the silica material. The thickness of the upper cladding layer 3 and the lower cladding layer 4 may be at least three times the thickness of the waveguide core layer 1 to ensure efficient transmission of optical signals within the waveguide core layer 1. The refractive index of the silica in the upper cladding layer 3 is the same as that of the silica in the lower cladding layer 4.

[0069] The heating electrode 21 may be a metal or alloy with a conductivity of 50 nΩ·m to 500 nΩ·m, and the wire electrode 22 may be a metal or alloy with a conductivity of 60% to 110%.

[0070] The heating electrode 21 can be made of one or any combination of titanium, tungsten, chromium and platinum; the wire electrode 22 can be made of one or any combination of gold, copper and aluminum.

[0071] An anti-oxidation protection layer is also deposited on the upper cladding layer 3. The material of the anti-oxidation protection layer may be silicon nitride or silicon dioxide to protect the heating electrode 21 and the wire electrode 22 from oxidation.

[0072] In this embodiment, the up-modulation optical waveguide 12 and the down-modulation optical waveguide 13 serve as two modulation arms of the optical path of the variable optical attenuator, respectively. Next, the relationship between the power consumption of the heating electrode 21 and the number of the heating electrodes 21 is demonstrated as follows:

[0073] In this embodiment, in the optical path of the variable optical attenuator, the relationship between the modulation phase differences of the two modulation arms is:

[0074]

[0075] Where Δφ is the phase difference between the two modulation arms, and Transmission (P) is the transmission loss.

[0076] The Δφ is the modulation phase Δφ of all heating electrodes 21 i The sum is:

[0077] Δφ=Δφ1+Δφ2+……+Δφ m ;

[0078] Among them, Δφ1 is the modulation phase of the first heating electrode 21, Δφ2 is the modulation phase of the second heating electrode 21, and Δφ m is the modulation phase of the mth heating electrode 21.

[0079] The modulation phase of a single heating electrode 21 satisfies the following relationship:

[0080]

[0081] Where, λ is the operating wavelength; To modulate the thermo-optical coefficient of the optical waveguide material, the thermo-optical coefficient of silicon oxide is determined by the waveguide material and can be 1.1×10 -5 K -1 ; L is the length of the heating electrode 21, and ΔTi is the temperature change of the waveguide core layer 1 caused by heating of the heating electrode 21.

[0082] The ΔTi satisfies the following relationship:

[0083]

[0084] Where k is the temperature correlation coefficient, C p is the heat capacity of the modulated optical waveguide material, m is the mass of the modulated optical waveguide material, P i is the loading power consumption of a single heating electrode 21.

[0085] Through the above formula we can get:

[0086]

[0087] It can be seen from the above formula that the phase difference Δφ between the two modulation arms is the sum of the modulation phases of each heating electrode 21. When the length L of the heating electrode 21 remains unchanged, the phase difference is proportional to the total power consumption of all heating electrodes 21.

[0088] Therefore, when only one heating electrode 21 is working, the total power consumption required to load the phase difference Δφ of the two modulation arms is P, and the total power consumption is borne entirely by the working heating electrode 21; when there are i heating electrodes 21 working at the same time, the total power consumption required to load the phase difference Δφ of the two modulation arms is P=P1+P2+……+P i , where for a single heating electrode 21, for example, the power consumption of the i-th heating electrode 21 is P i , obviously, P i <P, therefore, under the premise of generating the same total power consumption, if multiple heating electrodes 21 are set to work simultaneously, the power consumption required by a single heating electrode 21 will be greatly reduced, and the intrinsic temperature of a single heating electrode 21 will also be lower. The following is the relationship between the creep of the metal film of the heating electrode 21 and the intrinsic temperature T:

[0089]

[0090] Where R(T) is the reaction rate at temperature T, A is the frequency factor, and E a is the activation energy, k is the Boltzmann constant, M is the working state of the device, and t is the lifetime of the device under normal operation.

[0091] Simplifying the above formula we get:

[0092]

[0093] Wherein, a is a constant, the logarithm of the life t and the derivative of the temperature T is linear, so we know that the lower the temperature, the longer the life.

[0094] Further, in this embodiment, in order to ensure the stress balance of the heating electrode 21 in the tunable optical attenuator chip and the polarization coherent loss, the following design is also involved:

[0095] When at least two temperature control electrode groups 2 are arranged above the waveguide core layer 1, and at least two temperature control electrode groups 2 are arranged below the waveguide core layer 1, the at least two temperature control electrode groups 2 above the waveguide core layer 1 are connected in parallel with the at least two temperature control electrode groups 2 below the waveguide core layer 1. Further, the at least two temperature control electrode groups 2 above the waveguide core layer 1 and the at least two temperature control electrode groups 2 below the waveguide core layer 1 are arranged symmetrically with each other.

[0096] In this embodiment, by arranging the same number of temperature control electrode groups 2 above and below the waveguide core layer 1, and arranging them symmetrically with each other, the stress balance of the heating electrode 21 in the tunable optical attenuator chip is ensured, and the polarization coherent loss is also avoided.

[0097] Further, in addition to the fact that creep will affect the life of the metal film of the heating electrode 21, the electromigration phenomenon on the electrode is also one of the factors that restrict the life. Generally, due to the large power consumption of the heating electrode 21, and the fact that the width of the heating electrode 21 is in microns and the cross-sectional area of the heating electrode 21 is small, the current density is large, which leads to the fact that even in the case of low temperature, electromigration phenomenon will occur. The median life, current density and temperature due to electromigration are inversely proportional, so the larger the current density, the shorter the life of the electrode. Therefore, in order to further improve the life of the electrode, it is necessary to reduce the current density, so this embodiment also involves the following design:

[0098] As shown in Figure 5 and Figure 6 The heating electrode 21 includes an arc-shaped sub-electrode 211 and at least two strip-shaped sub-electrodes 212, wherein the at least two strip-shaped sub-electrodes 212 are respectively arranged at both ends of the arc-shaped sub-electrode 211, and the width of the arc-shaped sub-electrode 211 is greater than the width of the strip-shaped sub-electrode 212. The maximum width of the arc-shaped sub-electrode 211 is 378±1um, and the length of the heating electrode 21 is 3000±1um.

[0099] Further, the relationship between the current density in the heating electrode 21 and the life of the heating electrode 21 is demonstrated as follows:

[0100] The median life t due to electromigrationMTF It can be expressed using the Black equation as follows:

[0101]

[0102] The above formula can be further transformed into:

[0103]

[0104] Among them, A, p and q are empirical constants, W is the line width, L is the length, A dc is a constant related to line width, J is current density, m is a constant between 1 and 3, and E a is the activation energy, T is the electrode intrinsic temperature, and k is the Boltzmann constant.

[0105] From the above formula, it can be seen that electromigration is related to the current density and the intrinsic temperature of the electrode. When the current density is smaller, the electromigration ability is weaker and the median life is longer.

[0106] In this embodiment, the heating electrode 21 is designed to be arc-shaped, thereby increasing the width of the heating electrode 21 and increasing the cross-sectional area of ​​the heating electrode 21, thereby reducing the current density, weakening the electromigration phenomenon, and extending the life of the electrode.

[0107] In this embodiment, if at least two temperature control electrode groups 2 are provided above and below the waveguide core layer 1, the process for manufacturing the temperature control electrode groups 2 is also the same to ensure that each temperature control electrode group 2 balances the stress on the waveguide core layer 1 during operation.

[0108] Example 2:

[0109] Embodiment 2 of the present invention provides a method for manufacturing an adjustable optical attenuator chip based on embodiment 1, which is used to manufacture the adjustable optical attenuator chip described in embodiment 1. Figure 7 and Figure 8 Shown, including:

[0110] In step 101 , the number a of the temperature control electrode groups 2 below the waveguide core layer 1 and the number b of the temperature control electrode groups 2 above the waveguide core layer 1 are set, wherein a+b≥2.

[0111] In step 102 , a first lower cladding layer 41 is deposited on the substrate 5 .

[0112] It should be noted that, to clearly illustrate the manufacturing process, the lower cladding layer 4 in Example 1 is divided into a first lower cladding layer 41, a second lower cladding layer 42, and a third lower cladding layer 43 for ease of description. The materials and manufacturing processes of the first lower cladding layer 41, the second lower cladding layer 42, and the third lower cladding layer 43 can be the same.

[0113] In step 103, when a is greater than or equal to 1, a lower temperature control layer 6 is prepared on the first lower cladding layer 41 to deposit a layer of lower temperature control layer 6 on the first lower cladding layer 41; when a is less than 1, a second lower cladding layer 42 is deposited on the first lower cladding layer 41.

[0114] Figure 9 It shows that at least one lower temperature control layer 6 is deposited on the first lower cladding layer 41; Figure 10 It is shown that the lower temperature control layer 6 is not deposited on the first lower cladding layer 41, but the second lower cladding layer 42 is directly formed.

[0115] The second lower cladding layer 42 is used to fill the layer between the first lower cladding layer 41 and the waveguide core layer 1 when the temperature control electrode group 2 is not provided in the lower cladding layer 4, so as to ensure the thickness of the entire chip.

[0116] The lower temperature control layer 6 is prepared specifically as follows: when a is 1, a wire electrode 22 and a heating electrode 21 are deposited on the first lower cladding layer 41 , and then a third lower cladding layer 43 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the lower temperature control layer 6 .

[0117] like Figure 9 As shown, when a is greater than 1, the wire electrode 22 and the heating electrode 21 are deposited on the first lower cladding layer 41, and then the third lower cladding layer 43 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the first lower temperature control layer 6; the preparation of the second lower temperature control layer 6 to the a-th lower temperature control layer 6 is to deposit the wire electrode 22 and the heating electrode 21 on the third lower cladding layer 43 of the previous lower temperature control layer 6, and then deposit the third lower cladding layer 43 on the wire electrode 22 and the heating electrode 21.

[0118] Among them, the first lower cladding layer 41, the second lower cladding layer 42 and the third lower cladding layer 43 can be deposited by chemical vapor deposition, the wire electrode 22 and the heating electrode 21 can be deposited on the lower cladding layer 4 by physical vapor deposition, and the waveguide core layer 1 can be deposited on the second lower cladding layer 42 or the uppermost third lower cladding layer 43 by chemical vapor deposition.

[0119] In step 104 , a waveguide core layer 1 is deposited on the uppermost lower temperature control layer 6 or the second lower cladding layer 42 .

[0120] The optical path of the variable optical attenuator is formed on the waveguide core layer 1 by using reactive etching technology.

[0121] In step 105, when b is greater than or equal to 1, a first upper cladding layer 31 is deposited on the waveguide core layer 1, and b upper temperature control layers 7 are prepared on the first upper cladding layer 31 to deposit b upper temperature control layers 7 on the waveguide core layer 1; when b is less than 1, a first upper cladding layer 31 is deposited on the waveguide core layer 1.

[0122] Figure 11 It shows that at least one upper temperature control layer 7 is deposited on the first upper cladding layer 31; Figure 12 It is shown that no temperature control layer 7 is deposited on the waveguide core layer 1 , but only the first upper cladding layer 31 is formed.

[0123] It should be noted that, in order to clearly illustrate the manufacturing process, the upper cladding layer 3 in Example 1 is divided into a first upper cladding layer 31 and a second upper cladding layer 32 for ease of description. The materials and manufacturing processes of the first upper cladding layer 31 and the second upper cladding layer 32 can be the same.

[0124] The first upper cladding layer 31 is a layer used to fill the upper portion of the waveguide core layer 1 when the temperature control electrode group 2 is not provided in the upper cladding layer 3 , so as to ensure the overall thickness of the chip.

[0125] The upper temperature control layer 7 is prepared specifically as follows: when b is 1, the wire electrode 22 and the heating electrode 21 are deposited on the first upper cladding layer 31 , and then the second upper cladding layer 32 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the upper temperature control layer 7 .

[0126] like Figure 11 When b is greater than 1, the wire electrode 22 and the heating electrode 21 are deposited on the first upper cladding layer 31, and then the second upper cladding layer 32 is deposited on the wire electrode 22 and the heating electrode 21 to prepare the first upper temperature control layer 7; the preparation of the second upper temperature control layer 7 to the b-th upper temperature control layer 7 is to deposit the wire electrode 22 and the heating electrode on the second upper cladding layer 32 in the previous upper temperature control layer 7, and then deposit the second upper cladding layer 32 on the wire electrode 22 and the heating electrode.

[0127] The first upper cladding layer 31 and the second upper cladding layer 32 can be deposited by chemical vapor deposition, and the wire electrode 22 and the heating electrode 21 can be obtained by physical vapor deposition.

[0128] In step 106 , an anti-oxidation protection layer is deposited on the upper temperature control layer 7 or the first upper cladding layer 31 .

[0129] The anti-oxidation protection layer may be formed by a plasma chemical vapor deposition process, and then the wafer is processed through high temperature annealing and high pressure treatment, and finally the variable optical attenuator chip is manufactured by dicing the wafer.

[0130] Example 3:

[0131] Based on the above embodiments, this embodiment provides an example of a manufacturing process of an adjustable optical attenuator chip. In this embodiment, all upper cladding layers are referred to as upper cladding layers 3, and all lower cladding layers are referred to as lower cladding layers 4, without further subdivision.

[0132] by Figure 13 As an example, Figure 13 Two temperature control electrode groups 2 are provided above and below the middle waveguide core layer 1, and all temperature control electrode groups 2 are located on one side of the upper modulation optical waveguide 12. Figure 13 The steps for making the structure in are as follows:

[0133] First, a lower cladding layer 4 is deposited on the substrate 5 by chemical vapor deposition.

[0134] The wire electrode 22 and the heater electrode 21 are deposited on the lower cladding layer 4 by physical vapor deposition.

[0135] A lower cladding layer 4 is deposited on the wire electrode 22 and the heater electrode 21 by chemical vapor deposition.

[0136] The wire electrode 22 and the heater electrode 21 are deposited on the lower cladding layer 4 by physical vapor deposition.

[0137] A lower cladding layer 4 is deposited on the wire electrode 22 and the heater electrode 21 by chemical vapor deposition.

[0138] The waveguide core layer 1 is deposited on the lower cladding layer 4 by chemical vapor deposition, and the optical path of the variable optical attenuator is formed on the waveguide core layer 1 by reactive etching technology.

[0139] An upper cladding layer 3 is formed on the waveguide core layer 1 by chemical vapor deposition.

[0140] The wire electrode 22 and the heater electrode 21 are deposited on the upper cladding layer 3 by physical vapor deposition.

[0141] The upper cladding layer 3 is deposited on the wire electrode 22 and the heater electrode 21 by chemical vapor deposition.

[0142] The wire electrode 22 and the heater electrode 21 are deposited on the upper cladding layer 3 by physical vapor deposition.

[0143] An upper cladding layer 3 is deposited on the wire electrode 22 and the heater electrode 21 by chemical vapor deposition, and an anti-oxidation protection layer is deposited on the upper cladding layer 3 .

[0144] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An adjustable optical attenuator chip, characterized in that: include: A waveguide core layer (1) and at least two temperature-controlled electrode groups (2), wherein: At least two temperature control electrode groups (2) are provided above and / or below the waveguide core layer (1), and all the temperature control electrode groups (2) are connected to an external PCB board; The temperature control electrode group (2) is used to apply voltage through an external PCB board to generate heat, thereby changing the temperature of the waveguide core layer (1) to achieve corresponding optical power attenuation; The temperature control electrode group (2) comprises a heating electrode (21) and a wire electrode (22); the heating electrode (21) is connected to an external PCB board via the wire electrode (22); the wire electrode (22) is used to transmit the current of the PCB board to the heating electrode (21); the heating electrode (21) is used to generate heat according to the applied voltage and transfer the heat to the waveguide core layer (1); The heating electrode (21) comprises an arc-shaped sub-electrode (211) and at least two strip-shaped sub-electrodes (212), wherein: the at least two strip-shaped sub-electrodes (212) are respectively arranged at two ends of the arc-shaped sub-electrode (211); the width of the arc-shaped sub-electrode (211) is greater than the width of the strip-shaped sub-electrode (212); The adjustable optical attenuator chip further comprises: an upper cladding layer (3), a lower cladding layer (4) and a substrate (5), wherein: the upper cladding layer (3) is arranged above the waveguide core layer (1), the lower cladding layer (4) is arranged below the waveguide core layer (1), and the substrate (5) is arranged below the lower cladding layer (4); and the at least two temperature-controlled electrode groups (2) are arranged in the upper cladding layer (3) and / or the lower cladding layer (4).

2. The variable optical attenuator chip according to claim 1, characterized in that: When at least two temperature-controlled electrode groups (2) are provided above the waveguide core layer (1) and at least two temperature-controlled electrode groups (2) are provided below the waveguide core layer (1), the at least two temperature-controlled electrode groups (2) above the waveguide core layer (1) and the at least two temperature-controlled electrode groups (2) below the waveguide core layer (1) are connected in parallel.

3. The variable optical attenuator chip according to claim 2, characterized in that: The at least two temperature-controlled electrode groups (2) above the waveguide core layer (1) and the at least two temperature-controlled electrode groups (2) below the waveguide core layer (1) are arranged symmetrically with respect to each other.

4. The variable optical attenuator chip according to claim 1, characterized in that: The waveguide core layer (1) comprises: an input optical waveguide (11), an up-modulation optical waveguide (12), a down-modulation optical waveguide (13) and an output optical waveguide (14), wherein: The input optical waveguide (11) is connected to the up-modulation optical waveguide (12) and the down-modulation optical waveguide (13), respectively, and the up-modulation optical waveguide (12) and the down-modulation optical waveguide (13) are both connected to the output optical waveguide (14); At least two temperature-controlled electrode groups (2) are arranged above and / or below the upper modulation optical waveguide (12); and at least two temperature-controlled electrode groups (2) are arranged above and / or below the lower modulation optical waveguide (13).

5. A method for manufacturing an adjustable optical attenuator chip, for manufacturing the adjustable optical attenuator chip according to any one of claims 1 to 4, characterized in that: include: Setting the number a of the temperature control electrode groups (2) below the waveguide core layer (1) and the number b of the temperature control electrode groups (2) above the waveguide core layer (1), wherein a+b≥2; Depositing a first lower cladding layer (41) on the substrate (5); When a is greater than or equal to 1, a lower temperature control layer (6) is prepared on the first lower cladding (41) to deposit a layer of lower temperature control layer (6) on the first lower cladding (41); when a is less than 1, a second lower cladding (42) is deposited on the first lower cladding (41); the lower temperature control layer (6) includes a wire electrode (22) and a heating electrode (21) deposited on the lower cladding (4), and a third lower cladding (43) deposited on the wire electrode (22) and the heating electrode (21); when a is greater than 1, the lower cladding (4) refers to the third lower cladding (43) of the upper lower temperature control layer (6); when a is equal to 1, the lower cladding (4) refers to the first lower cladding (41); Depositing a waveguide core layer (1) on the uppermost lower temperature control layer (6) or the second lower cladding layer (42); When b is greater than or equal to 1, a first upper cladding layer (31) is deposited on the waveguide core layer (1), and b upper temperature control layers (7) are prepared on the first upper cladding layer (31) to deposit b upper temperature control layers (7) on the waveguide core layer (1); when b is less than 1, a first upper cladding layer (31) is deposited on the waveguide core layer (1); the upper temperature control layer (7) includes a wire electrode (22) and a heating electrode (21) deposited on the upper cladding layer (3), and a second upper cladding layer (32) deposited on the wire electrode (22) and the heating electrode (21); when b is greater than 1, the upper cladding layer (3) refers to the second upper cladding layer (32) of the upper temperature control layer (7); when b is equal to 1, the upper cladding layer (3) refers to the first upper cladding layer (31); An anti-oxidation protective layer is deposited on the upper temperature control layer (7) or the first upper cladding layer (31).

6. The method for manufacturing the variable optical attenuator chip according to claim 5, wherein: When a is greater than or equal to 1, a lower temperature control layer (6) is prepared on the first lower cladding layer (41) to deposit a layer of lower temperature control layer (6) on the first lower cladding layer (41), specifically comprising: When a is 1, a wire electrode (22) and a heating electrode (21) are deposited on the first lower cladding layer (41), and then a third lower cladding layer (43) is deposited on the wire electrode (22) and the heating electrode (21) to prepare a lower temperature control layer (6); When a is greater than 1, a wire electrode (22) and a heating electrode (21) are deposited on the first lower cladding layer (41), and then a third lower cladding layer (43) is deposited on the wire electrode (22) and the heating electrode (21) to prepare a first lower temperature control layer (6); the preparation of the second lower temperature control layer (6) to the ath lower temperature control layer (6) is to deposit a wire electrode (22) and a heating electrode (21) on the third lower cladding layer (43) of the previous lower temperature control layer (6), and then the third lower cladding layer (43) is deposited on the wire electrode (22) and the heating electrode (21).

7. The method for manufacturing the variable optical attenuator chip according to claim 5, wherein: When b is greater than or equal to 1, a first upper cladding layer (31) is deposited on the waveguide core layer (1), and b upper temperature control layers (7) are prepared on the first upper cladding layer (31) to deposit b upper temperature control layers (7) on the waveguide core layer (1), specifically comprising: When b is 1, a wire electrode (22) and a heating electrode (21) are deposited on the first upper cladding layer (31), and then a second upper cladding layer (32) is deposited on the wire electrode (22) and the heating electrode (21) to prepare an upper temperature control layer (7); When b is greater than 1, a wire electrode (22) and a heating electrode (21) are deposited on the first upper cladding layer (31), and then a second upper cladding layer (32) is deposited on the wire electrode (22) and the heating electrode (21) to prepare the first upper temperature control layer (7); the preparation of the second upper temperature control layer (7) to the b-th upper temperature control layer (7) is to deposit a wire electrode (22) and a heating electrode on the second upper cladding layer (32) in the previous upper temperature control layer (7), and then deposit the second upper cladding layer (32) on the wire electrode (22) and the heating electrode.

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