A storage device and a control method thereof

Abstract

The present invention provides a storage device and a control method therefor. The device includes a plurality of storage units. According to the risk coefficient of the physical address of the storage unit, the physical addresses in the storage units are divided into normal read / write addresses, risk read / write addresses, or high-risk read / write addresses; and a main controller, electrically connected to a host and the storage units. When the main controller reads data from the storage units, when the risk coefficient of the read data reaches a threshold, the main controller marks the physical address from which the data is read as a high-risk read / write address, and after reading part or all of the data, copies the data at the high-risk read / write address to a normal read / write address. The present invention provides a storage device and a control method therefor, which can improve the reliability of data storage and the storage life of the device.

Description

Technical Field

[0001] The present invention relates to the field of storage technology, and particularly to a storage device and a control method thereof. Background Art

[0002] During the actual use of a storage device, affected by various internal and external conditions, the amount of charge stored in the storage unit will change. When the change in the amount of charge reaches a certain level, the threshold voltage curve of the storage device will shift. Therefore, when the reading device performs a read operation on the storage device using the default voltage, the correct data cannot be obtained.

[0003] When a read error occurs, the data can be read again according to the re-reading voltage table provided by the manufacturer until all the possible reading voltages are traversed or the correct data is read. If the data cannot be correctly read after traversing all the possible re-reading voltages, the flash memory device determines the current storage block as a bad block, and the data in this bad block is at risk of data loss because it cannot be accurately read. Such a management method will affect the service life of the storage device and the reliability of data storage. Summary of the Invention

[0004] The purpose of the present invention is to provide a storage device and a control method thereof, which can improve the reliability of data storage and the storage life of the device.

[0005] To solve the above technical problems, the present invention is realized through the following technical solutions:

[0006] The present invention provides a storage device, including:

[0007] A plurality of storage units, according to the risk coefficient of the physical address of the storage unit, the physical addresses in the storage unit are divided into normal read / write addresses, risk read / write addresses or high-risk read / write addresses, wherein the risk coefficient includes the number of error bits of the read data, the number of re-read times of the read data, and the number of erasure times of the storage unit;

[0008] A cache unit, electrically connected to the storage unit, and the cache unit is a temporary storage area for read data and write data; and

[0009] A main controller, electrically connected to the cache unit, the host and the storage unit, reads data from the cache unit or the storage unit. If the risk coefficient of the read data reaches the threshold when reading data, the main controller marks the physical address of the read data as the high-risk read / write address, and after reading part or all of the data, copies the data at the high-risk read / write address to the normal read / write address.

[0010] In an embodiment of the present invention, the main controller includes an error correction module. When reading data from the storage unit, the error correction module corrects the read data and obtains the number of error bits of the read data. Among the risk factors, the number of error bits is the number of error bits of a single read data.

[0011] In an embodiment of the present invention, the main controller includes a reread module. When the data read under the default supply voltage is incorrect, the reread module traverses the reread threshold voltage data until the read data is correct. The number of rereads is the number of reread threshold voltages called when reading a single data.

[0012] In an embodiment of the present invention, the storage device includes a classification module, where the classification module is configured to:

[0013] After reading a single data, if any item in the risk factor exceeds the first threshold of the corresponding item, mark the physical address of the read data as a risky physical address; and

[0014] After reading a single data, if any item in the risk factor exceeds the second threshold of the corresponding item, mark the physical address of the read data as a high-risk physical address, where the second threshold is greater than the first threshold under the same item.

[0015] In an embodiment of the present invention, a task queue is set in the storage device. The task queue includes a host read task, a backup write task, and a regular storage task. The process of reading data from the storage unit includes at least one host read task. In the process of reading all data, the priority of the regular storage task is lower than the priority of the backup write task, and the priority of the backup write task is lower than the priority of all host read tasks.

[0016] In an embodiment of the present invention, in the process of reading data, the main controller is configured to: clear the read data before the capacity threshold of the read data stored in the cache unit.

[0017] In an embodiment of the present invention, a task queue is set in the storage device. The task queue includes a host read task, a backup write task, and a regular storage task. The process of reading data from the storage unit includes at least one host read task. In the process of reading all data, the priority of the regular storage task is lower than the priority of the backup write task and the priority of the host read task. The host read task and the backup write task alternate at intervals. In the process of reading a single data, the priority of the regular storage task is lower than the priority of the backup write task and the host read task, and the priority of the backup write task is lower than the priority of the host read task.

[0018] In an embodiment of the present invention, during the process of reading data, the host controller is configured to: after a single host read task is completed, transfer the data in the cache unit to a specified storage unit, where the specified storage unit is the storage unit with the least number of erasure times.

[0019] In an embodiment of the present invention, the storage device includes a flash memory chip, the flash memory chip includes a plurality of storage planes, where the storage unit is a storage block or a super block of the flash memory chip, and the super block includes a plurality of storage blocks with the same number and originating from different storage planes.

[0020] The present invention provides a control method for a storage device. Based on a storage device as described above, the control method includes the following steps:

[0021] When reading data from the storage device, obtain the risk coefficient of the physical address of the storage unit, where the risk coefficient includes the number of error bits in the read data, the number of reread times of the read data, and the number of erasure times of the storage unit;

[0022] According to the risk coefficient of the physical address of the storage unit, divide the physical address in the storage unit into a normal read / write address, a risk read / write address, or a high-risk read / write address; and

[0023] If, when reading data, the risk coefficient of the read data reaches a threshold, mark the physical address where the data is read as the high-risk read / write address, and after reading part or all of the data, copy the data at the high-risk read / write address to the normal read / write address.

[0024] As described above, the present invention provides a storage device and its control method, which can ensure that data is not lost due to the proximity of the device to its lifespan, thereby improving the data storage reliability of the storage device, and can also prevent storage blocks close to the lifespan from being directly marked as bad blocks, thereby extending the service life of the storage device. The storage device and its control method provided by the present invention can accurately determine which storage units are storage blocks close to the lifespan, improving the rationality and management efficiency of data management in the storage device.

[0025] Of course, it is not necessary for any product implementing the present invention to achieve all of the above advantages simultaneously. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention, and those of ordinary skill in the art can also obtain other drawings based on these drawings without creative efforts.

[0027] Figure 1 This is a schematic structural diagram of a storage device in an embodiment of the present invention.

[0028] Figure 2 This is a schematic internal structure diagram of a storage plane in an embodiment of the present invention.

[0029] Figure 3 This is a schematic functional structure diagram of storage firmware and flash memory chips in an embodiment of the present invention.

[0030] Figure 4 This is a schematic diagram of the address distribution in a storage unit in an embodiment of the present invention.

[0031] Figure 5 This is a flowchart of a control method for a storage device in an embodiment of the present invention.

[0032] In the figure: 10, host; 20, storage device; 30, main controller; 301, microprocessor; 302, host interface controller; 303, cache controller; 304, flash memory controller; 305, error correction module; S, flash memory chip; 40, storage plane; 410, storage block; 420, storage page; 430, super block; 50, memory; 60, control firmware; 610, read / write module; 620, reread module; 630, parameter acquisition module; 640, classification module; 650, backup module; 70, cache unit; B, storage unit; ADD1, normal physical address; ADD2, risk physical address; ADD3, high-risk physical address. Detailed implementation manners

[0033] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0034] The storage device 20 provided by the present invention is a flash memory or a storage device 20 including a flash memory, such as an embedded storage device 20 (embedded Multi Media Card, eMMC), Universal Flash Storage (UFS), and Solid State Disk or Solid State Drive (SSD), etc. As Figure 1 and Figure 4As shown, the storage device 20 includes a plurality of main controllers 30, a cache unit 70, and a storage unit B. Among them, the main controller 30 is electrically connected to the host 10, and the host 10 is a host computer. The cache unit 70 is electrically connected to the main controller 30, and the cache unit 70 is, for example, a random access memory. The storage unit B is electrically connected to the cache unit 70, and the storage unit B is a storage unit in the storage device 20.

[0035] Please refer to Figures 1 to 4 As shown, in an embodiment of the present invention, the storage device 20 includes a flash memory chip S, and the flash memory chip S includes a plurality of storage planes 40. In this embodiment, the plurality of storage planes 40 have unique numbers. The storage plane 40 includes a plurality of storage blocks 410. The storage block 410 is a physical block of the flash memory chip S, and each storage block 410 has a device number. The storage block 410 includes a plurality of storage pages 420, and the storage page 420 may be a physical page of the flash memory chip S. In this embodiment, the storage unit B is a storage block 410 or a super block 430 of the flash memory chip S. The super block 430 includes a plurality of storage blocks 410 with the same number and from different storage planes 40. As Figure 2 shown, the storage blocks 410 numbered 1 in two storage planes 40 together form a super block 430 numbered 1. Among them, according to the numbers of the storage blocks 410 in the super block 430, the super block 430 can be numbered.

[0036] Please refer to Figure 1 and Figure 4 shown, in an embodiment of the present invention, according to the risk coefficient of the physical address of the storage unit B, the physical addresses in the storage unit B are divided into normal read / write addresses, risk read / write addresses, or high-risk read / write addresses. The risk coefficient includes the number of error bits in the read data, the number of re-read times of the read data, and the number of erase times of the storage unit B. The physical address of one storage page 420 can correspond to a physical address of the storage unit B. As Figure 4 shown, the storage unit B includes a plurality of physical addresses. When the physical address of the storage page 420 meets the classification condition, the physical address of the storage page 420 can be marked as a normal physical address ADD1, a risk read / write address, or a high-risk read / write address. As the usage time limit of the storage device 20 extends, the marking of the physical address can change and be replaced. When the storage device 20 leaves the factory, all physical addresses can be defaulted to the normal physical address ADD1.

[0037] Please refer to Figure 1As shown, in an embodiment of the present invention, the main controller 30 includes a microprocessor 301, a host 10 interface controller, a cache controller 303, a flash memory controller 304, and an error correction module 305. The microprocessor 301 is a Reduced Instruction System Computer (RISC), and specifically an ARM processor. The microprocessor 301 is electrically connected to the host 10 interface controller, the cache controller 303, and the flash memory controller 304. Among them, the host 10 interface controller is electrically connected to the host 10 through an interface to receive the instructions and data of the host 10 and feedback the data of the main controller 30. The connection interface between the host 10 and the main controller 30 can be a SATA hard disk, a Peripheral Component Interconnect express (PCIe), or a SAS interface. In this embodiment, the flash memory controller 304 is electrically connected to the error correction module 305 to correct the data read from the flash memory chip S during the read process of the flash memory chip S. The error correction module 305 can complete the error checking and correction of the data read from the flash memory chip S through a Low Density Parity-Check Code (LDPC) and obtain the number of error bits of the read data.

[0038] Please refer to Figure 1 and Figure 3 As shown, in an embodiment of the present invention, the storage device 20 includes a memory 50, and a control firmware 60 is stored in the memory 50. The microprocessor 301 can call the control firmware 60 and implement the control method of the storage device 20 provided by the present invention. The control firmware 60 includes a read / write module 610 and a reread module 620. When the main controller 30 receives a read instruction or a write instruction from the host 10, the read / write module 610 supplies power to the MOS transistors corresponding to the physical address according to the received instruction, so as to read out the data. When the read data is incorrect, the reread module 620 is enabled. The reread module 620 provides reread threshold voltage data and adjusts the power supply voltage of the MOS transistors according to the reread threshold voltage data. When rereading still results in incorrect data readout, the reread threshold voltage data can be replaced until the read data is correct or all the replaceable reread threshold voltage data has been traversed. For example, the number of reread times is the number of reread threshold voltages called when reading a single piece of data.

[0039] Please refer to Figure 1 and Figure 3As shown, in an embodiment of the present invention, the storage firmware includes a parameter acquisition module 630 and a classification module 640. The parameter acquisition module 630 is electrically connected to the error correction module 305 and receives the number of error bits when reading out data. And when the storage unit B is erased, the parameter acquisition module 630 counts the number of erasures of the storage unit B, and each time it is erased, the count is incremented by one. The parameter acquisition module 630 is electrically connected to the reread module 620 and counts the number of rereads. Among them, the statistics of the number of erasures of the storage unit B can be calculated according to the number of erase instructions issued by the host 10 and the microprocessor 301. The number of rereads can be calculated according to the number of calls of the reread module 620 to the reread threshold data. The calculation of the parameter acquisition module 630 can be recorded or calculated based on the feedback information of the main controller 30. The classification module 640 and the parameter acquisition module 630 are electrically connected to the classification module 640. The classification module 640 can classify and mark the physical address where the currently read data is located according to the risk coefficient collected by the parameter acquisition module 630 when reading out the current piece of data.

[0040] Please refer to Figures 1 to 4 As shown, in an embodiment of the present invention, multiple types of first thresholds and multiple types of second thresholds are set in the classification module 640. Among them, under the same item type, the second threshold is greater than the first threshold. The types of the first threshold and the second threshold are set according to the item type of the risk coefficient. The items of the risk coefficient include the number of error bits of the read data, the number of rereads of the read data, and the number of erasures of the storage unit B. When the number of error bits of the read data is less than the first threshold of the number of error bits, and when the number of rereads of the read data is less than the first threshold of the number of rereads of the read data, and when the number of erasures of the storage unit B is less than the first threshold of the number of erasures, the physical address of the read data remains the normal physical address ADD1. When any item of the number of error bits of the read data, the number of rereads of the read data, and the number of erasures of the storage unit B is greater than or equal to the first threshold under the corresponding item, the physical address of the read data is replaced and marked as the risk physical address ADD2. When any item of the number of error bits of the read data, the number of rereads of the read data, and the number of erasures of the storage unit B is greater than or equal to the second threshold under the corresponding item, the physical address of the read data is replaced and marked as the high-risk physical address ADD3.

[0041] Please refer to Figures 1 to 4As shown, in an embodiment of the present invention, it should be noted that the physical address of the current data is marked as the high-risk physical address ADD3. In the subsequent use of the storage device 20, if the performance of the read data is good and the risk coefficient of the physical address decreases, according to the interval where the risk coefficient is located, the high-risk physical address ADD3 can be adjusted to the risk physical address ADD2 or the normal physical address ADD1, and the risk physical address ADD2 can be adjusted to the normal physical address ADD1. Specifically, the risk coefficients of all items of the normal physical address ADD1 are less than the first threshold. The risk coefficients of all items of the risk physical address ADD2 are less than the second threshold, and the risk coefficient of at least one item is greater than or equal to the first threshold. The risk coefficient of at least one item of the high-risk physical address ADD3 is greater than or equal to the second threshold.

[0042] Please refer to Figures 1 to 4 As shown, in an embodiment of the present invention, a bad block table is stored in some of the storage units B. When traversing the read retry threshold voltage data of the storage unit B and the read data of the storage unit B is incorrect, the storage unit B is marked as a bad block, and the address of the bad block is stored in the bad block table.

[0043] Please refer to Figures 1 to 4 As shown, in an embodiment of the present invention, the storage firmware includes a backup module 650. A task queue is set in the storage device 20. When a physical address is marked as the high-risk physical address ADD3, the backup module 650 generates a backup write task and adds the backup write task to the task queue of the storage device 20. After reading a single piece of data or all the data, the backup write task is executed. During the execution process of the backup write task, the data at the high-risk read / write address is copied to the normal read / write address to complete the transfer of the high-risk data. Among them, when reading a large amount of data, the storage device 20 splits the process of reading a large amount of data into multiple host read tasks according to its own processing ability. Reading a single piece of data refers to the process of reading data in a single host read task. Reading all the data means reading all the data required by the host 10. In this embodiment, the process of reading data from the storage unit B includes at least one host read task.

[0044] Please refer to Figure 1 and Figure 2 As shown, it should be noted that when the cache unit 70 is enabled, in the process of reading data, the data is read from the flash memory chip S to the cache unit 70, and then read from the cache unit 70 to the host 10. At this time, in the control method provided by the present invention, after reading a single piece of data, the backup write task of the currently read single piece of data can be executed. When the cache unit 70 is not enabled, in the process of reading data, the host 10 directly reads data from the flash memory chip S. At this time, in the control method provided by the present invention, after reading all the data, the backup write task of the currently read single piece of data can be executed.

[0045] Please refer to Figures 1 to 4 As shown, in the present invention, the task queue includes a host read task, a backup write task, and a regular storage task. The regular storage task can be a garbage collection task, a regular backup task, a storage optimization task designed by a designer, and so on. The present invention does not limit the content of the regular storage task. In an embodiment of the present invention, during the process of reading out all data, the priority of the regular storage task is lower than that of the backup write task, and the priority of the backup write task is lower than that of all host read tasks. That is, after reading out all data, the backup write task is executed. During the process of reading out data, before the capacity threshold of the cache unit 70 for storing the read-out data is reached, the main controller 30 clears the read-out data. Wherein, when the cache unit 70 is enabled and the read-out data reaches the capacity threshold of the cache unit 70, the cache unit 70 is first emptied, and the next host read task is continued, so as to read out the data required by the host 10 as soon as possible.

[0046] Please refer to Figures 1 to 4 As shown, in another embodiment of the present invention, during the process of reading out all data, the priority of the regular storage task is lower than that of the backup write task and the host read task. The host read task and the backup write task are alternately spaced. During the process of reading out a single piece of data, the priority of the regular storage task is lower than that of the backup write task and the host read task, and the priority of the backup write task is lower than that of the host read task. During the process of reading out data, after a single host read task is completed, the data in the cache unit 70 is transferred to the designated storage unit B, where the designated storage unit B is the storage unit B with the fewest number of erasure times. Specifically, after a single piece of data is read out, the backup write task is directly enabled, and the currently read-out piece of data in the cache unit 70 is flushed down to the storage chip, and the data is flushed down to the designated storage unit B. Then the next host read task is executed.

[0047] Please refer to Figure 1 and Figure 3 As shown, in an embodiment of the present invention, the main controller 30 includes an error correction module 305. When reading data from the storage unit B, the error correction module 305 corrects the read-out data and obtains the number of error bits of the read-out data. Among them, in the risk coefficient, the number of error bits is the number of error bits of a single piece of read-out data. It should be noted that the present invention identifies the address type and backs up the data of the high-risk physical address ADD3 in units of physical addresses. Whether the amount of data to be read out by the host 10 is large or small, it will not affect the determination of the data storage reliability of the present invention.

[0048] Please refer to Figures 1 to 5 As shown, the present invention also provides a control method for a storage device 20, and the method includes steps S10 to S30.

[0049] Step S10: When reading data from the storage device 20, obtain the risk coefficient of the physical address of the storage cell B, where the risk coefficient includes the number of error bits of the read data, the number of times of rereading the read data, and the number of erasure times of the storage cell B.

[0050] Step S20: According to the risk coefficient of the physical address of the storage cell B, divide the physical address in the storage cell B into a normal read / write address, a risk read / write address, or a high-risk read / write address.

[0051] Step S30: When reading data, if the risk coefficient of the read data reaches the threshold, mark the physical address where the data is read as a high-risk read / write address, and after reading part or all of the data, copy the data at the high-risk read / write address to the normal read / write address.

[0052] The present invention provides a storage device and its control method. The storage device includes a main controller, a cache unit, and a storage unit. According to the risk coefficient of the physical address of the storage unit, the physical address in the storage unit is divided into a normal read / write address, a risk read / write address, or a high-risk read / write address. The risk coefficient includes the number of error bits of the read data, the number of times of rereading the read data, and the number of erasure times of the storage unit. The cache unit is electrically connected to the storage unit, and the cache unit is a temporary storage area for read data and write data. The main controller is electrically connected to the cache unit, the host, and the storage unit. Read data from the cache unit or the storage unit. When reading data, if the risk coefficient of the read data reaches the threshold, the main controller marks the physical address where the data is read as a high-risk read / write address, and after reading part or all of the data, copies the data at the high-risk read / write address to the normal read / write address. The present invention can ensure that data is not lost due to the proximity of the device to its lifespan, thereby improving the data storage reliability of the storage device, and can also prevent the storage blocks close to the lifespan from being directly marked as bad blocks, thereby increasing the service life of the storage device. The storage device and its control method provided by the present invention can accurately determine what kind of storage unit is a storage block close to the lifespan, and improve the rationality and management efficiency of the data management of the storage device.

[0053] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of this specification. These embodiments are selected and specifically described in this specification to better explain the principles and practical applications of the present invention, so that those skilled in the relevant art can understand and utilize the present invention well. The present invention is only limited by the claims and their full scope and equivalents.

Claims

1. A storage device, characterized in that: Comprising: A plurality of storage units, according to the risk coefficient of the physical address of the storage unit, the physical addresses in the storage units are divided into normal read / write addresses, risk read / write addresses or high-risk read / write addresses, wherein the risk coefficient includes the number of error bits of the read data, the number of re-read times of the read data, and the number of erase times of the storage unit, wherein the number of error bits is the number of error bits of a single read data, the number of re-read times is the number of times the main controller re-reads the data when the read data is in error, and wherein as the storage device is used, it is allowed that the physical address marks of the storage units change and be replaced; and The main controller, electrically connected to the host and the storage units, when the main controller reads data from the storage units, when the risk coefficient of the read data reaches a threshold, the main controller marks the physical address of the data read as the high-risk read / write address, and after reading part or all of the data, copies the data of the high-risk read / write address to the normal read / write address; Wherein a task queue is set in the storage device, the task queue includes host read tasks, backup write tasks and normal storage tasks, wherein the process of reading data from the storage units includes at least one host read task, in the process of reading all data, the priority of the normal storage tasks is lower than the priority of the backup write tasks and the priority of the host read tasks, the host read tasks and the backup write tasks are alternately spaced, in the process of reading a single data, the priority of the normal storage tasks is lower than the priority of the backup write tasks and the priority of the host read tasks, and the priority of the backup write tasks is lower than the priority of the host read tasks.

2. A storage device according to claim 1, characterized in that: The storage device includes a classification module, wherein the classification module is configured to: After reading a single data, if any item in the risk coefficient exceeds the first threshold of the corresponding item, change and mark the physical address of the read data as a risk physical address; And After reading a single data, if any item in the risk coefficient exceeds the second threshold of the corresponding item, change and mark the physical address of the read data as a high-risk physical address, wherein the second threshold is greater than the first threshold under the same item.

3. The storage device according to claim 1, characterized in that, A task queue is set in the storage device, the task queue includes host read tasks, backup write tasks and normal storage tasks, wherein the process of reading data from the storage units includes at least one host read task, in the process of reading all data, the priority of the normal storage tasks is lower than the priority of the backup write tasks, and the priority of the backup write tasks is lower than the priority of all the host read tasks.

4. A storage device according to claim 3, characterized in that: The storage device includes a cache unit, the cache unit is electrically connected to the main controller and the storage units, when the cache unit is enabled, the data read from the storage units is temporarily stored in the cache unit until the data temporarily stored in the cache unit reaches a preset flushing condition.

5. A storage device according to claim 4, characterized in that, In the process of reading data, the main controller is configured to: when the read data reaches the capacity threshold of the cache unit, transfer the data of the cache unit to a designated storage unit, and the designated storage unit is the storage unit with the least number of erase times.

6. The storage device according to claim 4, wherein: In the process of reading data, the main controller is configured to: after a single host read task is completed, transfer the data in the cache unit to a designated storage unit, wherein the designated storage unit is the storage unit with the least number of erase times.

7. A storage device according to claim 1, characterized in that, The storage device includes a flash memory chip, which includes multiple storage planes, wherein the storage unit is a storage block or super block of the flash memory chip, wherein the super block includes multiple storage blocks with the same number and originating from different storage planes.

8. A control method for a storage device, based on a storage device as described in claim 1, characterized in that, The control method comprises the following steps: When reading data from the storage device, obtaining a risk factor of a physical address of a storage unit, wherein the risk factor includes the number of error bits of the read data, the number of rereads of the read data, and the number of erases of the storage unit; Classifying the physical addresses in the storage unit into normal read / write addresses, risky read / write addresses, or high-risk read / write addresses according to the risk coefficients of the physical addresses of the storage unit; and If the risk coefficient of the read data reaches a threshold when reading data, the physical address where the data is read is marked as the high-risk read / write address, and after reading part or all of the data, the data at the high-risk read / write address is copied to the normal read / write address.

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