Calculation performance optimization method and device, equipment, storage medium and program product

Abstract

The invention relates to a calculation performance optimization method and device, equipment, a storage medium and a program product. The method comprises the following steps: in the process of carrying out matrix three-diagonalization on a target matrix, firstly, obtaining the current operation stage of the target matrix, then, distributing thread blocks according to the current operation stage of the target matrix, and finally, carrying out operation on the target matrix in different operation stages of matrix three-diagonalization by utilizing the distributed thread blocks, the thread block distribution modes corresponding to the operation stages are different. By adopting the method, different modes of thread block distribution can be carried out in different operation stages of matrix three diagonalization according to the target matrix, so that the thread block distribution mode of each operation stage can be matched with the matrix characteristics and the operation characteristics of each operation stage, and the thread block distribution modes are more flexible; therefore, the calculation speed and efficiency of matrix three-diagonalization are improved, and calculation performance optimization is achieved.

Description

Technical Field

[0001] The present application relates to the technical field of computing performance optimization, and in particular to a computing performance optimization method, device, equipment, storage medium and program product. Background Art

[0002] Physical and chemical simulation software is a type of computer program widely used in scientific research, education and industry to simulate and analyze physical and chemical processes. In physical and chemical simulation software, eigenvalue solving plays a very important role. In the algorithm for solving eigenvalues, it is usually necessary to convert the original symmetric matrix / Hermite matrix into a real symmetric tridiagonal matrix, that is, the matrix tridiagonalization process.

[0003] However, the existing matrix tridiagonalization algorithms do not perform well enough when applied on heterogeneous accelerator cards and cannot meet the needs of various applications. Summary of the invention

[0004] Based on this, it is necessary to provide a computing performance optimization method, device, equipment, storage medium and program product that can improve the performance of matrix tridiagonalization operations on heterogeneous acceleration cards in response to the above technical problems.

[0005] In a first aspect, the present application provides a computing performance optimization method, the method comprising:

[0006] In the process of tridiagonalizing the target matrix, the current operation stage of the target matrix is ​​obtained;

[0007] Allocate thread blocks according to the current operation stage of the target matrix;

[0008] The target matrix is ​​operated by using the allocated thread blocks in different operation stages of matrix tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

[0009] In the above embodiment, in the process of performing matrix tridiagonalization on the target matrix, first, the current operation stage of the target matrix is ​​obtained, then the thread blocks are allocated according to the current operation stage of the target matrix, and finally, the target matrix is ​​operated using the allocated thread blocks at different operation stages of the matrix tridiagonalization, wherein the thread block allocation method corresponding to each operation stage is different. In this way, different thread block allocation methods can be performed according to the target matrix at different operation stages of the matrix tridiagonalization, so that the thread block allocation method of each operation stage can match the matrix characteristics and operation characteristics of each operation stage, and the thread block allocation method is more flexible, thereby improving the calculation speed and efficiency of the matrix tridiagonalization and optimizing the calculation performance.

[0010] In one embodiment, allocating thread blocks according to the current operation stage of the target matrix includes:

[0011] If the current operation stage of the target matrix is ​​a general matrix multiplication operation stage, obtaining a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage;

[0012] Divide the first matrix into a plurality of first matrix blocks, obtain a first number of the first matrix blocks in a row direction, and determine a second number of the first matrix blocks to be assigned thread blocks according to the first number;

[0013] A second number of thread blocks are allocated to the first matrix, and the second number of thread blocks are used to operate on the first matrix block in the upper triangle of the first matrix or the first matrix block in the lower triangle of the first matrix.

[0014] In the above embodiment, it is not necessary to allocate a thread block to each first matrix block of the first matrix. It is only necessary to allocate a thread block to the first matrix blocks in the upper triangle or the lower triangle. By optimizing the allocation method of the thread blocks of the first matrix, the number of allocated thread blocks is reduced, the amount of calculation is reduced, and the calculation efficiency is improved.

[0015] In one embodiment, allocating thread blocks according to the current operation stage of the target matrix includes:

[0016] If the current operation stage of the target matrix is ​​the self-conjugate matrix-vector multiplication operation stage, obtain a second matrix obtained by operating the target matrix in the operation stage before the self-conjugate matrix-vector multiplication operation stage;

[0017] dividing the second matrix into a plurality of second matrix blocks;

[0018] Thread blocks are allocated to the plurality of second matrix blocks according to the matrix size of the second matrix.

[0019] In the above embodiment, in the self-conjugate matrix-vector multiplication operation stage, thread blocks are allocated to multiple second matrix blocks according to the matrix scale of the second matrix, avoiding excessive or insufficient thread block allocation that may be caused by a unified thread block allocation method, and the thread block allocation is more flexible.

[0020] In one embodiment, allocating thread blocks to a plurality of second matrix blocks according to the matrix size of the second matrix includes:

[0021] If the matrix size of the second matrix is ​​greater than or equal to a preset size threshold, obtaining a third number of second matrix blocks in the column direction, allocating a third number of thread blocks to the second matrix, each thread block being used to perform a self-conjugate matrix-vector multiplication operation on a row of the second matrix blocks;

[0022] If the matrix size of the second matrix is ​​smaller than a preset size threshold, a thread block is allocated to each second matrix block of the second matrix.

[0023] In the above embodiment, when the matrix scale of the second matrix is ​​large, a thread block is allocated to each row of the second matrix block to reduce the number of thread blocks, thereby reducing the overhead of switching between thread blocks. When the scale of the second matrix is ​​small, a thread block is allocated to each second matrix block, so that the computing load of each thread block is more balanced, the computing parallelism is higher, and the computing efficiency is improved.

[0024] In one embodiment, if the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, the method further includes:

[0025] Obtain multiple original kernel functions of the general matrix-vector multiplication operation stage, where the original kernel function is the kernel function used in the general matrix-vector multiplication operation stage;

[0026] Determine the dependency relationship between the multiple original kernel functions according to the parameters of the multiple original kernel functions;

[0027] According to the dependency relationship, multiple original kernel functions are fused to obtain the target kernel function;

[0028] Perform general matrix-vector multiplication based on the target kernel function.

[0029] In the above embodiment, the target kernel function is obtained by obtaining the data dependencies of each original kernel function in the general matrix-vector multiplication operation stage, and the general matrix-vector multiplication operation is performed through the target kernel function, which reduces the number of kernel functions and the overhead caused by frequently starting the kernel functions. At the same time, the independent kernel functions are merged, and shared memory is used for data reuse to improve memory access efficiency.

[0030] In one embodiment, multiple original kernel functions are fused according to the dependency relationship to obtain a fused kernel function, including:

[0031] According to the dependency relationship, a plurality of candidate kernel function groups having no dependency relationship are determined from the plurality of original kernel functions;

[0032] Perform fusion processing on multiple candidate kernel function groups respectively to obtain multiple fusion kernel functions;

[0033] The original kernel function that has not been fused among the multiple fused kernel functions and the multiple original kernel functions is used as the target kernel function.

[0034] In the above embodiment, by obtaining the data dependencies of the original kernel functions in the general matrix-vector multiplication operation stage, the original kernel functions that have no dependencies are fused to obtain the target kernel function, thereby reducing the number of kernel functions without affecting the calculation of the original kernel functions.

[0035] In a second aspect, the present application further provides a computing performance optimization device, including: the device includes:

[0036] An acquisition module, used for acquiring the current operation stage of the target matrix during the process of tridiagonalizing the target matrix;

[0037] An allocation module, used to allocate thread blocks according to the current operation stage of the target matrix;

[0038] The operation module is used to use the allocated thread blocks to operate the target matrix in different operation stages of matrix tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

[0039] In a third aspect, the present application further provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the computing performance optimization method described in any one of the first aspects is implemented.

[0040] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the computing performance optimization method described in any one of the first aspects above is implemented.

[0041] In a fifth aspect, the present application also provides a computer program product, including a computer program, which, when executed by a processor, implements the computing performance optimization method described in any one of the first aspects above.

[0042] The above-mentioned computing performance optimization method, device, equipment, storage medium and program product, in the process of tridiagonalizing the target matrix, first obtain the current operation stage of the target matrix, then allocate thread blocks according to the current operation stage of the target matrix, and finally use the allocated thread blocks to operate on the target matrix in different operation stages of the matrix tridiagonalization, wherein the thread block allocation method corresponding to each operation stage is different. In this way, different methods of thread block allocation can be performed according to the target matrix in different operation stages of the matrix tridiagonalization, so that the thread block allocation method of each operation stage can match the matrix characteristics and operation characteristics of each operation stage, and the thread block allocation method is more flexible, thereby improving the calculation speed and efficiency of the matrix tridiagonalization and realizing computing performance optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1A schematic diagram of a flow chart of a computing performance optimization method in one embodiment;

[0045] Figure 2 A schematic diagram of a flow chart of a computing performance optimization method in another embodiment;

[0046] Figure 3 A schematic diagram of a Block Householder algorithm for tridiagonalization of a Hermite matrix in one embodiment;

[0047] Figure 4 is a flowchart of the execution of the Hermite matrix tridiagonalization process in one embodiment;

[0048] Figure 5 A schematic diagram of calculation optimization when updating the tail matrix in one embodiment;

[0049] Figure 6 A schematic diagram of thread block allocation for calculating a lower triangular matrix in a general matrix multiplication operation phase in one embodiment;

[0050] Figure 7 A schematic diagram of a flow chart of a computing performance optimization method in another embodiment;

[0051] Figure 8 A schematic diagram of a flow chart of a computing performance optimization method in another embodiment;

[0052] Fig. 9 A schematic diagram of Hermite matrix block calculation in the self-conjugate matrix-vector multiplication operation stage in one embodiment;

[0053] Fig.10 A schematic diagram of a flow chart of a computing performance optimization method in another embodiment;

[0054] Fig.11 A schematic diagram of a flow chart of a computing performance optimization method in another embodiment;

[0055] Fig.12 A schematic diagram of kernel function fusion in a general matrix-vector multiplication operation stage in one embodiment;

[0056] Fig.13 A diagram showing the running time and acceleration effect before and after matrix tridiagonalization optimization in the rocSOLVER library in one embodiment;

[0057] Fig.14 A comparison chart of matrix tridiagonalization operation performance in three mathematical libraries in one embodiment;

[0058] Fig.15 A comparison chart of simulation software running time before and after matrix tridiagonalization optimization in a rocSOLVER library in one embodiment;

[0059] Fig.16 is a structural block diagram of a computing performance optimization device in one embodiment;

[0060] Fig.17 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0061] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0062] The existing matrix tridiagonalization algorithms do not perform well enough when applied on heterogeneous accelerator cards and cannot meet the needs of various applications. For example, the commonly used linear algebra closed-source math library cuSOLVER, the linear algebra open-source math library MAGMA, and the linear algebra open-source math library rocSOLVER are on GPU platforms. Among them, cuSOLVER cannot be used on heterogeneous accelerator cards, MAGMA does not have enough parallelism, and its performance versatility is relatively poor. The computing power of rocSOLVER cannot meet the needs of various applications.

[0063] In view of this, the present application proposes a computing performance optimization method, which can perform different thread block allocation methods at different operation stages of matrix tridiagonalization according to the target matrix, so that the thread block allocation method of each operation stage can match the matrix characteristics and operation characteristics of each operation stage, and the thread block allocation method is more flexible, thereby improving the calculation speed and efficiency of matrix tridiagonalization and achieving computing performance optimization.

[0064] In an exemplary embodiment, Figure 1 As shown, a computing performance optimization method is provided, which can be applied to a heterogeneous acceleration platform or a heterogeneous acceleration chip. A heterogeneous acceleration platform or a heterogeneous acceleration chip is a technology for improving computer performance by integrating different types of processors, such as CPU, GPU, FPGA, etc., into a platform or chip to achieve more efficient computing and data processing capabilities. The method includes the following steps 101 to 103. Among them:

[0065] Step 101, in the process of tridiagonalizing a target matrix, obtaining the current operation stage of the target matrix.

[0066] Among them, matrix tridiagonalization refers to converting a given matrix, such as a target matrix, into a matrix with a specific structure through a similarity transformation. A matrix with a special structure is a tridiagonal matrix, which is characterized by the fact that except for the elements on the main diagonal and its two adjacent diagonals, all elements in other positions are zero. The matrix tridiagonalization process includes multiple operation stages, and the current operation stage of the target matrix can be obtained according to the operation flow of the target matrix. The target matrix can be a symmetric matrix or a Hermite matrix. The Hermite matrix is ​​a self-conjugate matrix, which is a special symmetric matrix, that is, each element in the i-th row and j-th column of the matrix is ​​equal to the conjugate of the element in the j-th row and i-th column.

[0067] Step 102: Allocate thread blocks according to the current operation stage of the target matrix.

[0068] According to the current operation stage of the target matrix, thread blocks are allocated to the intermediate matrix to be processed in the current operation stage. Optionally, thread blocks can be allocated according to the characteristics of the intermediate matrix. For example, when the intermediate matrix is ​​a Hermite matrix, according to the symmetric characteristics of the Hermite matrix, in order to simplify the calculation of the intermediate matrix, only the upper triangular matrix or the lower triangular matrix data of the intermediate matrix can be accessed during the calculation process. Taking only accessing the lower triangular matrix data as an example, when the data of the upper triangular part of the matrix is ​​needed in the calculation process, it can be obtained by conjugating the read lower triangular matrix data. Therefore, thread blocks can be allocated only to the upper triangular part or the lower triangular part of the intermediate matrix, without allocating thread blocks to the entire intermediate matrix.

[0069] Step 103 : Using the allocated thread blocks to operate on the target matrix in different operation stages of matrix tridiagonalization.

[0070] Among them, the thread block allocation method corresponding to each operation stage is different. Different operation stages operate on the intermediate matrix of their own operation stages according to their own allocated thread blocks. Different operation stages can allocate thread blocks according to the characteristics of their own intermediate matrices, and the thread block allocation method is more flexible.

[0071] In the above embodiment, in the process of performing matrix tridiagonalization on the target matrix, first, the current operation stage of the target matrix is ​​obtained, then the thread blocks are allocated according to the current operation stage of the target matrix, and finally, the target matrix is ​​operated using the allocated thread blocks at different operation stages of the matrix tridiagonalization, wherein the thread block allocation method corresponding to each operation stage is different. In this way, different thread block allocation methods can be performed according to the target matrix at different operation stages of the matrix tridiagonalization, so that the thread block allocation method of each operation stage can match the matrix characteristics and operation characteristics of each operation stage, and the thread block allocation method is more flexible, thereby improving the calculation speed and efficiency of the matrix tridiagonalization and optimizing the calculation performance.

[0072] In one embodiment, thread blocks are allocated according to the current operation stage of the target matrix, such as Figure 2 As shown, including:

[0073] Step 201 , if the current operation stage of the target matrix is ​​a general matrix multiplication operation stage, obtain a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage.

[0074] Among them, the general matrix multiplication operation stage is the operation stage of calculating the general matrix-matrix multiplication. The general matrix-vector multiplication can be abbreviated as gemm. At present, the most widely used algorithm for Hermite matrix tridiagonalization is the BlockHouseholder algorithm. The Householder transformation can convert all elements except the first element in a vector to 0. The Block Householder algorithm divides the k columns of the matrix into Figure 3 The execution flow of a matrix block shown is a cyclic process, such as Figure 4 As shown, it includes two steps. First, Householder transformation is performed column by column in the Hermite matrix block to accumulate the transformation matrix. Then, the tail matrix is ​​updated using the above transformation matrix. The tail matrix is Figure 3 The submatrix B at the tail of the Hermite matrix that has not been Householder transformed is updated with a rank of -2k. The calculation formula for the update is as follows.

[0075] B'=BB-VW T -WV T

[0076] Among them, V and W are the above Figure 3The transformation matrix accumulated when the Householder transformation is performed in the matrix block to the left of the tail matrix B, the result B' after the tail matrix B is updated is still a Hermite matrix, that is, it has a self-conjugate property. The process shown in the above formula can be regarded as: the tail matrix B minus the result of two gemm operations, such as Figure 5 As shown. Each gemm operation can be regarded as the following process: a matrix V with n rows and k columns multiplied by a matrix W with k rows and n columns, the result is a result matrix U with n rows and n columns. Therefore, the "rank-2k update" process when the target matrix updates the tail matrix B can be divided into two gemm calculations, which is the general matrix multiplication operation stage. The first matrix is ​​also the matrix that needs to be processed in the general matrix multiplication operation stage, such as Figure 5 The resulting matrix U is shown.

[0077] Step 202: divide the first matrix into a plurality of first matrix blocks, obtain a first number of the first matrix blocks in the row direction, and determine a second number of the first matrix blocks to be allocated thread blocks according to the first number.

[0078] Optionally, the first matrix is ​​divided into a plurality of first matrix blocks according to a preset size, and a first number of first matrix blocks in a row direction is obtained, for example, the number of first matrix blocks in a first row. In an existing algorithm, after dividing the first matrix into blocks, a thread block is allocated to each first matrix block for operation. However, since the first matrix can only access the upper triangular part or the lower triangular part for calculation, it is not necessary to allocate thread blocks to all first matrix blocks.

[0079] According to the first number, a second number of thread blocks to be allocated is determined. For example, when the first number is m, the second number may be m / 2+1. Taking the calculation of the lower triangular part of the first matrix as an example, thread blocks are allocated according to the first second number of columns of the first matrix. Figure 6 As shown in the middle left figure, the first matrix blocks of the 5 columns on the left of the first matrix are allocated thread blocks, and the first matrix blocks of the 3 columns on the right of the figure are not allocated thread blocks. It can be understood that if the upper triangular part of the first matrix needs to be calculated, the thread blocks can be allocated according to the second number of columns after the first matrix.

[0080] Step 203: Allocate a second number of thread blocks to the first matrix.

[0081] The second number of thread blocks is used to operate on the first matrix block in the upper triangle of the first matrix or the first matrix block in the lower triangle of the first matrix. After the thread block allocation is completed, the thread block is mapped, such as Figure 6As shown, the thread blocks above the diagonal are remapped to the lower right corner of the matrix, so that each first matrix block in the lower triangular part of the first matrix corresponds to each thread block. Optionally, the thread block mapping can map the thread block to the first matrix block that needs to be calculated by modifying the coordinates of the thread block.

[0082] In the above embodiment, it is not necessary to allocate a thread block to each first matrix block of the first matrix. It is only necessary to allocate a thread block to the first matrix blocks in the upper triangle or the lower triangle. By optimizing the allocation method of the thread blocks of the first matrix, the number of allocated thread blocks is reduced, the amount of calculation is reduced, and the calculation efficiency is improved.

[0083] In the embodiment of the present application, the above step 102 can be performed as follows: Figure 7 As shown, including:

[0084] Step 701 , if the current operation stage of the target matrix is ​​the self-conjugate matrix-vector multiplication operation stage, obtain a second matrix obtained by operating the target matrix in the operation stage before the self-conjugate matrix-vector multiplication operation stage.

[0085] Among them, the self-conjugate matrix-vector multiplication operation stage is the operation stage for calculating the multiplication of the self-conjugate matrix and the vector, and the self-conjugate matrix-vector multiplication can be abbreviated as hemv. Usually, the operation stage with the highest time consumption in the tridiagonalization process of the target matrix is ​​the self-conjugate matrix-vector multiplication operation stage. Therefore, in order to improve the computational efficiency of the tridiagonalization process of the target matrix, the thread block allocation method of the self-conjugate matrix-vector multiplication operation stage is optimized. The second matrix is ​​the matrix obtained by the operation stage before the self-conjugate matrix-vector multiplication operation stage, that is, the Hermite matrix that needs to be operated in the self-conjugate matrix-vector multiplication operation stage.

[0086] Step 702: divide the second matrix into a plurality of second matrix blocks.

[0087] The second matrix is ​​divided according to a preset size to obtain a plurality of second matrix blocks. For example, the preset size is 64*64, that is, the second matrix is ​​divided into a plurality of second matrix blocks of a size of 64*64.

[0088] Step 703: Allocate thread blocks to multiple second matrix blocks according to the matrix scale of the second matrix.

[0089] In the process of allocating thread blocks to the second matrix block of the second matrix, if too few thread blocks are allocated, the computational loads between different thread blocks are unbalanced, which may cause some thread blocks to have fast computation speeds and some thread blocks to have slow computation speeds. If more thread blocks are allocated, the computational loads between the thread blocks are more balanced, but the multiplied vectors will be accessed repeatedly, and the overhead of switching between thread blocks will be increased. Therefore, in order to improve the flexibility of thread block allocation, thread blocks can be allocated to multiple second matrix blocks according to the matrix scale of the second matrix. The matrix scale can be the number of rows of the second matrix.

[0090] In the above embodiment, in the self-conjugate matrix-vector multiplication operation stage, thread blocks are allocated to multiple second matrix blocks according to the matrix scale of the second matrix, avoiding excessive or insufficient thread block allocation that may be caused by a unified thread block allocation method, and the thread block allocation is more flexible.

[0091] Optional, such as Figure 8 As shown, the step of allocating thread blocks to the plurality of second matrix blocks may include:

[0092] Step 801: If the matrix size of the second matrix is ​​greater than or equal to a preset size threshold, a third number of second matrix blocks in the column direction is obtained, and a third number of thread blocks are allocated to the second matrix.

[0093] Wherein, each thread block is used to perform a self-conjugate matrix-vector multiplication operation on a row of second matrix blocks. If the matrix scale of the second matrix is ​​relatively large, such as being greater than or equal to a preset scale threshold, optionally, the preset scale threshold may be 6500, that is, when n>=6500, due to the large scale of the second matrix, in order to avoid too many divided thread blocks, the number of second matrix blocks in the column direction of the second matrix is ​​obtained as a third number, and thread blocks are allocated to the second matrix according to the third number, that is, all second matrix blocks in a row are allocated one thread block. The preset scale threshold may be adjusted according to different hardware conditions and environmental requirements, and the embodiment of the present application does not limit this.

[0094] Optional, such as Fig. 9 , which is a schematic diagram of each thread block in the allocation method of step 801. Fig. 9 There are 5 thread blocks from thread block 0 to thread block 4, and each thread block is used to calculate a row of matrix blocks. The specific calculation process of each thread block includes: first calculate the diagonal block, that is, Fig. 9 The green blocks at the diagonal of the second matrix are then calculated one by one for each off-diagonal block in the row, that is, Fig. 9 The blue block of the second matrix in .

[0095] When the second matrix block is a diagonal block, the Hermite matrix self-conjugate property is used to obtain the element values ​​above the diagonal, and then multiply with the corresponding vector block, and write the calculation result to the intermediate result buffer. When the second matrix block is a non-diagonal block, the matrix-vector multiplication result of the second matrix block and the corresponding vector block is first calculated and written to the intermediate result buffer, and then the second matrix block is conjugate transposed, and then the matrix-vector multiplication is performed with the corresponding vector block, and the intermediate result is written to the buffer. Finally, the intermediate results are summarized and written into the result vector.

[0096] Step 802: If the matrix size of the second matrix is ​​smaller than a preset size threshold, a thread block is allocated to each second matrix block of the second matrix.

[0097] If the matrix size of the second matrix is ​​smaller than the above-mentioned preset size threshold, that is, n<6500, in order to improve the computational parallelism of each thread block and make the computational load of each thread block more balanced, a thread block is allocated to each second matrix block of the second matrix, and each thread block calculates a second matrix block to fully utilize the computing power of the heterogeneous accelerator card. The calculation method within a single matrix block is as above. Fig. 9 Similar.

[0098] In the above embodiment, when the matrix scale of the second matrix is ​​large, a thread block is allocated to each row of the second matrix block to reduce the number of thread blocks, thereby reducing the overhead of switching between thread blocks. When the scale of the second matrix is ​​small, a thread block is allocated to each second matrix block, so that the computing load of each thread block is more balanced, the computing parallelism is higher, and the computing efficiency is improved.

[0099] In one embodiment, if the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, such as Fig.10 As shown, the method also includes:

[0100] Step 1001, obtaining multiple original kernel functions of the general matrix-vector multiplication operation stage.

[0101] The general matrix-vector multiplication operation stage is the operation stage for calculating the product of a general matrix and a vector. The general matrix-vector multiplication can be referred to as gemv. The original kernel function is the kernel function used in the general matrix-vector multiplication operation stage. Figure 4In the tridiagonalization process within the matrix block shown in , the tridiagonalization process within the matrix block is a process of performing Householder transformation column by column. Each time a Householder transformation is performed on a column of the target matrix, four general matrix-vector multiplication operations and one self-conjugate matrix-vector multiplication operation are required. These two operation stages are the interfaces with the highest time consumption in the tridiagonalization process within the matrix block. Among them, the thread block allocation optimization method of the self-conjugate matrix-vector multiplication operation is as described in the above embodiment, and this embodiment is used to optimize the computing performance of the general matrix-vector multiplication operation.

[0102] Step 1002: Determine the dependency relationship between the multiple original kernel functions according to the parameters of the multiple original kernel functions.

[0103] The parameters of multiple original kernel functions are obtained, such as input parameters and output parameters of each original kernel function, and the dependency relationship between the multiple original kernel functions is determined. The dependency relationship may be whether multiple original kernel functions need to call the same data, and whether a certain original kernel function needs the calculation results of other original kernel functions.

[0104] Taking the four general matrix-vector multiplication operations in the above text as an example, the original kernel function of the four calculations can be expressed by the following formula.

[0105] t1 = W T v (1)

[0106] z=z+Vt1 (2)

[0107] t2 = V T v (3)

[0108] z=z+Wt2 (4)

[0109] Among them, capital letters represent matrices and lowercase letters represent vectors. From the above formula, we can see that the original kernel function (2) depends on the calculation result of the original kernel function (1), and the original kernel function (4) depends on the calculation result of the original kernel function (3). Therefore, the original kernel function (2) must be calculated after the original kernel function (1), and the original kernel function (4) must be calculated after the original kernel function (3). There is no data dependency between the original kernel function (1) and the original kernel function (3), and there is no data dependency between the original kernel function (2) and the original kernel function (4).

[0110] Step 1003: According to the dependency relationship, multiple original kernel functions are fused to obtain a target kernel function.

[0111] Among them, the target kernel function is the kernel function obtained by fusing multiple original kernel functions. By fusing the original kernel functions, the number of kernel functions can be reduced. Since most of the original kernel functions have a short execution time but a large number of cycles, the startup overhead of the kernel function increases in small-scale examples. Therefore, by reducing the number of kernel functions, the startup overhead of the kernel function is reduced.

[0112] Optionally, according to the dependency relationship, multiple original kernel functions are fused to obtain the fused kernel function. Fig.11 As shown, including:

[0113] Step 1101 : determining a plurality of candidate kernel function groups having no dependency relationship from a plurality of original kernel functions according to the dependency relationship.

[0114] Among them, according to the original kernel function exemplified in the above embodiment, two candidate kernel function groups with no dependency relationship can be obtained, such as [original kernel function (1), original kernel function (3)], and [original kernel function (2), original kernel function (4)].

[0115] Step 1102: fuse each of the multiple candidate kernel function groups to obtain multiple fused kernel functions.

[0116] The original kernel functions in each candidate kernel function group are fused, that is, the original kernel function (1) and the original kernel function (3) are fused to obtain a fused kernel function A, and the original kernel function (2) and the original kernel function (4) are fused to obtain another fused kernel function B.

[0117] In a heterogeneous accelerator card, the storage structure generally includes global memory, shared memory, and registers. The speed of data access increases from global memory, shared memory to registers, and the storage space decreases. Therefore, in order to improve the efficiency of access and storage, the number of times the global memory is accessed can be minimized.

[0118] Since there is no data dependency between the original kernel function (1) and the original kernel function (3), they can be calculated simultaneously, and both the original kernel function (1) and the original kernel function (3) need to read the vector v. Without fusion, the original kernel function (1) and the original kernel function (3) each need to read the vector v in sequence, that is, read the vector v twice in total. After fusion, only v needs to be read once, which realizes data reuse and reduces the number of memory accesses. The original kernel function (2) and the original kernel function (4) need to accumulate the calculation results to the vector z in turn. Vt1 and Wt2 can be calculated simultaneously. After the original kernel function (2) and the original kernel function (4) are fused, only z needs to be read once from the global memory, stored in the register or shared memory, and then z is updated twice and written back to the global memory. While realizing the parallel calculation of the original kernel function (2) and the original kernel function (4), the number of global memory accesses is reduced, thereby improving the efficiency of data access. The schematic diagram of the fusion of the original kernel functions can be shown as follows. Fig.12 shown.

[0119] Step 1103: Use the original kernel function that has not been fused among the multiple fused kernel functions and the multiple original kernel functions as the target kernel function.

[0120] Optionally, if the original kernel function obtained includes an original kernel function that has a dependency relationship with other original kernel functions, the original kernel function is not fused. The original kernel function that cannot be fused with other original kernel functions and the multiple fused kernel functions obtained by fusion are used as the target kernel function, and a general matrix-vector multiplication operation is performed according to the target kernel function.

[0121] Step 1004, performing a general matrix-vector multiplication operation based on the target kernel function.

[0122] Optionally, after the fusion processing of the original kernel function in the above example, the four calls of the original kernel function are merged into two calls of the fused kernel function, which increases the computational parallelism and reduces the number of kernel function startups. Optionally, on this basis, further optimization can be performed by merging the above multiple fused kernel functions into a target kernel function. After the original kernel function (1) and the original kernel function (3) are calculated, the target kernel function performs thread synchronization within the thread block. Each thread block stores the read matrix data W, V and the calculation results t1, t2 in the shared memory. After all threads reach the synchronization position, the original kernel function (2) and the original kernel function (4) are calculated to avoid re-reading W, V and t1, t2 from the global memory.

[0123] In the above embodiment, by obtaining the data dependencies of each original kernel function in the general matrix-vector multiplication operation stage, the original kernel functions that have no dependencies are fused to obtain a target kernel function, and the general matrix-vector multiplication operation is performed through the target kernel function, which reduces the number of kernel functions and the overhead caused by frequently starting the kernel functions. At the same time, the independent kernel functions are fused, and shared memory is used for data reuse to improve memory access efficiency.

[0124] In the embodiment of the present application, the matrix tridiagonalization process is optimized based on the rocSOLVER library on the heterogeneous accelerator card platform, and the efficiency of the above-mentioned computing performance optimization method is verified through simulation experiments. The optimized performance is 2-3 times that of the original implementation of the rocSOLVER library, and the solution performance is significantly better than the open source MAGMA algorithm, reaching 50%-80% of the cuSOLVER library on V100. By optimizing the performance of matrix tridiagonalization, the efficiency of solving the Hermite matrix eigenvalue problem on the general heterogeneous accelerator card platform is also greatly improved.

[0125] like Fig.13 As shown in the figure, the line graph shows the running time comparison of the matrix tridiagonalization interface hetrd in the rocSOLVER library before and after optimization, and the bar graph shows the speedup ratio of the performance after optimization relative to that before optimization. The z in zhetrd represents the data type of complex double precision. It can be seen from the figure that the performance of the optimized matrix tridiagonalization has been improved in different scale examples, and the running performance has reached 2-3 times that before optimization.

[0126] like Fig.14 The figure shows the performance comparison of three math libraries, rocSOLVER, MAGMA, and cuSOLVER, for solving the Hermite matrix tridiagonalization problem at different problem scales. The data of rocSOLVER and MAGMA are the test results on heterogeneous accelerator cards, and the data of cuSOLVER are the test results on V100. The figure not only shows the solution running time of the three math libraries hetrd (the interface for converting Hermite matrices to symmetric tridiagonal matrices in the commonly used math libraries), but also shows the performance percentage of the MAGMA library and the optimized rocSOLVER library to the performance percentage of the cuSOLVER library. Fig.14 It can be found that the performance of the optimized rocSOLVER is significantly better than that of the MAGMA library, which is about 3-6 times that of the MAGMA library and 55%-80% of the performance of cuSOLVER on V100.

[0127] Applied to physical and chemical simulation software, such as Fig.15As shown in the figure, the rocSOLVER library optimized according to the above calculation performance optimization method is applied to examples of different problem sizes, and the performance improvement can be about 10%. The heevd eigenvalue solution time of the MAGMA library accounts for about 7% of the overall running time of the example; the heevd solution time of the optimized rocSOLVER library accounts for about 2% of the overall running time of the example.

[0128] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0129] Based on the same inventive concept, the embodiment of the present application also provides a computing performance optimization device for implementing the computing performance optimization method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in one or more computing performance optimization device embodiments provided below can refer to the limitations on the computing performance optimization method above, and will not be repeated here.

[0130] In an exemplary embodiment, Fig.16 As shown, a computing performance optimization device 1600 is provided, including: an acquisition module 1601, an allocation module 1602 and a calculation module 1603, wherein:

[0131] An acquisition module 1601 is used to acquire the current operation stage of the target matrix during the process of tridiagonalizing the target matrix;

[0132] An allocation module 1602 is used to allocate thread blocks according to the current operation stage of the target matrix;

[0133] The operation module 1603 is used to use the allocated thread blocks to operate the target matrix in different operation stages of matrix tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

[0134] In one embodiment, the allocation module 1602 is specifically used to obtain a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage if the current operation stage of the target matrix is ​​a general matrix multiplication operation stage; divide the first matrix into multiple first matrix blocks, obtain a first number of first matrix blocks in the row direction, and determine a second number of first matrix blocks to be allocated thread blocks based on the first number; allocate a second number of thread blocks to the first matrix, and the second number of thread blocks are used to operate on the first matrix blocks in the upper triangle of the first matrix or the first matrix blocks in the lower triangle of the first matrix.

[0135] In one embodiment, the allocation module 1602 is specifically used to obtain a second matrix obtained by operating the target matrix in an operation stage before the self-conjugate matrix-vector multiplication operation stage if the current operation stage of the target matrix is ​​a self-conjugate matrix-vector multiplication operation stage; divide the second matrix into multiple second matrix blocks; and allocate thread blocks to the multiple second matrix blocks according to the matrix scale of the second matrix.

[0136] In one embodiment, the allocation module 1602 is specifically used to obtain a third number of second matrix blocks in the column direction if the matrix scale of the second matrix is ​​greater than or equal to a preset scale threshold, and allocate a third number of thread blocks to the second matrix, each thread block being used to perform a self-conjugate matrix-vector multiplication operation on a row of second matrix blocks; if the matrix scale of the second matrix is ​​less than the preset scale threshold, allocate a thread block to each second matrix block of the second matrix.

[0137] In one of the embodiments, if the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, the device also includes a fusion module, which is used to obtain multiple original kernel functions of the general matrix-vector multiplication operation stage, and the original kernel function is the kernel function used in the general matrix-vector multiplication operation stage; according to the parameters of the multiple original kernel functions, the dependency relationship between the multiple original kernel functions is determined; according to the dependency relationship, the multiple original kernel functions are fused to obtain the target kernel function; and the general matrix-vector multiplication operation is performed based on the target kernel function.

[0138] In one of the embodiments, the fusion module is specifically used to determine multiple candidate kernel function groups that have no dependency relationship from multiple original kernel functions based on the dependency relationship; fuse the multiple candidate kernel function groups separately to obtain multiple fused kernel functions; and use the original kernel functions that have not been fused among the multiple fused kernel functions and the multiple original kernel functions as the target kernel function.

[0139] Each module in the computing performance optimization device can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0140] In an exemplary embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as shown in FIG. Fig.17 As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store matrix calculation data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a computing performance optimization method is implemented.

[0141] Those skilled in the art will understand that Fig.17 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0142] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the following steps when executing the computer program: in the process of tridiagonalizing a target matrix, obtaining a current operation stage of the target matrix; allocating thread blocks according to the current operation stage of the target matrix; and using the allocated thread blocks to operate on the target matrix in different operation stages of the tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

[0143] In one embodiment, the processor further implements the following steps when executing the computer program: if the current operation stage of the target matrix is ​​a general matrix multiplication operation stage, obtain a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage; divide the first matrix into multiple first matrix blocks, obtain a first number of first matrix blocks in the row direction, and determine a second number of first matrix blocks to be allocated thread blocks based on the first number; allocate a second number of thread blocks to the first matrix, and the second number of thread blocks are used to operate on the first matrix blocks in the upper triangle of the first matrix or the first matrix blocks in the lower triangle of the first matrix.

[0144] In one embodiment, when the processor executes the computer program, the following steps are also implemented: if the current operation stage of the target matrix is ​​a self-conjugate matrix-vector multiplication operation stage, obtain a second matrix obtained by operating the target matrix in an operation stage before the self-conjugate matrix-vector multiplication operation stage; divide the second matrix into multiple second matrix blocks; and allocate thread blocks to the multiple second matrix blocks according to the matrix scale of the second matrix.

[0145] In one embodiment, when the processor executes the computer program, the following steps are also implemented: if the matrix scale of the second matrix is ​​greater than or equal to a preset scale threshold, a third number of second matrix blocks in the column direction are obtained, and a third number of thread blocks are allocated to the second matrix, each thread block is used to perform a self-conjugate matrix-vector multiplication operation on a row of second matrix blocks; if the matrix scale of the second matrix is ​​less than the preset scale threshold, a thread block is allocated to each second matrix block of the second matrix.

[0146] In one embodiment, if the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, the processor also implements the following steps when executing the computer program: obtaining multiple original kernel functions of the general matrix-vector multiplication operation stage, the original kernel function is the kernel function used in the general matrix-vector multiplication operation stage; determining the dependency relationship between the multiple original kernel functions based on the parameters of the multiple original kernel functions; based on the dependency relationship, fusing the multiple original kernel functions to obtain the target kernel function; and performing a general matrix-vector multiplication operation based on the target kernel function.

[0147] In one embodiment, when the processor executes the computer program, the following steps are also implemented: based on the dependency relationship, multiple candidate kernel function groups that do not have a dependency relationship are determined from multiple original kernel functions; the multiple candidate kernel function groups are each fused to obtain multiple fused kernel functions; and the original kernel functions that have not been fused among the multiple fused kernel functions and the multiple original kernel functions are used as target kernel functions.

[0148] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented: in the process of tridiagonalizing a target matrix, obtaining the current operation stage of the target matrix; allocating thread blocks according to the current operation stage of the target matrix; and using the allocated thread blocks to operate on the target matrix in different operation stages of the tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

[0149] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: if the current operation stage of the target matrix is ​​a general matrix multiplication operation stage, obtain a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage; divide the first matrix into multiple first matrix blocks, obtain a first number of first matrix blocks in the row direction, and determine a second number of first matrix blocks to be allocated thread blocks based on the first number; allocate a second number of thread blocks to the first matrix, and the second number of thread blocks are used to operate on the first matrix blocks in the upper triangle of the first matrix or the first matrix blocks in the lower triangle of the first matrix.

[0150] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: if the current operation stage of the target matrix is ​​a self-conjugate matrix-vector multiplication operation stage, obtain a second matrix obtained by operating the target matrix in an operation stage before the self-conjugate matrix-vector multiplication operation stage; divide the second matrix into multiple second matrix blocks; and allocate thread blocks to the multiple second matrix blocks according to the matrix scale of the second matrix.

[0151] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: if the matrix scale of the second matrix is ​​greater than or equal to a preset scale threshold, a third number of second matrix blocks in the column direction is obtained, and a third number of thread blocks are allocated to the second matrix, each thread block is used to perform a self-conjugate matrix-vector multiplication operation on a row of second matrix blocks; if the matrix scale of the second matrix is ​​less than the preset scale threshold, a thread block is allocated to each second matrix block of the second matrix.

[0152] In one embodiment, if the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, the computer program also implements the following steps when executed by the processor: obtaining multiple original kernel functions of the general matrix-vector multiplication operation stage, the original kernel function is the kernel function used in the general matrix-vector multiplication operation stage; determining the dependency relationship between the multiple original kernel functions based on the parameters of the multiple original kernel functions; fusing the multiple original kernel functions based on the dependency relationship to obtain the target kernel function; and performing a general matrix-vector multiplication operation based on the target kernel function.

[0153] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: based on the dependency relationship, multiple candidate kernel function groups that do not have a dependency relationship are determined from multiple original kernel functions; the multiple candidate kernel function groups are each fused to obtain multiple fused kernel functions; and the original kernel functions that have not been fused among the multiple fused kernel functions and the multiple original kernel functions are used as target kernel functions.

[0154] In one embodiment, a computer program product is provided, including a computer program, which, when executed by a processor, implements the following steps: in the process of tridiagonalizing a target matrix, obtaining a current operation stage of the target matrix; allocating thread blocks according to the current operation stage of the target matrix; and using the allocated thread blocks to operate on the target matrix in different operation stages of the tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

[0155] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: if the current operation stage of the target matrix is ​​a general matrix multiplication operation stage, obtain a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage; divide the first matrix into multiple first matrix blocks, obtain a first number of first matrix blocks in the row direction, and determine a second number of first matrix blocks to be allocated thread blocks based on the first number; allocate a second number of thread blocks to the first matrix, and the second number of thread blocks are used to operate on the first matrix blocks in the upper triangle of the first matrix or the first matrix blocks in the lower triangle of the first matrix.

[0156] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: if the current operation stage of the target matrix is ​​a self-conjugate matrix-vector multiplication operation stage, obtain a second matrix obtained by operating the target matrix in an operation stage before the self-conjugate matrix-vector multiplication operation stage; divide the second matrix into multiple second matrix blocks; and allocate thread blocks to the multiple second matrix blocks according to the matrix scale of the second matrix.

[0157] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: if the matrix scale of the second matrix is ​​greater than or equal to a preset scale threshold, a third number of second matrix blocks in the column direction is obtained, and a third number of thread blocks are allocated to the second matrix, each thread block is used to perform a self-conjugate matrix-vector multiplication operation on a row of second matrix blocks; if the matrix scale of the second matrix is ​​less than the preset scale threshold, a thread block is allocated to each second matrix block of the second matrix.

[0158] In one embodiment, if the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, the computer program also implements the following steps when executed by the processor: obtaining multiple original kernel functions of the general matrix-vector multiplication operation stage, the original kernel function is the kernel function used in the general matrix-vector multiplication operation stage; determining the dependency relationship between the multiple original kernel functions based on the parameters of the multiple original kernel functions; fusing the multiple original kernel functions based on the dependency relationship to obtain the target kernel function; and performing a general matrix-vector multiplication operation based on the target kernel function.

[0159] In one embodiment, when the computer program is executed by a processor, the following steps are also implemented: based on the dependency relationship, multiple candidate kernel function groups that do not have a dependency relationship are determined from multiple original kernel functions; the multiple candidate kernel function groups are each fused to obtain multiple fused kernel functions; and the original kernel functions that have not been fused among the multiple fused kernel functions and the multiple original kernel functions are used as target kernel functions.

[0160] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0161] Those of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0162] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0163] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A computing performance optimization method, characterized in that: The method comprises: In the process of performing matrix tridiagonalization on a target matrix, obtaining a current operation stage of the target matrix; Allocating thread blocks according to the current operation stage of the target matrix; The target matrix is ​​operated by using the allocated thread blocks in different operation stages of matrix tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

2. The method according to claim 1, characterized in that The allocating thread blocks according to the current operation stage of the target matrix includes: If the current operation stage of the target matrix is ​​a general matrix multiplication operation stage, obtaining a first matrix obtained by operating the target matrix in an operation stage before the general matrix multiplication operation stage; Divide the first matrix into a plurality of first matrix blocks, obtain a first number of the first matrix blocks in a row direction, and determine a second number of the first matrix blocks to be allocated thread blocks according to the first number; The second number of thread blocks is allocated to the first matrix, and the second number of thread blocks is used to operate the first matrix block in the upper triangle of the first matrix or the first matrix block in the lower triangle of the first matrix.

3. The method according to claim 1, characterized in that The allocating thread blocks according to the current operation stage of the target matrix includes: If the current operation stage of the target matrix is ​​a self-conjugate matrix-vector multiplication operation stage, obtaining a second matrix obtained by operating the target matrix in an operation stage before the self-conjugate matrix-vector multiplication operation stage; dividing the second matrix into a plurality of second matrix blocks; Thread blocks are allocated to the plurality of second matrix blocks according to the matrix size of the second matrix.

4. The method according to claim 3, characterized in that The allocating thread blocks to the plurality of second matrix blocks according to the matrix scale of the second matrix comprises: If the matrix size of the second matrix is ​​greater than or equal to a preset size threshold, obtaining a third number of second matrix blocks in the column direction, allocating the third number of thread blocks to the second matrix, each thread block being used to perform a self-conjugate matrix-vector multiplication operation on a row of the second matrix blocks; If the matrix size of the second matrix is ​​smaller than the preset size threshold, a thread block is allocated to each of the second matrix blocks of the second matrix.

5. The method according to claim 1, characterized in that If the current operation stage of the target matrix is ​​a general matrix-vector multiplication operation stage, the method further includes: Acquire multiple original kernel functions of the general matrix-vector multiplication operation stage, where the original kernel functions are kernel functions used in the general matrix-vector multiplication operation stage; Determining the dependency relationship between the multiple original kernel functions according to the parameters of the multiple original kernel functions; According to the dependency relationship, the multiple original kernel functions are fused to obtain a target kernel function; A general matrix-vector multiplication operation is performed based on the target kernel function.

6. The method according to claim 5, characterized in that The fusing the multiple original kernel functions according to the dependency relationship to obtain a fused kernel function includes: According to the dependency relationship, determining a plurality of candidate kernel function groups having no dependency relationship from the plurality of original kernel functions; Performing fusion processing on each of the plurality of candidate kernel function groups to obtain a plurality of fused kernel functions; The original kernel function that has not been fused among the multiple fused kernel functions and the multiple original kernel functions is used as the target kernel function.

7. A computing performance optimization device, characterized in that: The device comprises: An acquisition module, used for acquiring a current operation stage of a target matrix during a process of performing matrix tridiagonalization on the target matrix; An allocation module, configured to allocate thread blocks according to a current operation stage of the target matrix; The operation module is used to use the allocated thread blocks to operate the target matrix in different operation stages of matrix tridiagonalization, wherein the thread blocks corresponding to each operation stage are allocated in a different manner.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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