Power factor correction and DC-DC multiplexing converter

Abstract

The invention provides a power factor correction and DC-DC multiplexing converter which is characterized in that one end of an inductor is connected to commercial power through a first mechanical switch and is connected to the positive electrode of a battery through a second mechanical switch; the first rectifier bridge arm and the second rectifier bridge arm are respectively connected between a first node and a second node, the first rectifier bridge arm is provided with a first intermediate node, the first intermediate node is connected to the other end of the inductor, the second rectifier bridge arm is provided with a second intermediate node, and the second intermediate node is connected to a neutral point; the first semiconductor switch controls conduction between the first node and the second node; the second semiconductor switch controls the conduction between the second node and the negative direct current bus; the third semiconductor switch controls the conduction between the neutral point and the negative electrode of the battery; the positive direct current bus and the negative direct current bus are used for providing direct current output. The multiplexing converter provided by the invention has better EMC performance, and meanwhile, the utilization rate of the inductor is improved.

Description

Technical Field

[0001] The invention belongs to the field of power electronics, and in particular relates to a power factor correction and DC-DC multiplexing converter. Background Art

[0002] An uninterruptible power supply (UPS) is an uninterruptible power supply containing an energy storage device. It is used to instantly switch to a battery to provide continuous power to the load when the mains power supply is abnormal, so as to protect the load from damage caused by a mains power outage. Therefore, it is widely used in industrial, commercial and consumer fields. Currently, a development direction of uninterruptible power supplies that has attracted much attention is to reduce the number of batteries (for example, designing them as single batteries), reduce the battery voltage, and avoid introducing a neutral line in the battery circuit. This type of uninterruptible power supply generally includes an AC-DC power factor control (PFC) circuit that converts the AC power input from the AC input end into DC power, and a DC-DC circuit that discharges from the battery. There are currently two design directions in the industry for single-battery uninterruptible power supplies. The first is to separately design the above-mentioned AC-DC power factor control circuit and the DC-DC circuit for battery discharge. Obviously, the uninterruptible power supply designed in this way is bulky and the cost is increased. The second design reuses the AC-DC power factor control (PFC) circuit with the battery discharge DC-DC circuit, reducing the number of power devices and reducing the size. However, some existing reuse designs have the following defects: when in battery mode, the lines connected to the positive and negative poles of the battery have high-frequency potential jumps and poor electromagnetic compatibility (EMC), so two clamping diodes are required. However, after adding the diode, one inductor is short-circuited in battery mode, causing the inductor to overheat. Summary of the invention

[0003] To solve the above problems, the present invention provides a power factor correction and DC-DC multiplexing converter, which does not cause EMC problems and the problems of inductor overheating and low inductor utilization rate after adding clamping diodes in battery discharge mode.

[0004] The present invention provides a power factor correction and DC-DC multiplexing converter, comprising: a first mechanical switch RY1, used to connect the converter to the mains; a second mechanical switch RY2, used to connect the converter to a battery; an inductor L1, one end of which is connected to the mains through the first mechanical switch RY1, and is connected to the positive electrode of the battery B21 through the second mechanical switch RY2; a first node N1 and a second node N2; a first rectifier bridge arm 213, connected between the first node N1 and the second node N2, the first rectifier bridge arm 213 having a first intermediate node N3, the first intermediate node N3 being connected to the other end of the inductor L1; a second rectifier bridge arm 214, connected between the first node N1 and the second node N2, the second rectifier bridge arm 214 having a second intermediate node N4, the second intermediate node N4 being connected to a neutral point N5; a first semiconductor switch Q1, connected between the first node N1 and the second node N2; a first rectifier bridge arm 214, connected between the first node N1 and the second node N2, the second rectifier bridge arm 214 having a second intermediate node N4, the second intermediate node N4 being connected to a neutral point N5; a first semiconductor switch Q1, connected between the first node N1 and the second node N2, controlling the conduction between the first node N1 and the second node N2; the positive DC bus 211 and the negative DC bus 212, for providing a DC output; a first diode D6, connected between the first node N1 and the positive DC bus 211; a second semiconductor switch Q2, connected between the second node N2 and the negative DC bus 212, for controlling the conduction between the second node N2 and the negative DC bus 212; a first capacitor C211, connected between the positive DC bus 211 and the neutral point N5; a second capacitor C212, connected between the neutral point N5 and the negative DC bus 212; a third semiconductor switch Q3, connected between the neutral point N5 and the negative electrode of the battery B21, for controlling the conduction between the neutral point N5 and the negative electrode of the battery B21; and a second diode D5, connected between the negative DC bus 212 and the negative electrode of the battery B21.

[0005] Optionally, conduction between the second node N2 and the negative DC bus 212 is controlled, and conduction between the negative DC bus 212 and the second node N2 is uncontrolled.

[0006] Optionally, the second semiconductor switch Q2 is a transistor with a diode connected in anti-parallel.

[0007] Optionally, the second semiconductor switch Q2 is connected between the second node N2 and the negative DC bus 212, including: a first pole of the second semiconductor switch Q2 is connected to the negative DC bus 212, and a second pole of the second semiconductor switch Q2 is connected to the second node N2.

[0008] Optionally, the first semiconductor switch Q1 and the third semiconductor switch Q3 are transistors.

[0009] Optionally, the first semiconductor switch Q1 is connected between the first node N1 and the second node N2, including: a first electrode of the first semiconductor switch Q1 is connected to the second node N2, and a second electrode of the first semiconductor switch Q1 is connected to the first node N1.

[0010] Optionally, the third semiconductor switch Q3 is connected between the neutral point N5 and the negative electrode of the battery B21, including: a first electrode of the third semiconductor switch Q3 is connected to the negative electrode of the battery B21, and a second electrode of the third semiconductor switch Q3 is connected to the neutral point N5.

[0011] Optionally, the transistor is a MOSFET tube or an IGBT tube.

[0012] Optionally, the first rectifier bridge arm 213 is connected between the first node N1 and the second node N2, and includes: the first rectifier bridge arm 213 includes a third diode D1 and a fourth diode D3, wherein the cathode of the third diode D1 is connected to the first node N1, the anode of the third diode D1 is connected to the cathode of the fourth diode D3, and the anode of the fourth diode D3 is connected to the second node N2.

[0013] Optionally, the second rectifier bridge arm 214 is connected between the first node N1 and the second node N2, and includes: the second rectifier bridge arm 214 includes a fifth diode D2 and a sixth diode D4, wherein the cathode of the fifth diode D2 is connected to the first node N1, the anode D2 of the fifth diode is connected to the cathode of the sixth diode D4, and the anode of the sixth diode D4 is connected to the second node N2.

[0014] The converter of the embodiment of the present invention has only one inductor, and the inductor utilization rate is high, which saves the cost and space of the inductor. The battery discharge DC-DC circuit and the mains PFC circuit are reused well, saving the volume and cost of the whole machine. In the battery discharge mode, the potential of the battery line will not have high-frequency jumps, which improves the EMC performance and solves the problems of inductor overheating and low inductor utilization rate after adding the clamping diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of a multiplexing circuit 11 of an AC-DC power factor control (PFC) circuit of an uninterruptible power supply and a battery discharge DC-DC circuit;

[0016] Figure 2 yes Figure 1 A schematic diagram of current flow direction of the multiplexing circuit 11 in a positive half-cycle working state in battery mode;

[0017] Figure 3 Shows Figure 1 The pulse width modulation control signal of the circuit shown in the battery mode working state and the current waveform of the corresponding device;

[0018] Figure 4 is a schematic diagram of a power factor correction (PFC) and DC-DC multiplexing circuit according to an embodiment of the present invention;

[0019] Figure 5 is a schematic diagram of a power factor correction (PFC) and DC-DC multiplexing circuit according to an embodiment of the present invention connected to a single-phase alternating current power source AC (mains power) or a battery B21;

[0020] Figure 6a Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the inductive energy storage of the mains power in the positive half cycle of the mains power mode of the embodiment shown;

[0021] Figure 6b Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the charging process of the inductor to the positive DC bus in the positive half cycle of the mains mode in the illustrated embodiment;

[0022] Figure 7a Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the inductive energy storage of the mains power in the negative half cycle of the mains power mode of the embodiment shown;

[0023] Figure 7b Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the charging process of the negative DC bus by the inductor in the negative half cycle of the mains mode in the illustrated embodiment;

[0024] Figure 8 Shows Figure 5 The pulse width modulation control signal of the circuit shown in the mains mode and the current waveform of the corresponding device when the positive and negative half cycles are working;

[0025] Figure 9a Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the battery-to-inductor energy storage in the positive half cycle of the battery mode in the illustrated embodiment;

[0026] Figure 9b Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the charging process of the positive DC bus by the inductor in the positive half cycle of the battery mode in the embodiment shown;

[0027] Fig.10a Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the battery-to-inductor energy storage in the negative half cycle of the battery mode in the illustrated embodiment;

[0028] Fig.10b Shows Figure 5 A schematic diagram of an equivalent circuit corresponding to the charging process of the negative DC bus by the inductor in the negative half cycle of the battery mode in the embodiment shown;

[0029] Fig.11 It is shown as an example Figure 5 The circuit shown shows the pulse width modulation control signal and the current waveform of the corresponding device when it works in the positive and negative half cycles in battery mode. DETAILED DESCRIPTION

[0030] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments herein are only used for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those of ordinary skill in the art that these specific details are not necessarily used to implement the present invention. In other examples, in order to avoid confusing the present invention, known procedures, materials or methods are not specifically described.

[0031] Figure 1 It is a schematic diagram of a commonly used AC-DC power factor control (PFC) circuit for a single-battery uninterruptible power supply and a battery discharge DC-DC circuit multiplexing circuit 11 in the prior art. Figure 1 As shown, it adopts a double boost circuit topology. When in the mains mode, the DC switches K11 and K12 are disconnected to isolate the battery B from the mains. The AC mains performs power factor control by pulse width modulation of the positive switch tube Q11 and the negative switch tube Q12, so that the DC power is output to the positive DC bus 101 and the negative DC bus 102. When the mains fails and is in the battery mode, the DC switches K11 and K12 are closed to supply power to the positive DC bus 101 and the negative DC bus 102 from the battery B. In the process of providing DC power to the positive and negative DC buses, the positive and negative halves of the circuit topology work alternately. For example, when the positive DC bus 101 is powered, the positive switch tube Q11 is controlled to perform pulse width modulation, and the negative switch tube Q12 is always in the on state; when the negative DC bus 102 is powered, the negative switch tube Q12 is controlled to perform pulse width modulation, and the positive switch tube Q11 is always in the on state. Such a topological design has the following defects: for the single battery B, when in battery mode, the lines connected to the positive and negative electrodes of the battery B have high-frequency potential jumps, so the EMC is poor, so two clamping diodes D13 and D14 are needed. After adding the diodes, in battery mode, the two inductors L11 and L12 will always have current flowing through them when the positive and negative halves are working alternately. Figure 2As shown, in battery mode, for example, when the switch tube Q11 switches at high frequency and the switch tube Q12 is normally on in the positive half-cycle working state, the current of the inductor L12 is a DC freewheeling current, and a loop current is formed between it and the diode D14, and the inductor L12 is short-circuited and passes a large current.

[0032] Figure 3 Shows Figure 1 The circuit shown shows the pulse width modulation control signal and the current waveform of the corresponding device in the battery mode working state. The dotted line range shows the working condition of the positive half, in which the positive switch tube Q11 is controlled to perform pulse width modulation, the negative switch tube Q12 is controlled to be in the on state, the current on the inductor L11 is a triangular wave current, and the current on the inductor L12 is a basically constant DC current, which does not play the role of inductance, equivalent to being short-circuited. It can be seen that in this battery mode, the heating of the two inductors will be very serious, and the inductor volume can only be forced to increase, which is a very serious defect. In addition, such a dual BOOST circuit topology includes two inductors. When working in each half cycle in the AC power mode, only one inductor participates, resulting in a low inductor utilization rate.

[0033] After research, the inventor proposed a power factor correction (PFC) and DC-DC multiplexing circuit multiplexing converter of an uninterruptible power supply. Figure 4: is a schematic diagram of a power factor correction (PFC) and DC-DC multiplexing circuit according to an embodiment of the present invention, comprising: a first mechanical switch RY1, used to connect the converter to the mains; a second mechanical switch RY2, used to connect the converter to the battery; an inductor L1, one end of which is connected to the mains through the first mechanical switch RY1, and is connected to the positive electrode of the battery B21 through the second mechanical switch RY2; a first node N1 and a second node N2; a first rectifier bridge arm 213, connected between the first node N1 and the second node N2, the first rectifier bridge arm 213 having a first intermediate node N3, the first intermediate node N3 being connected to the other end of the inductor L1; a second rectifier bridge arm 214, connected between the first node N1 and the second node N2, the second rectifier bridge arm 214 having a second intermediate node N4, the second intermediate node N4 being connected to a neutral point N5; a first semiconductor switch Q1, connected between the first node N1 and the second node N2, the second rectifier bridge arm 214 having a second intermediate node N4, the second intermediate node N4 being connected to a neutral point N5; The first node N1 and the second node N2 are connected to control the conduction between the first node N1 and the second node N2; the positive DC bus 211 and the negative DC bus 212 are used to provide a DC output; the first diode D6 is connected between the first node N1 and the positive DC bus 211; the second semiconductor switch Q2 is connected between the second node N2 and the negative DC bus 212, and is used to control the conduction between the second node N2 and the negative DC bus 212; the first capacitor C211 is connected between the positive DC bus 211 and the neutral point N5; the second capacitor C212 is connected between the neutral point N5 and the negative DC bus 212; the third semiconductor switch Q3 is connected between the neutral point N5 and the negative electrode of the battery B21, and is used to control the conduction between the neutral point N5 and the negative electrode of the battery B21; and the second diode D5 is connected between the negative DC bus 212 and the negative electrode of the battery B21. In this embodiment, the second semiconductor switch is shown as an insulated gate bipolar transistor with a diode connected in anti-parallel, but it can also be replaced by other suitable transistors with a diode connected in anti-parallel.

[0034] Figure 5It is a schematic diagram of a power factor correction (PFC) and DC-DC multiplexing circuit according to an embodiment of the present invention connected to a single-phase AC power supply AC (mains power) or a battery B21. The power factor correction and DC-DC multiplexing circuit is used to rectify the AC output of the mains power in the mains power mode and perform power factor correction, or to convert the DC output of the battery in the battery mode, and includes the anode of the third diode D1 connected to the cathode of the fourth diode D3 to form a first rectifier bridge arm, and the anode of the fifth diode D2 connected to the cathode of the sixth diode D4 to form a second rectifier bridge arm; the cathode of the third diode D1 is connected to the cathode of the fifth diode D2 connected to the first node N1, and the second intermediate node N4 between the anode of the fifth diode D2 and the cathode of the sixth diode D4 is connected to the neutral point N5, and the anode of the fourth diode D3 is connected to the anode of the sixth diode D4 connected to the second node N2.

[0035] And wherein, the collector second pole of the switch tube Q1 (first semiconductor switch) is connected to the first node N1, and the emitter first pole of the switch tube Q1 is connected to the second node N2; the collector second pole of the switch tube Q2 (second semiconductor switch) is connected to the second node N2, and the emitter first pole of the switch tube Q2 is connected to the negative DC bus 212 as the output; the anode of the first diode D6 is connected to the first node N1, and the cathode of the first diode D6 is connected to another positive DC bus 211 as the output.

[0036] And wherein, the DC bus capacitor C211 and the DC bus capacitor C212 are connected in series, one end of the DC bus capacitor C211 is connected to the positive DC bus 211 as an output, and the other end of the DC bus capacitor C212 is connected to another negative DC bus 212 as an output.

[0037] And wherein, one end of the inductor L1 is connected to the first intermediate node N3 between the anode of the third diode D1 and the cathode of the fourth diode D3, and the other end of the inductor L1 is connected to the AC power through the AC switch RY1 (first mechanical switch), and is connected to the positive electrode of the battery B21 through the DC switch RY2 (second mechanical switch).

[0038] The multiplexing circuit also includes a switch tube Q3 (third semiconductor switch) and a second diode D5. The collector (second pole) of the switch tube Q3 is connected to the neutral point N5 between the DC bus capacitor C211 and the DC bus capacitor C212, and its emitter (first pole) is connected to the negative electrode of the battery B21. The second diode D5 is connected in series between the emitter of the switch tube Q3 and the negative DC bus 212, with its anode connected to the negative DC bus 212 and its cathode connected to the emitter of the switch tube Q3.

[0039] The working state of the PFC and DC-DC multiplexing circuit is described in detail below.

[0040] Figure 6a and Figure 6b They are shown respectively Figure 5 The embodiment shown in the figure shows that the mains power supply in the positive half cycle of the mains power mode has an inductive energy storage effect ( Figure 6a ) and the charging process of the inductor to the positive DC bus ( Figure 6b ) is a schematic diagram of the equivalent circuit corresponding to the AC power supply. In the AC power mode, the AC switch RY1 is closed (conducted) and the DC switch RY2 is open (disconnected). The switch tube Q1 is controlled by pulse width modulation in the positive and negative half cycles, and the switch tubes Q2 and Q3 remain in the off state. In the positive half cycle of the AC power, when the switch tube Q1 is turned on by pulse width modulation, the current direction is AC power supply → inductor L1 → diode D1 → switch tube Q1 → diode D4 → neutral point N5, where the inductor L1 stores energy; when the switch tube Q1 is turned off by pulse width modulation, the current direction is AC power supply → inductor L1 → diode D1 → diode D6 → capacitor C211 → neutral point N5, and the AC power supply and inductor L1 are connected in series to supply power to the positive DC bus 211. Figure 7a and Figure 7b They are shown respectively Figure 5 The embodiment shown in the figure shows that the mains power supply in the negative half cycle of the mains power mode has an effect on the inductive energy storage ( Figure 7a ) and the process of the inductor charging the negative DC bus ( Figure 7b ) The equivalent circuit diagram corresponding to FIG. In the negative half cycle of the alternating current, when the switch tube Q1 is turned on by pulse width modulation, the current direction is neutral point N→diode D2→switch tube Q1→diode D3→inductor L1→AC power supply, wherein the inductor L1 stores energy; when the switch tube Q211 is turned off by pulse width modulation, the current direction is neutral point N5→capacitor C212→switch tube Q2→diode D3→inductor L1→AC power supply, and the AC power supply and the inductor L1 are connected in series to supply power to the negative DC bus 211.

[0041] Figure 8 It is shown as an example Figure 5 The circuit shown shows the pulse width modulation control signal and the current waveform of the corresponding device when working in the positive and negative half cycles in the AC power mode. The switch tube Q1 is controlled to perform pulse width modulation, and the switch tubes Q2 and Q3 are controlled to be in the off state. The current on the inductor L1 presents a triangular wave current as the switch tube Q1 is turned on and off. The rising waveform indicates that the inductor L1 is in the charging state, and the falling waveform indicates that the inductor L1 is in the discharging state. It is necessary to divide it into positive and negative half cycles. In each half cycle, the Q1 PWM signal should be wide on both sides and narrow in the middle, and the L1 current should be drawn as a sine wave superimposed with a triangular ripple.

[0042] When the mains fails, the system switches to battery mode, at which point the AC switch RY1 is open (disconnected) and the DC switch RY2 is closed (conducting).

[0043] Figure 9a and Figure 9b They are shown respectively Figure 5The battery in the positive half cycle of the battery mode in the embodiment shown above stores energy to the inductor ( Figure 9a ) and the charging process of the inductor to the positive DC bus ( Figure 9b ) is a schematic diagram of an equivalent circuit corresponding to FIG. In the process of battery B21 charging the positive half DC bus 211 (positive half cycle), switch tube Q3 remains on, switch tube Q2 remains off, and switch tube Q1 is controlled to perform PFC pulse width modulation, wherein when switch tube Q1 is on, the current direction is battery B21 positive electrode → inductor L1 → diode D1 → switch tube Q1 → diode D4 → neutral point N → switch tube Q3 → battery B21 negative electrode, and battery B21 stores energy in inductor L1; when switch tube Q1 is off, the current direction is battery B21 positive electrode → inductor L1 → diode D1 → diode D6 → capacitor C211 → neutral point N → switch tube Q3 → battery B21 negative electrode, and battery B21 is connected in series with inductor L1 to charge the positive DC bus 211 and DC bus capacitor C211.

[0044] It can be seen that in the process of supplying power to the positive half of the positive DC bus 211, the negative electrode of the battery B21 is always connected to the neutral point N5 through the turned-on switch tube Q3, so its potential is always the potential of the neutral point N5.

[0045] Fig.10a and Fig.10b They are shown respectively Figure 5 The battery in the negative half cycle of the battery mode in the embodiment shown above stores energy to the inductor ( Fig.10a ) and the process of the inductor charging the negative DC bus ( Fig.10b ) is a schematic diagram of an equivalent circuit corresponding to the charge of the negative half DC bus 212 by the battery B21 (negative half cycle), the switch tube Q1 remains on, the switch tube Q3 remains off, and the switch tube Q2 performs PFC pulse width modulation. When the switch tube Q2 is turned on, the current direction is the positive electrode of the battery B21 → the inductor L1 → the diode D1 → the switch tube Q1 → the switch tube Q2 → the diode D5 → the negative electrode of the battery B21, and the battery B21 charges the inductor L1; when the switch tube Q2 is turned off, the current direction is the positive electrode of the battery B21 → the inductor L1 → the diode D1 → the switch tube Q1 → the diode D4 → the neutral point N → the capacitor C212 → the diode D5 → the negative electrode of the battery B21. The battery B21 is connected in series with the inductor L1 to charge the negative DC bus 212 and the DC bus capacitor C212.

[0046] It can be seen that in the process of supplying power to the negative DC bus 212 of the negative half, the potential of the negative electrode of the battery B21 is always consistent with the potential of the negative DC bus 212.

[0047] Fig.11 It is shown as an example Figure 5The circuit shown in the figure shows the pulse width modulation control signal and the current waveform of the corresponding device when the positive and negative half-cycles work in the battery mode. When the battery discharges to supply power to the positive DC bus, that is, when working in the positive half cycle, the switch tube Q1 is controlled to perform pulse width modulation, the switch tube Q2 is controlled to be in the off state, and the switch tube Q3 is controlled to be in the on state. The current on the inductor L1 presents a triangular wave current as the switch tube Q1 is turned on and off, wherein the rising waveform indicates that the inductor L1 is in the charging state, and the falling waveform indicates that the inductor L1 is in the discharging state. When the battery discharges to supply power to the negative DC bus, that is, when working in the negative half cycle, the switch tube Q2 is controlled to perform pulse width modulation, the switch tube Q1 is controlled to be in the on state, and the switch tube Q3 is controlled to be in the off state. The current on the inductor L1 presents a triangular wave current as the switch tube Q2 is turned on and off. In the above process, the potential difference between the negative electrode of the battery B21 and the neutral point N5 jumps with the level of Q3, and the jump is a power frequency jump with a very low frequency.

[0048] In summary, since the battery B21 alternately supplies power to the positive and negative half DC bus at a relatively low industrial frequency, for example, it is consistent with the AC frequency or is at the same order of magnitude. Since the voltage difference between the positive and negative electrodes of the battery is stable, the positive electrode of the battery also jumps with a similar level difference and frequency. The electromagnetic compatibility characteristics of the PFC and DC-DC multiplexing circuit 21 are better. Compared with the traditional dual-Boost circuit, the converter inductor of the embodiment of the present invention has only one, and the inductor utilization rate is high, saving the inductor cost and space. When a single battery is used, the reuse of the battery discharge DC-DC circuit and the AC PFC circuit is better realized, saving the volume and cost of the whole machine. In the battery discharge mode, the potential of the battery line will not have high-frequency jumps, which solves the EMC problem that occurs after the traditional dual-Boost is connected to a single battery and the problems of inductor overheating and low inductor utilization after adding a clamping diode.

[0049] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the protection scope of the present invention.

Claims

1. A power factor correction and DC-DC multiplexing converter, characterized in that: include: a first mechanical switch (RY1) for connecting the converter to the mains; a second mechanical switch (RY2) for connecting the converter to a battery; an inductor (L1), one end of which is connected to the mains via the first mechanical switch (RY1), and is connected to the positive electrode of the battery (B21) via the second mechanical switch (RY2); A first node (N1) and a second node (N2); A first rectifying bridge arm (213) connected between the first node (N1) and the second node (N2), the first rectifying bridge arm (213) having a first intermediate node (N3), the first intermediate node (N3) being connected to the other end of the inductor (L1); A second rectifying bridge arm (214), connected between the first node (N1) and the second node (N2), the second rectifying bridge arm (214) having a second intermediate node (N4), the second intermediate node (N4) being connected to a neutral point (N5); A first semiconductor switch (Q1), connected between the first node (N1) and the second node (N2), for controlling conduction between the first node (N1) and the second node (N2); A positive DC bus (211) and a negative DC bus (212) for providing a DC output; a first diode (D6) connected between the first node (N1) and the positive DC bus (211); a second semiconductor switch (Q2), connected between the second node (N2) and the negative DC bus (212), and used to control conduction between the second node (N2) and the negative DC bus (212); A first capacitor (C211) connected between the positive DC bus (211) and the neutral point (N5); A second capacitor (C212) connected between the neutral point (N5) and the negative DC bus (212); a third semiconductor switch (Q3), connected between the neutral point (N5) and the negative electrode of the battery (B21), for controlling conduction between the neutral point (N5) and the negative electrode of the battery (B21); and The second diode (D5) is connected between the negative DC bus (212) and the negative electrode of the battery (B21).

2. The multiplexing converter according to claim 1, characterized in that: The conduction between the second node (N2) and the negative DC bus (212) is controlled, and the conduction between the negative DC bus (212) and the second node (N2) is uncontrolled.

3. The multiplexing converter according to claim 2, characterized in that: The second semiconductor switch (Q2) is a transistor having a diode connected in antiparallel.

4. The multiplexing converter according to claim 3, characterized in that: A second semiconductor switch (Q2), connected between the second node (N2) and the negative DC bus (212), comprises: A first pole of the second semiconductor switch (Q2) is connected to the negative DC bus (212), and a second pole of the second semiconductor switch (Q2) is connected to the second node (N2).

5. The multiplexing converter according to claim 1, characterized in that: The first semiconductor switch (Q1) and the third semiconductor switch (Q3) are transistors.

6. The multiplexing converter according to claim 5, characterized in that: The first semiconductor switch (Q1), connected between the first node (N1) and the second node (N2), comprises: A first electrode of the first semiconductor switch (Q1) is connected to the second node (N2), and a second electrode of the first semiconductor switch (Q1) is connected to the first node (N1).

7. The multiplexing converter according to claim 5, characterized in that: The third semiconductor switch (Q3), connected between the neutral point (N5) and the negative electrode of the battery (B21), comprises: A first pole of the third semiconductor switch (Q3) is connected to the negative pole of the battery (B21), and a second pole of the third semiconductor switch (Q3) is connected to the neutral point (N5).

8. The multiplexing converter according to claim 3 or 5, characterized in that: The transistor is a MOSFET tube or an IGBT tube.

9. The multiplexing converter according to claim 1, characterized in that: The first rectifier bridge arm (213), connected between the first node (N1) and the second node (N2), comprises: The first rectifier bridge arm (213) comprises a third diode (D1) and a fourth diode (D3), wherein the cathode of the third diode (D1) is connected to the first node (N1), the anode of the third diode (D1) is connected to the cathode of the fourth diode (D3), and the anode of the fourth diode (D3) is connected to the second node (N2).

10. The multiplexing converter according to claim 1, characterized in that: The second rectifier bridge arm (214), connected between the first node (N1) and the second node (N2), comprises: The second rectifier bridge arm (214) includes a fifth diode (D2) and a sixth diode (D4), wherein the cathode of the fifth diode (D2) is connected to the first node (N1), the anode of the fifth diode (D2) is connected to the cathode of the sixth diode (D4), and the anode of the sixth diode (D4) is connected to the second node (N2).

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