Buck conversion circuit based on double-loop control digital linear voltage stabilizing module

Abstract

The application discloses a buck conversion circuit based on a double-loop control digital linear voltage stabilizing module, which comprises a pair of off-chip ceramic capacitors, a hybrid topology architecture direct current transformation module in a high-side voltage domain, and a digital linear voltage stabilizing module, an output voltage control loop and an auxiliary control loop connected to the hybrid topology architecture direct current transformation module in a low-side voltage domain respectively. The hybrid topology architecture direct current transformation module is used for high-efficiency energy transmission, and the digital linear voltage stabilizing module is used for output voltage adjustment. The application has a faster transient response to load mutation, and the use of the digital linear voltage stabilizing module improves the system power density. In addition, the double-loop control is used to ensure that the digital linear voltage stabilizing module works in a low voltage difference condition, thereby improving the conversion efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of DC voltage reduction converter, and particularly relates to a voltage reduction conversion circuit based on double-loop control digital linear voltage stabilization module. BACKGROUND

[0002] The DC voltage conversion module with hybrid topology architecture combines the advantages of the switched capacitor type DC voltage conversion module and the inductor type DC voltage conversion module, has high power density and high efficiency, and is often applied to high conversion ratio occasions. However, the load transient response speed of the DC voltage conversion module with hybrid topology architecture is usually slow. The digital linear voltage stabilization module adjusts the output voltage using digital control, has high power density and high load transient response speed, and is suitable for occasions with low output voltage. However, the efficiency of the digital linear voltage stabilization module is determined by the voltage difference between the input voltage and the output voltage, and it is difficult to achieve high efficiency. When the DC voltage conversion module with hybrid topology architecture and the digital linear voltage stabilization module are combined in a structure of input series and output parallel, the advantages of high conversion ratio, high power density and high load response speed can be combined. However, how to achieve high efficiency of the architecture in a wide input and output voltage range is also a design difficulty. SUMMARY

[0003] The present application proposes a voltage reduction conversion circuit based on double-loop control digital linear voltage stabilization module to solve the problems of low power density and slow load response speed of the existing voltage reduction converter and the voltage conversion and high efficiency voltage conversion when high voltage conversion ratio cannot be achieved. The DC voltage conversion module with hybrid topology architecture efficiently transmits energy, and the digital linear voltage stabilization module adjusts the output voltage. The system has a faster transient response to load mutations, and the use of the digital linear voltage stabilization module also improves the system power density. In addition, the double-loop control used ensures that the digital linear voltage stabilization module works in a low voltage difference condition, improving the conversion efficiency.

[0004] The present application is implemented by the following technical solutions:

[0005] The application relates to a buck conversion circuit based on a double-loop control digital linear voltage stabilizing module, which comprises a pair of off-chip ceramic capacitors, a hybrid topology architecture direct current voltage transformation module in a high-side voltage domain, and a digital linear voltage stabilizing module, an output voltage control loop and an auxiliary control loop connected thereto respectively in a low-side voltage domain, wherein the off-chip ceramic capacitors divide an input voltage into a high-side voltage domain and a low-side voltage domain, the output current of the hybrid topology architecture direct current voltage transformation module and the digital linear voltage stabilizing module is added as a total output current, the output voltage of the hybrid topology architecture direct current voltage transformation module is fed back to the digital linear voltage stabilizing module with a high-frequency clock through the output voltage control loop, the input end of the auxiliary control loop is arranged between the pair of off-chip ceramic capacitors, and the output clock signal is sent to the hybrid topology architecture direct current voltage transformation module to adjust the size of the regulated voltage, so that the digital linear voltage stabilizing module works in a low-voltage difference working condition, and high load response speed is realized.

[0006] The hybrid topology architecture direct current voltage transformation module comprises three capacitors, an inductor and power switches, wherein the second capacitor and the inductor are arranged in series between an input end and an output end, the first capacitor is arranged between the input end and a ground potential, the third capacitor is arranged between the output end and the ground potential, the input end, the output end and the ground potential are respectively provided with the power switches between the three capacitors, and the connection modes of the inductor, the capacitors and the switches are alternately changed between two phases through different switch combinations. In phase 1, the third, fourth and sixth power switches are closed, the first capacitor charges the second capacitor, the third capacitor discharges, and the inductor is magnetized. In phase 2, the first, second, fifth and seventh power switches and are closed, the first capacitor is connected between and charges, the second capacitor charges the third capacitor, and the inductor demagnetizes.

[0007] Technical effects

[0008] The application adjusts the voltage difference of the low-side digital linear voltage stabilizing module through the auxiliary control loop while the hybrid topology architecture direct current voltage transformation module and the digital linear voltage stabilizing module are inputted in series and outputted in parallel. Compared with the prior art, the application is superior to the load mutation transient response speed of the ordinary direct current voltage converter, can control the low-side digital linear voltage stabilizing module to always work in a low-voltage difference mode, and significantly improves the overall efficiency and system power density. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 It is a whole structure schematic diagram of the application;

[0010] Figure 2 It is a hybrid topology architecture direct current voltage transformation module circuit diagram and charge transmission relationship schematic diagram;

[0011] Figure 3 It is a key node voltage schematic diagram;

[0012] Figure 4It is a schematic diagram of a digital linear voltage stabilizing module;

[0013] Figure 5 It is a schematic diagram of the effect of the embodiment;

[0014] Figure 6 It is a schematic diagram of the auxiliary control loop implementation;

[0015] Figure 7 It is the load mutation transient response test result;

[0016] Figure 8 It is the system conversion efficiency test result. DETAILED DESCRIPTION

[0017] As Figure 1 shown, it is a step-down conversion circuit based on a double-loop control digital linear voltage stabilizing module, comprising: a pair of off-chip ceramic capacitors C H and C L , a hybrid topology architecture DC conversion module in the high-side voltage domain V H , and a digital linear voltage stabilizing module, an output voltage control loop and an auxiliary control loop connected thereto respectively in the low-side voltage domain V L , wherein: the off-chip ceramic capacitors C H and C L divide the input voltage V in into high-side and low-side voltage domains, the output currents of the hybrid topology architecture DC conversion module and the digital linear voltage stabilizing module are added as the total output current, the output voltage of the hybrid topology architecture DC conversion module is fed back to the digital linear voltage stabilizing module with a high-frequency clock through the output voltage control loop, the input end of the auxiliary control loop is arranged between the pair of off-chip ceramic capacitors C H and C L , and an output clock signal is sent to the hybrid topology architecture DC conversion module to cooperate with the regulation of the size of V L so that the digital linear voltage stabilizing module works in a low-dropout condition and realizes high load response speed.

[0018] The double-loop control refers to: the output currents of the high-side and low-side voltage domains are added to obtain the total output current, forming a topology architecture of input series and output parallel.

[0019] The overall conversion efficiency of the step-down conversion circuit is η = η H * V H / V IN + η L * V L / V IN , wherein: the low-side conversion efficiency η L = V O / V L = (VL -V DO ) / V L , η H is high side conversion efficiency, V DO is the voltage difference of the digital linear regulator module, V H is high side input voltage, V L is low side input voltage.

[0020] The cooperation control refers to: by adjusting the duty cycle of the clock signal, the voltage conversion ratio of the hybrid topology direct current voltage conversion module is changed accordingly, so as to control the size of V H and V L .

[0021] As shown in Figure 6 , the auxiliary control loop comprises: a type II compensator, a sawtooth wave generator, a comparator, an SR latch and a non-overlapping clock generator, wherein: the type II compensator outputs a voltage V EA and the sawtooth wave V RAMP generates a pulse width modulation signal through the comparator, and after the logic circuit of the SR latch and the non-overlapping clock generator, two-phase non-overlapping clock is provided to the high side of the hybrid topology direct current voltage conversion module.

[0022] The type II compensator comprises: an operational amplifier, internal capacitors C C1 and C C2 , internal resistors R1, R F1 and R F2 , wherein: the internal resistors R F1 and R F2 divide the input voltage V L and output to the inverting input terminal of the operational amplifier, the reference voltage V REF is input to the non-inverting input terminal of the operational amplifier, and the internal capacitors C C1 , C C2 and the internal resistor R1 are arranged between the inverting input terminal and the output terminal of the operational amplifier.

[0023] Under the control of the auxiliary control loop, the digital linear regulator module can maintain a low voltage difference of 0.1V under different input and output voltages and load conditions, and improve the overall conversion efficiency.

[0024] As shown in Figure 2As shown, the hybrid topology DC transformer module includes three capacitors C1-C3, one inductor, and seven power switches S1-S7. The second capacitor C2 and the inductor are connected in series between the input and output terminals. The first capacitor C1 is connected between the input terminal and ground potential, and the third capacitor C3 is connected between the output terminal and ground potential. Power switches are installed between the input terminal, output terminal, ground potential, and the three capacitors C1-C3. By using different switch combinations, the connection methods of the inductor, capacitors, and switches are alternately changed between two phases. In phase 1, the third, fourth, and sixth power switches S3, S4, and S6 are closed, the first capacitor C1 charges the second capacitor C2, the third capacitor C3 discharges, and the inductor L is magnetized. In phase 2, the first, second, fifth, and seventh power switches S1, S2, S5, and S7 are closed, and the first capacitor C1 is connected to V... IN and V L During charging, the second capacitor C2 charges the third capacitor C3, and the inductor L demagnetizes.

[0025] The first capacitor C1 forms a buffer stage, diverting charge from C... H The current is transferred to the ground reference plane to provide power to the second capacitor C2 and the third capacitor C3, forming a 2:1 switched capacitor DC transformer. The SW node at the left end of the inductor is connected to the positive plate of the third capacitor C3 in phase 1 and grounded in phase 2.

[0026] like Figure 3 As shown, the voltage C1P is the positive plate voltage of the first capacitor C1 in the hybrid topology DC transformer module. In phase 2, it is connected to the input voltage V. IN At phase 1, it equals V. IN -V L C1 continuously transfers charge from C H Transmitted to the ground reference plane. The SW node at the left end of the inductor is equal to (V) in phase 1. IN -V L ) / 2, grounded during phase 2, and the duty cycle of phase 1 is D. Therefore, according to the volt-second balance principle, the input-output relationship on the high side can be calculated as V. OUT =D(V) IN -V L ) / 2.

[0027] like Figure 4 As shown, the digital linear regulator module includes: a dynamic comparator, a shift register array, and several power transistors connected in sequence. The shift register array controls the on / off state of the power transistors. The dynamic comparator outputs instructions to the shift register array to determine the direction of shift register movement. When the output voltage V of the digital linear regulator module... OUT Below the input voltage V REFWhen the PMOS power transistors are turned on, the shift register moves in the positive direction to turn them on; otherwise, it moves in the negative direction to turn them off. The control clock CLK for the digital linear regulator module... LS It is a high-frequency clock.

[0028] The shift register array is preferably a 128-bit bidirectional shift register array, corresponding to 128 PMOS power transistors.

[0029] Through specific practical experiments, such as Figure 7 As shown, with an input voltage of 5V, an output voltage of 0.85V, and a load current varying between 0.1A and 2A, when the load current changes from 0.1A to 2A, the voltage drops by 36mV with a recovery time of 1.6μs. When the load current changes from 2A to 0.1A, the voltage rises to 124mV with a recovery time of 7.2μs.

[0030] like Figure 8 As shown, with an input voltage range of 4V to 5V and an output voltage range of 0.6V to 1V, the circuit achieves a peak conversion efficiency of 92% and can handle a maximum load current of 5A. When the voltage difference of the low-side digital linear regulator module is reduced from 0.25V to 0.1V by the auxiliary control loop, the system's peak conversion efficiency improves by 6.1%. Calculating the volume of the chip, flying capacitor, and inductor, the total volume of this system is 11.56mm². 3 Therefore, 346 W / cm² was achieved. 3 The system power density.

[0031] like Figure 5 The diagram shows the current-voltage response when the load current changes abruptly. Under stable operating conditions, the high-side output current I... OH =I OUT V H / V IN Low-side output current I OL =I OUT V L / V IN When the load current suddenly increases, the output voltage V OUT When a voltage drop occurs, the digital linear regulator module can quickly detect the change in output voltage and generate a large output current to respond to the change in load current. In contrast, the output current of the high-side DC-DC transformer module, limited by the inductor's current change slope, can only increase at a slower rate. As the DC-DC transformer module's output current increases, the digital linear regulator module's output current gradually decreases and eventually returns to a stable operating state. The rapid response capability of the digital linear regulator module gives the system better load response speed and reduces voltage drops during sudden changes in load current.

[0032] Compared with the prior art, the device adopts a hybrid topology architecture DC transformer module and a digital linear voltage stabilizing module with input series and output parallel in the circuit architecture, and realizes a voltage recovery time of 1.6μs under a load surge of 2A. At the same time, due to the combination of the hybrid topology architecture DC transformer module and the digital linear voltage stabilizing module, two high-power density modules, a maximum output current of 5A and a system power density of 346W / cm 3 Due to the use of the auxiliary control loop, the low-side digital linear voltage stabilizing module works in a low-voltage difference mode, so that the overall system can realize a peak system conversion efficiency of 92%.

[0033] The above specific embodiments can be adjusted in different ways by those skilled in the art without departing from the principles and purposes of the present application, the protection scope of the present application is subject to the claims and is not limited by the above specific embodiments, and each implementation scheme within the scope is subject to the present application.

Claims

1. A step-down converter circuit based on a dual-loop controlled digital linear regulator module, characterized in that, include: The system comprises a pair of external ceramic capacitors, a hybrid topology DC-DC converter module in the high-side voltage domain, a digital linear regulator module in the low-side voltage domain connected to the external ceramic capacitors, an output voltage control loop, and an auxiliary control loop. Specifically: the pair of external ceramic capacitors divides the input voltage into high-side and low-side voltage domains; the output currents of the hybrid topology DC-DC converter module and the digital linear regulator module are summed to obtain the total output current; the output voltage of the hybrid topology DC-DC converter module is fed back to the digital linear regulator module with a high-frequency clock via the output voltage control loop; the input of the auxiliary control loop is located between the pair of external ceramic capacitors, and it outputs a clock signal to the hybrid topology DC-DC converter module to regulate the low-side input voltage, enabling the digital linear regulator module to operate under low voltage drop conditions and achieve high load response speed. The aforementioned dual-loop control refers to the sum of the output currents of the high-side and low-side voltage domains to obtain the total output current, forming a topology of input series and output parallel. The aforementioned coordinated control refers to: by adjusting the duty cycle of the clock signal to change the voltage conversion ratio of the hybrid topology DC transformer module, thereby controlling the high-side input voltage and the low-side input voltage.

2. The step-down converter circuit based on a dual-loop controlled digital linear regulator module according to claim 1, characterized in that, The hybrid topology DC transformer module includes three capacitors, one inductor, and seven power switches, wherein: the first power switch is located between one end of the first capacitor and the input terminal of the transformer module; the second power switch is located between the other end of the first capacitor and the low-side voltage domain input terminal; the third power switch is located between the other end of the first capacitor and ground potential; the fourth power switch is located between one end of the first capacitor and one end of the second capacitor; the fifth power switch is located between one end of the second capacitor and one end of the third capacitor; the sixth power switch is located between the other end of the second capacitor and one end of the third capacitor; the seventh power switch is located between the other end of the second capacitor and ground potential; the other end of the third capacitor is grounded; and the inductor is located between the other end of the second capacitor and the output terminal. By using different switch combinations, the connection methods of inductors, capacitors, and switches are alternately changed between two phases: In phase 1, the third, fourth, and sixth power switches are closed, the first capacitor charges the second capacitor, the third capacitor discharges, and the inductor is magnetized; In phase 2, the first, second, fifth, and seventh power switches are closed, the first capacitor is connected between the input terminal of the transformer module and the input terminal of the low-side voltage domain for charging, the second capacitor charges the third capacitor, and the inductor is demagnetized.

3. The step-down converter circuit based on a dual-loop controlled digital linear regulator module according to claim 1, characterized in that, The auxiliary control loop includes: a Type II compensator, a sawtooth wave generator, a comparator, an SR latch, and a non-overlapping clock generator, wherein: the output voltage V of the Type II compensator is... EA and sawtooth wave V RAMP A pulse width modulation signal is generated by a comparator, and then a two-phase non-overlapping clock is produced by the logic circuit of the SR latch and the non-overlapping clock generator to provide a hybrid topology DC transformer module on the high side.

4. The step-down converter circuit based on a dual-loop controlled digital linear regulator module according to claim 3, characterized in that, The type II compensator includes: an operational amplifier and two on-chip capacitors C. C1 and C C2 Internal resistors R1 and R F1 and R F2 Where: on-chip resistor R F1 and R F2 For input voltage V L The voltage divider output is fed to the inverting input of the operational amplifier, with the reference voltage V. REF The input is given to the positive input terminal of the operational amplifier, and the first internal capacitor C... C1 The on-chip resistor R1 is sequentially placed between the inverting input and output terminals of the operational amplifier, and the second on-chip capacitor C... C2 It is positioned between the inverting input and output of the operational amplifier.

5. The step-down converter circuit based on a dual-loop controlled digital linear regulator module according to claim 1, characterized in that, The digital linear regulator module includes: a dynamic comparator, a shift register array, and several power transistors connected in sequence. The shift register array controls the on / off state of the power transistors. The dynamic comparator outputs instructions to the shift register array to determine the direction of shift register movement. When the output voltage V of the digital linear regulator module... OUT Below the input voltage V REF When the PMOS power transistors are turned on, the shift register moves in the positive direction to turn them on; otherwise, it moves in the negative direction to turn them off. The control clock CLK for the digital linear regulator module is... LS It is a high-frequency clock.

Images