FPGA-based in-board network data packet multi-path forwarding method

By replacing multiple physical pin forwarding by modular data forwarding and arbitration modules, the problem of the upper limit of the number of communication peers between FPGA chips is solved, and module multiplexing and functional expansion are realized.

CN119814652APending Publication Date: 2025-04-11BEIJING INST OF COMP TECH & APPL
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Patent Information

Application Number
CN202411696605.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-25
Publication Date
2025-04-11

AI Technical Summary

Technical Problem

The existing FPGA-based multi-channel data forwarding method cannot establish a forwarding path that exceeds the upper limit of the number of chip pins, limiting the number of peers for inter-chip communication.

Method used

Modular data forwarding and arbitration module are used instead of multiple physical pin forwarding. By comparing the MAC address of the data packet with the set chip MAC address, the arbitration module determines the forwarding sequence to realize data forwarding.

Benefits of technology

It solves the problem of not being able to establish a forwarding path that exceeds the upper limit of chip pin counts, and realizes module reuse. Each chip can realize data forwarding function by adding code. There is no need to configure additional pins, and only the MAC forwarding table needs to be updated.

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Abstract

The invention relates to an in-board network data packet multi-path forwarding method based on an FPGA (Field Programmable Gate Array), and belongs to the field of computer networks. According to the method, the modular data forwarding and arbitration are used for replacing multi-path physical pin forwarding, the problem that a forwarding path exceeding the upper limit of the number of chip pins cannot be established is solved, module multiplexing can be carried out through the method, each chip can achieve the data forwarding function by adding the part of codes, and the data forwarding efficiency is improved. Conditional constraint does not need to be carried out on each chip to configure a corresponding pin, and only the MAC forwarding table needing to be forwarded needs to be updated, so that function multiplexing of the module is realized.
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Description

Technical Field

[0001] The invention belongs to the field of computer networks, and in particular relates to a method for multi-path forwarding of network data packets within an FPGA board. Background Art

[0002] With the rapid development of the Internet, network servers that provide data processing, forwarding, encryption and decryption functions are taking on more and more complex and important tasks, so the data interaction of the on-board chips in the server will become more and more frequent as the functions become more complex and the business data becomes larger. Considering the data forwarding rate, most of them use FPGA chips for data forwarding, which can provide sufficient rate redundancy space.

[0003] At present, the existing method for multi-channel data forwarding based on FPGA is that one device chip sends 8 channel data segments corresponding to eight channels as channel data. If the data frame corresponding to a certain device is determined to be invalid or erroneous, the preset constant value is sent as channel data to the channel data monitoring module to inform the opposite chip that this data is invalid data. However, this method is based on hardware pins to determine the number of interconnected channels. If 8 chips are interconnected in pairs, each chip must reserve 8 interconnected pins. If the number of pins continues to increase, there will eventually be an upper limit on the capacity of business applications limited by the number of physical pins of the chip, and the number of opposite ends of the chip communication cannot be increased at will. Summary of the invention

[0004] 1. Technical issues to be resolved

[0005] The technical problem to be solved by the present invention is how to provide a method for multi-path forwarding of network data packets based on FPGA board to solve the problem that a forwarding path exceeding the upper limit of the number of chip pins cannot be established.

[0006] (II) Technical solution

[0007] In order to solve the above technical problems, the present invention proposes a method for multi-path forwarding of network data packets within an FPGA board, the method comprising the following steps:

[0008] S1, receive the data packet to be forwarded, separate the physical MAC address and data part of the data packet, and store them in two registers respectively;

[0009] S2, read the MAC address in the register, and compare it with the physical MAC addresses of all chips that need to communicate with each other one by one. If there is a match, it will be sent to the arbitration module to wait for the next step. If the corresponding MAC address is not matched, the data packet in another register corresponding to this MAC value will be discarded;

[0010] S3. When multiple data are transmitted concurrently, there will be data forwarding conflicts. At this time, the arbitration module will decide the order of forwarding each data channel.

[0011] (III) Beneficial effects

[0012] The present invention proposes a method for multi-channel forwarding of network data packets within an FPGA board. Compared with the prior art, the method of replacing multi-channel physical pin forwarding with modular data forwarding and arbitration adopted in the technical solution proposed by the present invention solves the problem that a forwarding path exceeding the upper limit of the number of chip pins cannot be established, and the method can perform module reuse. Each chip can realize the data forwarding function by adding this part of code, without the need to configure the corresponding pins for each chip under conditional constraints. Only the MAC forwarding table that needs to be forwarded needs to be updated, thereby realizing the function reuse of the module. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is the main flow chart of the technical solution of the present invention;

[0014] Figure 2 Figure 2 shows the cross-shard data transmission diagram. DETAILED DESCRIPTION

[0015] In order to make the purpose, content and advantages of the present invention more clear, the specific implementation methods of the present invention are further described in detail below in conjunction with the drawings and examples.

[0016] The purpose of the present invention is to provide a method for arbitrarily increasing the number of communication paths between chips on a board on a fixed physical communication port.

[0017] Figure 1 It is the main flow chart of the technical solution of the present invention. Figure 1 As shown, the present invention provides a method for multi-path forwarding of network data packets within an FPGA board, comprising the following steps:

[0018] S1, receive the data packet to be forwarded, separate the physical MAC address and data part of the data packet, and store them in two registers respectively;

[0019] First, according to the AXIS-Stream data protocol, the validity of the data is determined through the valid, last, and keep data signals. Then, according to the internal protocol, the first 8 bits of the physical MAC address and the data part of the data are separated and stored in two registers respectively.

[0020] S2. Read the MAC address in the register and compare it with the physical MAC addresses of all chips that need to communicate with each other. If there is a match, it will be sent to the arbitration module to wait for the next step. If the corresponding MAC address is not matched, the data packet in another register corresponding to this MAC value will be discarded.

[0021] like Figure 2 As shown in the figure, data forwarding also includes cross-chip forwarding. When a chip receives a packet of data and the MAC address of the chip is not the MAC carried by the packet, but exists in the MAC forwarding table, it is cross-chip data forwarding. After the chip makes a judgment, it continues to forward to the next chip until it is sent to the chip corresponding to the destination MAC address.

[0022] S3. When multiple data are transmitted concurrently, there will be data forwarding conflicts. At this time, the arbitration module will decide the order of forwarding each data channel.

[0023] For the convenience of operation, no matter how many data channels are coming in, or no data is sent, the arbitration module will receive the flag signal of whether the data in each channel is empty, and poll all channels recorded in the MAC forwarding table. Once data is received and needs to be forwarded, it will be arbitrated and sent immediately.

[0024] Furthermore, a shift register method is used to poll all the paths recorded in the MAC forwarding table.

[0025] Furthermore, by adding data forwarding and arbitration codes to each chip, data forwarding and arbitration function modules can be reused.

[0026] Furthermore, corresponding pins are configured for each chip under conditional constraints, and the functional reuse of the module is achieved by updating the MAC forwarding table that needs to be forwarded.

[0027] Compared with the prior art, the method of replacing multi-channel physical pin forwarding with modular data forwarding and arbitration adopted in the technical solution proposed by the present invention solves the problem of being unable to establish a forwarding path that exceeds the upper limit of the number of chip pins, and this method can perform module reuse. Each chip can realize the data forwarding function by adding this part of code, without the need to configure the corresponding pins for each chip under conditional constraints. It only needs to update the MAC forwarding table that needs to be forwarded, thereby realizing the functional reuse of the module.

[0028] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A method for multi-channel forwarding of network data packets within an FPGA board, characterized in that: The method comprises the following steps: S1, receive the data packet to be forwarded, separate the physical MAC address and data part of the data packet, and store them in two registers respectively; S2, read the MAC address in the register, and compare it with the physical MAC addresses of all chips that need to communicate with each other one by one. If there is a match, it will be sent to the arbitration module to wait for the next step. If the corresponding MAC address is not matched, the data packet in another register corresponding to this MAC value will be discarded; S3. When multiple data are transmitted concurrently, there will be data forwarding conflicts. At this time, the arbitration module will decide the order of forwarding each data channel.

2. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 1, characterized in that: In S1, after receiving the data packet, the validity of the data is determined according to the AXIS-Stream data protocol.

3. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 2, characterized in that: The validity of the data is determined by valid, last, and keep data signals.

4. The method for multi-channel forwarding of network data packets based on FPGA board as claimed in claim 2, characterized in that: In S1, according to the internal protocol, the first 8 bits of the physical MAC address and the data part of the data are separated and stored in two registers respectively.

5. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 4, characterized in that: In S2, data forwarding also includes a cross-slice forwarding function.

6. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 5, characterized in that: In S2, when a chip receives a packet of data and the MAC address of the chip is not the MAC carried by the packet, but exists in the MAC forwarding table, it is cross-chip data forwarding. After this chip makes a judgment, it continues to forward it to the next chip until it is sent to the chip corresponding to the destination MAC address.

7. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 4, characterized in that: In S3, when multiple channels of data are transmitted concurrently, the arbitration module receives a flag signal indicating whether the data in each channel is empty, and polls all channels recorded in the MAC forwarding table. Once data is received and needs to be forwarded, it is immediately arbitrated and sent first.

8. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 7, characterized in that: The shift register method is used to poll all the paths recorded in the MAC forwarding table.

9. The method for multi-path forwarding of network data packets based on FPGA board according to any one of claims 1 to 8, characterized in that: By adding data forwarding and arbitration codes to each chip, data forwarding and arbitration function modules can be reused.

10. The method for multi-path forwarding of network data packets based on FPGA board as claimed in claim 9, characterized in that: The corresponding pins are configured for each chip under conditional constraints, and the functional reuse of the module is achieved by updating the MAC forwarding table that needs to be forwarded.

Citation Information

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