LoRa-based high-precision real-time clock synchronization method and system

Abstract

The invention provides a LoRa-based high-precision real-time clock synchronization method and a LoRa-based high-precision real-time clock synchronization system, relates to the technical field of wireless communication, and aims to solve the problems that in the prior art, the clock synchronization precision is insufficient, the complex environment adaptability is poor, and the time of equipment is not synchronous due to clock drift and delay accumulation. The method comprises the following steps: a master device sends a first sending timestamp to a slave device; performing first time calibration on the slave device clock according to the first sending timestamp; after the set time calibration period, the slave device clock carries out second time calibration; and dynamically adjusting the real-time clock of the slave device, continuing to perform third time calibration by the slave device, updating the time calibration period, and circularly executing time calibration according to the updated time calibration period until the power-on is finished. According to the method, the defects in the prior art are overcome, the bidirectional synchronization protocol is provided, the delay compensation technology is combined, the time calibration period is updated, and the real-time synchronization precision of the master and slave devices is improved through multiple times of time calibration and dynamic adjustment.

Description

Technical Field

[0001] The present invention belongs to the technical field of wireless communications, and in particular relates to a high-precision real-time clock synchronization method and system based on LoRa. Background Art

[0002] The statements in this section merely provide background information related to the present invention and do not necessarily constitute prior art.

[0003] In wireless communication network transmission, clock synchronization is an important part, and clock synchronization is the basis for the development of various services. Ordinary clocks (OC) include two types: master clocks and slave clocks. The frequency, period, phase and duty cycle of each clock signal may be different. The accuracy of the clock synchronization of the entire network is the key factor affecting whether it can provide accurate services. When the clock synchronization performance of the entire network is poor, for some measurements with high time accuracy requirements, large data errors may occur. More seriously, it may cause congestion of the entire network and cause the network to paralyze. Therefore, technologies for achieving clock synchronization are emerging in an endless stream.

[0004] The inventors have found that the existing clock synchronization technology has the following deficiencies:

[0005] (1) Existing distributed clock synchronization methods (such as one-way time synchronization protocols) cannot achieve high-precision synchronization in low-bandwidth, long-distance environments due to uncertainty in communication delays. The GPS synchronization method requires stable satellite signal coverage, and signals are difficult to receive in underground pipe networks and obstructed environments, resulting in synchronization failure or insufficient accuracy.

[0006] Under low-precision synchronization, time deviations between devices will accumulate, seriously affecting the leak location system based on time difference (TDOA). In long-distance pipe networks, errors may cause positioning deviations of more than 1 meter, which cannot meet actual application requirements.

[0007] (2) In actual application scenarios, such as heating networks or smart IoT, LoRa signal transmission is affected by signal reflection, interference, and noise, and existing synchronization algorithms are poorly adaptable to these complex environments. The asymmetry of network delays (such as different upload and downlink delays) is not effectively compensated, resulting in reduced synchronization accuracy.

[0008] In complex environments, clock drift and delay accumulation lead to time asynchrony between devices, affecting the overall operating efficiency and reliability of the system.

[0009] (3) Traditional GPS synchronization methods require high-power devices and are difficult to meet long-term operation requirements, especially in low-power IoT devices. Synchronization solutions based on Wi-Fi or cellular networks require high communication frequencies and power consumption, which limits the deployment range and service life of the device.

[0010] High power consumption limits the independent operation cycle of the equipment, increases maintenance costs and operational complexity, and makes large-scale deployment impossible, reducing the applicability of the system.

[0011] (4) Distributed devices need to rely on dedicated hardware (such as precision clock sources) and complex configuration processes, which increases the deployment cost and technical threshold of the system. Traditional clock synchronization solutions have high requirements for device hardware, and existing algorithms do not fully consider the adaptability of resource-constrained devices.

[0012] The difficulty of equipment deployment increases, especially in large-scale scenarios, where deployment time and cost increase significantly. System stability depends on hardware and is easily affected by single point failures.

[0013] (5) The existing calibration technology is not accurate enough. It only considers the accuracy of the time at the calibration moment, but does not consider the accuracy of the slave device time after calibration. The real-time clock synchronization accuracy of the slave device is low, and the real-time synchronization of the master and slave devices cannot be guaranteed.

[0014] (6) The traditional calibration method uses a fixed-cycle calibration mode. If the clock is unstable, the fixed cycle will make the calibration inaccurate, and the cycle should be shortened. If the clock is stable and offset, it will cause waste of power consumption, and the cycle should be extended. Summary of the invention

[0015] In order to overcome the deficiencies of the above-mentioned prior art, the present invention provides a high-precision real-time clock synchronization method and system based on LoRa. The master-slave clock synchronization protocol and the bidirectional clock synchronization protocol are adopted to achieve high-precision clock synchronization through transmission delay compensation. The delay asymmetry compensation and dynamic drift prediction are used to solve the problems of decreased synchronization accuracy caused by network delay fluctuations and clock drift in complex environments.

[0016] To achieve the above objectives, one or more embodiments of the present invention provide the following technical solutions:

[0017] The first aspect of the present invention discloses a high-precision real-time clock synchronization method based on LoRa, comprising:

[0018] S1. The master device sends a first sending timestamp to the slave device;

[0019] S2. The slave device performs a first time calibration according to the first sending timestamp to obtain a first calibration time of the slave device;

[0020] S3. After the first time calibration, after the set time calibration period, the slave device clock performs the second time calibration, obtains the second calibration time of the slave device, and calculates the clock offset rate of the second calibration time:

[0021] S4, dynamically adjusting the slave device real-time clock according to the second calibration time of the slave device and the clock offset rate of the second calibration time, to obtain a dynamically adjusted slave device real-time time;

[0022] S5. After the second time calibration, after a set time calibration period, the slave device clock performs a third time calibration to obtain the third calibration time of the slave device, and calculates the clock offset rate of the third calibration time;

[0023] S6. Update the time calibration period according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and continue to perform time calibration on the slave device according to the updated time calibration period;

[0024] S7. During power-on, continue to execute steps S4 to S6 in a loop.

[0025] As a further technical solution, after the master and slave devices are powered on, before the first time calibration is performed, the one-way delay is calculated. The specific process is:

[0026] A one-way slave sends a timestamp to the master;

[0027] The master device sends a timestamp to the master device in a one-way return.

[0028] When the slave device receives the timestamp sent by the one-way master device, it records the timestamp received by the slave device;

[0029] The one-way delay is obtained based on the timestamp sent from the device and the timestamp received from the device.

[0030] As a further technical solution, a first time calibration is performed from the device clock, specifically, a first calibration time is calculated based on the first sending timestamp and the one-way delay.

[0031] As a further technical solution, a second time calibration is performed from the device clock. The specific process is as follows:

[0032] Set the time calibration period;

[0033] After the first sending timestamp of the master device passes the set time calibration period, the master device sends the second sending timestamp to the slave device;

[0034] Receive a second sending timestamp from the device and record a second receiving timestamp;

[0035] The slave device performs a second time calibration according to the second sending timestamp to obtain a second calibration time.

[0036] As a further technical solution, the clock offset rate of the second calibration time of the slave device is calculated. The specific process is as follows:

[0037] Calculate the slave device clock offset according to the second sending timestamp, the second receiving timestamp and the one-way delay;

[0038] Calculate the time interval between the first time calibration and the second time calibration of the slave device according to the first sending timestamp and the second sending timestamp;

[0039] According to the clock offset of the slave device and the time interval, the clock offset rate of the second calibration time is obtained.

[0040] As a further technical solution, the real-time clock of the slave device is dynamically adjusted, and the formula is:

[0041] t out =t clock +k 2 *(t clock -T sync2 ):

[0042] Among them, t out Indicates the real-time time of the slave device after dynamic adjustment, t clock Indicates the real time of the slave system, T syncn Indicates the second calibration time of the slave device, k 2 Indicates the clock drift rate of the second calibration time.

[0043] As a further technical solution, the time calibration period is updated according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time. The formula is:

[0044] Q=△T max / |k 3 -k 2 |;

[0045] Among them, △T max k is the maximum clock deviation allowed for system operation. 2 is the clock offset rate at the second calibration time, k 3 is the clock drift rate at the third calibration time.

[0046] The second aspect discloses a high-precision real-time clock synchronization system based on LoRa, comprising:

[0047] A master device sending timestamp module, used for the master device to send a first sending timestamp to the slave device;

[0048] A first calibration module, used for performing a first time calibration on the slave device according to a first sending timestamp, to obtain a first calibration time of the slave device;

[0049] The second calibration module is used to perform a second time calibration on the slave device after the first time calibration, after a set time calibration period, to obtain the second calibration time of the slave device, and to calculate the clock offset rate of the second calibration time;

[0050] A dynamic adjustment module, used for dynamically adjusting the slave device real-time clock according to the second calibration time of the slave device and the clock offset rate of the second calibration time, to obtain the dynamically adjusted slave device real-time time;

[0051] The third calibration module is used to perform a third time calibration on the slave device clock after the second time calibration and after a set time calibration period, obtain the third calibration time of the slave device, and calculate the clock offset rate of the third calibration time.

[0052] A time calibration cycle updating module, used to update the time calibration cycle according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and continue to perform time calibration from the device according to the updated time calibration cycle;

[0053] The cyclic calibration module is used to continuously cycle through steps S4 to S6 during power-on.

[0054] The third aspect of the present invention discloses a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method described in the first aspect when executing the program.

[0055] The fourth aspect of the present invention aims to provide a computer-readable storage medium having a program stored thereon, which, when executed by a processor, implements the steps in the method described in the first aspect of the present invention.

[0056] One or more of the above technical solutions have the following beneficial effects:

[0057] (1) This embodiment achieves sub-millisecond high-precision clock synchronization through a two-way synchronization protocol and transmission delay compensation technology. The synchronization accuracy is within 100 microseconds, which is more than 10 times higher than the existing solution based on a one-way synchronization protocol (synchronization accuracy>1 millisecond). In long-distance (>1 km) pipe network applications, error accumulation is significantly reduced, meeting the needs of high-precision leak location.

[0058] (2) This embodiment solves the problem of decreased synchronization accuracy caused by network delay fluctuations and clock drift in complex environments through delay asymmetry compensation and dynamic drift prediction. In a complex environment with 70dB noise and multipath interference, the clock synchronization error is kept within 0.2 milliseconds, and the stability is improved by 50% compared with the existing method. Even if the LoRa signal is interfered (such as RSSI <-100dBm), the synchronization success rate is still over 95%.

[0059] (3) This embodiment combines the low power consumption characteristics of LoRa technology and optimizes the synchronization frequency and protocol design to significantly reduce the energy consumption of the device. The power consumption of a single device is reduced by 30% to 40%, and the battery life is more than doubled compared to traditional GPS synchronization. The device can operate continuously for more than 5 years in battery-powered mode, significantly reducing the frequency of device maintenance and replacement.

[0060] (4) This embodiment adopts a lightweight synchronization protocol to reduce the device's dependence on high-precision hardware clocks, thereby simplifying the complexity of device deployment and system integration.

[0061] (5) This embodiment uses LoRa communication to replace the high-cost GPS module, and reduces the dependence on high-end hardware through a lightweight protocol. The cost of a single-node device is reduced by 30% to 50%, which is particularly suitable for resource-constrained IoT applications. The overall deployment cost of the system is reduced by 20% to 40% compared with traditional methods, providing an economical and efficient solution for industries such as heat, water supply, and gas.

[0062] (6) This embodiment combines multiple time calibration and dynamic adjustment of the slave device, which not only ensures the accuracy of the time at the calibration moment, but also fully considers the accuracy of the slave device time after calibration, improves the synchronization accuracy of the slave device real-time clock, and ensures true real-time synchronization of the master and slave devices.

[0063] (7) This example dynamically adjusts the calibration period according to the time calibration coefficient, and can maximize the period within a relatively accurate time period, thereby reducing the number of time calibration communications and further reducing power consumption.

[0064] Advantages of additional aspects of the present invention will be given in part in the following description, and in part will become obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0065] The accompanying drawings in the specification, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0066] Figure 1 This is a flow chart of a high-precision real-time clock synchronization method based on LoRa according to Embodiment 1 of the present invention. DETAILED DESCRIPTION

[0067] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0068] It should be noted that the terms used herein are for describing specific embodiments only and are not intended to be limiting of exemplary embodiments according to the present invention.

[0069] In the absence of conflict, the embodiments of the present invention and the features of the embodiments may be combined with each other.

[0070] Embodiment 1

[0071] This embodiment discloses a high-precision real-time clock synchronization method based on LoRa.

[0072] In order to more clearly illustrate this embodiment, a high-precision real-time clock synchronization implementation process based on LoRa can be specifically described as follows:

[0073] A high-precision real-time clock synchronization method based on LoRa, comprising:

[0074] S1. The master device sends a first sending timestamp to the slave device;

[0075] S2. The slave device performs a first time calibration according to the first sending timestamp to obtain a first calibration time of the slave device;

[0076] S3. After the first time calibration, after the set time calibration period, the slave device performs the second time calibration, obtains the second calibration time of the slave device, and calculates the clock offset rate of the second calibration time:

[0077] S4, dynamically adjusting the slave device real-time clock according to the second calibration time of the slave device and the clock offset rate of the second calibration time, to obtain a dynamically adjusted slave device real-time time;

[0078] S5. After the second time calibration, after a set time calibration period, the slave device clock performs a third time calibration to obtain the third calibration time of the slave device, and calculates the clock offset rate of the third calibration time;

[0079] S6. Update the time calibration period according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and continue to perform time calibration on the slave device according to the updated time calibration period;

[0080] S7. During power-on, continue to execute steps S4 to S6 in a loop.

[0081] In this embodiment, a synchronization protocol based on a master-slave architecture is adopted, where the master device is responsible for broadcasting the time reference, and the slave device receives and adjusts the local clock.

[0082] Specifically, (1) the master device broadcasts the timestamp. The master device periodically broadcasts the timestamp T send .

[0083] (2) Receive the timestamp from the device and record the time when the broadcast was received T recv .

[0084] (3) Calculate the one-way delay. Assuming that the transmission delay of LoRa is d, the synchronization time of the slave device is:

[0085] T sync =T send +d(1)

[0086] Among them, T sync represents the synchronization time of the slave device, d represents the one-way delay, T send Represents the timestamp sent by the master device. d can be measured experimentally or estimated dynamically to compensate for the uncertainty of network delay.

[0087] In this embodiment, in order to eliminate the asymmetry of transmission delay, bidirectional interaction is added on the basis of the master-slave architecture. By continuously performing bidirectional synchronization, the master device can more accurately predict and compensate for clock drift.

[0088] like Figure 1 As shown, in step S1, the master device sends a first sending timestamp to the slave device.

[0089] In this embodiment, the master device sends a time calibration command to the slave device. When sending a data packet, the master device time at this moment is written into the data packet, i.e., the first sending timestamp T send1 .

[0090] like Figure 1 As shown, in step S2, the slave device performs a first time calibration according to the first sending timestamp to obtain the first calibration time of the slave device.

[0091] S2-1. After the master and slave devices are powered on, before the first time calibration is performed, the one-way delay is calculated.

[0092] Because the device processor needs to calculate and process data packets, and transmission over the air takes time, a relatively fixed delay time will be generated.

[0093] In this embodiment, the specific process of calculating the one-way delay is:

[0094] (1) A one-way slave device sends a timestamp to the master device.

[0095] The slave device sends a one-way delay calculation data packet, and the slave device time is written in the data packet, that is, the one-way slave device sends the timestamp T ycsend .

[0096] (2) The master device sends back a one-way timestamp to the master device.

[0097] After receiving the data packet, the master device immediately sends the data packet back to the slave device.

[0098] (3) When the slave device receives the timestamp sent by the one-way master device, it records the one-way slave device receiving timestamp.

[0099] When the slave device receives the data packet, it records the time of receipt from the device itself, that is, the one-way slave device receives the timestamp T ycrecev .

[0100] (4) According to the one-way slave device sending timestamp and the one-way slave device receiving timestamp, the one-way delay is obtained.

[0101] According to the one-way slave device sending timestamp T ycsend and a one-way slave receiving timestamp T ycrecev , calculate the one-way delay, the formula is:

[0102] d=(T ycrecev -T ycsend ) / 2(2)

[0103] Where d is the one-way delay, T ycsend Indicates one-way sending of timestamp from the device, T ycrecev Indicates one-way reception of timestamp from the device.

[0104] After the above steps, the one-way delay is calculated, which is an important indicator to measure the time deviation between two devices. It can effectively compensate for the time delay caused by network conditions (such as transmission distance, signal strength changes, etc.), which is especially important for long-distance communication, and can reduce error accumulation and improve the accuracy of positioning and synchronization.

[0105] S2-2. The slave device performs a first time calibration according to the first sending timestamp and the one-way delay.

[0106] In this embodiment, according to formula (1), the first calibration time is obtained:

[0107] T sync1 =T send1 +d(3)

[0108] Among them, T sync1 Indicates the first calibration time of the slave device, T send1 represents the first sending timestamp, and d represents the one-way delay.

[0109] In this embodiment, the real-time clock of the slave device is adjusted to the first calibration time, and the master and slave devices achieve clock synchronization.

[0110] like Figure 1 As shown, in step S3, after the first time calibration, after a set time calibration period, the slave device performs a second time calibration to obtain the second calibration time of the slave device, and calculates the clock offset rate of the second calibration time.

[0111] S3-1. Perform a second time calibration from the device clock.

[0112] In this embodiment, the second time calibration has the following specific process:

[0113] (1) Set the time calibration period;

[0114] In this embodiment, the timing period is set to Q.

[0115] (2) After the master device sends the first sending timestamp after a set time calibration period, it sends the second sending timestamp to the slave device;

[0116] The master device is in T send1 At time +Q, the master device sends a data packet to the slave device, and the data packet contains the master device time at this moment, that is, the second sending timestamp T send2 .

[0117] (3) receiving a second sending timestamp from the device and recording a second receiving timestamp;

[0118] The slave device receives the data packet and records the time when the slave device receives the data packet, i.e. the second receiving timestamp T recv2 .

[0119] (4) The slave device performs a second time calibration based on the second sending timestamp to obtain a second calibration time, and the formula is:

[0120] T sync2 =T send2 +d(4)

[0121] Among them, T sync2 Indicates the second calibration time of the slave device, T send2 represents the second sending timestamp, and d represents the one-way delay.

[0122] In this embodiment, the real-time clock of the slave device is adjusted to the second calibration time, and the master and slave devices achieve clock synchronization.

[0123] S3-2. Calculate the clock offset rate of the second calibration time.

[0124] In this embodiment, the clock offset rate of the second calibration time of the slave device is calculated, and the specific process is:

[0125] (1) Calculate the clock offset of the slave device according to the second sending timestamp, the second receiving timestamp and the one-way delay. The formula is:

[0126] △T 1 =T recv2 -T send2 -d(5)

[0127] Among them, △T represents the clock offset of the slave device, T recv2 Indicates the second receiving timestamp, T send2 represents the second sending timestamp, and d represents the one-way delay.

[0128] (2) According to the first sending timestamp and the second sending timestamp, the time interval between the first time calibration and the second time calibration of the slave device is calculated, and the formula is:

[0129] △t 1 =T send2 -T send1 (6)

[0130] Where △t represents the time interval between the second time calibration and the first time calibration, T send2 Second send timestamp, T send1 Indicates the first sending timestamp.

[0131] (3) According to the clock offset of the slave device and the time interval, the clock offset rate of the second calibration time is obtained, and the formula is:

[0132] K 2 =△T 1 / △t 1 (7)

[0133] Among them, K 2 Indicates the clock deviation rate of the second calibration time, △T 1 Indicates the first clock offset of the slave device, △t 1 Indicates the time interval between the second time calibration and the first time calibration.

[0134] like Figure 1 As shown, in step S4, the real-time clock of the slave device is dynamically adjusted according to the second calibration time of the slave device and the clock offset rate of the second calibration time to obtain the dynamically adjusted real-time time of the slave device.

[0135] In this embodiment, at the current moment when the slave device real-time clock is calibrated (adjusted), the slave device clock is accurate, but the slave device system clock will become inaccurate after it continues to move. In order to make the slave device system real-time clock more accurate, when the slave device clock is used normally, the program will automatically and dynamically adjust it to compensate for the offset of the used time, but the slave device real-time clock will not be actually adjusted.

[0136] The dynamic adjustment formula is:

[0137] t out =t clock +k 2 *(t clock -T sync2 )(8)

[0138] Among them, t out is the real-time time of the slave device after dynamic adjustment, t clock is the real time of the slave system, t sync2 is the second calibration time, k 2 Indicates the clock drift rate of the second calibration time.

[0139] Through the above steps, not only the clock of the slave device is guaranteed to be accurate during the calibration, but also the slave device software system can use the accurate clock with a small offset maintained by the slave device at a certain moment between two calibrations.

[0140] like Figure 1 As shown, in step S5, after the second time calibration, after a set time calibration period, the slave device clock performs a third time calibration to obtain the third calibration time of the slave device, and calculates the clock offset rate of the third calibration time.

[0141] In this embodiment, the steps are the same as the process in step S3. According to steps S3-1 and S3-2, the third calibration time and the clock offset rate k3 of the third calibration time are obtained.

[0142] like Figure 1 In step S6, the time calibration period is updated according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and the slave device continues to perform time calibration according to the updated time calibration period.

[0143] In order to make the time calibration cycle more accurate, each time the updated offset rate is obtained, the updated offset rate, that is, the current offset rate, is compared with the offset rate of the previous time calibration, and the time calibration cycle is adjusted according to the comparison result.

[0144] In this embodiment, (1) the time calibration period is updated according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and the formula is:

[0145] Q=△T max / |k 3 -k 2 | (9);

[0146] Among them, △T max k is the maximum clock deviation allowed for system operation. 2 is the clock offset rate at the second calibration time, k 3 is the clock deviation rate at the third calibration time. △T max The size depends on the actual device situation, such as 50 microseconds.

[0147] After the third time calibration, the updated time calibration period is returned to the master device. After the updated time calibration period, the master device sends the fourth sending timestamp to the slave device, and the slave device continues to perform time calibration.

[0148] If the offset rate remains constant, the time calibration period is set to a fixed duration, such as 7 days.

[0149] According to the updated time calibration cycle, the slave device mechanically calibrates the clock to ensure the accuracy of the slave device clock and achieve real-time clock synchronization between the master and slave devices.

[0150] After the above steps, when the system clock offset rate remains basically unchanged, the maximum time calibration cycle can be achieved, thereby further reducing the number of time calibrations and reducing device power consumption.

[0151] like Figure 1 In step S7, during the power-on period, steps S4 to S6 are continuously and cyclically executed.

[0152] In this embodiment, the master and slave devices continue to work during power-on, and according to step S4, the real-time clock of the slave device is dynamically adjusted according to the third calibration time and the clock offset rate of the third calibration time; according to step S5, after the third time calibration, the updated time calibration period is returned to the master device, and the master device sends a fourth sending timestamp to the slave device after the updated time calibration period, and the slave device performs a fourth time calibration according to the fourth sending timestamp, and calculates the clock offset rate of the fourth calibration time; according to step S6, the time calibration period is continued to be updated according to the clock offset rate of the third calibration time and the clock offset rate of the fourth calibration time, and the updated time calibration period is sent to the master device, and the master device sends a timestamp to the slave device according to the latest time calibration period, and the slave device continues to perform time calibration until power-on is completed.

[0153] Repeat the above process, if the Nth time calibration is performed before the power-on is completed. Specifically:

[0154] (1) After the Nth clock calibration, the Nth sending timestamp T is obtainedsendn、 The Nth receiving timestamp T recvn and the Nth calibration time, the Nth calibration time is

[0155] T syncn =T sendn +d(10)

[0156] Among them, T syncn Indicates the Nth calibration time, T sendn represents the Nth sending timestamp, and d represents the one-way delay.

[0157] Among them, T syncn Indicates the slave device time after the Nth calibration, T sendn represents the Nth sending timestamp, and d represents the one-way delay.

[0158] (2) According to the Nth receiving timestamp, the Nth sending timestamp and the one-way delay, the clock offset of the slave device is obtained. The formula is:

[0159] △T=T recvn -T sendn -d(11)

[0160] Among them, △T represents the clock offset of the slave device, T recvn Indicates the Nth receiving timestamp, T sendn represents the Nth sending timestamp, and d represents the one-way delay.

[0161] (3) According to the N-1th sending timestamp and the Nth sending timestamp, the time interval between the Nth time calibration and the N-1th time calibration is obtained. The formula is:

[0162] △t=T sendn -T sendn-1 (12)

[0163] Where △t represents the time interval between the Nth time calibration and the N-1th time calibration, T sendn The Nth sending timestamp, T sendn-1 Indicates the N-1th sending timestamp.

[0164] In this embodiment, the value of Δt should be the same as the set timing period Q.

[0165] (4) Updated offset rate, the formula is:

[0166] K n =△T / △t(13)

[0167] Among them, K n It represents the offset rate of the Nth time calibration, △T represents the clock offset of the slave device, and △t represents the time interval between the Nth time calibration and the N-1th time calibration.

[0168] (5) Update the time calibration period. The formula is:

[0169] Q=△T max / |k n -k n-1 | (14)

[0170] Among them, △T max The maximum clock deviation allowed for system operation. △T max The size depends on the actual device situation, such as 50 microseconds.

[0171] The time calibration continues according to the latest time calibration cycle until the power-on is completed.

[0172] Realize real-time clock synchronization between master and slave devices, for example:

[0173] (1) The master device is running all the time, and the slave device clock is turned on and running at 9:00:10, and then runs normally and stably.

[0174] At 9:00:25 on the slave device clock, the slave device sends a "calculate one-way delay data packet" to the master device. The data packet contains the current slave device sending time "9:00:25".

[0175] (2) At 9:00:26 on the slave device clock, the master device receives the above “calculate one-way delay data packet” and immediately sends it back to the slave device;

[0176] At 9:00:27, the slave device receives the "calculate one-way delay data packet" returned by the master device, records the receiving time "9:00:27", and then calculates the one-way delay d = (9:00:27-9:00:25) / 2 = 1s

[0177] (3) Set the initial value Q = 10min. Assume that the slave device clock is 1 minute slower than the master device during the first time calibration.

[0178] The master device clock is 9:10:26, and the master device sends the first sending timestamp "9:10:26".

[0179] The master device clock is 9:10:27 (the slave device clock is 9:09:27). The slave device receives the first timestamp sent by the master device and then adjusts its own clock to 9:10:26+d=9:10:27. At this moment, the clocks of both devices become 9:10:27, completing the first time calibration and the slave device clock is accurate.

[0180] (4) After Q time, the master device clock is 9:20:26, and the master device sends the second sending timestamp "9:20:26";

[0181] The master device clock is 9:20:27 (the slave device clock is 9:19:27). The slave device receives the second timestamp sent by the master device and adjusts its own clock to 9:20:26+d=9:20:27. At this moment, the clocks of both devices become 9:20:27, completing the second time calibration and the slave device clock is accurate. At the same time, the offset rate k2=1min / 10min=10% is calculated.

[0182] After this time synchronization, before the next time synchronization, the clock used by the slave device system software is dynamically adjusted, that is, starting from 9:20:27, it is adjusted according to k2=10%. For example, if the slave device system clock reaches 9:25:27, the system dynamically adjusted clock is 9:25:27+5min*10%=9:20:57. The dynamic adjustment is completed and the slave device time is accurate.

[0183] (5) After Q time, the master device clock is 9:30:26 and the master device sends the third sending timestamp "9:30:26";

[0184] The master device clock is 9:30:27 (the slave device clock is 9:29:27). The slave device receives the third timestamp sent by the master device, and then adjusts its own clock to 9:30:26+d=9:30:27, completing the third time calibration. At this moment, both device clocks become 9:30:27, and the slave device clock is accurate. Calculate the offset rate k3=1min / 10min=10%. Compare k2 and k3 to get the new calibration period Q.

[0185] According to the new time calibration cycle Q, steps S4 to S6 are repeated until the power-on is completed.

[0186] In this embodiment, the clock offset rate of two consecutive calibration times is calculated, and the calibration period is updated according to the offset rate. After a new calibration period, the master device calibrates the slave device, and then recalculates the offset rate and the calibration period; and so on, until the Nth calibration.

[0187] In this embodiment, in order to ensure real-time synchronization of the master and slave device clocks, the slave device clock cyclically performs time calibration and dynamic adjustment based on the continuous updating of the time calibration cycle, thereby improving the accuracy of real-time synchronization of the master and slave device clocks.

[0188] Embodiment 2

[0189] The purpose of this embodiment is to provide a high-precision real-time clock synchronization system based on LoRa, including:

[0190] A master device sending timestamp module, used for the master device to send a first sending timestamp to the slave device;

[0191] A first calibration module, used for performing a first time calibration on the slave device according to a first sending timestamp, to obtain a first calibration time of the slave device;

[0192] The second calibration module is used to perform a second time calibration on the slave device after the first time calibration, after a set time calibration period, to obtain the second calibration time of the slave device, and to calculate the clock offset rate of the second calibration time;

[0193] A dynamic adjustment module, used for dynamically adjusting the slave device real-time clock according to the second calibration time of the slave device and the clock offset rate of the second calibration time, to obtain the dynamically adjusted slave device real-time time;

[0194] The third calibration module is used to perform a third time calibration on the slave device clock after the second time calibration and after a set time calibration period, obtain the third calibration time of the slave device, and calculate the clock offset rate of the third calibration time.

[0195] A time calibration cycle updating module, used to update the time calibration cycle according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and continue to perform time calibration from the device according to the updated time calibration cycle;

[0196] The cyclic calibration module is used to continuously cycle through steps S4 to S6 during power-on.

[0197] Based on providing a high-precision real-time clock synchronization system based on LoRa, the method steps in Example 1 are implemented.

[0198] Embodiment 3

[0199] The purpose of this embodiment is to provide a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above method when executing the program.

[0200] Embodiment 4

[0201] The purpose of this embodiment is to provide a computer-readable storage medium on which a program is stored. When the program is executed by a processor, the steps in the method described above are implemented.

[0202] The steps involved in the apparatus of the above embodiment correspond to the method embodiment 1, and the specific implementation method can refer to the relevant description part of embodiment 1. The term "computer-readable storage medium" should be understood as a single medium or multiple media including one or more instruction sets; it should also be understood to include any medium that can store, encode or carry an instruction set for execution by a processor and enable the processor to execute any method in the present invention.

[0203] Those skilled in the art should understand that the modules or steps of the present invention described above can be implemented by a general-purpose computer device, or alternatively, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. The present invention is not limited to any specific combination of hardware and software.

[0204] Although the above describes the specific implementation mode of the present invention in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A high-precision real-time clock synchronization method based on LoRa, characterized in that: include: S1. The master device sends a first sending timestamp to the slave device; S2. The slave device performs a first time calibration according to the first sending timestamp to obtain a first calibration time of the slave device; S3. After the first time calibration, after the set time calibration period, the slave device performs the second time calibration, obtains the second calibration time of the slave device, and calculates the clock offset rate of the second calibration time: S4, dynamically adjusting the slave device real-time clock according to the second calibration time of the slave device and the clock offset rate of the second calibration time, to obtain a dynamically adjusted slave device real-time time; S5. After the second time calibration, after a set time calibration period, the slave device clock performs a third time calibration to obtain the third calibration time of the slave device, and calculates the clock offset rate of the third calibration time; S6. Update the time calibration period according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and continue to perform time calibration on the slave device according to the updated time calibration period; S7. During power-on, continue to execute steps S4 to S6 in a loop.

2. A high-precision real-time clock synchronization method based on LoRa as claimed in claim 1, characterized in that, After the master and slave devices are powered on, before the first time calibration, the one-way delay is calculated. The specific process is as follows: A one-way slave sends a timestamp to the master; The master device sends a timestamp to the master device in a one-way return. When the slave device receives the timestamp sent by the one-way master device, it records the timestamp received by the slave device; The one-way delay is obtained based on the timestamp sent from the device and the timestamp received from the device.

3. A high-precision real-time clock synchronization method based on LoRa as claimed in claim 1, characterized in that, The first time calibration is performed from the device clock. Specifically, the first calibration time is calculated according to the first sending timestamp and the one-way delay.

4. A high-precision real-time clock synchronization method based on LoRa as claimed in claim 1, characterized in that: The second time calibration is performed from the device clock. The specific process is as follows: Set the time calibration period; After the first sending timestamp of the master device passes the set time calibration period, the master device sends the second sending timestamp to the slave device; Receive a second sending timestamp from the device and record a second receiving timestamp; The slave device performs a second time calibration according to the second sending timestamp to obtain a second calibration time.

5. A high-precision real-time clock synchronization method based on LoRa as claimed in claim 1, characterized in that: Calculate the clock offset rate of the second calibration time of the slave device. The specific process is: Calculate the slave device clock offset according to the second sending timestamp, the second receiving timestamp and the one-way delay; Calculate the time interval between the first time calibration and the second time calibration of the slave device according to the first sending timestamp and the second sending timestamp; According to the clock offset of the slave device and the time interval, the clock offset rate of the second calibration time is obtained.

6. A high-precision real-time clock synchronization method based on LoRa as claimed in claim 1, characterized in that: The slave device real-time clock is dynamically adjusted using the formula: t out =t clock +k2*(t clock -T sync2 ): Among them, t out Indicates the real-time time of the slave device after dynamic adjustment, t clock Indicates the real time of the slave system, T syncn It indicates the second calibration time of the slave device, and k2 indicates the clock offset rate of the second calibration time.

7. A high-precision real-time clock synchronization method based on LoRa as claimed in claim 1, characterized in that: Update the time calibration period according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time. The formula is: Q=△T max / |k3-k2|; Among them, △T max is the maximum clock deviation allowed for system operation, k2 is the clock deviation rate at the second calibration time, and k3 is the clock deviation rate at the third calibration time.

8. A high-precision real-time clock synchronization system based on LoRa, characterized in that: include: A master device sending timestamp module, used for the master device to send a first sending timestamp to the slave device; A first calibration module, used for performing a first time calibration on the slave device according to a first sending timestamp, to obtain a first calibration time of the slave device; The second calibration module is used to perform a second time calibration on the slave device after the first time calibration, after a set time calibration period, to obtain the second calibration time of the slave device, and to calculate the clock offset rate of the second calibration time; A dynamic adjustment module, used for dynamically adjusting the slave device real-time clock according to the second calibration time of the slave device and the clock offset rate of the second calibration time, to obtain the dynamically adjusted slave device real-time time; The third calibration module is used to perform a third time calibration on the slave device clock after the second time calibration and after a set time calibration period, obtain the third calibration time of the slave device, and calculate the clock offset rate of the third calibration time. A time calibration cycle updating module, used to update the time calibration cycle according to the clock offset rate of the second calibration time and the clock offset rate of the third calibration time, and continue to perform time calibration from the device according to the updated time calibration cycle; The cyclic calibration module is used to continuously cycle through steps S4 to S6 during power-on.

9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a program stored thereon, characterized in that: When the program is executed by a processor, the steps in the method according to any one of claims 1 to 7 are implemented.

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