Method and device for controlling high-speed transmission stability of FPC (Flexible Printed Circuit) high-performance computing chip interface

Abstract

The invention relates to a high-speed transmission stability control method and device for an FPC high-performance computing chip interface. The method comprises the following steps: performing dynamic bending three-dimensional forming on a physical transmission layer and a signal control layer to obtain an FPC interface coupling model; performing region division on the control node to obtain a signal modulation region, a signal compensation region and a signal demodulation region; performing real-time sampling analysis on the signal quality parameters to obtain signal integrity data, time sequence jitter data, crosstalk level data and signal-to-noise ratio data; performing multi-scale analysis to obtain hierarchical control parameters; performing protective edge covering and automatic bending processing on the FPC physical structure to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit to obtain electrical optimization parameters; and establishing a performance evaluation model, and carrying out iterative optimization on the FPC interface coupling model to obtain a control optimization strategy. According to the invention, the stress concentration problem of the FPC in the physical deformation process is effectively solved, and the service life of the interface is prolonged.

Description

Technical Field

[0001] The present invention relates to the technical field of interface transmission, and in particular to a method and device for controlling high-speed transmission stability of an FPC high-performance computing chip interface. Background Art

[0002] Traditional FPC interfaces face problems such as poor signal integrity, large timing jitter, and severe crosstalk interference during high-speed transmission. These problems seriously affect the stable operation of high-performance computing chips and the reliability of data transmission.

[0003] At present, the design of FPC interface mainly adopts static compensation and fixed parameter configuration, which lacks the ability to monitor and dynamically adjust the signal quality in real time. At the same time, the physical structure design of existing FPC interface often ignores the impact of mechanical stress on signal transmission, which leads to signal distortion and transmission interruption in practical applications. Summary of the invention

[0004] The main purpose of the present invention is to provide a high-speed transmission stability control method and device for an FPC high-performance computing chip interface. The present invention effectively solves the stress concentration problem of the FPC during physical deformation and prolongs the service life of the interface.

[0005] To achieve the above object, the present invention provides a high-speed transmission stability control method for an FPC high-performance computing chip interface, comprising the following steps: The physical transmission layer and the signal control layer are subjected to dynamic bending three-dimensional molding to obtain the FPC interface coupling model; Divide the control node into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region and a signal demodulation region; Based on the signal modulation area, the signal compensation area and the signal demodulation area, real-time sampling and analysis of signal quality parameters are performed to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data; Inputting the signal integrity data, the timing jitter data, the crosstalk level data and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; Performing protective hemming and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; A performance evaluation model is established based on the mechanical constraint parameters and the electrical optimization parameters, and the FPC interface coupling model is iteratively optimized to obtain a control optimization strategy.

[0006] The present invention also provides a high-speed transmission stability control device for an FPC high-performance computing chip interface, comprising: A molding module is used to perform dynamic bending three-dimensional molding on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model; A division module, used for dividing the control node into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region and a signal demodulation region; A sampling module, used for performing real-time sampling and analysis of signal quality parameters based on the signal modulation area, the signal compensation area and the signal demodulation area to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data; An analysis module, configured to input the signal integrity data, the timing jitter data, the crosstalk level data and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; A processing module, used to perform protective hemming and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and to perform compensation processing on the signal transmission circuit according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; The optimization module is used to establish a performance evaluation model based on the mechanical constraint parameters and the electrical optimization parameters, iteratively optimize the FPC interface coupling model, and obtain a control optimization strategy.

[0007] The present invention also provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any one of the above methods when executing the computer program.

[0008] The present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods are implemented.

[0009] In summary, the technical solution provided by the present invention realizes the precise modeling and physical property optimization of the FPC interface by establishing a coupling model of the physical transmission layer and the signal control layer, combined with the dynamic bending three-dimensional molding technology, so that the FPC interface has better mechanical stability and signal transmission performance during high-speed transmission; a multi-level random error management model based on the ASIL standard is adopted to monitor the signal quality parameters in real time and perform multi-scale analysis, effectively reducing the signal distortion and timing jitter during high-speed transmission; a partition control architecture including a signal modulation area, a signal compensation area and a signal demodulation area is designed, and the integrity and anti-interference ability of the signal transmission are significantly improved through collaborative optimization between regions; the physical constraint parameters and the electrical optimization parameters are innovatively combined to establish a complete performance evaluation system, and the long-term stable operation of the FPC interface in a complex working environment is guaranteed through iterative optimization and adaptive adjustment; the parameter optimization strategy based on the genetic algorithm realizes the intelligent adjustment of the control parameters of the FPC interface, greatly improving the adaptive ability and control accuracy of the system; by introducing the protective edging and automatic bending technology of the flexible circuit board, the stress concentration problem of the FPC during the physical deformation process is effectively solved, and the service life of the interface is extended. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a schematic diagram of the steps of a high-speed transmission stability control method of an FPC high-performance computing chip interface in one embodiment of the present invention; Figure 2 It is a structural block diagram of a high-speed transmission stability control device of an FPC high-performance computing chip interface in one embodiment of the present invention; Figure 3 It is a schematic block diagram of the structure of a computer device according to an embodiment of the present invention.

[0011] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0012] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0013] Reference Figure 1 This embodiment provides a high-speed transmission stability control method for an FPC high-performance computing chip interface, comprising the following steps: S1, dynamically bend the physical transmission layer and the signal control layer to form a three-dimensional FPC interface coupling model; Among them, when selecting the FPC base material, the high temperature resistant material and the corrosion resistant material are mixed according to the preset ratio to ensure that the base material has sufficient high temperature resistance and corrosion resistance. The interface of the high-performance computing chip requires stable performance under extreme conditions, so the selection of the FPC base material is crucial. The mixed materials are precisely formulated to form a base material suitable for high-speed signal transmission and durability. The FPC base material is laminated using a multi-layer alignment and pressing process. The lamination process can increase the strength and stability of the material and ensure that the signal transmission between the layers is not interfered with, providing physical protection for subsequent signal transmission. The obtained physical transmission layer is the first layer of the FPC infrastructure. The conductive metal material is processed by HDI (High Density Interconnect) wiring. HDI wiring technology can effectively increase the density of the circuit, make the signal transmission path more refined, and reduce signal loss and delay. HDI wiring requires high-precision line layout and needs to ensure the stability and reliability of signal transmission. The metal mesh material is formed according to the preset mesh size to form an electromagnetic shielding layer. The function of the electromagnetic shielding layer is to suppress external electromagnetic interference and reduce signal crosstalk, ensuring that the signal can remain clear and stable during transmission. The design of the electromagnetic shielding layer needs to take into account the size of the grid, the conductivity of the material, and the connection method between the layers to provide sufficient protection and isolation. The impedance matching calculation between the physical transmission layer and the signal control layer is performed. Since the impedance mismatch of the FPC interface often leads to signal reflection and loss during high-speed signal transmission, thereby affecting the signal quality, the impedance between the physical transmission layer and the signal control layer is calculated. The impedance matching data obtained by calculation provides a basis for subsequent impedance compensation. This process requires adjustment and optimization of the circuit design parameters, material characteristics, and interlayer structure. The impedance matching data is input into the impedance matching circuit for compensation processing to obtain the impedance compensation parameters. Through impedance compensation, signal reflection and loss are effectively reduced, and the transmission quality of the signal is improved. Based on the impedance compensation parameters, the physical transmission layer and the signal control layer are three-dimensionally bent. Due to the flexible characteristics of the FPC interface, it will face different mechanical deformations in actual applications, such as bending or compression, which will affect the transmission performance of the signal. Perform three-dimensional bending processing to simulate the bending state of the FPC interface in the actual environment, so as to make compensation adjustments in the design stage to ensure that the interface can maintain good signal transmission quality in various environments. The purpose of three-dimensional bending processing is to obtain the three-dimensional spatial positioning parameters of the physical transmission layer and the signal control layer through precise mathematical models and calculations. According to the three-dimensional spatial positioning parameters, the physical transmission layer, electromagnetic shielding layer and signal control layer are stacked and assembled in a specific order and position to form a complete FPC interface coupling model.During the assembly process, the relative position, stacking order and connection method of each layer need to be accurately aligned and adjusted according to the aforementioned calculation parameters to ensure that there is no deviation in the signal transmission path between the layers of the FPC interface, and that external interference can be effectively suppressed to achieve high-stability, high-performance and high-speed signal transmission.

[0014] S2, dividing the control node into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region; Specifically, the impedance matching parameters are input into the adaptive modulation algorithm for processing. According to the impedance change that occurs during the signal transmission process, the modulation mode of the signal is adjusted to adapt to different transmission environments and signal characteristics. The adaptive modulation algorithm dynamically adjusts the modulation parameters of the signal according to the input impedance matching parameters. The modulation parameters include the signal amplitude modulation coefficient and the phase modulation coefficient. The amplitude modulation coefficient is used to adjust the amplitude attenuation problem that occurs during the transmission process of the signal, while the phase modulation coefficient is used to compensate for the influence of the signal phase delay. The adjustment of these modulation parameters effectively optimizes the transmission effect of the signal so that the signal can maintain the best transmission quality when passing through different transmission paths. The modulation parameters of the signal modulation area are calculated by the feedforward equalizer to obtain the first equalization parameter. The function of the feedforward equalizer is to compensate for the amplitude attenuation of the signal. During high-speed transmission, the amplitude of the signal often attenuates due to the loss of the signal path. The first equalization parameter obtained by the feedforward equalizer through calculation can accurately characterize the amplitude attenuation value of the signal during the transmission process, thereby appropriately compensating the amplitude of the signal. The first equalization parameter is input into the decision feedback equalizer for processing to obtain the second equalization parameter. The decision feedback equalizer is used to solve the phase delay problem during signal transmission. When high-speed signals are transmitted, due to the complexity of the transmission path and the influence of interference factors, the signal will have a phase delay, which will seriously affect the timing and demodulation accuracy of the signal. The second equalization parameter calculated by the decision feedback equalizer can compensate for the phase delay in signal transmission and ensure that the timing of the signal remains accurate. According to the first equalization parameter and the second equalization parameter, the signal compensation area is defined to obtain compensation boundary data. The compensation boundary data can help the system set an effective compensation range in the signal compensation area to ensure that the signal will not be over-compensated or under-compensated after the compensation process, thereby ensuring the accuracy and effectiveness of the compensation process. The compensation boundary data is input into the maximum likelihood detection algorithm to divide the signal demodulation area. The maximum likelihood detection algorithm can select the most likely demodulation path from multiple candidate demodulation paths by probabilistically analyzing the possible states of the signal, thereby realizing efficient demodulation of the signal. The function of the algorithm is to automatically select the best demodulation method according to the characteristics of the signal and the transmission environment, thereby ensuring that the signal can be correctly restored during the demodulation process. According to the division of the demodulation area, the demodulation area parameters are dynamically compensated to obtain the demodulation compensation coefficient. The demodulation compensation coefficient reflects the amount of adjustment required during the signal demodulation process, and can effectively correct the error that occurs during signal demodulation. According to the demodulation compensation coefficient, the wiring path of the high-speed data bus is determined to obtain the bus wiring parameters. The determination of wiring parameters requires comprehensive consideration of factors such as signal transmission characteristics, impedance matching, and signal modulation to ensure that the design of the wiring path can minimize the loss and interference in signal transmission and optimize the signal transmission effect.After optimizing the bus wiring parameters, the resulting wiring structure can ensure that the signal transmission in each area reaches the optimal state, thereby effectively ensuring the stability and reliability of the FPC interface during high-speed transmission, and obtaining the signal modulation area, signal compensation area and signal demodulation area.

[0015] S3, based on the signal modulation area, the signal compensation area and the signal demodulation area, real-time sampling and analysis of signal quality parameters are performed to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data; It should be noted that the sampling rate of the output signal in the signal modulation area is calculated to obtain the reference sampling frequency data. According to the bandwidth characteristics of the signal, the reference sampling frequency needs to meet more than twice the signal bandwidth and follow the requirements of the sampling theorem to ensure that the integrity of the signal is not affected by the sampling rate limit. By calculating the bandwidth of the signal and determining the upper limit of the sampling frequency, a reliable frequency standard is provided for signal sampling. Based on the reference sampling frequency data, the signal waveform is sampled to obtain the original sampling data. The signal integrity data is obtained by performing signal integrity analysis on the original sampling data. Signal integrity analysis will evaluate whether the signal has distortion, reflection or other distortion phenomena, which will affect the accurate transmission of the signal and the final demodulation result. According to the original sampling data, the timing analysis of the rising and falling edges of the signal is performed to determine the jump time data of the signal, and the timing error and jitter phenomenon in the signal are identified. Especially in the high-speed transmission environment, the timing jitter will seriously affect the stability of the signal and the demodulation accuracy. Based on the jump time data, the timing jitter data is calculated to reveal the timing instability during the signal transmission process. The electromagnetic field coupling strength between adjacent signal lines is calculated. The crosstalk level between signal lines is analyzed through the coupling coefficient data. Crosstalk is caused by electromagnetic coupling between signal lines. Excessive crosstalk levels will lead to an increase in signal error rate and a decrease in signal quality. Based on the original sampled data, the Fourier transform algorithm is input for spectrum analysis. Through Fourier transform, the signal is converted from the time domain to the frequency domain to obtain the spectrum distribution of the signal. During high-speed signal transmission, the spectrum characteristics of the signal will be affected by the transmission medium and environmental noise. By calculating the signal power spectrum and the noise power spectrum separately, the ratio of the two is obtained, and the signal-to-noise ratio data is calculated.

[0016] S4, inputting the signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data into the random error management model for multi-scale analysis to obtain hierarchical control parameters; Specifically, the random error management model is divided into levels. According to different error monitoring requirements and control levels, the model is divided into three different levels: ASIL D error monitoring layer, ASIL B error analysis layer and real-time compensation layer. The ASIL D error monitoring layer is the core layer of the system, which is mainly responsible for real-time monitoring and classification of the most serious errors; the ASIL B error analysis layer conducts mid-term error analysis, focusing on predicting and optimizing long-term trends; the real-time compensation layer is the end of the entire control system, responsible for rapid signal compensation and adjustment based on real-time data. These three levels work together to ensure that the system can respond and optimize the changes in signal quality in a hierarchical manner and control signal stability at different time scales. Different types of signal quality data are fused. The signal integrity data and timing jitter data are fused to obtain the first eigenvector in a ratio of 2:1. The signal integrity is combined with the timing stability to comprehensively evaluate the quality changes of the signal during transmission. Signal integrity and timing jitter are two key factors affecting signal stability. The fused first eigenvector can effectively characterize the relationship and overall performance between the two. The crosstalk level data and the signal-to-noise ratio data are fused in a ratio of 3:2 to obtain the second eigenvector. The mutual interference between the signals and their signal-to-noise ratio conditions are comprehensively evaluated to provide data support for further error analysis. The crosstalk level and signal-to-noise ratio of the signal directly affect the transmission quality and bit error rate of the signal. The fused second eigenvector reflects the quality characteristics of these two aspects. The first eigenvector and the second eigenvector are input to the ASIL D error monitoring layer for error classification. The ASIL D error monitoring layer adopts a three-layer neural network structure, with 96, 48 and 24 nodes in each layer. The neural network structure can perform in-depth learning and classification processing on the input eigenvector through complex nonlinear mapping, so as to accurately identify the potential error types in signal transmission. At this level, the training and adjustment of the neural network can achieve high-precision error detection and classification, help the system accurately identify serious errors or distortions in the signal, and take different optimization measures according to the classification results. The error feature classification data is input to the ASIL B error analysis layer for long-term trend analysis. The ASIL B error analysis layer uses a long short-term memory network (LSTM) structure, which contains 128 memory units, to predict and analyze the long-term trend of signal quality changes. The LSTM structure can handle long-term dependencies in time series data through the design of memory units, and achieve long-term prediction of signal quality changes. Through the long-term trend analysis of error feature classification data, the system is provided with predictions of future signal quality, and the system response strategy is adjusted based on these prediction results. The long-term prediction parameters are processed by sliding windows to obtain medium-term compensation parameters.The long-term prediction results are converted into medium-term compensation parameters that can adapt to dynamic changes, effectively avoiding the interference of outdated information caused by a long time span, so that the compensation parameters maintain high accuracy and practicality in the medium term. The medium-term compensation parameters provide a compromise compensation solution for the system, which can not only adapt to long-term trend changes, but also smooth short-term fluctuations, ensuring that the system has good stability and response speed when dealing with medium-term signal quality issues. The medium-term compensation parameters are input into the real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters. The real-time compensation layer adopts the Kalman filter structure for rapid response and dynamic adjustment of signal quality. The Kalman filter can estimate the state of the signal in real time and perform dynamic compensation. By processing data from different time scales, it can quickly correct the deviation in signal quality. In the real-time compensation layer, the short-term adjustment parameters are continuously adjusted according to the real-time data to ensure that the signal quality is timely corrected and optimized during the actual transmission process.

[0017] S5, performing protective hemming and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; Among them, the edge of the FPC is treated with a protective edge wrapping of the flexible circuit board according to the long-term prediction parameters. Protective edge wrapping is an important step to strengthen the physical structure of the FPC, which can effectively improve the mechanical strength of the circuit board and prevent external physical stress from affecting the signal transmission performance. The design of the protective edge wrapping needs to take into account the future signal transmission change trend provided in the long-term prediction parameters to ensure that the edge wrapping process can cope with the future mechanical pressure and thermal stress changes. After the edge wrapping process is completed, the obtained edge mechanical strength parameters are input into the fully automatic FPC bending machine for three-dimensional positioning processing to ensure that the FPC can be accurately aligned during the processing process and automatically bent according to the needs of the physical structure to adapt to different use environments and working conditions. Based on the three-dimensional bending parameters, the physical structure of the FPC is automatically bent. During the bending process, the FPC undergoes physical deformation, which is mainly manifested in the change of the bending angle and the generation of deformation stress. The bending angle data and deformation stress data are important indicators for evaluating the physical properties of the FPC. These data will help the system understand the stress distribution that may be generated by the FPC during the bending process and provide a basis for subsequent mechanical constraint processing. By analyzing these data, a mechanical stress model is established to obtain mechanical constraint parameters, including elastic deformation coefficient and plastic deformation coefficient. The signal transmission circuit is compensated according to the medium-term compensation parameters and short-term adjustment parameters. The medium-term compensation parameters mainly compensate the amplitude of the signal based on the long-term trend analysis results to correct the signal amplitude drop caused by the attenuation phenomenon during signal transmission. The amplitude compensation coefficient is accurately calculated and adjusted according to the signal amplitude change in different signal transmission areas. This compensation process can ensure that the signal maintains a stable intensity during transmission and avoid bit errors or signal loss caused by attenuation. At the same time, the short-term adjustment parameters are used to compensate for the phase of the signal. Phase compensation is to solve the phase offset problem that occurs during signal transmission, especially in high-speed transmission environments, where the phase delay of the signal causes timing errors and signal distortion. The phase compensation coefficient is obtained by calculation, and is dynamically adjusted during signal transmission to correct the phase error and improve the timing accuracy and transmission stability of the signal. The amplitude compensation coefficient and the phase compensation coefficient are input into the signal equalizer, and the equalizer adjusts the parameters according to these coefficients to improve the signal quality. The signal equalizer optimizes the signal as a whole by adjusting the amplitude and phase to ensure that the signal can be transmitted in the best state in a complex electrical environment. The equalizer coefficients are adjusted according to real-time feedback and signal changes to ensure that the signal always maintains the best transmission quality. In order to cope with dynamic signal environment changes, the equalizer coefficients are dynamically optimized. By collecting signal feedback data in real time, the equalizer can continuously optimize its processing parameters during signal transmission, adjust the feedforward and feedback equalization strategies, and adapt to different electrical interference and transmission environments.The optimization process includes two parts: feedforward equalization and feedback equalization. Feedforward equalization predicts the change trend of the signal and compensates in advance; feedback equalization adjusts the equalizer parameters in real time based on the feedback data received during the actual transmission process, so as to respond quickly to changes in signal quality. Electrical optimization parameters are obtained.

[0018] S6, a performance evaluation model is established based on mechanical constraint parameters and electrical optimization parameters, and the FPC interface coupling model is iteratively optimized to obtain a control optimization strategy.

[0019] Specifically, the mechanical damage analysis of the FPC interface is carried out according to the mechanical constraint parameters. By evaluating the mechanical stress, bending and vibration factors encountered by the FPC interface in actual use, the degree of physical damage is predicted, and the damage level parameters are obtained, which reflect the damage of the FPC interface under different working conditions. At the same time, the signal performance analysis of the FPC interface is carried out according to the electrical optimization parameters. The signal performance analysis mainly focuses on the transmission quality of the signal, including signal integrity, timing stability, crosstalk, etc. Through analysis, the performance level parameters are obtained to quantify the electrical problems such as distortion and attenuation that occur during signal transmission, and evaluate the impact of these problems on the overall system performance. The damage level parameters and performance level parameters are input into the performance evaluation model for comprehensive analysis. The performance evaluation model is a multidimensional model that comprehensively considers physical and electrical factors. It can integrate the influence of both mechanical and electrical aspects to obtain a system evaluation score, which reflects the comprehensive performance level of the FPC interface in the actual working environment. Based on the system evaluation score, the performance of the FPC interface is graded to obtain a performance grading matrix. The matrix includes physical performance levels and electrical performance levels, which are used to intuitively display the comprehensive performance of the FPC interface in both physical and electrical dimensions. According to the performance grading matrix, the FPC interface coupling model is optimized in a differentiated manner. Different optimization strategies are adopted for FPC interfaces of different performance levels to achieve the best system performance. An optimization objective function is constructed, which includes physical optimization items and electrical optimization items. The physical optimization items are aimed at the mechanical properties of the FPC interface, such as material selection, structural optimization, and adjustment of the bending angle; the electrical optimization items mainly focus on the transmission characteristics of the signal, such as signal attenuation, timing jitter, and crosstalk. By combining these two optimization items into the optimization objective function, the physical and electrical properties of the FPC interface are considered to achieve multi-dimensional optimization of the FPC interface. The optimization objective function is input into the genetic algorithm for parameter optimization. The genetic algorithm is an optimization algorithm that simulates natural selection and genetic mechanisms. It finds the optimal parameter combination through continuous iteration and selection. In this process, the genetic algorithm explores the physical and electrical optimization items and gradually approaches the optimal solution. Through multiple generations of evolution of the genetic algorithm, the optimization coefficient matrix is ​​obtained. The matrix contains the optimization parameters of the FPC interface coupling model, representing the optimal adjustment values ​​in terms of physical and electrical performance. According to the optimization coefficient matrix, the parameters of the FPC interface coupling model are adjusted to optimize the physical structure and electrical characteristics of the FPC interface. After a round of iterative optimization, the adjusted FPC interface obtains the optimized values ​​of physical parameters and electrical parameters to guide the next round of optimization process. Through continuous parameter adjustment and optimization, the performance of the FPC interface will continue to improve and meet the performance standards required by the system. Convergence analysis is performed on the iterative optimization results to verify whether the optimization algorithm has found the optimal solution within a limited number of iterations to avoid waste of computing resources or overfitting due to too many iterations.Convergence analysis is judged by calculating the relative error value and the iteration step value. The relative error value reflects the difference between the current optimization result and the target value, and the iteration step value indicates the improvement brought by each iteration. By analyzing these parameters, it is judged whether the optimization process has converged to the optimal solution and whether further adjustments or stopping optimization are needed. The convergence judgment parameters, physical parameter optimization values, and electrical parameter optimization values ​​are strategically combined to obtain the final control optimization strategy.

[0020] In one example, the physical transmission layer and the signal control layer are dynamically bent and three-dimensionally formed to obtain an FPC interface coupling model, including: The high temperature resistant material and the corrosion resistant material are mixed according to a preset ratio to obtain an FPC base material, and the FPC base material is laminated through a multi-layer alignment and pressing process to obtain a physical transmission layer; Performing HDI wiring processing on the conductive metal material to obtain a signal control layer, and performing molding processing on the metal mesh material according to a preset mesh size to obtain an electromagnetic shielding layer; Perform impedance matching calculation on the physical transmission layer and the signal control layer to obtain impedance matching data, and input the impedance matching data into the impedance matching circuit for compensation processing to obtain impedance compensation parameters; The physical transmission layer and the signal control layer are three-dimensionally bent based on the impedance compensation parameters to obtain the three-dimensional spatial positioning parameters. The physical transmission layer, the electromagnetic shielding layer and the signal control layer are stacked and assembled according to the three-dimensional spatial positioning parameters to obtain the FPC interface coupling model.

[0021] In this example, high temperature resistant materials and corrosion resistant materials are mixed according to a preset ratio to obtain FPC base materials. High temperature resistant materials select some polyimide (PI) materials with good thermal stability, while corrosion resistant materials are usually materials with excellent chemical corrosion resistance. The mixture of these materials effectively improves the high temperature resistance and corrosion resistance of FPC, ensuring the long-term stability of FPC in high temperature, high humidity or chemical corrosion environment. The mixed FPC base material is laminated through a multi-layer alignment and pressing process to obtain a physical transmission layer. The FPC base material is stacked multiple times, and the layers of materials are pressed together by high temperature and pressure to form a physical transmission layer with high consistency and stability. The lamination process can provide sufficient mechanical strength and thermal stability to ensure that the FPC can withstand changes in the external environment without affecting the stable transmission of signals. The conductive metal material is subjected to HDI wiring to obtain a signal control layer. HDI wiring is a technology used for high-density wiring, which is used to form fine circuit patterns in FPC. Laser drilling and photolithography technology are used to achieve high-density wiring with extremely small spacing on the surface of the FPC, so that the signal control layer can provide higher circuit density and shorter transmission paths. In order to ensure that there is no excessive interference during signal transmission, the conductive metal material in the FPC uses a highly conductive material to ensure low signal transmission loss and effectively reduce signal delay. The metal grid material is molded according to the preset grid size to obtain an electromagnetic shielding layer. The function of the electromagnetic shielding layer is to prevent external electromagnetic interference from affecting the quality of signal transmission. The electromagnetic shielding layer is composed of a metal grid or a conductive coating. These materials can effectively shield external noise interference and reduce the loss of the signal during transmission. The impedance matching calculation between the physical transmission layer and the signal control layer is performed. During signal transmission, impedance mismatch will cause signal reflection, signal loss and timing error. In order to ensure the impedance consistency between the physical transmission layer and the signal control layer, the characteristic impedance of the transmission line is calculated. Assume that the transmission line width between the physical transmission layer and the signal control layer is , the dielectric constant between the two layers is , and considering the material properties in the FPC, the characteristic impedance is calculated by the following formula: ; in, is the characteristic impedance, is the height of the transmission line, is the width of the transmission line, is the relative dielectric constant of the medium. The impedance matching data obtained by calculation is input into the impedance matching circuit for compensation processing. By adjusting the geometric parameters of the circuit or adding adjustment elements (such as capacitors and inductors), the impedance of the transmission line reaches an ideal matching value. After compensation processing, the impedance compensation parameters are obtained to ensure the stability of the signal during transmission and avoid signal reflection and loss caused by impedance mismatch. Based on the impedance compensation parameters, the physical transmission layer and the signal control layer are three-dimensionally bent to obtain the three-dimensional spatial positioning parameters. The three-dimensional bending processing of FPC is to adapt to the spatial requirements of the FPC interface under different working environments. The three-dimensional bending requires that the shape of the FPC interface be taken into account during design, and the timing error and signal attenuation during signal transmission be considered. The calculation of the three-dimensional spatial positioning parameters needs to consider multiple factors, including the geometry of the FPC interface, the bending radius, and the stress distribution. By analyzing these factors, the spatial position and bending angle of each layer structure are calculated, and based on this, the physical transmission layer, the electromagnetic shielding layer, and the signal control layer are accurately stacked and assembled. The FPC interface coupling model is obtained.

[0022] In one example, the control node is divided into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region, and a signal demodulation region, including: The impedance matching parameters are input into the adaptive modulation algorithm for processing to obtain the modulation parameters of the signal modulation area, the modulation parameters including the signal amplitude modulation coefficient and the phase modulation coefficient; Performing feedforward equalizer calculation on modulation parameters of the signal modulation area to obtain a first equalization parameter, wherein the first equalization parameter represents an amplitude attenuation compensation value during signal transmission; Performing a decision feedback equalizer calculation on the first equalization parameter to obtain a second equalization parameter, wherein the second equalization parameter represents a phase delay compensation value during signal transmission; Defining the signal compensation area according to the first equalization parameter and the second equalization parameter to obtain compensation boundary data; Input the compensation boundary data into the maximum likelihood detection algorithm to divide the signal demodulation area, obtain the demodulation area parameters, and perform dynamic compensation processing on the demodulation area parameters to obtain the demodulation compensation coefficient; The wiring path of the high-speed data bus is determined according to the demodulation compensation coefficient, the bus wiring parameters are obtained, and the bus wiring parameters are optimized to obtain the signal modulation area, the signal compensation area and the signal demodulation area.

[0023] In this example, the impedance matching parameters are input into the adaptive modulation algorithm for processing. The impedance matching parameters describe the impedance consistency between the physical transmission layer and the signal control layer during signal transmission. The adaptive modulation algorithm dynamically adjusts the modulation method of the signal according to the transmission characteristics of the signal to maximize the efficiency and quality of signal transmission. Based on the modulation algorithm, the modulation parameters of the signal modulation area are obtained, including the signal amplitude modulation coefficient ( ) and the phase modulation coefficient ( ). The signal amplitude modulation coefficient is used to adjust the amplitude of the signal, while the phase modulation coefficient is used to optimize the phase of the signal. The formula is as follows: ; in, and are the maximum and minimum amplitude values ​​of the signal, respectively. and are the maximum and minimum phase values ​​of the signal, respectively. These modulation coefficients are dynamically adjusted to adapt to the characteristics of different transmission paths, ensuring that the signal is not distorted during the modulation process and maintaining a high signal-to-noise ratio. The modulation parameters of the signal modulation area are calculated by the feedforward equalizer to compensate for the amplitude attenuation that occurs during signal transmission. The feedforward equalizer improves the integrity of the signal by calculating the amplitude attenuation value on the transmission path and compensating for it. In the feedforward equalizer, the first equalization parameter is calculated, which characterizes the amplitude attenuation compensation value during signal transmission. The calculation of this parameter is based on the spectral characteristics of the signal and uses the following formula: ; in, is the amplitude compensation coefficient, is the amplitude of the input signal, is the amplitude of the output signal. By adjusting the amplitude compensation coefficient , effectively offsetting the amplitude attenuation of the signal caused by factors such as transmission line length and material loss during transmission. The first equalization parameter is calculated by the decision feedback equalizer to compensate for the phase delay that occurs during signal transmission. Phase delay can cause signal distortion or synchronization errors, affecting the stability of the signal. The function of the decision feedback equalizer is to perform feedback processing on the signal and calculate the second equalization parameter to characterize the phase delay compensation value during signal transmission. The output of the decision feedback equalizer is calculated by the following formula: ; in, is the phase compensation coefficient, is the phase of the input signal, is the phase of the output signal. By adjusting the phase compensation coefficient , eliminating the phase delay effect caused by different path lengths and physical characteristics during signal transmission. The signal compensation area is defined according to the first equalization parameter and the second equalization parameter to obtain compensation boundary data. The compensation boundary data is used to describe the compensation of the signal in different areas to ensure that the amplitude and phase of the signal are always kept within a reasonable range during the entire transmission process. The calculation of the compensation boundary is based on the real-time changes of the equalization parameters. By dynamically sampling and analyzing the signal quality parameters, real-time compensation boundary data is obtained. The definition of the compensation boundary is carried out by the following formula: ; in, and are the minimum and maximum values ​​of the amplitude compensation coefficient, and are the minimum and maximum values ​​of the phase compensation coefficient, respectively. The compensation boundary data is input into the maximum likelihood detection algorithm to divide the signal demodulation area and obtain the demodulation area parameters. The maximum likelihood detection algorithm is used to recover the most likely original signal from the interference and noise of the signal by calculating the maximum likelihood value. The algorithm helps to determine the parameters of the demodulation area and dynamically compensate the parameters of the demodulation area to improve the accuracy of signal demodulation. The calculation of the demodulation compensation coefficient is expressed by the following formula: ; in, Indicates a given received signal The original signal under the condition The probability of The probability of receiving a signal. By dynamically adjusting the demodulation compensation coefficient, the accuracy of signal demodulation can be effectively improved to ensure that the demodulated signal is not affected by noise or interference. The wiring path of the high-speed data bus is determined according to the demodulation compensation coefficient, the bus wiring parameters are obtained, and the bus wiring parameters are optimized. Bus wiring is an important factor affecting the quality of signal transmission. A reasonable wiring path can reduce crosstalk and delay between signals and improve signal transmission efficiency. The optimization process of bus wiring includes reasonable planning of wiring length, width, number of layers, etc. to obtain an optimized wiring path. Wiring optimization is carried out by combining simulation calculation and experimental verification. After wiring optimization, the obtained signal modulation area, signal compensation area and signal demodulation area form a complete and optimized signal transmission network.

[0024] In one example, based on the signal modulation area, the signal compensation area, and the signal demodulation area, the signal quality parameters are sampled and analyzed in real time to obtain signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data, including: Calculate the sampling rate of the output signal in the signal modulation area to obtain reference sampling frequency data, which is twice the signal bandwidth; Sampling the signal waveform based on the reference sampling frequency data to obtain original sampling data, and performing signal integrity analysis on the original sampling data to obtain signal integrity data; Perform timing analysis on the rising and falling edges of the signal according to the original sampling data to obtain the signal jump time data, and calculate the timing jitter data according to the signal jump time data; Calculating the electromagnetic field coupling strength between adjacent signal lines to obtain coupling coefficient data, and calculating crosstalk level data based on the coupling coefficient data; The original sampling data is input into the Fourier transform algorithm for spectrum analysis to obtain signal power spectrum data and noise power spectrum data, and the signal-to-noise ratio data is obtained by performing ratio calculation based on the signal power spectrum data and the noise power spectrum data.

[0025] In this example, the sampling rate of the output signal in the signal modulation area is calculated. The sampling frequency is determined based on the bandwidth characteristics of the signal. According to the Nyquist sampling theorem, in order to fully restore the signal and avoid aliasing, the sampling frequency must be at least twice the signal bandwidth. Assume that the signal bandwidth is , then the reference sampling frequency ( ) should be: ; in, represents the base sampling frequency, Indicates the bandwidth of the signal. The larger the bandwidth, the richer the information contained in the signal, and a higher sampling frequency is required to ensure the integrity of the signal. The signal waveform is sampled based on the reference sampling frequency to obtain the original sampling data. The sampling process actually converts the continuous analog signal into a discrete digital signal. By sampling at each time point at the reference sampling frequency, the original sampling data obtained is the amplitude set of the signal at a specific time point, expressed as a series of discrete signal values , where each Represents the amplitude of the signal at the corresponding time point. Perform signal integrity analysis on the original sampled data to identify the attenuation, distortion and distortion problems that occur during signal transmission and obtain signal integrity data. Signal integrity analysis methods include analyzing the rise time, fall time, amplitude jitter, etc. of the signal. Common signal integrity problems are caused by signal reflection and mismatch of transmission lines. By analyzing the time domain waveform of the original sampled data, signal integrity data is obtained to reflect various problems that occur during signal transmission and help evaluate the quality of the signal. Perform timing analysis on the original sampled data according to the rising and falling edges of the signal. Analyze the signal's transition moment data, which are the moments when the signal reaches a certain threshold on the rising or falling edge. Timing analysis calculates the time it takes for the signal to go from a low level to a high level (or from a high level to a low level). Fluctuations during this period will affect the stability of the signal. In order to quantify this fluctuation, the timing jitter data is calculated. Timing jitter refers to the fluctuation or uncertainty of the signal transition moment, expressed as standard deviation. ). Assume that the signal transition time is and , then the timing jitter data is calculated using the following formula: ; in, For each jump moment, is the average value of the jump time, is the number of transition moments. By calculation, the temporal instability of the signal during the transition process is quantified. The electromagnetic coupling of the signal is calculated to obtain the coupling coefficient data. Electromagnetic coupling is a problem in the signal transmission process, especially when the signal lines are close, electromagnetic interference will cause signal crosstalk and affect the signal quality. The coupling strength is quantified by calculating the degree of influence of the electromagnetic field between adjacent signal lines. Coupling coefficient is a parameter that describes this coupling effect and is calculated using the following formula: ; in, is the amplitude of the interference signal caused by the coupling effect, is the amplitude of the original signal. By calculating the coupling coefficient, the stability of the signal under electromagnetic interference is evaluated. Based on the coupling coefficient data, the crosstalk level data is calculated. Crosstalk refers to the interference phenomenon caused by adjacent signal lines during signal transmission. The crosstalk level data can quantify the degree of influence of the interference signal on the main signal, using the coupling strength between signals as the evaluation standard. Crosstalk level Calculated by the following formula: ; in, is the noise power caused by interference, is the power of the signal. The higher the crosstalk level data, the greater the interference to the signal and the worse the transmission quality. Perform spectrum analysis on the original sampled data. The Fourier transform algorithm is used to convert the time domain signal to the frequency domain to help analyze the frequency components of the signal and its relationship with noise. The formula for Fourier transform is: ; in, is the spectrum of the signal, is the time domain waveform of the signal, is the frequency. After obtaining the spectrum of the signal through Fourier transform, the signal power spectrum data and the noise power spectrum data are calculated. These two data sets describe the power distribution of the signal and noise in different frequency ranges respectively. By calculating the ratio of the signal power spectrum data and the noise power spectrum data, the signal-to-noise ratio data is obtained. The signal-to-noise ratio is an important parameter to measure the signal quality. The calculation formula of the signal-to-noise ratio is: ; in, is the power of the signal, is the power of the noise. The higher the SNR, the better the signal quality and the smaller the impact of noise on the signal.

[0026] In one example, signal integrity data, timing jitter data, crosstalk level data, and signal-to-noise ratio data are input into a random error management model for multi-scale analysis to obtain hierarchical control parameters, including: The random error management model is graded to obtain the ASIL D error monitoring layer, ASIL B error analysis layer, and real-time compensation layer. The signal integrity data and the timing jitter data are fused at a ratio of 2:1 to obtain a first eigenvector, and the crosstalk level data and the signal-to-noise ratio data are fused at a ratio of 3:2 to obtain a second eigenvector; The first eigenvector and the second eigenvector are input into the ASIL D level error monitoring layer for error classification to obtain error feature classification data. The ASIL D level error monitoring layer adopts a three-layer neural network structure, and the number of nodes in each layer of the three-layer neural network structure is 96, 48, and 24 respectively; The error feature classification data is input into the ASIL B error analysis layer for long-term trend analysis to obtain long-term prediction parameters. The ASIL B error analysis layer adopts a long short-term memory network structure, which contains 128 memory units. Perform sliding window processing on the long-term prediction parameters to obtain the mid-term compensation parameters; The medium-term compensation parameters are input into the real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters. The real-time compensation layer adopts a Kalman filter structure. Long-term prediction parameters, mid-term compensation parameters and short-term adjustment parameters are used as hierarchical control parameters.

[0027] In this example, the random error management model is graded. Error management is divided into different levels, so that more precise control can be implemented at different levels. According to the ASIL (Automotive Safety Integrity Level) standard, error management is divided into three main levels, namely ASIL D error monitoring layer, ASIL B error analysis layer and real-time compensation layer. ASIL D error monitoring layer is responsible for monitoring and detecting high-risk errors, requiring strict error analysis and control of the system; ASIL B error analysis layer analyzes medium-risk errors, mainly based on trend prediction to handle system failures; real-time compensation layer quickly compensates for errors that occur in the short term to ensure that the system can return to normal working state in a short time. Data fusion processing is performed to extract useful information from different signal sources to obtain more accurate feature parameters. According to the ratio of 2:1, the signal integrity data and timing jitter data are fused to obtain the first eigenvector. The signal integrity data includes information such as signal amplitude change and waveform distortion, and the timing jitter data describes the time fluctuation of the signal jump moment. According to the ratio of 3:2, the crosstalk level data and signal-to-noise ratio data are fused to obtain the second eigenvector. The crosstalk level data describes the electromagnetic interference intensity between adjacent signal lines, and the signal-to-noise ratio data measures the ratio of useful information to noise in the signal. The feature vector obtained in the above manner can comprehensively consider the influence of different factors and extract the most critical information, thereby improving the accuracy of error detection and compensation. The first feature quantity and the second feature vector are input into the ASIL D level error monitoring layer for error classification. The error monitoring layer is processed using a three-layer neural network structure. The first layer of the neural network contains 96 nodes, the second layer contains 48 nodes, and the third layer contains 24 nodes. The design of the number of nodes in each layer takes into account the balance between computational complexity and accuracy. During the training process of the neural network, the error back propagation algorithm is used to adjust the weights and biases so that the network can correctly classify different types of errors according to the input feature vector. Assume that the input of the neural network is the feature vector , the weight matrix is , the bias is , the output is , then the calculation of each layer is expressed by the following formula: ; in, is the activation function, which includes ReLU, Sigmoid, etc. After classification processing by the neural network, the error feature classification data is obtained to determine the error type of the system in the current state, and the next treatment measures are determined according to the error type. The error feature classification data is input into the ASIL B error analysis layer for long-term trend analysis. The error analysis layer uses the long short-term memory network (LSTM) structure for trend prediction. The LSTM network has strong time series prediction capabilities and can handle long-term dependencies. The core of LSTM lies in its gating mechanism, which can dynamically adjust the memory state of the network according to the historical information of the input data. The calculation formula of LSTM is as follows: ; ; ; ; ; in, It's the Gate of Forgetfulness. is the input gate, is the output gate, is the state of the memory cell, is the output, is the current input data, is the weight matrix, is the bias. After performing long-term trend analysis on the error through the LSTM network, long-term prediction parameters are obtained to help the system identify long-term error trends in signal transmission and take preventive measures. Sliding window processing is performed on the long-term prediction parameters to obtain medium-term compensation parameters. Sliding window processing is a signal smoothing method that can eliminate short-term fluctuations and capture relatively stable trends. Through the sliding window, the long-term prediction parameters are smoothed to obtain relatively stable medium-term compensation parameters. The medium-term compensation parameters are input into the real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters. The real-time compensation layer adopts the Kalman filter structure. The Kalman filter is a recursive filter used for state estimation of dynamic systems. The basic principle of Kalman filtering is to continuously optimize the state estimation of the system by estimating the current state and correcting the previous state. The state update formula of the Kalman filter is: ; ; in, is the current state estimate, is the Kalman gain, is the actual measured value, is the observation matrix, is the error covariance matrix. The long-term prediction parameters, mid-term compensation parameters and short-term adjustment parameters are used as hierarchical control parameters, and the system is dynamically adjusted in combination with the current state of the system to achieve the optimal signal transmission stability control strategy.

[0028] In one example, the FPC physical structure is protected and automatically bent according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and the signal transmission circuit is compensated according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters, including: Perform flexible circuit board protection hemming treatment on the edge of FPC according to long-term prediction parameters to obtain edge mechanical strength parameters, and input the edge mechanical strength parameters into the fully automatic FPC bending machine for three-dimensional positioning processing to obtain three-dimensional bending parameters; Automatically bend the FPC physical structure based on the three-dimensional bending parameters to obtain physical deformation data, which includes bending angle data and deformation stress data; A mechanical stress model is established according to the physical deformation data to obtain mechanical constraint parameters, which include elastic deformation coefficient and plastic deformation coefficient; Performing signal amplitude compensation on the signal transmission circuit according to the mid-term compensation parameter to obtain an amplitude compensation coefficient, and performing phase compensation processing on the signal transmission circuit according to the short-term adjustment parameter to obtain a phase compensation coefficient; The amplitude compensation coefficient and the phase compensation coefficient are input into the signal equalizer for parameter adjustment processing to obtain the equalizer coefficient, and the equalizer coefficient is dynamically optimized to obtain the electrical optimization parameters, which include feedforward equalization parameters and feedback equalization parameters.

[0029] In this example, the FPC edge is protected by the edge wrapping treatment based on the long-term prediction parameters to enhance the mechanical damage resistance of the FPC edge. The long-term prediction parameters are obtained by long-term analysis of signal distortion data such as timing jitter and crosstalk during signal transmission. These parameters help to foresee the stress of the edge during transmission. By analyzing these prediction parameters, the mechanical strength required for the FPC edge is determined to avoid unstable signal transmission due to physical damage during subsequent signal transmission. The edge mechanical strength parameters obtained, including the elastic modulus and tensile strength of the edge, will be input into the fully automatic FPC bending machine. The bending machine uses these mechanical strength parameters during the processing process, and performs three-dimensional positioning by precisely controlling the bending angle and position to obtain three-dimensional bending parameters. Three-dimensional bending parameters refer to the precise angle, bending position and bending stress value required during the FPC bending process. These parameters not only determine the morphology of the FPC, but also have an important impact on its physical properties and signal integrity. For example, if the bending angle is too large or the bending position is unreasonable, it will cause stress concentration in the circuit line, thereby affecting the electrical performance. The calculation of three-dimensional bending parameters needs to consider factors such as the physical size of the FPC, material properties, and external mechanical loads. The formula is: ; in, is the bending angle, is the length of the bending area, is the bending radius. According to these bending parameters, the FPC will automatically adjust the bending angle during the bending process to ensure that the physical deformation meets the design requirements and avoid excessive deformation stress. Based on the physical structure of the FPC after bending, automatic bending processing is performed and physical deformation data is recorded. The physical deformation data includes bending angle and deformation stress data, where the bending angle refers to the actual angle of the FPC in the bending area, and the deformation stress data reflects the mechanical stress that the FPC bears in this area. The deformation stress is calculated through the stress-strain relationship, and the formula is as follows: ; in, is stress, is the elastic modulus of the material, is the strain (i.e. the relative change in deformation). By analyzing these data, the physical properties of FPC under different working conditions are obtained, and the mechanical stress model is calculated. The mechanical stress model is a mathematical model based on physical deformation data. Its purpose is to predict the stress state of FPC under different external environments. The mechanical stress model includes elastic deformation coefficient and plastic deformation coefficient. The elastic deformation coefficient is used to describe the deformation ability of FPC within the elastic range and is determined by the Young's modulus of the material. The plastic deformation coefficient describes the ability of FPC to undergo permanent deformation after exceeding the elastic limit. By calculating the relationship between stress and strain, the values ​​of the elastic deformation coefficient and the plastic deformation coefficient are obtained. The formula is expressed as: ; ; in, is the plastic deformation coefficient, It is the starting point of plastic deformation. Based on the physical deformation data and mechanical stress model, the mechanical constraint parameters obtained can ensure that the FPC maintains good structural stability under different working environments. According to the mid-term compensation parameters, the signal amplitude of the signal transmission circuit is compensated to correct the signal strength change caused by transmission line loss or signal attenuation. The amplitude compensation coefficient is determined by analyzing the characteristic impedance and circuit gain of the transmission path. The formula is: ; in, is the gain, is the amplitude of the output signal, is the amplitude of the input signal. The amplitude compensation coefficient is adjusted according to the actual needs of the system to ensure that the signal will not be attenuated too much during transmission. Phase compensation is used to solve the phase distortion caused by the delay in the signal transmission process, especially in high-speed data transmission, the impact of delay on the signal is particularly significant. The phase compensation coefficient is obtained by performing phase compensation on the signal transmission circuit through short-term adjustment parameters. The core of phase compensation is to adjust the phase delay according to the transmission path and frequency characteristics of the signal to ensure the timing consistency of the signal waveform. The phase compensation formula is as follows: ; in, is the phase delay, is the signal frequency, is the length of the signal transmission path, It is the propagation speed of the signal in the medium. The amplitude compensation coefficient and the phase compensation coefficient are input into the signal equalizer for parameter adjustment. The signal equalizer optimizes the transmission quality of the signal by adjusting the amplitude and phase of the input signal. The coefficients of the signal equalizer include the feedforward equalization parameter and the feedback equalization parameter, which respectively control the relative relationship between the input signal and the output signal. The adjustment formula of the equalizer is as follows: ; in, is the output signal, is the input signal, are the equalizer coefficients, is the delay order. By continuously adjusting the equalizer coefficients, the amplitude and phase of the signal can be optimized and the integrity of the signal can be improved. The equalizer coefficients are dynamically optimized to obtain electrical optimization parameters. The electrical optimization parameters include feedforward equalization parameters and feedback equalization parameters, which are adjusted according to real-time signal changes to achieve efficient control and optimization of the signal. Through intelligent algorithms and feedback mechanisms, the electrical characteristics of the signal transmission process are continuously optimized to ensure that the system maintains stable and reliable performance under high-speed transmission conditions.

[0030] In one example, a performance evaluation model is established based on mechanical constraint parameters and electrical optimization parameters, and the FPC interface coupling model is iteratively optimized to obtain a control optimization strategy, including: Perform mechanical damage analysis on the FPC interface according to mechanical constraint parameters to obtain damage level parameters, and perform signal performance analysis on the FPC interface according to electrical optimization parameters to obtain performance level parameters; Input the damage level parameters and performance level parameters into the performance evaluation model for comprehensive analysis to obtain the system evaluation score, and classify the FPC interface performance according to the system evaluation score to obtain a performance classification matrix, which includes physical performance grades and electrical performance grades; Based on the performance grading matrix, the FPC interface coupling model is differentiatedly optimized to obtain the optimization objective function, which includes physical optimization items and electrical optimization items; The optimization objective function is input into the genetic algorithm for parameter optimization to obtain the optimization coefficient matrix, and the parameters of the FPC interface coupling model are adjusted according to the optimization coefficient matrix to obtain the iterative optimization results, which include the physical parameter optimization values ​​and the electrical parameter optimization values; Conduct convergence analysis on the iterative optimization results to obtain convergence judgment parameters, which include relative error value and iterative step value; The convergence judgment parameters, physical parameter optimization values ​​and electrical parameter optimization values ​​are strategically combined to obtain a control optimization strategy.

[0031] In this example, a mechanical damage analysis of the FPC interface is performed based on the mechanical constraint parameters to obtain the damage level parameters. This analysis takes into account factors such as physical pressure, external force, and bending deformation encountered by the FPC interface in the working environment. The damage level parameters are quantified by evaluating the durability, load-bearing capacity, and performance of the FPC interface in extreme environments. For example, if the interface edge of the FPC suffers fatigue damage due to long-term high temperature or repeated bending, the damage level parameters can accurately reflect this change. The formula is expressed as: ; in, is the damage level, is the maximum load on the FPC interface. is the yield strength of the material. When the damage level parameter is high, it indicates that the FPC interface has approached or exceeded the design load, and the reliability of the system is reduced. While performing the mechanical damage analysis, the signal performance of the FPC interface is analyzed according to the electrical optimization parameters to obtain the performance level parameters. The electrical optimization parameters include amplitude compensation coefficient, phase compensation coefficient, and equalizer coefficient. Adjustment of these parameters helps to optimize signal integrity, reduce noise interference, and improve signal quality. The performance level parameters are quantified by evaluating the transmission efficiency, signal-to-noise ratio, and transmission delay of the signal. For example, the signal-to-noise ratio is expressed as: ; in, is the signal-to-noise ratio, is the signal power, is the noise power. The better the signal quality, The larger the value, the less interference the signal receives during transmission, and the higher the performance level parameter. The damage level parameter and the performance level parameter are input into the performance evaluation model for comprehensive analysis to obtain the system evaluation score. The performance evaluation model is a multi-dimensional mathematical model that comprehensively considers the mechanical damage, signal performance and other environmental factors of the FPC interface to give an overall evaluation score for the system. The comprehensive analysis is performed by weighted summation, and the formula is as follows: ; in, is the system evaluation score, and are the weights of damage level and performance level, is the damage level, is the performance level. By calculating the system evaluation score, we can better understand the performance of the FPC interface under specific conditions, and perform performance grading based on this result to obtain a performance grading matrix. The performance grading matrix comprehensively grades the physical and electrical performance of the FPC interface by dividing the system evaluation scores into different levels. The grading matrix includes physical performance levels (such as low, medium, and high) and electrical performance levels (such as excellent, good, and poor), which helps to clarify the optimization requirements and improvement directions of the FPC interface. Based on the performance grading matrix, the coupling model of the FPC interface is differentiated and optimized to obtain the optimization objective function. According to the requirements of different performance levels, the physical layer and the electrical layer are optimized separately to achieve the best transmission performance and reliability. The optimization objective function includes physical optimization items and electrical optimization items. The physical optimization items focus on aspects such as material selection, structural design, and bending processing, while the electrical optimization items mainly involve aspects such as signal transmission, signal compensation, and noise suppression. The optimization objective function is expressed as: ; in, To optimize the objective function, is the physical optimization term, is the electrical optimization item, and is the weight of physical optimization and electrical optimization. The optimization objective function is input into the genetic algorithm for parameter optimization. The genetic algorithm iteratively optimizes the design parameters of the FPC interface by simulating the process of biological evolution to obtain a set of optimization coefficient matrices. The working principle of the genetic algorithm is based on natural selection, crossover and mutation operations. Through multiple generations of evolution, the genetic algorithm can effectively find the global optimal solution. In this process, the optimization coefficient matrix includes a set of parameters related to the physical and electrical characteristics of the FPC interface, such as bending angle, signal compensation coefficient and equalizer coefficient. The calculation formula of the optimization coefficient matrix is: ; in, To optimize the coefficient matrix, To optimize the objective function, is the input parameter vector. After obtaining the optimization coefficient matrix, the convergence analysis of the iterative optimization results is performed to determine whether the algorithm has reached the optimal solution. The convergence analysis is determined by calculating the relative error value and the iteration step value. When the relative error value approaches zero and the iteration step value decreases below a certain threshold, the algorithm is considered to have converged and the optimization process is completed. The formula for convergence analysis is as follows: ; in, is the relative error value, and Respectively Second and The optimization coefficient matrix of the iteration. When it is less than the preset convergence threshold, it means that the optimization process has ended. The convergence judgment parameters, physical parameter optimization values, and electrical parameter optimization values ​​are strategically combined to obtain the final control optimization strategy. The optimization strategy integrates the optimization results of the FPC interface at the physical layer and the electrical layer, and can be dynamically adjusted according to environmental changes and needs in actual applications. For example, in high temperature or high humidity environments, the optimization strategy focuses on improving physical performance, while in the case of high signal frequency, the optimization strategy focuses on the electrical performance of the signal.

[0032] Reference Figure 2 This embodiment provides a high-speed transmission stability control device for an FPC high-performance computing chip interface, comprising: The forming module 1 is used to perform dynamic bending three-dimensional forming on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model; A division module 2 is used to divide the control node into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region and a signal demodulation region; Sampling module 3, used to perform real-time sampling and analysis of signal quality parameters based on the signal modulation area, signal compensation area and signal demodulation area to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data; Analysis module 4, used for inputting signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; Processing module 5, used to perform protective hemming and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and to perform compensation processing on the signal transmission circuit according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; The optimization module 6 is used to establish a performance evaluation model based on mechanical constraint parameters and electrical optimization parameters, iteratively optimize the FPC interface coupling model, and obtain a control optimization strategy.

[0033] In this embodiment, for the specific implementation of each unit in the above device embodiment, please refer to the above method embodiment, which will not be repeated here.

[0034] Reference Figure 3 In an embodiment of the present invention, a computer device is also provided. The computer device may be a server, and its internal structure may be as follows: Figure 3As shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface and a database connected through a system bus. Among them, the processor designed by the computer is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above method is implemented.

[0035] Those skilled in the art will understand that Figure 3 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied.

[0036] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the above method is implemented. It can be understood that the computer-readable storage medium in this embodiment can be a volatile readable storage medium or a non-volatile readable storage medium.

[0037] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media provided by the present invention and used in the embodiments may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double-speed data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM.

[0038] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, device, article or method including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, device, article or method. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the presence of other identical elements in the process, device, article or method including the element.

[0039] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A high-speed transmission stability control method for an FPC high-performance computing chip interface, characterized in that: The following steps are involved: The physical transmission layer and the signal control layer are subjected to dynamic bending three-dimensional molding to obtain the FPC interface coupling model; Divide the control node into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region and a signal demodulation region; Based on the signal modulation area, the signal compensation area and the signal demodulation area, real-time sampling and analysis of signal quality parameters are performed to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data; Inputting the signal integrity data, the timing jitter data, the crosstalk level data and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; Performing protective hemming and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and performing compensation processing on the signal transmission circuit according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; A performance evaluation model is established based on the mechanical constraint parameters and the electrical optimization parameters, and the FPC interface coupling model is iteratively optimized to obtain a control optimization strategy.

2. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 1 is characterized in that: The physical transmission layer and the signal control layer are subjected to dynamic bending three-dimensional molding to obtain an FPC interface coupling model, including: Mixing the high temperature resistant material and the corrosion resistant material according to a preset ratio to obtain an FPC base material, and laminating the FPC base material through a multi-layer alignment and lamination process to obtain a physical transmission layer; Performing HDI wiring processing on the conductive metal material to obtain a signal control layer, and performing molding processing on the metal mesh material according to a preset mesh size to obtain an electromagnetic shielding layer; Performing impedance matching calculation on the impedance between the physical transmission layer and the signal control layer to obtain impedance matching data, and inputting the impedance matching data into an impedance matching circuit for compensation processing to obtain impedance compensation parameters; The physical transmission layer and the signal control layer are three-dimensionally bent based on the impedance compensation parameters to obtain three-dimensional spatial positioning parameters, and the physical transmission layer, the electromagnetic shielding layer and the signal control layer are stacked and assembled according to the three-dimensional spatial positioning parameters to obtain an FPC interface coupling model.

3. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 2 is characterized in that: The control node is divided into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region and a signal demodulation region, including: Input the impedance matching parameters into an adaptive modulation algorithm for processing to obtain modulation parameters of a signal modulation region, wherein the modulation parameters include a signal amplitude modulation coefficient and a phase modulation coefficient; Performing a feedforward equalizer calculation on the modulation parameters of the signal modulation area to obtain a first equalization parameter, wherein the first equalization parameter represents an amplitude attenuation compensation value during signal transmission; Performing a decision feedback equalizer calculation on the first equalization parameter to obtain a second equalization parameter, wherein the second equalization parameter represents a phase delay compensation value during signal transmission; Defining a signal compensation area according to the first equalization parameter and the second equalization parameter to obtain compensation boundary data; Inputting the compensation boundary data into a maximum likelihood detection algorithm to perform signal demodulation area division to obtain demodulation area parameters, and performing dynamic compensation processing on the demodulation area parameters to obtain demodulation compensation coefficients; The wiring path of the high-speed data bus is determined according to the demodulation compensation coefficient to obtain bus wiring parameters, and the bus wiring parameters are optimized to obtain a signal modulation area, a signal compensation area and a signal demodulation area.

4. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 3 is characterized in that: The signal quality parameters are sampled and analyzed in real time based on the signal modulation area, the signal compensation area and the signal demodulation area to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data, including: Calculating the sampling rate of the output signal of the signal modulation area to obtain reference sampling frequency data, wherein the reference sampling frequency data is twice the signal bandwidth; Sampling the signal waveform based on the reference sampling frequency data to obtain original sampling data, and performing signal integrity analysis on the original sampling data to obtain signal integrity data; Performing timing analysis on the rising edge and the falling edge of the signal according to the original sampling data to obtain signal transition time data, and calculating timing jitter data according to the signal transition time data; Calculating the electromagnetic field coupling strength between adjacent signal lines to obtain coupling coefficient data, and calculating crosstalk level data based on the coupling coefficient data; The original sampling data is input into the Fourier transform algorithm for spectrum analysis to obtain signal power spectrum data and noise power spectrum data, and a ratio calculation is performed based on the signal power spectrum data and the noise power spectrum data to obtain signal-to-noise ratio data.

5. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 4 is characterized in that: The step of inputting the signal integrity data, the timing jitter data, the crosstalk level data and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters includes: The random error management model is graded to obtain an ASIL D error monitoring layer, an ASIL B error analysis layer, and a real-time compensation layer; fusing the signal integrity data and the timing jitter data at a ratio of 2:1 to obtain a first eigenvector, and fusing the crosstalk level data and the signal-to-noise ratio data at a ratio of 3:2 to obtain a second eigenvector; Inputting the first feature vector and the second feature vector into an ASIL D error monitoring layer for error classification to obtain error feature classification data, wherein the ASIL D error monitoring layer adopts a three-layer neural network structure, and the number of nodes in each layer of the three-layer neural network structure is 96, 48, and 24 respectively; Inputting the error feature classification data into an ASIL B error analysis layer for long-term trend analysis to obtain long-term prediction parameters, wherein the ASIL B error analysis layer adopts a long short-term memory network structure and includes 128 memory units; Performing sliding window processing on the long-term prediction parameters to obtain medium-term compensation parameters; The mid-term compensation parameters are input into a real-time compensation layer for dynamic response analysis to obtain short-term adjustment parameters, wherein the real-time compensation layer adopts a Kalman filter structure; The long-term prediction parameter, the mid-term compensation parameter and the short-term adjustment parameter are used as hierarchical control parameters.

6. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 5 is characterized in that: The protective edge wrapping and automatic bending processing of the FPC physical structure are performed according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and the signal transmission circuit is compensated according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters, including: Performing flexible circuit board protection hemming processing on the edge of the FPC according to the long-term prediction parameters to obtain edge mechanical strength parameters, and inputting the edge mechanical strength parameters into a fully automatic FPC bending machine for three-dimensional positioning processing to obtain three-dimensional bending parameters; Automatically bending the FPC physical structure based on the three-dimensional bending parameters to obtain physical deformation data, wherein the physical deformation data includes bending angle data and deformation stress data; Establishing a mechanical stress model according to the physical deformation data to obtain mechanical constraint parameters, wherein the mechanical constraint parameters include an elastic deformation coefficient and a plastic deformation coefficient; Performing signal amplitude compensation on the signal transmission circuit according to the mid-term compensation parameter to obtain an amplitude compensation coefficient, and performing phase compensation processing on the signal transmission circuit according to the short-term adjustment parameter to obtain a phase compensation coefficient; The amplitude compensation coefficient and the phase compensation coefficient are input into a signal equalizer for parameter adjustment processing to obtain equalizer coefficients, and the equalizer coefficients are dynamically optimized to obtain electrical optimization parameters, which include feedforward equalization parameters and feedback equalization parameters.

7. The high-speed transmission stability control method of the FPC high-performance computing chip interface according to claim 6 is characterized in that: The performance evaluation model is established based on the mechanical constraint parameters and the electrical optimization parameters, and the FPC interface coupling model is iteratively optimized to obtain a control optimization strategy, including: Performing mechanical damage analysis on the FPC interface according to the mechanical constraint parameters to obtain damage level parameters, and performing signal performance analysis on the FPC interface according to the electrical optimization parameters to obtain performance level parameters; Input the damage level parameter and the performance level parameter into a performance evaluation model for comprehensive analysis to obtain a system evaluation score, and perform grading processing on the FPC interface performance according to the system evaluation score to obtain a performance grading matrix, wherein the performance grading matrix includes a physical performance grade and an electrical performance grade; Based on the performance grading matrix, the FPC interface coupling model is differentiatedly optimized to obtain an optimization objective function, wherein the optimization objective function includes a physical optimization item and an electrical optimization item; Input the optimization objective function into a genetic algorithm for parameter optimization to obtain an optimization coefficient matrix, and adjust the parameters of the FPC interface coupling model according to the optimization coefficient matrix to obtain an iterative optimization result, wherein the iterative optimization result includes physical parameter optimization values ​​and electrical parameter optimization values; Performing convergence analysis on the iterative optimization result to obtain convergence judgment parameters, wherein the convergence judgment parameters include a relative error value and an iterative step value; The convergence judgment parameter, the physical parameter optimization value and the electrical parameter optimization value are strategically combined to obtain a control optimization strategy.

8. A high-speed transmission stability control device for an FPC high-performance computing chip interface, characterized in that: For implementing the steps of the method according to any one of claims 1 to 7, the device comprises: A molding module is used to perform dynamic bending three-dimensional molding on the physical transmission layer and the signal control layer to obtain an FPC interface coupling model; A division module, used for dividing the control node into regions according to the impedance matching parameters in the FPC interface coupling model to obtain a signal modulation region, a signal compensation region and a signal demodulation region; A sampling module, used for performing real-time sampling and analysis of signal quality parameters based on the signal modulation area, the signal compensation area and the signal demodulation area to obtain signal integrity data, timing jitter data, crosstalk level data and signal-to-noise ratio data; An analysis module, configured to input the signal integrity data, the timing jitter data, the crosstalk level data and the signal-to-noise ratio data into a random error management model for multi-scale analysis to obtain hierarchical control parameters; A processing module, used to perform protective hemming and automatic bending processing on the FPC physical structure according to the long-term prediction parameters in the hierarchical control parameters to obtain mechanical constraint parameters, and to perform compensation processing on the signal transmission circuit according to the mid-term compensation parameters and the short-term adjustment parameters to obtain electrical optimization parameters; The optimization module is used to establish a performance evaluation model based on the mechanical constraint parameters and the electrical optimization parameters, iteratively optimize the FPC interface coupling model, and obtain a control optimization strategy.

9. A computer device comprising a memory and a processor, wherein a computer program is stored in the memory, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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