GAN HEMT device with optimized gate structure and preparation method thereof

Abstract

The invention discloses a GAN HEMT device with an optimized grid structure and a preparation method thereof, the device comprises a substrate, an epitaxial layer, a grid electrode, a grid electrode field plate, a source electrode and a drain electrode, the substrate is a SiC substrate, the epitaxial layer adopts an InAlN barrier layer, an AIN insertion layer, a GaN channel layer and an AlGaN layer with gradually-changed Al components which are sequentially stacked from top to bottom, the grid electrode adopts an AlGaN / GaN heterojunction material, and the grid electrode field plate is made of an AlGaN / GaN heterojunction material. The gate field plate is arranged above the gate, and the drain and the source are located on the two sides of the gate. According to the GAN HEMT device with the structure, the short-channel effect is effectively inhibited, and the frequency characteristic and the breakdown voltage of the device are improved. On the premise that the direct current characteristic of the device is not greatly influenced, the highest oscillation frequency fmax of the device is effectively improved.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a GAN HEMT device with an optimized gate structure and a preparation method thereof. Background Art

[0002] GAN HEMT devices are widely used in the field of high-frequency and high-power electronic devices due to their high electron mobility, high breakdown voltage and low power consumption. However, as the gate length of the device shortens, the short channel effect becomes increasingly significant, resulting in a decrease in device performance, such as a decrease in maximum DC transconductance, a shift in threshold voltage, an increase in output conductance, and an increase in subthreshold current. Therefore, how to optimize the gate structure to suppress the short channel effect and improve device performance has become a hot topic in current research.

[0003] In the prior art, structures such as T-type gate and t-type gate are usually used to increase the equivalent gate length, thereby enhancing the gate's ability to control the channel. However, while these structures suppress the short channel effect, they may also introduce parasitic gate capacitance, resulting in a decrease in the frequency characteristics of the device. Therefore, it is necessary to strike a balance between suppressing the short channel effect and improving the frequency characteristics. Summary of the invention

[0004] The object of the present invention is to provide a GAN HEMT device with an optimized gate structure, which effectively suppresses the short channel effect and improves the frequency characteristics and breakdown voltage of the device by adopting a new composite metal gate structure and a reasonable gate field plate length.

[0005] To achieve this purpose, the present invention adopts the following technical solution: a GAN HEMT device with an optimized gate structure, the device comprising a substrate, an epitaxial layer, a gate, a gate field plate, a source and a drain, the substrate being a SiC substrate, the epitaxial layer adopts an InAlN barrier layer, an AlIn insertion layer, a GaN channel layer and an AlGaN layer with a gradient Al component stacked in sequence from top to bottom, the gate adopts an AlGaN / GaN heterojunction material, the gate field plate is arranged above the gate, and the drain and the source are located on both sides of the gate.

[0006] As a specific implementation, the thickness of the InAlN barrier layer is 5±0.1 nm; the thickness of the AlIn insertion layer is 1±0.05 nm; the thickness of the GaN channel layer is 20±0.1 nm; and the thickness of the AlGaN layer is 2±0.1 μm.

[0007] As a specific implementation, the gate length is between 20-300nm, the gate heel height is between 30-100nm, the gate-source distance is between 0.3-0.9μm, the length of the gate field plate is between 50-250nm, and the length of the gate field plate is greater than the length of the gate.

[0008] As a specific implementation, in the AlGaN layer, the concentration of Al decreases upward along the growth direction.

[0009] As a specific implementation manner, the substrate adopts a SiC substrate, the doping element is N or P, the doping concentration is 5E17~5E18cm-3, and the substrate thickness is 200~300μm.

[0010] As a specific implementation manner, the element ratio of the InAlN barrier layer is: In:Al:N=0.17:0.83:1.

[0011] Another object of the present invention is to provide a method for preparing the above-mentioned GAN HEMT device with an optimized gate structure, comprising the following steps: 1) growing an AlGaN layer on the substrate; 2) Growing GaN channel layer, AlIn insertion layer and InAlN barrier layer on the AlGaN layer in sequence; 3) forming a gate on the epitaxial structure in step 2) by using a lift-off process; 4) Use photolithography and etching processes to form source and drain patterns, and deposit source and drain metal electrodes.

[0012] Compared with the prior art, the technical solution of the present invention has the following advantages: 1) The GAN HEMT device of the present invention effectively suppresses the short channel effect and improves the DC characteristics and frequency characteristics of the device by adopting a novel composite metal gate structure.

[0013] 2) The GAN HEMT device of the present invention effectively increases the maximum oscillation frequency fmax of the device by adjusting the length of the gate field plate while ensuring that the DC characteristics of the device are not greatly affected.

[0014] 3) The GAN HEMT device of the present invention has the advantages of simple structure, stable performance, and easy manufacturing, and is suitable for the field of high-frequency and high-power electronic devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A schematic structural diagram of a GAN HEMT device with an optimized gate structure according to the present invention; Among them: 1. substrate; 2. epitaxial layer; 21. AlGaN layer; 22. GaN channel layer; 23. AIN insertion layer; 24. InAlN barrier layer; 3. gate; 4. source; 5. drain; 6. gate field plate. DETAILED DESCRIPTION

[0016] The technical solution of the present invention is further described below with reference to the accompanying drawings and through specific embodiments.

[0017] The present invention provides a GAN HEMT device with an optimized gate structure. The device comprises a substrate, an epitaxial layer, a gate, a gate field plate, a source and a drain. The substrate is a SiC substrate. The epitaxial layer adopts an InAlN barrier layer, an AlIn insertion layer, a GaN channel layer and an AlGaN layer with a gradient Al component which are stacked in sequence from top to bottom. The gate adopts an AlGaN / GaN heterojunction material. The gate field plate is arranged above the gate, and the drain and the source are located on both sides of the gate.

[0018] The method for preparing the above-mentioned GAN HEMT device comprises the following steps: 1) Growing an AlGaN layer on a substrate; 2) Growing GaN channel layer, AlIn insertion layer and InAlN barrier layer on the AlGaN layer in sequence; 3) A NiAu (nickel / gold) gate is formed on the epitaxial structure of step 2) by a lift-off process, wherein the Ni thickness is 20-50 nm and the Au thickness is 100-150 nm; 4) Use photolithography and etching processes to form source and drain patterns, and deposit source and drain electrode metals. The electrode metal structure is: Ti / Al / Ni / Au (titanium / aluminum / nickel / gold) from bottom to top, with thicknesses of 10~20nm / 80~120nm / 40~60nm / 40~70nm respectively. Example 1

[0019] This example provides a GAN HEMT device with a gate length of 100nm, a gate heel height of 60nm, a gate-source distance of 0.6μm, and a gate field plate length of 100nm. SiC is used as the substrate, and the epitaxial layer consists of 5nm InAlN, 1nm AIN insertion layer, 20nm GaN channel layer, and 1.98μm gradient Al component AlGaN. The test results show that the current gain cutoff frequency f of the device is 300GHz, and the maximum oscillation frequency fmax is 600GHz, which has good performance.

[0020] Here, gate length refers to the length of the gate; gate height refers to the height of the gate; gate-source distance refers to the distance between the gate and the source.

[0021] The doping element of the SiC substrate is nitrogen (N) or phosphorus (P), and the doping concentration is 5E17 -2 ~5E18cm -2 The doping element is nitrogen (N) or phosphorus (P), and the doping concentration is 5E17 -2 ~5E18cm -2 .

[0022] In this example, the gradient Al composition changes as it decreases upward along the growth direction. x Ga 1-x N, where 0≤x≤1.

[0023] The element ratio of InAlN barrier layer is: In 0.17 Al 0.83 N, AlN insertion layer and GaN channel layer are undoped.

[0024] Current gain cut-off frequency test method: The current gain cutoff frequency is an important parameter to describe the high-frequency performance of transistors, which indicates the frequency when the transistor current gain drops to 1. For GAN HEMT, its current gain cutoff frequency can be evaluated by small signal S parameter testing.

[0025] 1) Test equipment: A high-precision network analyzer or RF tester is required to measure the S parameters of the device.

[0026] 2) Test setup: Connect the GAN HEMT device to the test port of the network analyzer, ensuring good connections and minimal parasitic parameters.

[0027] 3) Test steps: 31) Scan the S parameters of the device within a certain frequency range; 32) Calculate the current gain of the device based on the S parameters; 33) Find the frequency at which the current gain drops to 1, which is the current gain cutoff frequency f.

[0028] Maximum oscillation frequency test method: The maximum oscillation frequency (fmax) describes the highest frequency that a transistor can reach in an oscillation circuit. For GANHEMT, the test of the maximum oscillation frequency usually needs to consider the device's power gain, stability factors, and parasitic parameters.

[0029] 1) Test equipment: In addition to the network analyzer, a load-pull test system is also required to evaluate the power gain and stability of the device.

[0030] 2) Test setup: Connect the GAN HEMT device to the input of the load-pull test system.

[0031] Set the appropriate input power and frequency range.

[0032] Adjust the load impedance at the output to find the optimum power gain point for the device.

[0033] 3) Test steps: 31) Sweep the power gain of the device within a certain frequency range; 32) Record the maximum power gain at each frequency; 33) Calculate the maximum oscillation frequency fmax of the device based on the power gain and stability factors. Usually, the maximum oscillation frequency is closely related to the power gain and stability factors of the device. Example 2

[0034] This example provides a GAN HEMT device, whose gate length is 60nm, gate heel height is 80nm, gate source distance is 0.8μm, and gate field plate length is 150nm. The rest of the structure is the same as that of Example 1. The test results show that the device has good breakdown voltage performance while maintaining high frequency characteristics.

[0035] The above contents are only preferred embodiments of the present invention. For ordinary technicians in this field, according to the concept of the present invention, there will be changes in the specific implementation methods and application scopes. The content of this specification should not be understood as limiting the present invention.

Claims

1. A GAN HEMT device with an optimized gate structure, characterized in that: The device includes a substrate, an epitaxial layer, a gate, a gate field plate, a source and a drain. The substrate is a SiC substrate. The epitaxial layer adopts an InAlN barrier layer, an AlIn insertion layer, a GaN channel layer and an AlGaN layer with a gradient Al component stacked in sequence from top to bottom. The gate adopts an AlGaN / GaN heterojunction material. The gate field plate is arranged above the gate, and the drain and the source are located on both sides of the gate.

2. A GAN HEMT device with an optimized gate structure according to claim 1, characterized in that: The thickness of the InAlN barrier layer is 5±0.1 nm; the thickness of the AlIn insertion layer is 1±0.05 nm; the thickness of the GaN channel layer is 20±0.1 nm; and the thickness of the AlGaN layer is 2±0.1 μm.

3. The GAN HEMT device with an optimized gate structure according to claim 1, characterized in that: The gate length of the gate is between 20-300nm, the gate heel height is between 30-100nm, the gate-source distance is between 0.3-0.9μm, the length of the gate field plate is between 50-250nm, and the length of the gate field plate is greater than the length of the gate.

4. The GAN HEMT device with an optimized gate structure according to claim 1, characterized in that: In the AlGaN layer, the concentration of Al decreases upward along the growth direction.

5. The GAN HEMT device with an optimized gate structure according to claim 1, characterized in that: The substrate adopts SiC substrate, the doping element is N or P, and the doping concentration is 5E17~5E18cm -3 , the substrate thickness is 200~300μm.

6. The GAN HEMT device with an optimized gate structure according to claim 1, characterized in that: The element ratio of the InAlN barrier layer is: In:Al:N=0.17:0.83:

1.

7. A method for preparing a GAN HEMT device with an optimized gate structure according to any one of claims 1 to 6, characterized in that: The following steps are involved: 1) Growing an AlGaN layer on the substrate; 2) Growing GaN channel layer, AlIn insertion layer and InAlN barrier layer on the AlGaN layer in sequence; 3) forming a gate on the epitaxial structure in step 2) by using a lift-off process; 4) Use photolithography and etching processes to form source and drain patterns, and deposit source and drain metal electrodes.

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