Display panel

Abstract

The present application relates to a display panel comprising a display area and a first functional area located on at least one side of the display area. The display panel comprises: a display substrate; an organic buffer unit disposed on one side of the display substrate, located in the first functional area; an inorganic encapsulation layer located on the same side of the display substrate as the organic buffer unit, the inorganic encapsulation layer including a thickness reduction portion extending toward the first functional area; and a first insulating layer disposed on a side of the inorganic encapsulation layer away from the display substrate, the first insulating layer including an edge extension portion extending toward a bending area. The organic buffer unit includes a first surface away from the display substrate, and the boundary of at least one of the thickness reduction portion and the first insulating layer overlaps with the first surface in the thickness direction of the display panel. The above design can reduce the risk of interface delamination between the inorganic encapsulation layer and the organic buffer unit, and improve the reliability of the overall bending resistance of the thin film encapsulation layer.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel. Background Art

[0002] Currently, to achieve a narrow-bezel display, a pad bending area (terminal bending area) is generally set on the bottom bezel of the display panel. One side of the pad bending area is connected to the display area, and the other side is connected to the chip bonding area. By bending the pad bending area, the chip bonding area is also bent to the back of the display panel, thereby narrowing the bezel of the display panel.

[0003] In order to block water and oxygen, a thin film encapsulation layer is generally provided above the display layer of the display panel. The inorganic encapsulation layer of the thin film encapsulation layer is generally formed by CVD (Chemical vapor deposition) using HTM (Half tone mask). The pad bending area is generally filled with an organic layer, and the edge of the organic layer forms a steeper climbing area near the side of the pad bending area facing the display area. The HTM of the inorganic encapsulation layer is generally cut off before reaching the climbing area, but due to process influences, the inorganic material is not deposited only in the area cut off by the HTM, resulting in the final formed inorganic encapsulation layer extending outside the HTM cut-off area, and may extend to the climbing area or even reach the upper surface of the organic layer. The thickness of the portion of the inorganic encapsulation layer extending outside the HTM cut-off area will gradually decrease, and the film quality will be poor, resulting in a low interface strength with the underlying organic layer, resulting in interface peeling (peeling). If there are other inorganic insulating layers above the thinned portion of the inorganic encapsulation layer, it will also cause a large stress concentration here, increasing the risk of interface peeling. Summary of the Invention

[0004] An embodiment of the present application provides a display panel that reduces the risk of peeling of the encapsulation layer near the pad bending area, thereby at least partially solving the above-mentioned technical problems.

[0005] To achieve the above-mentioned object, according to a first aspect of the present application, a display panel is provided, wherein the display panel comprises a display area and a first functional area located on at least one side of the display area; wherein the display panel comprises:

[0006] display substrate;

[0007] an organic buffer unit, disposed on one side of the display substrate and located in the first functional area;

[0008] an inorganic encapsulation layer, located on the same side of the display substrate as the organic buffer unit, the inorganic encapsulation layer comprising a reduced thickness portion extending toward the first functional area; and

[0009] a first insulating layer, disposed on a side of the inorganic encapsulation layer away from the display substrate, the first insulating layer comprising an edge extension portion extending toward the bending region;

[0010] The organic buffer unit includes a first surface away from the display substrate, and a boundary between at least one of the reduced thickness portion and the first insulating layer overlaps with the first surface in a thickness direction of the display panel.

[0011] In some embodiments of the present application, the display panel includes a second functional area located between the display area and the first functional area, the display substrate includes a first inorganic layer and a groove located in the second functional area, the groove exposing a portion of the surface of the first inorganic layer;

[0012] The inorganic encapsulation layer includes a main body portion connected to the reduced thickness portion, the main body portion covers a portion of the display substrate located in the display area, and the main body portion contacts the first inorganic layer through the groove.

[0013] In some embodiments of the present application, the organic buffer unit further includes a first slope surface close to the second functional area;

[0014] The edge extension portion does not overlap with the first surface in the thickness direction, and the edge extension portion overlaps or does not overlap with the first slope surface in the thickness direction;

[0015] In some embodiments of the present application, the organic buffer unit includes a first organic buffer sub-portion and a second organic buffer sub-portion stacked together, wherein the first organic buffer sub-portion includes a first sub-slope surface close to the display area, the second organic buffer sub-portion includes a second sub-slope surface close to the display area, and the first slope surface includes the first sub-slope surface and the second sub-slope surface.

[0016] The height of the portion of the edge extension portion overlapping with the first slope surface in the thickness direction is less than or equal to 3 microns, and the height of the portion of the edge extension portion overlapping with either the first sub-slope surface or the second sub-slope surface in the thickness direction is less than or equal to 1.5 microns.

[0017] In some embodiments of the present application, the inorganic encapsulation layer includes a first inorganic encapsulation layer provided on the display substrate, and a second inorganic encapsulation layer provided on the first inorganic encapsulation layer, wherein the first inorganic encapsulation layer includes a first main body portion and a first thickness-reduced portion, and the second inorganic encapsulation layer includes a second main body portion and a second thickness-reduced portion, and the first main body portion contacts the first inorganic layer through the groove;

[0018] There is a first boundary between the first main body portion and the first reduced thickness portion, there is a second boundary between the second main body portion and the second reduced thickness portion, and the first boundary and the second boundary coincide with each other.

[0019] In some embodiments of the present application, the display substrate includes:

[0020] pixel driving circuit;

[0021] A first planarization layer is provided on the pixel driving circuit;

[0022] a connecting electrode, disposed on the first planarization layer and electrically connected to the pixel driving circuit;

[0023] a second planarization layer, disposed on the connecting electrode;

[0024] a plurality of first electrodes, disposed on the second planarization layer and electrically connected to the connection electrode;

[0025] a pixel definition layer disposed on the second planarization layer, the pixel definition layer comprising a plurality of openings and a first organic buffer sub-portion, the plurality of openings corresponding one-to-one to the plurality of first electrodes, the openings exposing a portion of the surface of the corresponding first electrode, and the first organic buffer sub-portion being located within the first functional area;

[0026] an isolation layer disposed on the pixel definition layer, the isolation layer comprising a plurality of isolation columns and a second organic buffer sub-portion, the plurality of isolation columns being located between adjacent display units, and the second organic buffer sub-portion being located within the first functional area;

[0027] The organic buffer unit includes the first organic buffer sub-section and the second organic buffer sub-section.

[0028] In some embodiments of the present application, the first planarization layer includes a first flat sub-portion located in the first functional area, the second planarization layer includes a second flat sub-portion located in the first functional area, the second flat sub-portion covers the first flat sub-portion, and the orthographic projection of the first boundary on the second flat sub-portion is located on the second flat sub-portion.

[0029] In some embodiments of the present application, the reduced thickness portion does not overlap with the organic buffer unit in the thickness direction.

[0030] In some embodiments of the present application, the inorganic encapsulation layer includes a first inorganic encapsulation layer provided on the display substrate, and a second inorganic encapsulation layer provided on the first inorganic encapsulation layer, the first inorganic encapsulation layer includes a first main body portion and a first thickness-reduced portion, the second inorganic encapsulation layer includes a second main body portion and a second thickness-reduced portion, the first main body portion and the second main body portion both cover the display unit, the film thickness of the first main body portion is greater than the film thickness of the second main body portion, and the first main body portion is in contact with the first inorganic layer through the groove;

[0031] A first boundary is defined between the first main body portion and the first reduced thickness portion, and a second boundary is defined between the second main body portion and the second reduced thickness portion. The first boundary is closer to the display area than the second boundary.

[0032] In some embodiments of the present application, a distance between the first boundary and the second boundary in a direction from the display area to the second functional area is greater than or equal to 50 micrometers.

[0033] In some embodiments of the present application, a first retaining wall and a second retaining wall are provided between the display area and the second functional area, the second retaining wall is farther away from the display area relative to the first retaining wall, the first main body covers the first retaining wall and the second retaining wall, and the first width of the portion of the first inorganic layer exposed by the groove is greater than or equal to 45 microns, wherein the direction of the first width is the direction from the display area to the second functional area.

[0034] The display panel of the embodiment of the present application includes a display area and a first functional area located on at least one side of the display area; wherein the display panel includes: a display substrate; an organic buffer unit, disposed on one side of the display substrate, located in the first functional area; an inorganic encapsulation layer, located on the same side of the display substrate as the organic buffer unit, the inorganic encapsulation layer including a thickness reduction portion extending toward the first functional area; and a first insulating layer, disposed on a side of the inorganic encapsulation layer away from the display substrate, the first insulating layer including an edge extension portion extending toward the bending area; wherein the organic buffer unit includes a first surface away from the display substrate, and a boundary between at most one of the thickness reduction portion and the first insulating layer overlaps with the first surface in the thickness direction of the display panel. Through the above design, the risk of interface delamination between the inorganic encapsulation layer and the organic buffer unit can be reduced, and the reliability of the overall anti-bending capability of the thin film encapsulation layer can be improved.

[0035] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0037] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same drawing numbers represent the same parts in the following description.

[0038] Figure 1 This is a schematic diagram of the first structure of the display panel provided in an embodiment of the present application;

[0039] Figure 2 This is a schematic diagram of the second structure of the display panel provided in an embodiment of the present application;

[0040] Figure 3 is a schematic structural diagram of an exemplary display panel provided in this application;

[0041] Figure 4 is a schematic structural diagram of the vicinity of the first functional area of ​​the display panel provided in an embodiment of the present application;

[0042] Figure 5 yes Figure 3 Scanning electron micrograph of the A-A' section;

[0043] Figure 6 This is a third structural diagram of the display panel provided in an embodiment of the present application.

[0044] Description of reference numerals:

[0045] 1. Display panel; 101. Display area; 102. Retaining wall area; 103. Second functional area; 104. First functional area; 105. Groove;

[0046] 10. Display substrate; 11. First inorganic layer; 12. Pixel driving circuit; 121. Semiconductor layer; 122. First metal layer; 123. Second metal layer; 124. Third metal layer; 13. Display unit; 131. First planarization layer; 1311. First planar sub-portion; 132. Connecting electrode; 133. Second planarization layer; 1331. Second planar sub-portion; 134. First electrode; 135. Pixel definition layer; 136. Organic emission layer; 14. Substrate; 15. Barrier layer; 16. Buffer layer; 17. First gate insulating layer; 18. Second gate insulating layer; 19. Interlayer insulating layer;

[0047] 20. Organic buffer unit; 201. First surface; 21. First organic buffer sub-unit; 22. Second organic buffer sub-unit;

[0048] 30, thin film encapsulation layer; 301, main body; 302, thickness reduction portion; 310, inorganic encapsulation layer; 31, first inorganic encapsulation layer; 32, first organic encapsulation layer; 33, second inorganic encapsulation layer; 311, first main body; 312, first thickness reduction portion; 331, second main body; 332, second thickness reduction portion;

[0049] 40. First insulating layer; 41. Edge extension; 50. First retaining wall; 60. Second retaining wall;

[0050] 70. Isolation layer; 71. Isolation column; 80. Organic filling layer;

[0051] S1, first distance; W1, first width; L1, first boundary; L2, second boundary. DETAILED DESCRIPTION

[0052] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0053] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0054] See also Figure 1The present invention provides a display panel 1, including but not limited to an organic light-emitting diode display panel. The display panel 1 includes a display area 101, a second functional area 103 located outside the display area 101, and a first functional area 104. The second functional area 103 is located between the display area 101 and the first functional area 104.

[0055] The display area 101 is used for luminous display. The second functional area 103 and the first functional area 104 are both non-display areas. The second functional area 103 can be located between the display area 101 and the first functional area 104. The second functional area 103 can be an effective packaging area, surrounding the display area 101 to encapsulate the display area 101. The first functional area 104 can be a padding area located at the bottom frame of the display panel 1. The first functional area 104 can be bent to fold the chip bonding area connected to it to the back of the display panel 1 to achieve a narrow-frame display.

[0056] The display panel 1 includes a display substrate 10, which includes a first inorganic layer 11 and a plurality of display units 13 disposed on the first inorganic layer 11 and located within a display area 101. The display unit 13 may be composed of an anode, an organic emissive layer 136, and a cathode. The display unit 13 may be an organic light-emitting device. The display substrate 10 may also include a substrate and a plurality of pixel driving circuits 12 disposed on the substrate. The pixel driving circuits 12 are electrically connected to corresponding display units 13 to drive the corresponding display units 13 to emit light. The substrate and the display units 13 may be stacked with multiple inorganic layers, and the first inorganic layer 11 may be one of the multiple inorganic layers.

[0057] The display panel 1 further includes an organic buffer unit 20 disposed on the first inorganic layer 11. The organic buffer unit 20 is located within the first functional region 104 and is used to buffer stress generated when the first functional region 104 is bent. The organic buffer unit 20 can be formed by stacking a single organic layer or multiple organic layers.

[0058] The display panel 1 further includes a thin film encapsulation layer 30, which is disposed on the display substrate 10 and covers the display unit 13 to encapsulate and protect the display unit 13. The thin film encapsulation layer 30 includes an inorganic encapsulation layer 310, which is disposed on the display unit 13. The thin film encapsulation layer 30 can be formed by alternately stacking one or more organic encapsulation layers and one or more inorganic encapsulation layers 310.

[0059] The inorganic encapsulation layer 310 may include a main body portion 301 and a reduced thickness portion 302 connected to the main body portion 301 . The main body portion 301 covers the display unit 13 , and the reduced thickness portion 302 is located at an edge region of the inorganic encapsulation layer 310 .

[0060] Please continue reading Figure 1 The second functional area 103 is provided with a groove 105, which exposes a portion of the surface of the first inorganic layer 11. The main body 301 of the inorganic encapsulation layer 310 directly contacts the exposed surface of the first inorganic layer 11 through the groove 105, forming a complete inorganic-inorganic encapsulation closed loop, protecting the organic layer in the thin film encapsulation layer 30. The groove 105 can be arranged in a circle around the display area 101 to achieve effective encapsulation of the light-emitting diode device.

[0061] The thickness of the main portion 301 is greater than that of the reduced thickness portion 302. The main portion 301 has a uniform thickness (thickness difference is negligible within an acceptable tolerance range), and the thickness of the reduced thickness portion 302 gradually decreases in a direction away from the main portion 301.

[0062] In an embodiment of the present application, the inorganic encapsulation layer 310 can be formed into a film by chemical vapor deposition (CVD) using a half-tone mask (HTM). During the film formation process, the reaction gas dissociates on the electrode and then diffuses to the surface of the substrate to adsorb and react to form a film. There will be a certain gap between the half-tone mask and the surface of the substrate. Therefore, a small amount of dissociated reaction gas will diffuse through the gap and form a film outside the cut-off area of ​​the half-tone mask. Since the farther away from the cut-off area of ​​the half-tone mask, the lower the plasma concentration will be, the thinner the film thickness will be, and the worse the film quality will be. The film formed in the cut-off area of ​​the half-tone mask corresponds to the main body 301 of the inorganic encapsulation layer 310, and the film formed outside the cut-off area of ​​the mask is the thickness reduction portion 302 of the inorganic encapsulation layer 310.

[0063] In theory, the cutoff region of the halftone mask of the inorganic encapsulation layer 310 typically ends before the first functional region 104 to prevent the inorganic encapsulation layer 310 from increasing stress in the first functional region 104 during bending. However, for narrow-frame display panels, although a certain distance exists between the cutoff region of the halftone mask and the organic buffer unit 20, this distance may be limited. This results in insufficient area reserved for forming the reduced thickness portion 302, and a portion of the reduced thickness portion 302 may extend onto the organic buffer unit 20.

[0064] Since the second functional area 103 of the organic buffer unit 20 on the side close to the display area 101 is provided with a groove 105, the groove 105 has dug out all types of organic layers above the display substrate 10 to expose the first inorganic layer 11 for connection between the inorganic encapsulation layer 310 and the first inorganic layer 11. Therefore, a slope (also called a "climbing area") is formed on the surface of the organic buffer unit 20 on the side close to the display area 101, and the thickness reduction portion 302 extends along the slope to the upper surface of the organic buffer unit 20 (the side surface facing away from the display substrate 10, hereinafter referred to as the "first surface 201").

[0065] The plasma concentration outside the cutoff area of ​​the half-tone mask is very low. Therefore, the film thickness of the thickness-reduced portion 302 is much lower than that of the main portion 301, and the film quality is also poor, resulting in low interface strength between the thickness-reduced portion 302 and the organic buffer unit 20 below, and poor interface adhesion between the two, which in turn leads to the risk of interface peeling.

[0066] The display panel 1 may further include a first insulating layer 40 disposed on the inorganic encapsulation layer 310. The display panel 1 may be a touch display panel including a touch sensing unit. The touch sensing unit may include a stacked first conductive layer, a first touch insulating layer, a second conductive layer, and a second touch insulating layer.

[0067] The first insulating layer 40 may include at least one of a first touch insulating layer and a second touch insulating layer. Each of the first touch insulating layer and the second touch insulating layer may be formed of an inorganic material. The inorganic material may include at least one oxide such as titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0068] The first insulating layer 40 can be formed entirely over its surface by CVD, after which unnecessary layers are etched away using a photolithography process. Therefore, there are no areas of reduced thickness in the first insulating layer 40. The first insulating layer 40 disposed on the inorganic encapsulation layer 310 has high stress, resulting in significant stress concentration in the sloped region, further increasing the risk of interfacial delamination between the reduced thickness portion 302 and the underlying organic buffer unit 20.

[0069] To address the above drawbacks, in an embodiment of the present application, the first insulating layer 40 includes an edge extension 41 located in the first functional area 104. At most one of the reduced thickness portion 302 and the edge extension 41 overlaps the first surface 201 of the organic buffer unit 20 in the thickness direction of the display panel 1. In other words, at most one of the reduced thickness portion 302 or the edge extension 41 extends to the area corresponding to the first surface 201 of the organic buffer unit 20. This design reduces the risk of interfacial delamination between the inorganic encapsulation layer 310 and the organic buffer unit 20, improving the overall bending resistance and reliability of the thin-film encapsulation layer 30.

[0070] This application is described in detail through the following specific examples.

[0071] See also Figure 2The display panel 1 includes a display substrate 10, which may include the following structure: a base 14, a barrier layer 15, a buffer layer 16, a semiconductor layer 121, a first gate insulating layer 17, a first metal layer 122, a second gate insulating layer 18, a second metal layer 123, an interlayer insulating layer 19, a third metal layer 124, a passivation layer, a first planarizing layer 131, a connecting electrode 132, a second planarizing layer 133, a first electrode 134, a pixel definition layer 135, an isolation layer 70, a thin film encapsulation layer 30 and a first insulating layer 40.

[0072] The substrate 14 may be made of an organic material having insulating properties and being flexible so as to be heat-treated at a temperature equal to or greater than about 450° C., and the substrate 14 may be formed as a single layer, for example, of polyimide, or may be formed as a plurality of layers of polyimide formed by repeatedly stacking the polyimide by coating and curing. The substrate 14 may be a flexible substrate formed by coating a polymeric material such as polyimide on a supporting substrate (not shown) and curing the polymeric material. In this case, the substrate 14 may be formed into a plurality of layers by repeatedly coating and curing the polymeric material. The supporting substrate may be formed of glass, metal, or ceramic, and the polyimide may be coated on the supporting substrate by coating processes such as spin coating, slit coating, and inkjet coating. The supporting substrate may be removed in a subsequent process. The substrate 14 may be a composite film layer formed by stacking a polyimide layer, an inorganic layer, and a polyimide layer. The inorganic layer may include one or more of silicon oxide, silicon nitride, and amorphous silicon.

[0073] Barrier layer 15 is disposed on substrate 14. Barrier layer 15 may include various insulating materials (e.g., silicon oxide or silicon nitride) and may have a single-layer or multi-layer structure, without limitation. Barrier layer 15 may provide a planarization layer on the upper surface of substrate 14 and may block or prevent impurities and moisture from penetrating from substrate 14 into display unit 13 (i.e., the organic light-emitting device).

[0074] Buffer layer 16 is disposed on barrier layer 15. Buffer layer 16 may include one or more inorganic insulating layers, such as silicon oxide or silicon nitride. Buffer layer 16 may provide a planarized surface on the upper surface of substrate 14 and may block or prevent impurities and moisture from penetrating from substrate 14 into display unit 13 (i.e., organic light-emitting device).

[0075] Semiconductor layer 121 is disposed on buffer layer 16 and may be formed of polycrystalline silicon. Semiconductor layer 121 is divided into a channel region and source and drain regions formed on either side of the channel region. The channel region of the semiconductor may be polycrystalline silicon without impurities, i.e., an intrinsic semiconductor. The source and drain regions may be polycrystalline silicon doped with conductive impurities, i.e., impurity semiconductors. The impurities doped in the source and drain regions may be either P-type or N-type impurities.

[0076] The first gate insulating layer 17 is disposed on the semiconductor layer 121. The first gate insulating layer 17 may be a single layer or a plurality of layers including at least one of tetraethylorthosilicate (TEOS), silicon nitride, and silicon oxide.

[0077] A first metal layer 122 is disposed on the first gate insulating layer 17. The first metal layer 122 may include a gate electrode and some signal traces, such as scan lines. The gate electrode overlaps the channel region. The gate electrode may be formed as multiple layers or a single layer of a low-resistance material such as Al, Ti, Mo, Cu, Ni, or alloys thereof, or a material with high corrosion resistance.

[0078] The second gate insulating layer 18 is disposed on the first metal layer 122 . The first gate insulating layer 17 may be a single layer or multiple layers including at least one of tetraethylorthosilicate (TEOS), silicon nitride, and silicon oxide.

[0079] The second metal layer 123 is disposed on the second gate insulating layer 18. The second metal layer 123 may include capacitor electrode plates and some signal traces. The capacitor electrode plates are positioned opposite the underlying gate electrode to form a capacitor. The second metal layer 123 may be formed as multiple layers or a single layer of a low-resistance material such as Al, Ti, Mo, Cu, Ni, or alloys thereof, or a material with high corrosion resistance.

[0080] An interlayer insulating layer 19 is provided on the gate electrode. The interlayer insulating layer 19 can be formed as a plurality of layers or a single layer, for example, of tetraethylorthosilicate (TEOS), silicon nitride, or silicon oxide. The interlayer insulating layer 19, the second gate insulating layer 18, and the third gate insulating layer include source and drain contact holes, through which the source and drain regions are exposed, respectively.

[0081] The third metal layer 124 is disposed on the interlayer insulating layer 19. The third metal layer 124 may include a source electrode, a drain electrode, and some signal lines, such as a data line. The source electrode is connected to the source region through a source contact hole, and the drain electrode is connected to the drain region through a drain contact hole. The third metal layer 124 may be formed as multiple layers or a single layer of a low-resistance material such as Al, Ti, Mo, Cu, Ni, or an alloy thereof, or a material with high corrosion resistance. For example, the third metal layer 124 may be a three-layer composite structure of Ti / Cu / Ti, Ti / Ag / Ti, Ti / Al / Ti, or Mo / Al / Mo.

[0082] The gate, source, and drain electrodes may be a control electrode, an input electrode, and an output electrode, respectively, of a thin film transistor in the pixel driving circuit 12 of the display substrate 10, and form a thin film transistor together with the semiconductor layer 121. A channel of the thin film transistor is formed in the portion of the semiconductor layer 121 between the source and drain electrodes.

[0083] The first insulating layer 40 may be any inorganic layer below the third metal layer 124 where the source and drain electrodes are located, such as the interlayer insulating layer 19 , the second gate insulating layer 18 , the first gate insulating layer 17 , the barrier layer 15 or the buffer layer 16 .

[0084] A passivation layer is disposed on the third metal layer 124. The passivation layer may be formed as a single layer or multiple layers of, for example, tetraethylorthosilicate (TEOS), silicon nitride, or silicon oxide.

[0085] A first planarization layer 131 is disposed on the passivation layer, and the first planarization layer 131 can provide a planarized surface. The passivation layer and the first planarization layer 131 may include a first through-hole through which the drain electrode is exposed. The pixel defining layer 190 may be formed to include a resin such as polyacrylate or polyimide, a silica-based organic material, or the like.

[0086] Connecting electrode 132 is disposed on first planarization layer 131 and is connected to the drain electrode through a through-hole. Connecting electrode 132 can be formed as multiple layers or a single layer of a low-resistance material such as Al, Ti, Mo, Cu, Ni, or alloys thereof, or a material with high corrosion resistance. For example, connecting electrode 132 can have a three-layer composite structure of Ti / Cu / Ti, Ti / Ag / Ti, Ti / Al / Ti, or Mo / Al / Mo.

[0087] A second planarization layer 133 is disposed on the connection electrode 132. The second planarization layer 133 can provide a planarized surface. The second planarization layer 133 may include a second through-hole through which the connection electrode 132 is exposed. The second planarization layer 133 may be formed to include a resin such as polyacrylate or polyimide, a silica-based organic material, or the like.

[0088] The first electrode 134 is disposed on the second planarization layer 133 and is connected to the connection electrode 132 through the second through hole. The first electrode 134 may be an anode of an organic light emitting diode of the display panel 1 .

[0089] The pixel definition layer 135 is disposed on the first electrode 134. The pixel definition layer has a plurality of openings, each corresponding to one of the first electrodes 134. The openings expose a portion of the surface of the corresponding first electrode 134. The thickness of the pixel definition layer 135 is 0.8-1 micron.

[0090] The pixel definition layer 135 may be formed to include a resin such as polyacrylate or polyimide, a silica-based organic material, or the like.

[0091] The organic emission layer 136 is formed in the opening of the pixel definition layer 135. The organic emission layer 136 is formed of multiple layers including one or more emission layers, a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). In the case where the organic emission layer 136 includes all of the above layers, the hole injection layer (HIL) may be located on the first electrode 134 (i.e., the anode), and the hole transport layer (HTL), the emission layer, the electron transport layer (ETL), and the electron injection layer (EIL) may be sequentially laminated on the hole injection layer (HIL).

[0092] The second electrode is disposed on the pixel defining layer and the organic emission layer 136. The second electrode may be a cathode of an organic light emitting diode. The first electrode 134, the organic emission layer 136, and the second electrode form an organic light emitting device.

[0093] Here, the display panel 1 may have any one structure of a top display type, a bottom display type, and a dual display type according to the direction of light emitted by the organic light emitting device.

[0094] In the top display type, the first electrode 134 is formed as a reflective layer, and the second electrode is formed as a semi-transmissive layer or a transmissive layer. On the other hand, in the case of the bottom display type, the first electrode 134 is formed as a semi-transmissive layer, and the second electrode is formed as a reflective layer. In addition, in the case of the dual display type, the first electrode 134 and the second electrode are formed as a transparent layer or a semi-transmissive layer.

[0095] The reflective layer and the semi-transmissive layer are made of one or more metals such as magnesium (Mg), silver (Ag), gold (Au), calcium (Ca), lithium (Li), chromium (Cr), and aluminum (Al), or alloys thereof. The reflective layer and the semi-transmissive layer are determined by thickness, and as the thickness decreases, the transmittance increases, so the semi-transmissive layer can be formed to have a thickness of about 200 nm or less. The transparent layer is formed of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In2O3).

[0096] An isolation layer 70 is disposed on the pixel definition layer 135 and may include a plurality of isolation pillars 71 positioned between adjacent display cells 13. The isolation pillars 71 provide a certain height above the pixel definition layer 135 to prevent direct contact between the mask and the pixel definition layer 135, which could damage the device. The thickness of the isolation layer 70 may be 1.5-2 microns. The isolation layer 70 may be made of a polyimide resin material by photolithography or printing.

[0097] The thin film encapsulation layer 30 is disposed on the second electrode. The thin film encapsulation layer 30 may include an inorganic encapsulation layer 310 and an organic encapsulation layer. The organic encapsulation layer is formed of a polymer, and may be, for example, a laminate or a single layer formed of any one of polyethylene terephthalate, polyimide, polycarbonate, epoxy resin, polyethylene, and polyacrylate. The organic encapsulation layer may be formed of polyacrylate, specifically including a substance obtained by polymerizing a monomer composition including a diacrylate-based monomer and a triacrylate-based monomer. The monomer composition may also include a monoacrylate-based monomer. In addition, the monomer composition may also include a well-known photoinitiator such as TPO, but the monomer composition is not limited thereto. The inorganic encapsulation layer 310 may be a laminate or a single layer including a metal oxide or a metal nitride. For example, the inorganic encapsulation layer 310 may include any one of SiNx, Al2O3, SiO2, SiON, and TiO2. The thin film encapsulation layer 30 may be formed by alternately stacking one or more organic layers and one or more inorganic layers.

[0098] A plurality of inorganic encapsulation layers 310 or organic encapsulation layers may be provided. The uppermost layer of the thin film encapsulation layer 30 exposed to the outside may be formed of the inorganic encapsulation layer 310 to block water and oxygen from invading the interior of the organic light emitting diode device.

[0099] The thin film encapsulation layer 30 may sequentially include a first inorganic encapsulation layer 31 located on the second electrode, a first organic encapsulation layer, and a second inorganic encapsulation layer 33. Furthermore, the thin film encapsulation layer 30 may also sequentially include a first inorganic encapsulation layer 31 located on the second electrode, a first organic encapsulation layer 32, a second inorganic encapsulation layer 33, a second organic encapsulation layer, and a third inorganic encapsulation layer. Furthermore, the thin film encapsulation layer 30 may sequentially include a first inorganic encapsulation layer 31 located on the second electrode, a first organic encapsulation layer 32, a second inorganic encapsulation layer 33, a second organic encapsulation layer, a third inorganic encapsulation layer, a third organic encapsulation layer, and a fourth inorganic encapsulation layer.

[0100] In addition, a metal halogenide layer may be further included between the second electrode and the first inorganic encapsulating layer 31, wherein the metal halogenide layer includes, for example, LiF. The metal halogenide layer can prevent damage to the second electrode when the first inorganic encapsulating layer 31 is formed by sputtering or plasma deposition.

[0101] The first organic encapsulation layer has an area smaller than that of the second inorganic encapsulation layer 33, and the second organic encapsulation layer has an area smaller than that of the third inorganic encapsulation layer. In addition, the first organic encapsulation layer 32 is completely covered by the second inorganic encapsulation layer 33, and the second organic encapsulation layer is completely covered by the third inorganic encapsulation layer.

[0102] The first insulating layer 40 is disposed on the inorganic encapsulation layer 310 and includes an edge extension portion 41 located in the first functional region 104 .

[0103] When the display panel 1 is a touch display panel, it may further include a touch unit. The touch unit may be disposed on the inorganic encapsulation layer. The touch unit may include a first conductive layer, a first touch insulating layer, a second conductive layer, and a second touch insulating layer. The first conductive layer may be disposed directly on the inorganic encapsulation layer. The first conductive layer may include a plurality of first touch electrodes located in the display area 101. The first touch insulating layer is disposed on and covers the first conductive layer. The second conductive layer may include a plurality of second touch electrodes located in the display area 101. The second touch insulating layer is disposed on and covers the second conductive layer. Each of the first conductive layer and the second conductive layer may have a single-layer structure or multiple layers.

[0104] Each of the first touch insulating layer and the second touch insulating layer may have a single-layer structure or a multi-layer structure. Each of the first touch insulating layer and the second touch insulating layer may be formed of an inorganic material. The inorganic material may include at least one oxide such as titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0105] In some embodiments, the first insulating layer 40 may include, but is not limited to, at least one of the first touch insulating layer and the second touch insulating layer.

[0106] See also Figure 1 and Figure 2 In some embodiments, because the first functional region 104 needs to bend, and inorganic layers are brittle and easily break when bent, it is necessary to remove the inorganic layers involved in the first functional region 104, such as the barrier layer 15, buffer layer 16, first gate insulating layer 17, second gate insulating layer 18, interlayer insulating layer 19, passivation layer, etc. The organic filler layer 80 fills the inorganic layer removed area to enhance the bending performance of the first functional region 104. Alternatively, the organic filler layer 80 can be formed using the organic layers involved in the formation of the display unit 13. For example, the first planarization layer 131 can be used to fill the inorganic layer removed area.

[0107] Optionally, the first planarization layer 131 includes a first planar sub-portion 1311 located in the first functional area 104 , which may fill the inorganic layer excavated area. The second planarization layer 133 includes a second planar sub-portion 1331 located in the first functional area 104 , which covers the first planar sub-portion 1311 .

[0108] See also Figure 4 The organic buffer unit 20 can also be formed by using the organic layers involved in the formation process of the display unit 13 , such as the pixel definition layer 135 and the isolation layer 70 .

[0109] Specifically, the pixel definition layer 135 includes a first organic buffer sub-section 21 in the first functional region 104, and the isolation layer 70 includes a second organic buffer sub-section 22 in the first functional region 104. The first organic buffer sub-section 21 and the second organic buffer sub-section 22 are stacked, and the organic buffer unit 20 includes the first organic buffer sub-section 21 and the second organic buffer sub-section 22. The first surface 201 of the organic buffer unit 20 facing away from the display substrate 10 is the surface of the second organic buffer sub-section 22 facing away from the display substrate 10.

[0110] The organic buffer unit 20 also includes a first sloped surface adjacent to the second functional area 103. Specifically, the organic buffer unit 20 also includes a second surface and a second sloped surface. The second surface and the first surface 201 are disposed opposite each other. The first sloped surface and the second sloped surface are disposed opposite each other and along a direction pointing from the second functional area 103 to the first functional area 104. The first sloped surface and the second sloped surface are both connected to the first surface 201 and the second surface. The first sloped surface is closer to the second functional area 103 than the second sloped surface.

[0111] See also Figure 3 , Figure 3It is a structural diagram of the non-display area of ​​the display panel 1 of an exemplary technology. The thickness of the isolation layer 70 is thicker than that of other film layers, at 1.5-2 microns. Therefore, the slope of the side of the second organic buffer sub-section 22 is steeper. The cut-off area position of the gray tone mask plate of the inorganic encapsulation layer (corresponding to the boundary line between the main body 301 and the thickness thinning portion 302) generally stops before reaching the first organic buffer sub-section 21. Although the thickness thinning portion 302 will extend toward the organic buffer unit 20, its thickness will become thinner and thinner, and it will only conformally cover the slope formed by the first organic buffer sub-section 21 and the second organic buffer sub-section 22. It cannot improve the slope of the slope of the organic buffer unit 20, and the film forming quality of the thickness thinning portion 302 is also poor. Therefore, the subsequent first insulating layer 40 will still climb here, and the stress here is relatively large.

[0112] like Figure 4 As shown, the inventors of this application conducted experimental research on different cut-off positions of the first insulating layer 40 and found that setting the edge extension 41 of the first insulating layer 40 in the thickness direction so as not to overlap with the first surface 201 can significantly reduce the risk of film separation. Specifically, in the experimental test, the film thickness of the pixel definition layer 135 was 0.8 microns, the film thickness of the isolation layer 70 was 1.5 microns, and the cut-off position of the inorganic encapsulation layer mask remained unchanged. Figure 3 Taking the cut-off position Ref of the first insulating layer 40 as a reference, only the cut-off position of the first insulating layer 40 is changed, which are respectively at positions 1, 2, 3, 4, and 5, wherein position 2 is the edge extension portion 41 of the first insulating layer 40 extending exactly to the top of the first slope (i.e., not overlapping with the first surface 201), position 4 is the edge extension portion 41 extending exactly to the bottom of the first slope (i.e., not overlapping with the first slope), position 3 is the edge extension portion 41 extending to the middle part between the top and bottom ends of the first slope, and position 5 is the junction of the main body 301 and the thickness reduction portion 302 of the thin film encapsulation layer 30.

[0113] The results show that when the cutoff position of the first insulating layer 40 is at Ref, the probability of film separation is 19.9%; when the cutoff position of the first insulating layer 40 is at 1, the probability of film separation is 20.8%; when the cutoff position of the first insulating layer 40 is at 2, the probability of film separation is 8.8%; when the cutoff position of the first insulating layer 40 is at 3, the probability of film separation is 2.1%; when the cutoff position of the first insulating layer 40 is at 4, the probability of film separation is 0%; when the cutoff position of the first insulating layer 40 is at 5, the probability of film separation is 0%.

[0114] As can be seen from the above, the more area the first insulating layer 40 extends on the first surface 201, the greater the risk of film separation. This may be due to the poor film-forming quality of the thin-film encapsulation layer 30, which results in low interfacial adhesion. The more overlap the first insulating layer 40 has with the first surface 201 and the first slope, the more slope there is, the steeper the slope is, the more concentrated the stress is, and the greater the risk of film separation. Therefore, in the embodiments of the present application, the edge extension 41 may overlap or not overlap with the first slope in the thickness direction of the display panel 1, which can effectively reduce the phenomenon of film separation.

[0115] See also Figure 3 The first organic buffer sub-portion 21 includes a first sub-slope surface close to the display area 101 , the second organic buffer sub-portion 22 includes a second sub-slope surface close to the display area 101 , and the first slope surface includes a first sub-slope surface and a second sub-slope surface.

[0116] In some embodiments, the height of the portion of the edge extension 41 that overlaps the first slope in the thickness direction is less than or equal to 3 microns, and the height of the portion of the edge extension 41 that overlaps each sub-slope (the first sub-slope and the second sub-slope) in the thickness direction is less than or equal to 1.5 microns. By designing the slope height difference of the edge extension 41 within the above range, the height difference of the first insulating layer 40 in the slope area can be effectively reduced, reducing the risk of film delamination.

[0117] See also Figure 1 The inorganic encapsulation layer includes a first inorganic encapsulation layer 31 disposed on the display substrate 10 and a second inorganic encapsulation layer 33 disposed on the first inorganic encapsulation layer 31. A first organic encapsulation layer 32 is disposed between the first inorganic encapsulation layer 31 and the second inorganic encapsulation layer 33.

[0118] The thickness of the main portion of the first inorganic encapsulation layer 31 is greater than the thickness of the main portion of the second inorganic encapsulation layer 33 to effectively encapsulate the interior of the organic light-emitting device. The main portion of the first inorganic encapsulation layer 31 can have a thickness of 0.8-1.5 microns, and the main portion of the second inorganic encapsulation layer 33 can have a thickness of 0.5-1 micron.

[0119] The first inorganic encapsulation layer 31 includes a first main body portion 311 and a first thickness-reduced portion 312, and the second inorganic encapsulation layer 33 includes a second main body portion 331 and a second thickness-reduced portion 332. The first main body portion 311 and the second main body portion 331 both cover the display unit 13, and the first main body portion 311 contacts the first inorganic layer 11 through the groove 105, forming a closed-loop protection of the inorganic encapsulation.

[0120] See also Figure 1The non-display area further includes a retaining wall area 102, which is disposed between the display area 101 and the second functional area 103. Since the first organic encapsulation layer 32 is typically formed on the first inorganic encapsulation layer 31 using inkjet printing technology, the retaining wall area 102 is provided to prevent the organic ink of the first organic encapsulation layer 32 from overflowing.

[0121] The retaining wall area 102 is provided with a first retaining wall 50 and a second retaining wall 60. The surface of the second retaining wall 60 facing away from the display substrate 10 is higher than the surface of the first retaining wall 50 facing away from the display substrate 10. The first retaining wall 50 and the second retaining wall 60 can be arranged in a circle around the display area 101 to effectively prevent ink from overflowing.

[0122] The first retaining wall 50 and the second retaining wall 60 can be formed using the organic layer of the display area 101 to save mask manufacturing processes. The first retaining wall 50 and the second retaining wall 60 can be formed using at least one of the first planarization layer 131, the second planarization layer 133, the pixel definition layer 135, and the isolation layer 70. For example, the first retaining wall 50 can be formed using the pixel definition layer 135, and the second retaining wall 60 can be formed using the second planarization layer 133 and the pixel definition layer 135.

[0123] In the embodiment of the present application, the first main body 311 and the second main body 331 can both extend beyond the second retaining wall 60 to effectively encapsulate the first organic encapsulation layer 32. It is understood that in this case, the second functional area 103 is located outside the retaining wall area 102, that is, between the retaining wall area 102 and the first functional area 104.

[0124] See also Figure 1 A first boundary L1 is defined between the first main body portion 311 and the first reduced thickness portion 312 , and a second boundary L2 is defined between the second main body portion 331 and the second reduced thickness portion 332 . Figure 4 In the illustrated embodiment, the first boundary L1 coincides with the second boundary L2, and their orthographic projections on the second flat sub-portion 1331 are located on the second flat sub-portion 1331. In other embodiments, the first boundary L1 and the second boundary L2 may not coincide.

[0125] See also Figure 5 , Figure 5 yes Figure 3 TEM (scanning electron microscope) cross-sectional view at A-A' in Figure 3In the exemplary technology shown, the film thickness of the first main body 311 is 1.27 microns, the film thickness of the second main body 331 is 0.65 microns, the material of the first inorganic packaging layer 31 is SiON, and the material of the second inorganic packaging layer 33 is nitride silicon SiNx. The mask plate cut-off area position of the first inorganic packaging layer 31 and the second inorganic packaging layer 33 is the same, that is, the first boundary L1 of the first main body 311 and the first thickness reduction portion 312 coincides with the second boundary L2 of the second main body 331 and the second thickness reduction portion 332, and is 100 microns away from the bottom end of the first slope.

[0126] The inventors of this application conducted film composition analysis and elemental analysis on the structure of the inorganic encapsulation layer thickness reduction portion 302 at AA'. Through EDX (energy dispersive X-ray spectrometer) testing, they found that there is a small area where Si and N overlap and there is no O. Since the material of the second inorganic encapsulation layer 33 is SiNx, this area corresponds to the second thickness reduction portion 332. Figure 5 It can be seen that at A-A', the thickness of the first thickness reduction portion 312 is much greater than the thickness of the second thickness reduction portion 332. Since the film thickness of the first thickness reduction portion 312 and the second thickness reduction portion 332 gradually decays from the original film thickness (the film thickness of the main body) to zero, the thickness of the first thickness reduction portion 312 here is still relatively thick, while the thickness of the second thickness reduction portion 332 approaches zero, which means that the extension of the second thickness reduction portion 332 of the second inorganic encapsulation layer 33 is about to end, while the first thickness reduction portion 312 of the first inorganic encapsulation layer 31 can still extend forward for a distance. Therefore, the first thickness reduction portion 312 of the first inorganic encapsulation layer 31 can extend farther than the thickness reduction portion of the second inorganic encapsulation layer 33, that is, the thickness reduction portion formed by the inorganic encapsulation layer is mainly formed by the first thickness reduction portion 312.

[0127] The inventors analyzed the possible reasons for the above results as follows: first, the preset film thickness of the first inorganic encapsulation layer 31 (the film thickness of the first main body 311) is greater than the preset film thickness of the second inorganic encapsulation layer 33 (the film thickness of the second main body 331); second, although the cutoff area of ​​the mask plate is far away from the first slope, the reaction gas in the first inorganic encapsulation layer 31 contains N2O, which is relatively easy to dissociate, and it is easier to form a film at a position far away from the cutoff area of ​​the mask plate.

[0128] In view of the above analysis, the inventors of the present application retracted the first boundary L1 of the first inorganic encapsulation layer 31 relative to the second boundary L2 of the second inorganic encapsulation layer 33 to reduce the possibility of the first thickness-reduced portion 312 of the first inorganic encapsulation layer 31 extending to the first slope surface, so that the thickness-reduced portion of the inorganic encapsulation layer does not overlap with the organic buffer unit 20 in the thickness direction.

[0129] Specifically, see Figure 6 , Figure 6 This is a top view of the display panel 1 provided in another embodiment of the present application, showing the boundaries of some film layers. Figure 6 In the illustrated embodiment, a first boundary L1 between the first main portion 311 and the first reduced-thickness portion 312 is closer to the display area 101 than a second boundary L2 between the second main portion 331 and the second reduced-thickness portion 332. Optionally, the orthographic projections of the first boundary L1 and the second boundary L2 on the second flat sub-portion 1331 are located on the second flat sub-portion 1331, that is, the cutoff regions of the mask plates of the first inorganic encapsulation layer 31 and the mask plates of the second inorganic encapsulation layer 33 both extend onto the second flat sub-portion 1331.

[0130] Optionally, a first distance S1 between the first boundary L1 and the second boundary L2 is greater than or equal to 50 microns, and the direction of the first distance S1 is along the display area 101 toward the second functional area 103. The inventors have found that the maximum extension length of the thickness reduction portion of the current inorganic encapsulation layer is approximately 150 microns, while the distance between the mask cut-off region and the second slope in the exemplary technology is typically greater than 100 microns. Therefore, setting the distance between the first boundary L1 and the second boundary L2 within the above range can prevent the formed first thickness reduction portion 312 from extending onto the first slope when forming the first inorganic encapsulation layer 31 by evaporation using a halftone mask, thereby avoiding the problem of film separation caused by poor film quality of the inorganic layer on the first slope.

[0131] Optionally, the first body portion 311 and the second body portion 331 both cover the first barrier wall 50 and the second barrier wall 60. By extending the first body portion 311 and the second body portion 331 beyond the second barrier wall 60, all organic layers including the first barrier wall 50 and the second barrier wall 60 can be effectively encapsulated.

[0132] Optionally, the first main portion 311 covers the first retaining wall 50 and the second retaining wall 60, and the first width W1 of the portion of the first inorganic layer 11 exposed by the groove 105 is greater than or equal to 45 microns, where the first width is directed from the display area 101 to the second functional area 103. By setting the exposed width of the first inorganic layer 11 (the width of the groove 105) within the above range, the encapsulation effect of the thin-film encapsulation layer 30 on the display substrate 10 can be ensured while avoiding film separation.

[0133] In summary, the display panel 1 provided in the embodiment of the present application includes a display area 101, a second functional area 103 and a first functional area 104 located outside the display area 101, and the second functional area 103 is located between the display area 101 and the first functional area 104. The display panel 1 includes a display substrate 10, an organic buffer unit 20, an inorganic package and a first insulating layer 40. The display substrate 10 includes a first inorganic layer 11 and a display unit 13 located on the first inorganic layer 11, and the display unit 13 is located in the display area 101. The display substrate 10 includes a groove 105 located in the second functional area 103, and the groove 105 exposes a portion of the surface of the first inorganic layer 11. The organic buffer unit 20 is arranged on the first inorganic layer 11 and is located in the first functional area 104. The organic buffer unit 20 includes a first surface 201 on a side facing away from the display substrate 10. The inorganic encapsulation layer is arranged on the display unit 13, including a main body 301 and a thickness-reduced portion 302 connected to the main body 301. The main body covers the display unit 13, and the main body 301 is in contact with the first inorganic layer 11 through the groove 105. The thickness-reduced portion 302 extends from the main body 301 in a direction away from the display area 101. The first insulating layer 40 is arranged on the inorganic encapsulation layer 310, including an edge extension portion 41, and the edge extension portion 41 is located in the first functional area 104. At most one of the thickness-reduced portion 302 and the edge extension portion 41 overlaps with the first surface 201 in the thickness direction of the display panel 1. Through the above design, the risk of interface delamination between the inorganic encapsulation layer 310 and the organic buffer unit 20 can be reduced, and the reliability of the overall anti-bending ability of the thin film encapsulation layer 30 can be improved.

[0134] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0135] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other without conflict.

[0136] The above are merely preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a first functional area located on at least one side of the display area; wherein the display panel comprises: display substrate; an organic buffer unit, disposed on one side of the display substrate and located in the first functional area; an inorganic encapsulation layer, located on the same side of the display substrate as the organic buffer unit, the inorganic encapsulation layer comprising a reduced thickness portion extending toward the first functional area; and a first insulating layer, disposed on a side of the inorganic encapsulation layer away from the display substrate, the first insulating layer comprising an edge extension portion extending toward the first functional area; The organic buffer unit includes a first surface away from the display substrate, and a boundary between at least one of the reduced thickness portion and the first insulating layer overlaps with the first surface in a thickness direction of the display panel.

2. The display panel according to claim 1, wherein: The display panel includes a second functional area located between the display area and the first functional area, the display substrate includes a first inorganic layer and a groove located in the second functional area, the groove exposing a portion of the surface of the first inorganic layer; The inorganic encapsulation layer includes a main body portion connected to the reduced thickness portion, the main body portion covers a portion of the display substrate located in the display area, and the main body portion contacts the first inorganic layer through the groove.

3. The display panel according to claim 2, wherein: The organic buffer unit further includes a first slope surface close to the second functional area; The edge extension portion does not overlap with the first surface in the thickness direction, and the edge extension portion overlaps or does not overlap with the first slope surface in the thickness direction.

4. The display panel according to claim 3, wherein: The organic buffer unit includes a first organic buffer sub-portion and a second organic buffer sub-portion stacked together, wherein the first organic buffer sub-portion includes a first sub-slope surface close to the display area, the second organic buffer sub-portion includes a second sub-slope surface close to the display area, and the first slope surface includes the first sub-slope surface and the second sub-slope surface; The height of the portion of the edge extension portion overlapping with the first slope surface in the thickness direction is less than or equal to 3 microns, and the height of the portion of the edge extension portion overlapping with either the first sub-slope surface or the second sub-slope surface in the thickness direction is less than or equal to 1.5 microns.

5. The display panel according to claim 3, wherein: The inorganic encapsulation layer includes a first inorganic encapsulation layer provided on the display substrate, and a second inorganic encapsulation layer provided on the first inorganic encapsulation layer, wherein the first inorganic encapsulation layer includes a first main body portion and a first thickness-reduced portion, and the second inorganic encapsulation layer includes a second main body portion and a second thickness-reduced portion, and the first main body portion contacts the first inorganic layer through the groove; There is a first boundary between the first main body portion and the first reduced thickness portion, there is a second boundary between the second main body portion and the second reduced thickness portion, and the first boundary and the second boundary coincide with each other.

6. The display panel according to claim 5, wherein: The display substrate comprises: pixel driving circuit; A first planarization layer is provided on the pixel driving circuit; a connecting electrode, disposed on the first planarization layer and electrically connected to the pixel driving circuit; a second planarization layer, disposed on the connecting electrode; a plurality of first electrodes, disposed on the second planarization layer and electrically connected to the connection electrode; a pixel definition layer disposed on the second planarization layer, the pixel definition layer comprising a plurality of openings and a first organic buffer sub-portion, the plurality of openings corresponding one-to-one to the plurality of first electrodes, the openings exposing a portion of the surface of the corresponding first electrode, and the first organic buffer sub-portion being located within the second functional area; an isolation layer disposed on the pixel definition layer, the isolation layer comprising a plurality of isolation columns and a second organic buffer sub-portion, the plurality of isolation columns being located in the display area and disposed near the opening, and the second organic buffer sub-portion being located in the second functional area; The organic buffer unit includes the first organic buffer sub-section and the second organic buffer sub-section.

7. The display panel according to claim 6, wherein: The first planarization layer includes a first planar sub-portion located in the first functional area, the second planarization layer includes a second planar sub-portion located in the first functional area, the second planar sub-portion covers the first planar sub-portion, and the orthographic projection of the first boundary on the second planar sub-portion is located on the second planar sub-portion.

8. The display panel according to claim 2, wherein: The reduced thickness portion does not overlap the organic buffer unit in the thickness direction.

9. The display panel according to claim 8, wherein: The inorganic encapsulation layer includes a first inorganic encapsulation layer provided on the display substrate, and a second inorganic encapsulation layer provided on the first inorganic encapsulation layer, wherein the first inorganic encapsulation layer includes a first main body portion and a first thickness-reduced portion, and the second inorganic encapsulation layer includes a second main body portion and a second thickness-reduced portion, wherein the thickness of the first main body portion is greater than that of the second main body portion, and the first main body portion is in contact with the first inorganic layer through the groove; A first boundary is defined between the first main body portion and the first reduced thickness portion, and a second boundary is defined between the second main body portion and the second reduced thickness portion. The first boundary is closer to the display area than the second boundary.

10. The display panel according to claim 9, wherein: A distance between the first boundary and the second boundary in a direction from the display area to the second functional area is greater than or equal to 50 micrometers.

11. The display panel according to claim 9, wherein A first retaining wall and a second retaining wall are provided between the display area and the second functional area, the second retaining wall is farther away from the display area than the first retaining wall, the first main body covers the first retaining wall and the second retaining wall, and the first width of the portion of the first inorganic layer exposed by the groove is greater than or equal to 45 microns, wherein the direction of the first width is the direction from the display area to the second functional area.

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