Receiver vector tracking feedback implementation method, system, medium and equipment

Abstract

The invention discloses a feedback implementation method and system for receiver vector tracking, a medium and equipment. The method comprises the following steps: firstly, carrying out EKF processing and extracting data participating in calculation of NCO adjustment amount at an ARM end; data coding is carried out at the ARM end; data communication between the ARM and the FPGA is carried out; satellite position and speed calculation and code / carrier NCO adjustment amount calculation at any moment are completed at the FPGA end; and new ranging codes and carriers are generated at the FPGA end by using the NCO adjustment amount to participate in tracking operation. If the newly generated ranging code and carrier cannot enable satellite tracking to be successful, transmitting a tracking operation result to the ARM end, performing a new round of EKF, completing new round of data updating iteration, and repeating the steps to complete feedback closed loop; and if the newly generated ranging code and carrier can enable the satellite to track successfully, iteration can be stopped, and a result is output. According to the method, parallel high-precision calculation of vector tracking and feedback adjustment of a hardware design vector tracking loop can be carried out, the execution efficiency is improved, and the processing speed is increased.

Description

Technical Field

[0001] The present invention belongs to the field of satellite navigation, and in particular relates to a feedback implementation method, system, medium and equipment for receiver vector tracking. Background Art

[0002] Although traditional navigation receivers have been widely used, they still cannot meet people's increasing navigation needs. The most significant disadvantage is that the receiver antenna needs to be able to continuously receive satellite signals. Once a satellite signal is temporarily blocked, the satellite signal will need to be recaptured before it can participate in positioning again. Considering the increasingly strong demand for navigation in urban application scenarios, frequent signal loss or attenuation is the main challenge facing today's navigation satellite systems. Buildings and trees on the streets can easily block the signals of navigation satellites. The receiver channel that tracks the blocked satellite signals cannot maintain continuous tracking of the satellite signals, resulting in signal loss. When the blocked satellite signal is restored after a period of time, the channel must recapture the signal before it can enter the tracking state again. Signal capture takes a lot of time and processor resources, which is not conducive to the receiver providing continuous and reliable navigation services.

[0003] In order to improve the navigation performance of the receiver in harsh environments, some researchers have studied the use of other navigation systems to assist satellite navigation systems, such as inertial sensors, visual sensors, mobile cellular networks, and WiFi, and some researchers have studied array receiving antenna technology. However, these methods require additional hardware to support them, and even the added hardware is much more complex and costly than the receiver itself. At the same time, it is also necessary to develop information fusion algorithms between systems, which greatly increases the complexity and cost of receiver hardware and software development. In recent years, software receiver technology has been booming. Its easy-to-configure characteristics have attracted many researchers to use software receivers to study new satellite signal tracking methods to improve tracking performance. Among them, vector tracking technology based on software receiver technology has received widespread attention from researchers at home and abroad. This technology uses software algorithms to make full use of the inherent related information that has not been paid attention to within the tracking loop, and combines each originally independent tracking loop with the navigation solution link, which can improve the receiver's ability to track satellite signals. In addition, this technology does not require the addition of hardware equipment or external auxiliary information, so it does not bring cost burdens. Compared with traditional tracking methods, vector tracking technology has outstanding advantages in weak signal tracking, user high dynamic tracking and instantaneous bridging of obscured satellite signals. Vector tracking technology has inherent advantages in overcoming the influence of the "urban canyon" effect. Traditional vector receivers will process channel information serially on the software side, which will occupy computing resources, prolong computing processing time, increase power consumption, lag or lose other channel information, and limit the number of channels. Therefore, in order to meet the positioning and navigation requirements, the problem that the receiver channel cannot maintain continuous tracking of satellite signals in complex and undesirable environments such as cities and forests, resulting in signal loss, is studied. The present invention proposes a method for implementing the feedback of the receiver vector tracking loop, so that the adjustment link of the vector receiver tracking loop can be processed in parallel on the hardware side, so that the speed of processing information will be accelerated, and the information will be more timely and accurate. At the same time, a satellite position interpolation module is added on the hardware side. Compared with the occupation and computing time of the system memory of the traditional ephemeris demodulation, the hardware-side satellite position interpolation method will save hardware resources and the computing time of satellite position, speed, clock difference and clock drift, thereby accelerating the calculation speed of the hardware-side vector tracking feedback loop adjustment amount. Summary of the invention

[0004] The purpose of the present invention is to provide a feedback implementation method, system, medium and device for receiver vector tracking, to realize parallel high-precision calculation of vector tracking, to solve the above-mentioned problems existing in traditional vector receivers, to reduce the operating burden of the processor and to improve the execution efficiency of the system.

[0005] The purpose of the present invention is achieved through the following technical solutions:

[0006] A method for implementing feedback of receiver vector tracking comprises the following steps:

[0007] Step 1: Perform EKF processing on the ARM side and extract the data involved in calculating the NCO adjustment amount;

[0008] Step 2: According to step 1, data encoding is performed on the ARM side;

[0009] Step 3: According to step 2, data communication between ARM and FPGA is performed;

[0010] Step 4: Complete the satellite position speed calculation and code / carrier NCO adjustment calculation at any time on the FPGA side;

[0011] Step 5: On the FPGA side, use the NCO adjustment value obtained in step 4 to generate a new ranging code and carrier to participate in the tracking operation;

[0012] Step 6: According to step 5, if the newly generated ranging code and carrier cannot successfully track the satellite, the tracking operation result is passed to the ARM side, a new round of EKF is performed, a new round of data update iteration is completed, and steps (1) to (5) are repeated to complete the feedback loop; if the newly generated ranging code and carrier can successfully track the satellite, the iteration can be stopped and the result can be output.

[0013] Furthermore, the step 1 comprises the following steps:

[0014] Step 1.1: Calculate the receiver's predicted position velocity, clock error, clock drift, measurement time and transmission time;

[0015] First, the position and velocity of the receiver are estimated. The navigation filter of the vector tracking loop adopts the extended Kalman filter. The state quantity of the filter is the components of the position and velocity errors of the user receiver in the three axes of x, y, and z and the clock error of the receiver. The observed quantity of the filter is the pseudorange of each tracking channel and the change of the pseudorange rate. The state prediction value is obtained by using the Kalman filter equation.

[0016] Step 1.2: Select five time points and the satellite position, velocity, clock error and clock drift at those time points;

[0017] The receiver enters the process of parsing the satellite ephemeris and using the satellite orbit data in the ephemeris to calculate the satellite's position, velocity, clock error and drift. Five time points within 10 minutes when the receiver stably tracks the satellite are selected to calculate the satellite's position, velocity, clock error and drift information, in preparation for the subsequent satellite velocity, clock error and drift interpolation operation.

[0018] Furthermore, step 1.2 is only performed when the receiver operates in scalar positioning mode or in the initial state. This step is not performed in vector tracking mode and is replaced by satellite parameter interpolation method.

[0019] Furthermore, the step 2 must first ensure the accuracy of the data. The receiver satellite position, velocity, clock error and clock drift must all be double-precision floating point numbers. The more bits involved in the calculation, the more accurate the result. The double-precision floating point numbers are converted and encoded according to the IEEE754 floating point format. The data format of the satellite interpolation and NCO adjustment operations on the FPGA side is also IEEE754 encoding. The step 2 achieves the purpose of high-precision parallel computing.

[0020] Furthermore, the step 3 first uses the BRAM on the FPGA chip on the AXI bus to implement temporary storage of read and write data for data interaction; when the PS side needs to write data information to the PL side, the AXI GPIO transmission control information is called, which is used to distinguish the tracking channel and the data purpose, and the data information is written to the specified address of the BRAM using the write function. If the FPGA side detects that the information transmitted by the AXI GPIO has changed, it will read the data information in the BRAM to complete the write operation that the PS side needs to write to the PL side; when the PL side needs to write data information to the PS side, the FPGA sends an interrupt request to the ARM through the AXI bus and writes the data to the BRAM; when the ARM detects the corresponding interrupt signal, it starts reading the data pre-written in the BRAM by the FPGA, thereby completing the data transfer between the FPGA and the ARM.

[0021] Furthermore, step 4 includes the following steps:

[0022] Step 4.1 completes the calculation of satellite position velocity clock error and clock drift at any time;

[0023] Get the calculation formula of n-order Lagrange polynomial, calculate the satellite parameters of the starting point, end point and intermediate point, the formula is:

[0024]

[0025] In the formula, there are n+1 known variables x0, x1, ..., x in the interval [a, b]. n , the corresponding function values ​​y0,y1,...,y n , x in the interval i The corresponding estimated value y can be obtained i , x i With x k For different numbers of distinct nodes, y k For x k The corresponding estimated value is

[0026] Ln (x) is the Lagrangian estimate corresponding to x, l k (x) is the interpolation basis function;

[0027] When solving the position, the calculation formulas in different directions are:

[0028]

[0029] Where t is the observation time of the interpolation node; l k (t) is the interpolation basis function; (X(t), Y(t), Z(t)) is the satellite position coordinate at the interpolation time t, (X k (t),Y k (t),Z k (t)) is the satellite position coordinate of the corresponding interpolation node, and the velocity clock error and clock drift parameters are the same;

[0030] Step 4.2 completes the calculation of the carrier NCO adjustment amount;

[0031] The predicted value of the carrier frequency change obtained dynamically by the receiver is:

[0032]

[0033] In the formula, α indicates the predicted value obtained using the corrected estimated value; f carr is the standard carrier frequency, It indicates the rate of change of the relative distance between the receiver and the satellite obtained according to the estimated navigation state. The calculation formula is:

[0034]

[0035] In the formula, is the velocity of satellite i at time k+1 calculated based on the satellite ephemeris, Vα k+1 Indicates the receiver speed, is the line-of-sight unit vector between satellite i and the receiver; tα d,k+1 Indicates the receiver clock drift in m / s. represents the satellite clock drift. Since the satellite atomic clock frequency is quite stable, this term is 0 here. Δt is the discriminator update period. It represents the carrier signal Doppler frequency shift change rate. For general low-dynamic ordinary users, if the NCO update frequency is very fast, the impact of this item is very small, and the frequency change caused by this item is also ignored here. Therefore, the replica carrier frequency input to the carrier NCO should be:

[0036]

[0037] Where f IFAn intermediate frequency determined for the RF processing module;

[0038] Step 4.3 completes the calculation of the code NCO adjustment amount;

[0039] The frequency of the C / A code signal copied in the code NCO should be:

[0040]

[0041] In the formula, f code is the ranging code rate; the change of the code phase of the replica ranging code corresponds to the change of the pseudorange, and the correction amount is obtained according to the geometric relationship:

[0042]

[0043] In the formula, It represents the distance the satellite moves in the time Δt, which is obtained by subtracting the satellite position at two moments, or by calculating the satellite speed. Then the code phase input to the code generator is:

[0044]

[0045] The code phase is input to the code generator to adjust the phase of the local replica code, and the control amount of carrier tracking and pseudo code tracking is obtained, and the vector tracking loop is closed.

[0046] A feedback system for receiver vector tracking is implemented by a feedback implementation method for receiver vector tracking. The system includes a high-precision antenna for receiving satellite signals, a radio frequency front end of the receiver and a baseband ZYNQ mainboard of the receiver; the ZYNQ mainboard includes a processing system, namely a PS module, a programmable logic, namely a PL module and an AXI4 bus; the PS module includes an ARM CotrexA9 processor to complete baseband processing of satellite capture search detection, navigation message decoding, satellite ephemeris extraction, interpolation parameter calculation, receiver PVT information solution, extended Kalman filtering and data IEEE754 encoding; the PL module integrates a carrier NCO module, a code NCO module, a code generator module, an integral accumulation module, a carrier NCO feedback amount calculation module, a code NCO feedback amount calculation module, a satellite position interpolation calculation module, a PL-PS parameter transfer module, a segmented matching filter module and an FFT calculation module;

[0047] The PS writes the control data and calculation data required for adjusting and tracking the NCO into the shared memory BRAM through the AXI bus, and the PL parses the control data and calculation data from the shared memory BRAM to participate in the NCO adjustment operation; the PL stores the loop-related values ​​and other data calculated in the tracking process in the memory BRAM and sends an interrupt request to the PS, and the PS reads the tracking data in the shared memory BRAM through the AXI bus, performs phase and frequency discrimination, and updates the calculation results of the EKF;

[0048] The code NCO feedback calculation module and the satellite position interpolation calculation module are directly involved in the multi-channel parallel NCO adjustment calculation. It is necessary to design targeted operation unit modules, such as addition, subtraction, multiplication, division, decoding, sine and cosine, rounding, square root and other operations, and ensure the operation accuracy and speed. In order to save PL resources, the time-sharing logic of the calculation module is used to complete the calculation of the entire process.

[0049] A computer-readable storage medium stores a computer program / instruction, which, when executed by a processor, implements the steps of a feedback implementation method for receiver vector tracking.

[0050] A computer program product includes a computer program / instruction, which implements the steps of a feedback implementation method for receiver vector tracking when the computer program / instruction is executed by a processor.

[0051] An electronic device, comprising:

[0052] Memory, used to store computer programs;

[0053] A processor is used to execute the computer program to implement the instruction tracking method described in the feedback implementation method for receiver vector tracking.

[0054] The beneficial effects of the present invention are:

[0055] 1. The present invention makes full use of the parallel high-speed computing advantages of the FPGA inside the ZYNQ mainboard and the software processing capabilities of ARM, deploys some NCO adjustment and satellite parameter interpolation functions that can be operated in parallel in the PL module, and deploys the other parts in the PS module, which greatly simplifies the design process.

[0056] 2. The present invention can effectively perform high-precision parallel calculation of vector tracking, change the adjustment mode of tracking NCO from serial operation to parallel operation, and adopt a method of parallel satellite parameter interpolation of multiple tracking channels to reduce the amount of system calculations, improve the system's processing speed for multiple tracking channels, and at the same time reduce the burden on the processor, reduce chip power consumption, and improve overall processing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1It is the overall system principle structure diagram of the present invention;

[0058] Figure 2 It is the overall system architecture diagram of the present invention;

[0059] Figure 3 Workflow diagram for vector tracking feedback;

[0060] Figure 4 Encode diagram for data format;

[0061] Figure 5 It is a workflow diagram for data conversion;

[0062] Figure 6 This is the AXI4-Lite BRAM controller block diagram;

[0063] Figure 7 The overall block diagram of feedback communication based on BRAM;

[0064] Figure 8 Carrier / ranging code NCO adjustment flow chart;

[0065] Figure 9(a) is the RTL schematic diagram of satellite parameter interpolation and NCO adjustment control;

[0066] FIG9( b ) is an expanded RTL schematic diagram of FIG9( a );

[0067] Fig.10 This is the satellite parameter interpolation result map;

[0068] Fig.11 This is the result diagram of carrier / ranging code NCO adjustment;

[0069] Fig.12 Generate a new carrier result graph for the adjusted amount;

[0070] Fig.13 Generate a new ranging code result map for the adjustment amount. DETAILED DESCRIPTION

[0071] The present invention is further described below in conjunction with the accompanying drawings.

[0072] A feedback implementation method for receiver vector tracking, the overall system architecture diagram of the present invention is as follows Figure 2As shown, the system includes: a high-precision antenna for receiving satellite signals, a radio frequency front end of the receiver, and a baseband ZYNQ motherboard of the receiver. The architecture uses the ZYNQ series chips of Xilinx with a PS module (ARM) + PL module (FPGA) functional architecture as the carrier, and the ZYNQ-XC7020 motherboard used has a general GPIO interface to support a variety of expandable devices. The GPIO interface is connected to the radio frequency front end circuit, and the radio frequency chip is Max2771 produced by Maxium, which supports Beidou, GPS, Galileo, GLONASS, SBAS and other systems, has strong performance, and is suitable for the design of the present invention.

[0073] The ZYNQ motherboard includes: a processing system, namely a PS module, a programmable logic, namely a PL module, and an AXI4 bus; the shared memory BRAM is used for data sharing between the PS module and the PL module, and the PS module and the PL module can simultaneously access the data stored in the shared memory BRAM through the AXI4 bus; the PL module integrates: carrier NCO module, code NCO module, code generator module, integral accumulation module, carrier NCO feedback calculation module, code NCO feedback calculation module, satellite position interpolation calculation module, PL-PS parameter transfer module, segmented matching filter module and FFT calculation module, etc. The PS module contains an ARMCotrexA9 processor to complete baseband processing tasks such as satellite capture search detection, navigation message decoding, satellite ephemeris extraction, interpolation parameter calculation, receiver PVT information solution, extended Kalman filter, and data IEEE754 encoding.

[0074] The principle structure diagram of the whole system is as follows: Figure 1 As shown in the figure: the vector tracking loop is composed of two parts, PS and PL, to complete the closed loop. Multiple tracking channels run in parallel on the PL side. PS is responsible for updating the calculation data and bridging the tracking information of each channel. Even in the event of an undesirable environment, such as occlusion, low signal-to-noise ratio, multipath effect, etc., the satellite can be locked, avoiding the waste of system operating time and computing resources caused by the recapture process.

[0075] The workflow diagram of vector tracking feedback is as follows Figure 3 As shown:

[0076] (1) Perform EKF processing on the ARM side and extract data involved in calculating the NCO adjustment amount.

[0077] Step 1.1 Calculate the receiver's predicted position velocity, clock error, clock drift, measurement time and transmission time:

[0078] First, the position and velocity of the receiver are estimated. The navigation filter of the vector tracking loop uses an extended Kalman filter. The state of the filter is the position, velocity and clock state of the receiver. The state vector of the navigation filter

[0079]

[0080] The vector [δx k ,δy k ,δz k ,δt b,k ] T Represents the position error of the user receiver in the three axes of x, y, and z and the receiver clock error, vector It represents the components of the user receiver velocity error in the three axes of x, y, and z and the receiver clock drift error. According to kinematics, the system state equation is established and discretized to obtain the discrete state equation:

[0081] δX k+1 =F k ·δX k+1 +W k

[0082] where δX k+1 , δX k are the state vectors at time k+1 and time k respectively, F k is the state transfer matrix at time k, which is defined as: where T is the navigation filter update period.

[0083]

[0084] W k is the system discrete noise matrix at time k, Q k is the discrete noise variance matrix at time k, which satisfies:

[0085]

[0086] Represent the power spectral density of the x, y, and z axis acceleration clock error and clock drift noise respectively.

[0087] The observation equation of the system is: k+1 =H k+1 δX k+1 +β k+1 The observed quantity is selected as the pseudorange and pseudorange rate change information converted from the phase and frequency discrimination results of each tracking channel:

[0088]

[0089] Among them, H k+1 is the measurement matrix, which is defined as:

[0090]

[0091] The matrix items are the partial derivatives of the least squares method in the x, y, and z directions;

[0092] The difference between the filter's predicted receiver position and the actual receiver position is δP = [δx, δy, δz] T According to the geometric relationship, δP will produce a projection in the line of sight (LOS) direction between the receiver and the satellite, which will cause pseudorange error. The clock error of the receiver will also cause pseudorange error. The pseudorange error caused by the two is expressed as:

[0093]

[0094] where ε i is the pseudorange error measurement noise, represents the unit line of sight vector between the receiver's predicted position and satellite i, which is defined as:

[0095]

[0096] Where X i (t) represents the position of satellite i, The receiver predicts the position of the satellite, and the relationship between the phase detector result and the pseudorange change is:

[0097]

[0098] in represents the satellite’s ranging code length, c is the speed of light, Indicates the satellite ranging code rate.

[0099] The velocity and clock drift errors of the receiver will affect the pseudorange rate change, which can be expressed as:

[0100]

[0101] in is the speed error state quantity, θ i The relationship between the pseudorange rate error measurement noise, the discriminator result and the pseudorange change is:

[0102]

[0103] in represents the satellite’s ranging code length, c is the speed of light, Represents the satellite ranging code rate. k+1 is the measurement noise vector, which is expressed as:

[0104]

[0105] And meet

[0106]

[0107] R ρ , is the measurement noise variance of the pseudorange and pseudorange rate error of each satellite, the discrete state equation of the integrated navigation filter, the observation equation, satisfies the conditions of Kalman filtering, and the filtering process is:

[0108]

[0109] P k+1 =(IK k+1 H k+1 ) k+1|k

[0110] The state error estimate at time k+1 can be obtained The receiver position velocity prediction is obtained.

[0111] Step 1.2 Select five time points and the satellite positions, velocities, clock errors and drifts at those time points;

[0112] The receiver enters the process of parsing the satellite ephemeris and using the satellite orbit data in the ephemeris to calculate the satellite's position, velocity, clock error and drift. Five time points within 10 minutes when the receiver stably tracks the satellite are selected to calculate the satellite's position, velocity, clock error and drift information, in preparation for the subsequent satellite velocity, clock error and drift interpolation operation. This process is only performed when the receiver is running in scalar positioning mode or in the initial state. This step is not performed in vector tracking mode and is replaced by satellite parameter interpolation.

[0113] (2) Data encoding is performed on the PS (ARM) side.

[0114] The data calculated by PL must be encoded in IEEE754 format in advance. To achieve the purpose of high-precision parallel computing, the accuracy of the data must be guaranteed first. The receiver satellite position, velocity, clock error and clock drift must all be double-precision floating point numbers (64 bits). The more bits involved in the calculation, the more accurate the result. The double-precision floating point numbers are converted and encoded according to the IEEE754 floating point format. The data format of the satellite interpolation and NCO adjustment calculations on the FPGA (PL) side is also IEEE754 encoding. The data format encoding diagram is as follows: Figure 4 As shown in the figure, sign represents the sign bit, 1 bit represents, 0 represents a positive number, and 1 represents a negative number; biased exponent: the biased exponent bit, that is, the green square in the figure, 11 bits represent, that is, it represents E, that is, the exponent part; fraction: the mantissa bit, that is, the red square in the figure, 52 bits represent, that is, it represents M, that is, the mantissa part; the data conversion workflow is as follows Figure 5As shown, after this process, the data on the ARM side is converted into a data format that can be processed by the PL to calculate the NCO adjustment.

[0115] (3) Perform data communication between PS (ARM) and PL (FPGA).

[0116] The PL and PS of ZYNQ need to transfer information to each other, but the PL and PS cannot communicate directly. ZYNQ data transmission is carried out on the AXI bus, and the BRAM on the FPGA chip is used to implement temporary storage of read and write data for data interaction. When the PS side needs to write data information to the PL side, the AXI GPIO transmission control information is called. This information is used to distinguish the tracking channel and data usage, and the data information is written to the specified address of the BRAM using the write function. If the FPGA side detects that the information transmitted by the AXIGPIO has changed, it will read the data information in the BRAM to complete the write operation that the PS side needs to write to the PL side. When the PL side needs to write data information to the PS side, the FPGA sends an interrupt request to the ARM through the AXI bus and writes the data to the BRAM. When the ARM detects the corresponding interrupt signal, it starts to read the data pre-written in the BRAM by the FPG, thereby completing the data transmission between the FPGA and the ARM.

[0117] BRAM is a memory array in PL. The communication method based on shared memory is realized by PS and PL through reading and writing dual-port BRAM. In the PL part, the BRAM is read and written by instantiating the output of the dual-port BRAM's address, clock, data, enable, and read-write control signals; in PS, the processor core needs to use the AXI BRAM controller in the Vivado design software to read and write the dual-port BRAM. Due to the low read and write data throughput, the AXI BRAM can be configured as the interface mode of the AXI4-Lite type bus in the AXI bus to save design resources and reduce design difficulty. The block diagram of the AXI4-Lite BRAM controller is shown below. Figure 6 Shown:

[0118] The AXI4-Lite interface mode is a low-performance AXI4 interface. During the interactive communication process, the AR core's M_AXI_GP0 is connected to the AXI interconnect module as the master port, and the AXI interconnect module is connected to the AXI BRAM Controller module to ensure that the PS side reads and writes the dual-port BRAM IP core. The overall block diagram of feedback communication based on BRAM is shown in the figure. Figure 7 shown.

[0119] AXI GPIO performs address decoding and read / write control in the entire communication scheme. The bus is connected to the bus through 12-bit GPIO for bus configuration. The 12-bit GPIO ports are 1-bit chip select signal (chip_select), 1-bit read signal (read), 1-bit write signal (wirte) and 9-bit address signal (address) from high to low. Whenever data needs to be transmitted, the bus chip select signal, read / write control and read / write address must be set first, and then the BRAM block can be read and written through the AXI BRAM Controller module to complete the data reading and writing.

[0120] (4) The FPGA side completes the calculation of satellite position velocity and code / carrier NCO adjustment at any time.

[0121] Step 4.1 completes the calculation of satellite position velocity clock error and clock drift at any time;

[0122] The receiver positioning requires at least 4 satellites. If the Kepler orbit parameters and orbit perturbation parameters of the received navigation message are all calculated serially on the ARM side according to a fixed formula to calculate the instantaneous coordinates of the satellite, the calculation amount is large, the process is complex, the calculation time is long, and the chip power consumption is high. Therefore, it is necessary to reduce the burden on the processor chip, avoid complex calculations, and reduce memory usage. Because the various components of the satellite position speed change smoothly over time, the interpolation method can be used to calculate only the satellite parameters of the starting point, end point and intermediate point, and the remaining time points can be calculated using the polynomial fitting method.

[0123] The present invention selects the Lagrange interpolation method: the iterative method is inherited, flexible to implement, and high in precision. The specific calculation process is as follows:

[0124] There are n+1 known independent variables x0, x1, …x in the interval [a, b]. n and the corresponding function values ​​y0,y1…y n For any x in [a, b] i , can be obtained with x i The corresponding estimated value y i , the formula is as follows:

[0125]

[0126] Where L n (x) is the Lagrange polynomial; l k is an undetermined polynomial of degree not exceeding n, also known as the interpolation basis function. At this time, the Lagrange interpolation order is n, satisfying the following formula:

[0127]

[0128] The specific calculation formula is:

[0129]

[0130] Combining the above formula, the calculation formula of n-order Lagrange polynomial is:

[0131]

[0132] Where x i With x k are different numbers of distinct nodes, x is any value in the given interval [a, b], L n (x) is the Lagrangian estimate corresponding to x. In position calculation, the calculation formulas in different directions are:

[0133]

[0134] Where t is the observation time of the interpolation node; l k (t) is the interpolation basis function; (X(t), Y(t), Z(t)) is the satellite position coordinate at the interpolation time t, (X k (t),Y k (t),Z k (t)) is the satellite position coordinate of the corresponding interpolation node, and the velocity clock error and clock drift parameters are the same.

[0135] Step 4.2 completes the calculation of the carrier NCO adjustment amount.

[0136] After obtaining the navigation state estimate of the receiver, the Doppler frequency of the carrier and C / A code signal can be predicted based on the known receiver state and satellite ephemeris or satellite position interpolation. This process is exactly the inverse process of using the Doppler frequency to solve the receiver dynamics. The predicted value of the carrier frequency change obtained by the receiver dynamics is:

[0137]

[0138] In the formula, α indicates the predicted value obtained using the corrected estimated value. carr is the standard carrier frequency, It indicates the rate of change of the relative distance between the receiver and the satellite obtained according to the estimated navigation state. The calculation formula is:

[0139]

[0140] In the formula, is the velocity of satellite i at time k+1 calculated based on the satellite ephemeris, Vα k+1 Indicates the receiver speed, is the line-of-sight unit vector between satellite i and the receiver; tα d,k+1Indicates the receiver clock drift in m / s. represents the satellite clock drift. Since the satellite atomic clock frequency is quite stable, this term is 0 here. Δt is the discriminator update period. It represents the carrier signal Doppler frequency shift change rate. For general low-dynamic ordinary users, if the NCO update frequency is very fast, the impact of this item is very small, and the frequency change caused by this item is also ignored here. It can be obtained that the replica carrier frequency input to the carrier NCO should be:

[0141]

[0142] Where f IF The intermediate frequency determined for the RF processing module.

[0143] Step 4.3 completes the code NCO adjustment calculation.

[0144] In the step (4), the method for calculating the code NCO adjustment amount is as follows: Since there is a linear relationship between the Doppler frequency shift of the pseudo code signal and the Doppler frequency shift of the carrier signal, it is easy to obtain that the frequency of the C / A code signal copied in the code NCO should be:

[0145]

[0146] Where f code is the ranging code rate. The change of the code phase of the replica ranging code corresponds to the change of the pseudorange. According to the geometric relationship, the correction amount can be obtained as:

[0147]

[0148] In the formula Indicates the distance the satellite moves in the time Δt, which can be obtained by taking the difference between the satellite positions at two times, or by the satellite speed. Then the code phase input to the code generator is:

[0149]

[0150] The code phase is input to the code generator to adjust the phase of the local replica code. From this, the control amount of carrier tracking and pseudo code tracking is obtained, and the vector tracking loop is closed. The carrier / ranging code NCO adjustment flow chart is as follows: Figure 8 shown.

[0151] The calculation of satellite position and velocity and code / carrier NCO adjustment at any time on the PL (FPGA) side requires the most basic IEEE754 double-precision floating-point arithmetic operations, as well as square root, sine and cosine, integer, and IEEE754 decoding operations. The operation unit is implemented by calling IP core + RTL: addition and subtraction square root use IEEE754 double-precision floating-point IP core; multiplication writes RTL code, and division uses multiplication RTL code + reciprocal IEEE754 double-precision floating-point IP core. The multiplication and division design of the present invention can reduce the consumption of hardware resources. Sine and cosine use an equivalent method; integer, IEEE754 decoding operation uses IEEE754 floating point fixed-point conversion IP core to restore the true value of the data, thereby participating in the accurate calculation of code / carrier NCO adjustment to complete the vector tracking process. All operation units use the time-division multiplexing method, and the same operation links are completed in one module. Time-division multiplexing saves hardware resources, and the parallel NCO adjustment and satellite parameter interpolation operations of FPGA reduce the computing burden of the processor ARM. The satellite parameter interpolation and NCO adjustment control RTL schematic diagrams are shown in Figure 9(a) and Figure 9(b):

[0152] (5) On the FPGA side, the NCO adjustment value is used to generate a new ranging code and carrier to participate in the tracking operation.

[0153] (6) If the newly generated ranging code and carrier cannot successfully track the satellite, the tracking operation result is passed to the ARM side, and a new round of EKF is performed to complete a new round of data update iteration. Steps (1) to (5) are repeated to complete the feedback loop. If the newly generated ranging code and carrier can successfully track the satellite, the iteration can be stopped and the result can be output.

[0154] The experiment selected the GPS L1 signal for vector tracking feedback adjustment. The satellite parameter interpolation results are shown in Fig.10 As shown, the carrier / ranging code NCO adjustment result is as follows Fig.11 As shown in the figure, multiple channels can realize parallel calculation, and the test results of each channel are similar. The calculation results of channel 0 are shown. The new carrier and ranging code results are generated under the adjustment amount. Fig.12 and Fig.13 As shown, the basic principles, main features and advantages of the present invention are shown and described above.

[0155] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for implementing feedback of receiver vector tracking, characterized in that: The following steps are involved: Step 1: Perform EKF processing on the ARM side and extract the data involved in calculating the NCO adjustment amount; Step 2: According to step 1, data encoding is performed on the ARM side; Step 3: According to step 2, data communication between ARM and FPGA is performed; Step 4: Complete the satellite position speed calculation and code / carrier NCO adjustment calculation at any time on the FPGA side; Step 5: On the FPGA side, use the NCO adjustment value obtained in step 4 to generate a new ranging code and carrier to participate in the tracking operation; Step 6: According to step 5, if the newly generated ranging code and carrier cannot successfully track the satellite, the tracking operation result is passed to the ARM side, a new round of EKF is performed, a new round of data update iteration is completed, and steps (1) to (5) are repeated to complete the feedback loop; if the newly generated ranging code and carrier can successfully track the satellite, the iteration can be stopped and the result can be output.

2. The method for implementing receiver vector tracking feedback according to claim 1, characterized in that: The step 1 comprises the following steps: Step 1.1: Calculate the receiver's predicted position velocity, clock error, clock drift, measurement time and transmission time; First, the position and velocity of the receiver are estimated. The navigation filter of the vector tracking loop adopts the extended Kalman filter. The state quantity of the filter is the components of the position and velocity errors of the user receiver in the three axes of x, y, and z and the clock error of the receiver. The observed quantity of the filter is the pseudorange of each tracking channel and the change of the pseudorange rate. The state prediction value is obtained by using the Kalman filter equation. Step 1.2: Select five time points and the satellite position, velocity, clock error and clock drift at those time points; The receiver enters the process by parsing the satellite ephemeris and using the satellite orbit data in the ephemeris to calculate the satellite's position, velocity, clock error, and clock drift. It selects five time points within 10 minutes when the receiver stably tracks the satellite, and calculates the satellite's position, velocity, clock error, and clock drift information to prepare for subsequent satellite velocity, clock error, and clock drift interpolation operations.

3. The method for implementing receiver vector tracking feedback according to claim 1, characterized in that: The step 1.2 is only executed when the receiver operates in the scalar positioning mode or in the initial state. This step is not executed in the vector tracking mode and is replaced by the satellite parameter interpolation method.

4. The method for implementing receiver vector tracking feedback according to claim 1, characterized in that: The step 2 must first ensure the accuracy of the data. The receiver satellite position, velocity, clock error, and clock drift must all be double-precision floating point numbers. The more bits involved in the calculation, the more accurate the result. The double-precision floating point numbers are converted and encoded according to the IEEE754 floating point format. The data format of the satellite interpolation and NCO adjustment calculations on the FPGA side is also IEEE754 encoding. The step 2 achieves the purpose of high-precision parallel computing.

5. The method for implementing receiver vector tracking feedback according to claim 1, characterized in that: In step 3, the BRAM on the FPGA chip is used to implement temporary storage of read and write data on the AXI bus to interact with data; when the PS side needs to write data information to the PL side, the AXIGPIO transmission control information is called, which is used to distinguish the tracking channel and the data purpose, and the data information is written to the BRAM specified address by the write function. If the FPGA side detects that the information transmitted by the AXIGPIO has changed, the data information in the BRAM will be read to complete the write operation that the PS side needs to write to the PL side; When the PL side needs to write data information to the PS side, the FPGA sends an interrupt request to the ARM through the AXI bus and writes the data into the BRAM; when the ARM detects the corresponding interrupt signal, it starts reading the data pre-written in the BRAM by the FPGA, thereby completing the data transfer between the FPGA and the ARM.

6. The method for implementing receiver vector tracking feedback according to claim 1, characterized in that: The step 4 comprises the following steps: Step 4.1 completes the calculation of satellite position velocity clock error and clock drift at any time; Get the calculation formula of n-order Lagrange polynomial, calculate the satellite parameters of the starting point, end point and intermediate point, the formula is: In the formula, there are n+1 known variables x0, x1, ..., x in the interval [a, b]. n , the corresponding function values ​​y0,y1,...,y n , x in the interval i The corresponding estimated value y can be obtained i , x i With x k For different numbers of distinct nodes, y k For x k The corresponding estimated value, L n (x) is the Lagrangian estimate corresponding to x, l k (x) is the interpolation basis function; When solving the position, the calculation formulas in different directions are: Where t is the observation time of the interpolation node; l k (t) is the interpolation basis function; (X(t), Y(t), Z(t)) is the satellite position coordinate at the interpolation time t, (X k (t),Y k (t),Z k (t)) is the satellite position coordinate of the corresponding interpolation node, and the velocity clock error and clock drift parameters are the same; Step 4.2 completes the calculation of the carrier NCO adjustment amount; The predicted value of the carrier frequency change obtained dynamically by the receiver is: In the formula, α indicates the predicted value obtained using the corrected estimated value; f carr is the standard carrier frequency, It indicates the rate of change of the relative distance between the receiver and the satellite obtained according to the estimated navigation state. The calculation formula is: In the formula, is the velocity of satellite i at time k+1 calculated based on the satellite ephemeris, Vα k+1 Indicates the receiver speed, is the line-of-sight unit vector between satellite i and the receiver; tα d,k+1 Indicates the receiver clock drift in m / s. represents the satellite clock drift. Since the satellite atomic clock frequency is quite stable, this term is 0 here. Δt is the discriminator update period. It represents the carrier signal Doppler frequency shift change rate. For general low-dynamic ordinary users, if the NCO update frequency is very fast, the impact of this item is very small, and the frequency change caused by this item is also ignored here. Therefore, the replica carrier frequency input to the carrier NCO should be: Where f IF An intermediate frequency determined for the RF processing module; Step 4.3 completes the calculation of the code NCO adjustment amount; The frequency of the C / A code signal copied in the code NCO should be: In the formula, f code is the ranging code rate; the change of the code phase of the replica ranging code corresponds to the change of the pseudorange, and the correction amount is obtained according to the geometric relationship: In the formula, It represents the distance the satellite moves in the time Δt, which is obtained by subtracting the satellite position at two moments, or by calculating the satellite speed. Then the code phase input to the code generator is: The code phase is input to the code generator to adjust the phase of the local replica code, and the control amount of carrier tracking and pseudo code tracking is obtained, and the vector tracking loop is closed.

7. A receiver vector tracking feedback system, characterized in that: The feedback realization method of receiver vector tracking described in any one of claims 1 to 6 is adopted, and the system includes a high-precision antenna for receiving satellite signals, a radio frequency front end of the receiver and a baseband ZYNQ motherboard of the receiver; the ZYNQ motherboard includes a processing system, namely a PS module, a programmable logic, namely a PL module and an AXI4 bus; the internal package of the PS module is an ARM CotrexA9 processor, which completes the baseband processing of satellite capture search detection, navigation message decoding, satellite ephemeris extraction, interpolation parameter calculation, receiver PVT information solution, extended Kalman filtering and data IEEE754 encoding; the PL module integrates a carrier NCO module, a code NCO module, a code generator module, an integral accumulation module, a carrier NCO feedback amount calculation module, a code NCO feedback amount calculation module, a satellite position interpolation calculation module, a PL-PS parameter transfer module, a segmented matching filter module and an FFT calculation module; The PS writes the control data and calculation data required for adjusting and tracking the NCO into the shared memory BRAM through the AXI bus, and the PL parses the control data and calculation data from the shared memory BRAM to participate in the NCO adjustment operation; the PL stores the loop-related values ​​and other data calculated in the tracking process in the memory BRAM and sends an interrupt request to the PS, and the PS reads the tracking data in the shared memory BRAM through the AXI bus, performs phase and frequency discrimination, and updates the calculation results of the EKF; The code NCO feedback calculation module and the satellite position interpolation calculation module are directly involved in the multi-channel parallel NCO adjustment calculation. It is necessary to design targeted operation unit modules, such as addition, subtraction, multiplication, division, decoding, sine and cosine, rounding, square root and other operations, and ensure the operation accuracy and speed. In order to save PL resources, the time-sharing logic of the calculation module is used to complete the calculation of the entire process.

8. A computer-readable storage medium having a computer program / instruction stored thereon, characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer program product comprising a computer program / instructions, characterized in that: When the computer program / instructions are executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the instruction tracing method according to any one of claims 1 to 6.

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