Adjusting method for enabling integrated platform of hydropower station to adapt to multiple hardware

Abstract

The invention discloses an adjustment method for enabling a hydropower station integrated platform to adapt to multiple hardware, and the method specifically comprises the steps: configuring bottom-layer driving information according to the system architecture and instruction set characteristics of a target domestic chip, and obtaining a first platform; industrial control software in the hydropower station integrated platform is migrated to the first platform according to a preset transplantation strategy and an adaptation strategy; a data stream accelerator is configured in the first platform, and sparse collaborative optimization of the CPU performance, the accelerator performance and the storage performance in a three-in-one mode is carried out; and building a test environment of the chip-level autonomous controllable hardware in the optimized first platform, carrying out comprehensive test in the test environment, and dynamically adjusting software information in the optimized platform according to test information. By means of the method, the hydropower station integrated platform can have the adaptive capacity for various kinds of hardware, the software and hardware matching efficiency is effectively improved, compatibility is high, stability is good, data processing efficiency is high, and the overall operation efficiency and reliability of the optimized platform are effectively improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of intelligent control of hydropower stations, and in particular to an adjustment method for adapting an integrated platform of a hydropower station to multiple hardware. Background Art

[0002] The integrated platform of a hydropower station is a comprehensive control platform that integrates multiple functions and systems. It plays an important role in the operation and management of a hydropower station. The current integrated platform of a hydropower station usually uses general industrial computers and PLC equipment, which have problems such as poor compatibility, insufficient real-time performance, and poor security.

[0003] Specifically, industrial computers and PLC devices are usually produced by different manufacturers, and they often use different operating systems, software architectures, and communication protocols. This diversity leads to compatibility issues between different devices, making integration and collaborative work complicated. In addition, the data exchange and communication standards across platforms are not unified, which increases the difficulty of system integration. For critical infrastructure such as hydropower stations, real-time performance is a key requirement of industrial control systems. However, general industrial computers are often not designed for specific real-time control tasks, and their processing speed and response time may not meet the strict requirements of hydropower stations. General PLC devices will also have performance bottlenecks when processing complex logic and high-speed data exchange. At the same time, general-purpose devices often do not have reinforcement measures designed for specific industrial environments, and are vulnerable to physical and network attacks, greatly increasing security risks.

[0004] In addition, the key core components in the industrial control systems currently used in hydropower stations are mainly imported, and are subject to external constraints in terms of technological updates and maintenance, which may lead to a series of safety risks. Summary of the invention

[0005] In view of this, the embodiment of the present disclosure provides an adjustment method for adapting a hydropower station integrated platform to multiple hardware, which can solve the problems of poor compatibility, insufficient real-time performance, poor security, etc. existing in the prior art.

[0006] In a first aspect, the embodiment of the present disclosure provides an adjustment method for adapting a hydropower station integrated platform to multiple hardware, using the following technical solutions:

[0007] According to the system architecture and instruction set characteristics of the target domestic chip, configure the underlying driver information to obtain the first platform; the underlying driver information includes underlying key feature parameters, preset strategies, peripheral interface abstraction strategies, peripheral interface packaging strategies and device optimization strategies;

[0008] Migrating the industrial control software in the hydropower station integration platform to the first platform according to the preset migration strategy and adaptation strategy;

[0009] A data flow accelerator is configured in the first platform to perform sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and the optimized first platform is recorded as a second platform;

[0010] A test environment for chip-level autonomous and controllable hardware is built in the second platform, comprehensive tests are performed in the test environment, and software information in the second platform is dynamically adjusted according to the test information. The adjusted second platform is used as a platform for adapting the hydropower station integrated platform to multiple hardware.

[0011] Optionally, configuring the underlying driver information according to the architecture and instruction set characteristics of the target domestic chip to obtain the first platform includes:

[0012] The underlying key characteristic parameters are configured based on the parameter information of the target domestic chip; the underlying key characteristic parameters include at least one of the number of cores, cache capacity, bus bandwidth, and dynamic operation parameters;

[0013] Introducing the preset strategy in the driver; the prediction strategy includes a cache pre-fetch strategy, a locking strategy and a preset batch IO device interrupt processing strategy;

[0014] Based on all serial communication interfaces of the target domestic chip, configure a unified device driver framework;

[0015] Determine a common operation interface based on the unified driver framework of the device and peripheral interfaces with different functions;

[0016] Optimizing the device driver of the target domestic chip by using an object-oriented programming paradigm to obtain a first driver;

[0017] The first platform includes the underlying key feature parameters, the preset strategy, the device unified driver framework, the public operation interface and the first driver.

[0018] Optionally, the adopting of an object-oriented programming paradigm to optimize the device driver of the target domestic chip to obtain a first driver includes:

[0019] Creating an abstract device class based on several target devices of the target domestic chip, wherein the abstract device class includes the basic operation interface of all devices;

[0020] Creating a subclass according to the target device, wherein the subclass inherits from the abstract device class;

[0021] The subclass is controlled by the abstract device class to perform corresponding operations.

[0022] Optionally, the step of migrating the industrial control software in the hydropower station integrated platform to the first platform according to a preset migration strategy and adaptation strategy includes:

[0023] Based on the module composition of the industrial control software and the calling relationship between different modules, identifying platform-related codes; the platform-related codes include assembly codes and inline assembly codes;

[0024] Recompile the platform-related code based on the operating system of the target domestic chip;

[0025] Introduce middleware and reconstruct platform-dependent modules;

[0026] Based on the recompiled platform-related code and the reconstructed platform-dependent module, an intermediate platform is obtained;

[0027] The hardware environment is simulated on the intermediate platform, and the industrial control software is encapsulated in the image of the virtual machine; the virtual machine communicates with the physical hardware through the virtual network card mechanism and the virtual serial port mechanism;

[0028] A real-time enhancement strategy is introduced into the hypervisor of the virtual machine to obtain the first platform.

[0029] Optionally, the real-time enhancement strategy includes one or more of YY+242174P in the paravirtualization driver strategy, direct I / O strategy, CPU core binding strategy, NUMA affinity scheduling strategy, and statically compiled custom image strategy.

[0030] Optionally, the operating system based on the target domestic chip and recompiling the platform-related code includes: obtaining the instruction set and system call information of the operating system;

[0031] The platform-related code is rewritten based on the instruction set, the system call information, the architecture specification of the instruction set, the data type length rule, and the byte alignment rule.

[0032] Optionally, the introducing middleware and reconstructing the platform-dependent module includes: introducing the determined real-time middleware into the industrial control software;

[0033] Reconstruct the key modules of the industrial control software based on the real-time middleware; the key modules include a task scheduling module and a process communication module;

[0034] The control logic execution strategy is determined by the preset task scheduling mechanism and the preset task scheduling algorithm.

[0035] Optionally, configuring a data flow accelerator in the first platform to perform sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and recording the optimized first platform as the second platform includes:

[0036] Establishing a neural network model of sparsity and acceleration performance in the first platform; the neural network model includes the hardware architecture of the target accelerator, key parameters, and mathematical mapping relationships in the sparse computing mode, and the mathematical mapping relationships include the relationship between weight sparsity, activation sparsity, and actual acceleration ratio and energy efficiency ratio;

[0037] Searching for a target sparse pattern based on a HASS algorithm, and optimizing the neural network model according to the target sparse pattern to obtain the neural network model that meets the conditions;

[0038] Optimizing the storage process and calculation process of the neural network model that meets the conditions to obtain a first model;

[0039] Based on the structured pruning strategy, the unstructured pruning strategy, and the activated sparse strategy, customized sparsity processing is performed on the first model to obtain a second model;

[0040] Based on the data reuse characteristics and access mode of the second model, a multi-level heterogeneous storage structure is constructed to obtain a third model; the third model is configured with a direct memory access mechanism, and the heterogeneous storage structure includes accelerator storage information and CPU-side storage information;

[0041] A fine-grained hybrid scheduling strategy is configured in the third model to obtain a fourth model; the hybrid scheduling strategy includes an instruction scheduling strategy of the accelerator, a scheduling strategy of the CPU, and a scheduling strategy of data storage;

[0042] Performing data flow fusion processing on the fourth model to obtain a fifth model; the fifth model is configured with a graph optimization strategy, a dynamic adjustment strategy and a just-in-time compilation strategy;

[0043] The second platform includes the fifth model.

[0044] Optionally, searching for a target sparse pattern based on a HASS algorithm, and optimizing the neural network model according to the target sparse pattern to obtain the neural network model that meets conditions, includes:

[0045] The pre-trained neural network model is used as the input of the HASS algorithm, the weight / activation sparsity is used as the search variable, the model accuracy and acceleration performance are used as the optimization goals, and the search space is constructed;

[0046] During the search process, initial sub-models with different sparsities are generated through weight pruning and activation quantization techniques; the accuracy loss and acceleration potential of several initial sub-models are obtained based on the neural network model, the target sparsity pattern is screened out, and the initial sub-model corresponding to the target sparsity pattern is recorded as the first sub-model;

[0047] Perform distillation learning on the first sub-model on the hardware of the target accelerator to obtain actual execution time and acceleration effect data;

[0048] The neural network model is dynamically corrected based on the actual execution time and the acceleration effect data to obtain the neural network model that meets the conditions.

[0049] In a second aspect, the embodiments of the present disclosure further provide a method for constructing an intelligent platform, according to any one of the methods for adjusting the hydropower station integrated platform to adapt to multiple hardware, the adjusted second platform is used as an intelligent platform for adjusting the hydropower station integrated platform to adapt to multiple hardware;

[0050] The intelligent platform is equipped with at least one of an onboard computer system, an image acquisition system, an infrared thermal imaging system, an inertial navigation system, a wireless communication system, a battery management system, a computer vision system, a machine learning system, a target detection system, a three-dimensional reconstruction system, and an interactive system.

[0051] In a third aspect, the disclosed embodiment further provides an adjustment system for adapting a hydropower station integrated platform to multiple hardware, using the following technical solutions:

[0052] A configuration module, configured to configure underlying driver information according to the architecture and instruction set characteristics of the target domestic chip to obtain a first platform; the underlying driver information includes underlying key feature parameters, preset strategies, peripheral interface abstraction strategies, peripheral interface encapsulation strategies and device optimization strategies;

[0053] A migration module, used to migrate the industrial control software in the hydropower station integration platform to the first platform according to a preset migration strategy and adaptation strategy;

[0054] A sparse collaborative optimization module, used for configuring a data flow accelerator in the first platform, performing sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and recording the optimized first platform as a second platform;

[0055] A dynamic adjustment module is used to build a chip-level autonomous and controllable hardware test environment in the second platform, perform comprehensive testing in the test environment, and dynamically adjust the software information in the second platform according to the test information.

[0056] In a fourth aspect, the embodiments of the present disclosure further provide a computer device, which adopts the following technical solution:

[0057] The computer device comprises:

[0058] at least one processor; and,

[0059] a memory communicatively connected to the at least one processor; wherein,

[0060] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute any of the above-mentioned adjustment methods for making the integrated platform of a hydropower station adapt to multiple hardware.

[0061] In a fifth aspect, an embodiment of the present disclosure further provides a computer-readable storage medium, which stores computer instructions, and the computer instructions are used to enable a computer to execute any of the above-mentioned adjustment methods for making the integrated platform of a hydropower station adapt to multiple hardware.

[0062] In a sixth aspect, an embodiment of the present disclosure further provides a computer program product, comprising a computer program / instruction, which implements the steps of any of the above methods when executed by a processor.

[0063] The adjustment method for making the integrated platform of a hydropower station adapt to multiple hardware disclosed in the present application effectively realizes the adaptability of the integrated platform of a hydropower station to multiple hardware, including different chip architectures and processor types, and provides a more flexible and reliable hardware selection for the hydropower station; on the basis of ensuring stability, the overall performance and efficiency of the platform are optimized, so that it can more efficiently process complex data streams and real-time control tasks, thereby improving the operating efficiency and responsiveness of the hydropower station; through fine hardware and software optimization, it reduces resource waste and energy consumption, reduces the operating cost of the hydropower station platform, and improves the overall environmental friendliness; in summary, the adjustment method for making the integrated platform of a hydropower station adapt to multiple hardware disclosed in the present application can effectively improve the efficiency of software and hardware coordination, reduce compatibility and stability issues, speed up data processing, improve system performance, and ensure the stability and reliability of the system, thereby improving the overall operating efficiency and reliability of the integrated platform of the hydropower station.

[0064] The adjustment method for adapting the integrated platform of a hydropower station to multiple hardware disclosed in the present application provides a set of software and hardware adaptation solutions for target domestic chips, including measures such as developing universal hardware interface standards, enhancing the modularization and abstract design of software, improving the real-time performance and security of the system, reducing dependence on imported technology, and cultivating relevant technical personnel; through these measures, the replacement of imported equipment can be gradually realized, and the autonomy and controllability of the integrated platform of a hydropower station can be improved.

[0065] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the following preferred embodiments are specifically cited and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0067] Figure 1 A flow chart of an adjustment method for adapting a hydropower station integrated platform to multiple hardware provided in an embodiment of the present disclosure.

[0068] Figure 2 A flowchart of a method for obtaining a first platform provided in an embodiment of the present disclosure.

[0069] Figure 3 A schematic flow chart of a method for optimizing a device driver for a target domestic chip provided in an embodiment of the present disclosure.

[0070] Figure 4 A schematic flow chart of a method for migrating industrial control software in an integrated platform of a hydropower station provided in an embodiment of the present disclosure.

[0071] Figure 5 A schematic flow chart of a method for recompiling platform-related codes provided in an embodiment of the present disclosure.

[0072] Figure 6 A flowchart of a method for reconstructing a platform-dependent module provided in an embodiment of the present disclosure.

[0073] Figure 7 A schematic flow chart of a method for performing sparse collaborative optimization provided in an embodiment of the present disclosure.

[0074] Figure 8 A schematic flow chart of a method for optimizing a neural network model provided in an embodiment of the present disclosure.

[0075] Fig. 9 A principle block diagram of an adjustment system for enabling a hydropower station integrated platform to adapt to multiple hardware, provided in an embodiment of the present disclosure.

[0076] Fig.10 A schematic diagram of the structure of a computer device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0077] The embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0078] It should be clear that the following embodiments of the present disclosure are described by specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present disclosure from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. The present disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present disclosure. It should be noted that the following embodiments and features in the embodiments can be combined with each other in the absence of conflict. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present disclosure.

[0079] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein may be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present disclosure, it should be understood by those skilled in the art that an aspect described herein may be implemented independently of any other aspect, and two or more of these aspects may be combined in various ways. For example, any number of aspects described herein may be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein may be used to implement this device and / or practice this method.

[0080] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present disclosure. The drawings only show components related to the present disclosure rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0081] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects described may be practiced without these specific details.

[0082] Reference Figure 1 The present application discloses a method for adjusting a hydropower station integrated platform to adapt to multiple hardware, the method specifically comprising the following steps:

[0083] S100, configures the underlying driver information according to the architecture and instruction set characteristics of the target domestic chip to obtain the first platform; the underlying driver information includes underlying key feature parameters, preset strategies, peripheral interface abstraction strategies, peripheral interface packaging strategies and device optimization strategies.

[0084] By deeply understanding the characteristics of the target chip and accurately configuring the underlying driver information, we can improve the efficiency of software and hardware coordination and ensure the stability and performance of the software on the target chip. Through this step, we can tailor the underlying driver for domestic chips, on the one hand, give full play to the computing, storage, IO and other performance advantages of the chip, and on the other hand, reduce the difficulty and workload of driver development.

[0085] S200, migrating the industrial control software in the hydropower station integrated platform to the first platform according to a preset migration strategy and adaptation strategy.

[0086] According to the preset migration strategy and adaptation strategy, use the corresponding migration tools or methods to migrate the industrial control software to the first platform to ensure the compatibility and stability of the software on the new platform; that is, through this step, the normal operation of the industrial control software on the new platform can be ensured, reducing the compatibility and stability problems that may arise during the migration process and improving the adaptability of the software.

[0087] S300, configure a data flow accelerator in the first platform, perform sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and record the optimized first platform as the second platform.

[0088] Use specialized tools or programming languages ​​to configure the data stream accelerator in the first platform, perform sparse collaborative optimization, improve the overall performance of the first platform, and record it as the second platform. By optimizing the synergy of CPU, accelerator and storage performance, improve the overall system performance, speed up data stream processing, and improve efficiency.

[0089] In this step, HASSH (Hardware-Aware Sparse Search) is introduced to enable the integrated operation of hydropower stations, which can help hydropower stations manage and optimize the use of hardware resources, including sensors, controllers and other equipment, to ensure efficient operation and reduce energy waste; by collecting and analyzing data in real time, HASS can provide key operating indicators and insights, help managers make more accurate and timely decisions, and improve the overall operating efficiency of hydropower stations; based on the collected data and analysis results, HASS can support predictive maintenance strategies, help prevent equipment failures and reduce downtime, thereby improving the reliability and sustainability of facilities; HASS can help hydropower stations reduce energy costs and improve energy utilization efficiency by optimizing equipment operation modes and energy consumption analysis, and is more environmentally friendly; through real-time monitoring and data analysis, HASS can help detect abnormal activities or security vulnerabilities, strengthen the network and physical security protection of hydropower stations, and protect critical infrastructure from attacks and damage. The introduction of HASS can significantly improve the operational efficiency, safety and sustainability of hydropower stations, and provide them with strong support and advantages in the face of complex operating environments.

[0090] S400, build a chip-level autonomous and controllable hardware test environment in the second platform, conduct comprehensive testing in the test environment, and dynamically adjust the software information in the second platform according to the test information.

[0091] In this step, through comprehensive testing and dynamic adjustment, the stability and reliability of the second platform are guaranteed, the system performance is optimized, and the operating efficiency and reliability of the overall hydropower station integrated platform are improved.

[0092] The present application discloses an adjustment method for adapting a hydropower station integrated platform to multiple hardwares. According to the architecture and instruction set characteristics of the target chip, the configuration of the underlying driver information can effectively improve the compatibility and stability of the hydropower station platform and the target chip, and ensure the normal operation of the hardware. The preset strategy and parameter configuration are helpful to optimize the utilization of hardware resources and improve the overall performance of the system. According to the preset transplantation and adaptation strategy, the industrial control software in the hydropower station integrated platform is quickly migrated to the first platform, reducing the complexity and time cost of the adaptation process. The execution of the adaptation strategy ensures the stability and functional integrity of the software on the new hardware. Combining CPU performance, accelerator performance and The sparse collaborative optimization of storage performance improves the overall performance and efficiency of the first platform, especially when processing large-scale data. The optimized first platform has better multi-hardware adaptability and can meet the diverse needs of hydropower stations in different application scenarios. A test environment for chip-level autonomous and controllable hardware is built and comprehensive testing is carried out. Comprehensive testing is carried out in the test environment of the second platform, including collaborative performance testing and stability verification of software and hardware, to ensure the reliability and stability of the platform in actual applications. The software information in the second platform is dynamically adjusted according to the test information to further optimize and improve the platform's functions and performance to adapt to changing application needs.

[0093] The adjustment method for making the integrated platform of a hydropower station adapt to multiple hardware disclosed in the present application effectively realizes the adaptability of the integrated platform of a hydropower station to multiple hardware, including different chip architectures and processor types, and provides a more flexible and reliable hardware selection for the hydropower station; on the basis of ensuring stability, the overall performance and efficiency of the platform are optimized, so that it can more efficiently process complex data streams and real-time control tasks, thereby improving the operating efficiency and responsiveness of the hydropower station; through fine hardware and software optimization, it reduces resource waste and energy consumption, reduces the operating cost of the hydropower station platform, and improves the overall environmental friendliness; in summary, the adjustment method for making the integrated platform of a hydropower station adapt to multiple hardware disclosed in the present application can effectively improve the efficiency of software and hardware coordination, reduce compatibility and stability issues, speed up data processing, improve system performance, and ensure the stability and reliability of the system, thereby improving the overall operating efficiency and reliability of the integrated platform of the hydropower station.

[0094] In this embodiment, the adjusted second platform can also be used as a platform for adapting the hydropower station integrated platform to multiple hardware.

[0095] Reference Figure 2 , the method for obtaining the first platform specifically includes the following steps:

[0096] S110, configuring underlying key characteristic parameters based on parameter information of the target domestic chip; the underlying key characteristic parameters include at least one of the number of cores, cache capacity, bus bandwidth, and dynamic operation parameters.

[0097] In this step, by configuring the underlying key characteristic parameters, the underlying driver information can be accurately configured according to the actual parameters of the target chip, thereby improving the efficiency of software and hardware coordination, ensuring the stability and performance of the software on the target chip, and ensuring its normal operation.

[0098] Specifically, taking Feiteng FT-2000+ as an example, by consulting the chip manual, it can be determined that it has 64 ARM v8 architecture cores, each core has 32KB of L1 instruction cache and data cache, and 256KB of L2 cache. The chip integrates 8 DDR4 memory controllers with a theoretical bandwidth of up to 230GB / s.

[0099] Hardware detection tools such as ARM DS-5 can be used to obtain the dynamic operating parameters of the processor, including clock frequency, voltage, temperature and other parameters. In addition, the power consumption characteristic curve of the chip under different working conditions can be analyzed to establish an energy consumption model. These data can be used for driver tuning.

[0100] S120, introducing a preset strategy into the driver; the prediction strategy includes a cache pre-fetch strategy, a locking strategy, and a preset batch IO device interrupt processing strategy.

[0101] In this step, introducing preset strategies can optimize the software's use of hardware resources. For example, data access efficiency can be improved through cache prefetching strategies and locking strategies, and IO device processing efficiency can be improved through preset batch IO device interrupt processing strategies, thereby improving system performance.

[0102] Specifically, considering the multi-level cache structure of FT-2000+, cache prefetch strategy and locking strategy (i.e., locking mechanism) can be introduced in the driver; through the compiler built-in functions (such as __builtin_prefetch), commonly used code and data can be actively loaded into the cache in advance to reduce cache misses, that is, the performance loss caused by cache misses can be reduced; for interrupt service programs with high real-time requirements, they can be locked in the L1 cache through cache lockdown technology, thereby reducing interrupt response latency.

[0103] The preset batch IO device interrupt processing strategy includes an interrupt core binding processing strategy and an interrupt load balancing strategy.

[0104] Specifically, for the interrupt processing of massive IO devices, interrupt binding and interrupt load balancing algorithms can be used; interrupt binding binds interrupt requests of devices of the same type to specific CPU cores, which helps maintain cache locality and improve efficiency. At the same time, by dynamically monitoring the interrupt processing load of each core, strategies such as task migration can be implemented to achieve load balancing, avoid contention between cores, and thus optimize the overall performance of the system.

[0105] S130, configures a unified device driver framework based on all serial communication interfaces of the target domestic chip;

[0106] Based on the unified driver framework of the device and peripheral interfaces with different functions, determine the public operation interface.

[0107] In this step, configuring a unified device driver framework can simplify driver development and maintenance, improve driver versatility and portability, reduce configuration work for different functional peripheral interfaces, and reduce the complexity of system integration; for example, a unified operating interface is provided for UART, I2C, SPI and other interfaces, so that peripherals from different manufacturers can be accessed and controlled through the same interface.

[0108] Specifically, taking the UART, I2C, SPI and other interfaces of FT-2000+ as an example, a unified device driver framework is provided. Peripherals from different manufacturers are classified by function (such as serial ports, sensors, actuators, etc.), and common operation interfaces (such as open, close, read, write, ioctl) are extracted. Driver developers only need to implement these interface functions to quickly adapt to new hardware, which greatly simplifies the development and maintenance of driver programs.

[0109] Through the solution provided by this step, driver developers only need to implement functions (such as open, close, read, write, ioctl, etc.) according to unified interface specifications to quickly adapt and support new hardware devices. In other words, they do not need to write a complete driver for each new hardware device from scratch, but can reuse the defined common interfaces and functions, thus saving time and energy while ensuring the consistency and maintainability of the system.

[0110] S140, uses object-oriented programming paradigm to optimize the device driver of the target domestic chip and obtains the first driver;

[0111] The first platform includes underlying key characteristic parameters, preset strategies, a unified device driver framework, a public operation interface and a first driver.

[0112] In this step, optimizing the device driver using the object-oriented programming paradigm can improve the reusability and maintainability of the code, reduce development costs, and ensure the compatibility and stability of the driver and the device.

[0113] Specifically, the object-oriented programming paradigm is used to further optimize the design of device drivers. By abstracting the device drivers into classes and introducing an inheritance mechanism, a general device model and management strategy can be defined as the parent class; the subclass is responsible for implementing the access details of specific hardware, and the polymorphic characteristics are used to achieve the scalability and maintainability of the driver code. This method makes the entire driver framework more flexible and able to adapt to a variety of different hardware implementations, while also facilitating future functional expansion and updates.

[0114] The method for obtaining the first platform disclosed in this embodiment can accurately configure the underlying driver information, optimize the efficiency of software and hardware coordination, improve system performance, simplify driver development and maintenance, reduce system integration complexity, and reduce development costs, thereby improving the overall operating efficiency and reliability of the first platform (i.e., the improved hydropower station integrated platform).

[0115] Suppose we want to develop a simple device management system, which involves different types of devices (such as printers, scanners, cameras, etc.). Each device has common operations (such as printing, scanning, connecting, etc.), but each device has its own unique functions and characteristics.

[0116] 1) Abstraction as a class: First, we can create an abstract device class `Device`, which contains the basic properties and methods of the device, such as `name`, `status`, `connect()`, `disconnect()`, etc. 2) Introduce inheritance mechanism: Then, for different types of devices, we can create specific subclasses to inherit the `Device` class. For example, we create a `Printer` class and a `Scanner` class, which inherit from the `Device` class and can override the parent class's methods to implement their own unique behaviors. 3) Utilize polymorphism: Using polymorphism, we can handle different types of devices through a unified interface without worrying about the specific type of device. 4) Scalability and maintainability: The above design allows us to easily expand new device types by simply creating new subclasses and implementing the necessary methods. At the same time, since all devices share the same set of interfaces and management logic, code maintenance is also easier and clearer.

[0117] Through the above examples, we have demonstrated how to use the abstraction, inheritance, and polymorphism features of object-oriented programming to design and manage device drivers, thereby improving the flexibility, scalability, and maintainability of the code.

[0118] Reference Figure 3 ,The methods for optimizing the device driver of the target domestic chip include:

[0119] S141, create an abstract device class based on several target devices of the target domestic chip, and the abstract device class includes the basic operation interface of all devices.

[0120] In this step, creating an abstract device class helps to unify the basic operation interface of all target devices for management and control. By defining a standard interface, the development and maintenance process of device drivers is simplified, and the code reusability and maintainability are improved.

[0121] S142, creating a subclass according to the target device, where the subclass inherits from the abstract device class.

[0122] In this step, targeted device driver optimization is achieved by creating specific subclasses for each target device. Each subclass can specialize in the operating details of its specific device, such as specific register settings or communication protocols, thereby improving the compatibility and efficiency of the driver and device.

[0123] S143, controlling the subclass through the abstract device class to perform corresponding operations.

[0124] In this step, the abstract device class controls the subclass to perform corresponding operations, thus achieving unified management and operation of the device driver. This design pattern makes it easier to add or modify device drivers in the system, while providing a consistent interface for upper-level applications to use, reducing the complexity of system integration.

[0125] In this embodiment, an inheritance mechanism is introduced, where a parent class defines a general device model and management strategy, and a subclass implements the access details of specific hardware; polymorphism is utilized to achieve extensibility and maintainability of the driver code.

[0126] In this embodiment, the device driver is abstracted into a class, and inheritance and polymorphism mechanisms are used to define a general device model and management strategy, while allowing customization of access details for specific hardware. This method makes the driver code easier to expand and maintain. Through the above steps, developers can customize the development of underlying drivers based on the unique characteristics of domestic chips to achieve optimal performance and stability, while also improving development efficiency and code maintainability.

[0127] The method for optimizing the device driver of the target domestic chip disclosed in this embodiment improves the development efficiency and quality of the device driver, optimizes the structure and design of the driver through the object-oriented programming paradigm, and makes it easier to understand and maintain. In addition, through unified management and standardized device interfaces, the stability and reliability of the system are enhanced, thereby improving the overall operation efficiency and reliability of the hydropower station integration platform.

[0128] Through the above methods, we can tailor the underlying driver for domestic chips, which can give full play to the computing, storage, IO and other performance advantages of the chip, and reduce the difficulty and workload of driver development. Taking Feiteng FT-2000+ as an example, the optimized driver can reduce the system call overhead by 30% and shorten the interrupt response time to less than 10us; for the integrated platform of hydropower stations, efficient drivers are the basis for ensuring real-time control and data collection. Only by achieving software and hardware coordination can the potential of domestic chips be truly realized.

[0129] Reference Figure 4 The method for migrating the industrial control software in the hydropower station integration platform specifically includes the following steps:

[0130] S210, based on the module composition of the industrial control software and the calling relationship between different modules, identify the platform-related code; the platform-related code includes assembly code and inline assembly code.

[0131] In this step, by identifying platform-related codes, including assembly and inline assembly codes, the compatibility and stability of the industrial control software on the target domestic chips can be ensured; the importance of these codes lies in their direct impact on the execution efficiency and reliability of the software on the hardware.

[0132] Taking commonly used PLC programming software as an example, such as Step 7, Unity Pro, etc., this type of software usually includes multiple functional modules such as graphical programming environment, code compiler, online debugger, etc.; there are complex calling relationships between different modules. For example, the intermediate code generated by the programming environment needs to be converted into machine code by the compiler.

[0133] Static analysis tools (such as Understand, Doxygen, etc.) can be used to automatically extract the software's call graph and identify code segments that are closely related to the hardware platform, such as the CPU instruction set, memory layout, peripheral registers, etc. This part of the code usually exists in the form of assembly or inline assembly, and is the focus and difficulty of porting.

[0134] S220, an operating system based on the target domestic chip, recompiles platform-related codes.

[0135] In this step, the platform-related code is recompiled based on the operating system of the target domestic chip to ensure its operation on the new hardware platform. This step can optimize the code to adapt to the new processor architecture and operating system environment, and improve the performance and stability of the system.

[0136] S230, introduce middleware and reconstruct platform dependent modules.

[0137] In this step, the introduction of middleware to reconstruct platform-dependent modules can simplify the system architecture and the interaction between modules. The use of middleware can provide standardized interfaces and communication protocols, reduce the coupling between modules, and enhance the scalability and flexibility of the system.

[0138] S240, obtaining an intermediate platform based on the recompiled platform-related code and the reconstructed platform-dependent modules.

[0139] In this step, the intermediate platform is obtained through the recompiled platform-related codes and the reconstructed platform-dependent modules. This step ensures the stable operation of the software on the new platform and prepares the foundation for subsequent virtualization.

[0140] S250 simulates the hardware environment on the intermediate platform and encapsulates the industrial control software in the virtual machine image; the virtual machine communicates with the physical hardware through the virtual network card mechanism and virtual serial port mechanism;

[0141] Introduce real-time enhancement strategies in the hypervisor of virtual machines to obtain the first platform.

[0142] The real-time enhancement strategy includes one or more of a paravirtualization driver strategy, a direct I / O strategy, a CPU core binding strategy, a NUMA affinity scheduling strategy, and a statically compiled custom image strategy.

[0143] Specifically, virtualization technology can be used to build an operating environment compatible with traditional platforms on domestic chips, including using a virtual machine monitor to simulate the x86 hardware environment to smoothly migrate legacy software, and ensuring the stability and efficiency of the system in a virtualized environment through performance optimization and real-time enhancement measures.

[0144] In this step, the hardware environment is simulated on the intermediate platform, the industrial control software is encapsulated in the virtual machine image, and the virtual network card and virtual serial port mechanism are used to communicate with the physical hardware. A real-time enhancement strategy is introduced in the virtual machine hypervisor. The benefits of the first platform include: being able to perform virtualization testing before running on actual hardware to verify the stability and performance of the system and reduce risks during deployment; by introducing a real-time enhancement strategy, the timeliness of the industrial control software in processing key tasks is ensured, and the system's responsiveness to real-time requirements is improved; virtualization technology is used to achieve resource isolation, prevent mutual interference between different components, and enhance the security and stability of the system.

[0145] In a specific example, for legacy software that is difficult to directly migrate, virtualization can be used to achieve smooth migration. Based on virtual machine monitors such as KVM and Xen, the x86 hardware environment is simulated on domestic chips such as Feiteng and Loongson; the PLC software is encapsulated in the virtual machine image, and communicates with the physical hardware through mechanisms such as virtual network cards and virtual serial ports.

[0146] Considering that virtualization will introduce certain performance overhead, real-time enhancement strategies are introduced in the virtual machine hypervisor. Specifically, the data path of virtual devices is optimized through paravirtualization drivers, direct I / O and other technologies. Scheduling strategies such as CPU core binding and NUMA affinity are used to reduce the uncertainty caused by virtual machine preemption. For critical scenarios, statically compiled custom images can also be used to directly link to the host system in the form of libraries.

[0147] The method for migrating the industrial control software in the integrated platform of a hydropower station disclosed in this embodiment reduces the risks in the migration process and improves the deployment efficiency and success rate of the industrial control software on the new platform. At the same time, through virtualization technology, hardware resources can be managed and configured more flexibly to adapt to different industrial control environment requirements, further improving the overall operation efficiency and reliability of the integrated platform of the hydropower station.

[0148] To illustrate with a specific example: suppose there is an industrial automation control system that contains multiple PLC controllers that need to run on domestic chips. These controllers were originally designed for systems with x86 architecture, but now need to be migrated to platforms that support domestic chips such as Feiteng or Loongson. In this case, the method mentioned by S250 can be used to encapsulate the software of each PLC controller into a virtual machine image. In order to ensure real-time performance and reduce the performance loss caused by virtualization, the following strategies can be adopted: 1) Paravirtualization driver and direct I / O technology (i.e. paravirtualization driver strategy and direct I / O strategy): Through direct I / O technology, the network communication and I / O operations inside the virtual machine are directly mapped to the physical hardware, avoiding the performance overhead of the virtualization layer and improving the data transmission efficiency and real-time performance; 2) CPU core binding and NUMA affinity (i.e. CPU core binding strategy and NUMA affinity scheduling strategy): For each virtual machine, its virtual CPU core can be bound to the physical CPU core, and the NUMA strategy can be optimized to ensure that the task scheduling and memory access inside the virtual machine can maximize the use of hardware resources and improve the overall performance of the system; 3) Statically compiled custom image strategy: For key applications in the controller, they can be compiled into a static link library and directly embedded into the host system; this can avoid the performance loss caused by the loading and parsing of the dynamic link library at runtime, while improving the reliability and stability of the system.

[0149] In summary, through these optimization measures, the smooth migration of industrial control systems can be achieved on domestic platforms, and the system can be guaranteed to meet the requirements of high real-time performance and reliability.

[0150] Reference Figure 5 , the platform-related code recompilation method specifically includes the following steps:

[0151] S221, obtaining the instruction set and system call information of the operating system.

[0152] In this step, the instruction set and system call information of the operating system are obtained in order to understand the underlying operating mechanism of the target platform. This information is crucial for rewriting platform-dependent code because it determines how the code interacts with the hardware and how to utilize the services provided by the operating system.

[0153] S222, rewrite platform-related codes based on the instruction set, system call information, architecture specifications of the instruction set, data type length rules, and byte alignment rules.

[0154] In this step, the platform-related code is rewritten based on the acquired instruction set and system call information, as well as the architectural specifications of the instruction set, data type length rules, byte alignment rules, etc. This step ensures the correctness and performance optimization of the code on the new platform, including: Compatibility and stability: Rewriting the platform-related code can ensure that the code can correctly utilize the instruction set and system calls of the target platform, avoiding errors and instability caused by platform differences; Performance optimization: By following the architectural specifications of the instruction set and optimizing the data type length rules, the code can run more efficiently on the new platform, fully utilize hardware features, and improve the overall performance of the system; Code clarity and maintainability: Rewriting can make the code structure clearer, easier to understand and maintain, which is crucial for subsequent system updates and maintenance work, and can reduce maintenance costs and enhance system reliability.

[0155] The method for recompiling platform-related codes disclosed in this embodiment ensures the stable operation and performance optimization of the industrial control software on the new platform. At the same time, by rewriting the platform-related codes, the compatibility and portability of the software are improved, which not only reduces the risks in the migration process, but also lays a solid foundation for subsequent system upgrades and expansions, further improving the overall operation efficiency and reliability of the hydropower station integration platform.

[0156] Taking domestic Linux operating systems such as Kylin and UOS as examples, the differences between the ARM version of PLC software and the x86 version are analyzed, focusing on instruction sets, system calls, interrupt mechanisms, etc. For assembly code, it needs to be rewritten according to the specifications of the ARM architecture; for C / C++ code (i.e. inline assembly code), portability issues such as data type length and byte alignment rules need to be checked.

[0157] Reference Figure 6 ,The method for reconstructing the platform-dependent module specifically includes the following steps:

[0158] S231, introducing the determined real-time middleware into the industrial control software.

[0159] In this step, the introduction of certain real-time middleware can provide standardized real-time operating system interfaces and communication mechanisms to ensure the consistency and portability of industrial control software on different platforms. This can reduce dependence on specific hardware and simplify the process of porting and deploying software between different platforms.

[0160] Among them, the real-time middleware can be Xenomai, RT-Thread, etc.

[0161] S232, reconstructing key modules of the industrial control software based on the real-time middleware; the key modules include a task scheduling module and a process communication module.

[0162] In this step, reconstructing the key modules of the industrial control software (such as the task scheduling module and the process communication module) based on the real-time middleware can optimize the system's resource management and task allocation. The reconstructed modules can better utilize the functions provided by the real-time middleware, such as more accurate task scheduling and communication mechanisms, thereby improving the system's response speed and real-time performance.

[0163] Among them, reconstruction refers to redesign and transplantation.

[0164] S233, determining the control logic execution strategy through a preset task scheduling mechanism and a preset task scheduling algorithm.

[0165] In this step, the control logic execution strategy is determined by presetting the task scheduling mechanism and task scheduling algorithm to ensure that key tasks are executed on time and comply with the real-time requirements of the system. These strategies can be verified and optimized during the system design phase, reducing the adjustment and optimization work at runtime and improving the stability and reliability of the system.

[0166] The method for reconstructing platform-dependent modules disclosed in this embodiment has consistency and portability: after introducing real-time middleware and reconstructing key modules, the behavior and performance of industrial control software on different platforms are more consistent, reducing compatibility issues in the transplantation process, and improving the portability and deployment efficiency of the software; by optimizing task scheduling and process communication, the system can more effectively utilize hardware resources, improve response speed and real-time performance, especially in industrial control scenarios that require high synchronization and responsiveness; the preset task scheduling mechanism and algorithm ensure that the execution strategy of key tasks meets real-time requirements, reduces the risk of failure or delay during system operation, and enhances the stability and reliability of the system.

[0167] In summary, by introducing real-time middleware and optimizing and reconstructing key modules, the overall solution not only improves the adaptability and performance of industrial control software on the new platform, but also reduces development and maintenance costs, providing a solid foundation for the stable operation of the integrated platform of the hydropower station.

[0168] Specifically, PLC software usually requires real-time guarantee, so it is necessary to transplant real-time middleware such as Xenomai, RT-Thread, etc., and use the API provided by the middleware to reconstruct the software's task scheduling, process communication and other modules, and through priority inheritance (i.e. task scheduling mechanism), time slice rotation (i.e. task scheduling algorithm) and other mechanisms, to achieve deterministic execution of control logic; at the same time, consider the compatibility of the middleware with ARM Linux to avoid introducing new unstable factors.

[0169] Through the above solutions, we can achieve smooth migration of industrial control software from traditional platforms to domestic chips. On the one hand, we can reuse existing software assets to the maximum extent and reduce the cost of application reconstruction. On the other hand, we can release the full performance potential of the hardware through deep adaptation to chip characteristics. Taking the PLC control software of a hydropower station as an example, after recompilation and instruction optimization, its main scanning cycle was shortened from the original 20ms to 5ms. Through the collaborative scheduling of real-time middleware, the maximum delay of control instructions does not exceed 1ms, meeting the stringent requirements of power grid frequency regulation. Virtualization technology enables a smooth transition of the legacy monitoring interface program, ensuring the progress of the system launch.

[0170] Reference Figure 7 , the method for sparse collaborative optimization specifically includes the following steps:

[0171] S310, establishing a neural network model of sparsity and acceleration performance in the first platform; the neural network model includes the hardware architecture of the target accelerator, key parameters, and mathematical mapping relationships under the sparse computing mode, and the mathematical mapping relationships include the relationship between weight sparsity, activation sparsity and actual acceleration ratio and energy efficiency ratio.

[0172] In this step, a neural network model of sparsity and acceleration performance on the first platform is established, which can provide a deep understanding of the hardware architecture and key parameters of the target accelerator, as well as the mathematical mapping relationship in the sparse computing mode. This provides a basis for subsequent optimization steps and ensures that the neural network model can effectively utilize sparsity for acceleration on the new platform, thereby improving computing efficiency and energy efficiency.

[0173] In a specific embodiment, the hardware architecture of the accelerator can be analyzed to extract key parameters that affect the efficiency of sparse computing, such as on-chip storage capacity, bus bandwidth, number of computing units, etc. Taking the Cambrian MLU270 as an example, it has 4 built-in cluster cores, each cluster core contains 16 computing cores; the L1 Cache capacity is 4MB, the L2 Cache capacity is 8MB, and the external DDR4 bandwidth can reach 51.2GB / s.

[0174] For the sparse computing mode of the accelerator, a mathematical mapping between weight sparsity, activation sparsity, actual speedup ratio, and energy efficiency ratio is established. This mapping needs to comprehensively consider factors such as the encoding method of sparse data, storage layout, and parallelism of the computing chip. For example, for MLU270, the CSR (Compressed Sparse Row) format is used to store sparse matrices. When the weight sparsity exceeds 0.8, it can achieve about 2.6 times acceleration and 3.1 times energy efficiency improvement.

[0175] S320, searching for a target sparse pattern based on a HASS algorithm, and optimizing a neural network model according to the target sparse pattern to obtain a neural network model that meets the conditions.

[0176] In this step, the HASS algorithm is used to search for the target sparse pattern and optimize the neural network model to obtain the best model that meets specific conditions. This step ensures that the neural network model can achieve the best sparse computing effect on the first platform, further improving computing performance and energy efficiency.

[0177] S330, optimizing the storage process and calculation process of the neural network model that meets the conditions to obtain a first model.

[0178] In this step, the storage process and the computing process of the neural network model that meets the conditions are optimized to obtain the first model; the optimized model is more efficient in storage and computing, can better adapt to the hardware characteristics of the first platform, and improve the overall operating efficiency and performance.

[0179] Specifically, for a certain sparse pattern, select an appropriate data structure and encoding format to minimize the storage overhead of sparse data. For example, use compression methods such as DeltaRNN and BlockSparse to further reduce the number of non-zero values ​​and bit width; weigh the compression rate and decompression time to achieve a balance between storage and computing efficiency.

[0180] At runtime, data flows between CPU, accelerator, and storage are coordinated to achieve end-to-end sparse computing. Transmission mechanisms such as DMA and RDMA are used to hide the latency of data movement. Specialized computing units such as Tensor Core are used to accelerate the multiplication and accumulation of dense sub-matrices; when necessary, quantization and mixed precision computing are introduced to further improve efficiency.

[0181] Through the above steps, the HASS method can quickly search for the configuration that best matches the accelerator hardware characteristics from a large number of sparse patterns. Taking the target detection task in the intelligent inspection of hydropower stations as an example, the original weight and activation sparsity of a certain model are only 0.1 and 0.2. After HASS optimization, the weight sparsity reaches 0.92, the activation sparsity reaches 0.85, the inference delay on MLU270 is reduced from 1.2s to 0.3s, and the energy consumption is reduced from 5W to 1W, which meets the stringent constraints of real-time image analysis of drones and greatly improves the inspection coverage and efficiency.

[0182] S340, performing customized sparsity processing on the first model based on the structured pruning strategy, the unstructured pruning strategy, and the activated sparsity strategy to obtain a second model.

[0183] In this step, the first model is customized for sparsity processing through structured pruning strategy, unstructured pruning strategy and activated sparsity strategy to obtain the second model. This step further improves the sparsity and computational efficiency of the model, making it more suitable for deployment and operation on the first platform with limited resources.

[0184] For the structured pruning strategy, the Conv layer and the fully connected FC layer of the convolutional neural network are taken as examples to analyze the two-dimensional structural characteristics of their weight matrices. For the Conv layer, the rows (or columns) of the weight matrix correspond to the channels of the input (or output) feature map; for the FC layer, the rows (or columns) of the weight matrix correspond to the input (or output) neurons.

[0185] Calculate the L1 or L2 norm of each row (column) weight, and remove the entire row (column) with a smaller norm value according to the preset sparsity threshold. For example, for a 256x512 FC layer, set a row sparsity of 90%, then 230 rows of weights need to be removed, leaving only 26 rows.

[0186] Since the entire row (column) is removed, the corresponding input (output) channel or neuron also loses its function, which can simplify the connection of the previous (next) layer in cascade. For example, when the 230 rows of input weights of the FC layer are removed, the 230 output feature maps of the previous Conv layer can also be directly removed, indirectly achieving cross-layer structured sparsity.

[0187] Through structured pruning strategies, neural network models can be effectively compressed, optimizing their computational efficiency and storage requirements while maintaining a reasonable level of accuracy; this method does not simply delete parameters, but reduces model complexity in a targeted manner based on the structural characteristics of weights and activations to adapt to deployment requirements on various hardware platforms.

[0188] For the unstructured pruning strategy, unlike structured pruning, unstructured pruning sets the sparsity threshold of the weight value and sets the weights less than the threshold to zero one by one. For example, for a Conv layer, if the weight sparsity is set to 70%, all weights below the 30th percentile will be removed.

[0189] Unstructured pruning can usually achieve higher compression rates, but the generated sparse matrix is ​​randomly distributed and the position is difficult to predict. To ensure the efficiency of hardware acceleration, it is necessary to use compressed storage formats such as CSR and COO for the sparse matrix, and only record non-zero values ​​and their coordinates.

[0190] Since unstructured sparsity breaks the original regular computing mode, many accelerator optimization methods (such as vectorization, instruction pipelining, etc.) are no longer applicable. Therefore, unstructured pruning places higher adaptability requirements on computing arrays and storage structures, and usually requires specialized support at the hardware level.

[0191] For the activation sparsity strategy, unlike the weight sparsity strategy, the activation value is the dynamic output of the neural network during forward reasoning, and nonlinear functions such as ReLU can naturally set some activations to zero. However, the location and number of zero values ​​will change with the input data and are uncertain.

[0192] A common approach is to use data analysis to predict the probability distribution of activations in advance for specific tasks and data sets. For example, for face recognition networks, the average activation sparsity of different Conv layers can be as high as 50%-90%. Using prior knowledge, an approximate sparse template can be constructed.

[0193] During inference, dynamic branching, lazy evaluation and other technical means are used to complete only the convolution or matrix multiplication corresponding to non-zero activations based on the sparse mask calculated in real time. A reuse mechanism is introduced to share sparse templates for multiple consecutive frames of input, further reducing the amount of computation.

[0194] Through the above steps, we can explore the sparsity of neural networks from multiple levels and achieve collaborative optimization between algorithms, data and hardware. Taking the abnormal detection of equipment in a hydropower station as an example, the weight and activation data volume of the original WideResNet model were 8.2MB and 16.4MB respectively. After 3 rounds of iterative pruning and 4 times sparse acceleration, the weight was compressed to 1.9MB, the activation was compressed to 6.1MB, the model size was reduced by 4.3 times, and the inference time was also reduced from 0.8s to 0.2s. At the same time, the mAP (meanAverage Precision) accuracy of the end-to-end task only dropped by 1.5%, which still meets the actual application needs.

[0195] S350, based on the data reuse characteristics and access mode of the second model, a multi-level heterogeneous storage structure is constructed to obtain a third model; the third model is configured with a direct memory access mechanism, and the heterogeneous storage structure includes accelerator storage information and CPU-side storage information.

[0196] In this step, based on the data reuse characteristics and access patterns of the second model, a multi-level heterogeneous storage structure is constructed to obtain the third model. This storage structure includes information storage on the accelerator and CPU side, which can optimize data access efficiency and improve the performance and response speed of the overall system.

[0197] Specifically, the data reuse characteristics and access patterns of the sparse model are analyzed to reasonably divide the storage hierarchy. For example, for a sparse FC layer, the non-zero value distribution of its weight matrix is ​​relatively stable and has a low frequency of change, so it can be stored in the accelerator's on-chip SRAM; while the input and output activation vectors are shared between different neurons, have strong access locality, and are suitable for caching in the chip's L1-L2 Cache.

[0198] Optimize data layout and scheduling granularity to minimize bandwidth loss and latency overhead caused by discontinuous storage. Taking the compressed row storage (CSR) format as an example, indexes and data are usually stored separately, resulting in memory access across multiple discontinuous areas; locality and parallelism of access can be improved by merging storage and increasing the transfer size.

[0199] Introduce DMA (Direct Memory Access) mechanism to use hardware to automatically move data between different storage levels. Through double buffering, Ping-Pong operation and other techniques, overlap of calculation and memory access is achieved to hide the delay of data reading and writing. At the same time, for on-chip SRAM and L1 Cache, explicit management methods such as Scratch Pad and locked Cache can be explored to further improve data residence time and hit rate.

[0200] S360, configuring a fine-grained hybrid scheduling strategy in the third model to obtain a fourth model; the hybrid scheduling strategy includes an instruction scheduling strategy of the accelerator, a scheduling strategy of the CPU, and a scheduling strategy of data storage.

[0201] In this step, a fine-grained hybrid scheduling strategy is configured in the third model, including the instruction scheduling of the accelerator, the scheduling of the CPU, and the scheduling strategy of the data storage, to obtain the fourth model. This scheduling strategy can effectively manage computing resources and further improve the parallel processing capability and overall operating efficiency of the system.

[0202] Traditional CPU scheduling is usually based on time slices and preemption mechanisms, which are suitable for control-intensive tasks. However, for compute-intensive AI reasoning, especially irregular computing in sparse mode, frequent context switching and cache invalidation will significantly reduce efficiency. Therefore, it is necessary to design a more fine-grained scheduling strategy based on the characteristics of tasks and data.

[0203] Taking fault diagnosis of hydropower station equipment as an example, it is assumed that lightweight networks such as MobileNet are used to classify vibration signals. The computational complexity of the first few layers is small, but the real-time requirements are high, and they are suitable for execution on the CPU. The convolution and pooling of the middle layers are computationally intensive, but have high tolerance for delays, and can be offloaded to the accelerator for parallel processing. Although the FC calculations of the last few layers are not large in scale, they have a great impact on accuracy, and require mixed scheduling between the CPU and the accelerator to balance speed and accuracy.

[0204] Introduce task splitting and dynamic load balancing mechanisms to flexibly map operators to different computing units based on their computing intensity and data dependency. For accelerators, customized instruction scheduling can be used to reduce control overhead. For CPUs, parallel methods such as SIMD and multithreading can be introduced to fully utilize multi-core architectures. At the same time, monitor system load and task queues at runtime, and dynamically adjust task allocation and priority based on feedback to cope with load fluctuations.

[0205] For example, for fault diagnosis of hydropower station equipment, lightweight networks such as MobileNet can be used. The computational complexity of the first few layers is small but the real-time requirements are high, so they are suitable for execution on the CPU; the convolution and pooling computations of the middle layers are large, but the tolerance for delay is high, so they can be offloaded to the accelerator for parallel processing; the fully connected computations of the last few layers have a great impact on accuracy, so hybrid scheduling is required between the CPU and the accelerator to balance speed and accuracy.

[0206] S370, performing data stream fusion processing on the fourth model to obtain a fifth model; the fifth model is configured with a graph optimization strategy, a dynamic adjustment strategy, and a just-in-time compilation strategy;

[0207] The second platform contains the fifth model.

[0208] In this step, the fourth model is subjected to data flow fusion processing to obtain a fifth model. The fifth model includes graph optimization strategy, dynamic adjustment strategy and just-in-time compilation strategy, which can further optimize the execution efficiency and resource utilization of the model and ensure high performance and stability on the second platform.

[0209] In this embodiment, data flow fusion processing refers to the fusion of the data flow graph and the computation graph.

[0210] By fusing the data flow graph and the computation graph, the writing and reading of intermediate results can be reduced, and the overhead caused by data exchange and format conversion can be reduced. Through the graph optimization strategy, the accelerator supports reading input directly from the compressed data stream, performing necessary preprocessing and mask filtering, and starting calculation immediately. The results of the multiplication and accumulation unit can be directly fed back to the activation and normalization modules, eliminating unnecessary memory round trips.

[0211] For the end-to-end sparse reasoning process, the overhead of data preparation (such as decompression, deformation, padding, etc.) and post-processing (such as pooling, activation, normalization, etc.) cannot be ignored. The traditional approach is to treat it as an independent data flow graph, first process it into a dense format by the CPU, then send it to the accelerator for calculation, and then copy the result back to the CPU for post-processing. This mechanism will lead to frequent data exchange and format conversion, which is costly.

[0212] In this embodiment, the data flow graph and the computation graph are integrated as much as possible to reduce the writing back and reading of intermediate results. For example, the accelerator can support pipelined reading of input directly from compressed data, and perform zero extension, mask filtering and other operations immediately after calculation. At the same time, the results of the multiplication and accumulation unit can be directly fed back to the activation and normalization modules through a bypass, eliminating unnecessary memory round trips.

[0213] During compilation, graph optimization methods such as OperatorFusion and Kernel Fusion can be used to merge multiple fine-grained operators into coarse-grained kernels to reduce scheduling and synchronization overhead. During runtime, just-in-time compilation technologies such as Dynamic TensorFusion and Lazy Execution can be used to dynamically adjust the shape and parallelism of FusedKernel according to the actual sparsity of input data to fully tap the potential of hardware.

[0214] Through the above steps, we can achieve sparse collaborative optimization of the trinity of CPU, accelerator, and storage. Back to the example of intelligent operation and maintenance of hydropower stations, suppose Google Edge TPU is used as an accelerator, with CA55 CPU and 64MB LPDDR4. After a series of optimizations such as heterogeneous storage, hybrid scheduling, and data stream fusion, end-to-end sparse reasoning can achieve real-time performance of 20FPS within a 10W power consumption envelope, saving 8 times the memory bandwidth and improving energy efficiency by 5 times compared to the traditional dense mode. At the same time, the overall accuracy of fault diagnosis reaches more than 95%, and more than 90% of the key equipment in the power plant can be included in the online monitoring and early warning system, greatly improving the intelligence level and efficiency of operation and maintenance.

[0215] The method for sparse collaborative optimization disclosed in this embodiment can bring the following benefits by gradually optimizing the neural network model and system architecture, from modeling to final deployment on the second platform: through sparse and customized optimization, the computing performance and energy efficiency of the neural network model are significantly improved, so that it can exert greater potential under limited resources; the multi-level heterogeneous storage structure and fine-grained scheduling strategy effectively improve resource utilization efficiency, avoid resource waste, and at the same time improve the overall response speed and real-time performance of the system; the use of just-in-time compilation strategy and dynamic adjustment strategy enables the system to adapt to different workloads and environmental changes, and has better flexibility and scalability.

[0216] In summary, this overall solution not only significantly improves performance and efficiency, but also makes important progress in hardware resource management and coping with complex computing needs, providing strong support and optimization guarantees for applications on the second platform.

[0217] Reference Figure 8, the method for optimizing the neural network model specifically includes the following steps:

[0218] S321, taking the pre-trained neural network model as the input of the HASS algorithm, using weight / activation sparsity as the search variable, and taking model accuracy and acceleration performance as the optimization goals, a search space is constructed.

[0219] In this step, using the pre-trained model as the starting point can reduce the computational cost and time in the optimization process and accelerate the iterative process of model optimization. When constructing the search space, model accuracy and acceleration performance can be clearly set as optimization goals, which helps to find the best trade-off point in theory and practical applications.

[0220] Furthermore, intelligent search strategies such as random walk and gradient based are introduced to avoid the computational overhead caused by exhaustive search.

[0221] S322, during the search process, initial sub-models with different sparsities are generated through weight pruning and activation quantization techniques; the accuracy loss and acceleration potential of several initial sub-models are obtained based on the neural network model, the target sparsity pattern is screened out, and the initial sub-model corresponding to the target sparsity pattern is recorded as the first sub-model.

[0222] The target sparse mode refers to a sparse mode that can provide the best acceleration performance within a preset accuracy loss range.

[0223] Specifically, during the search process, some weights and activation values ​​are continuously set to zero through technical means such as weight pruning and activation quantization to generate sub-models with different sparsity. The constructed neural network model is used to quickly evaluate the accuracy loss and acceleration potential of each sub-model to screen out more promising sparse patterns.

[0224] In this step, initial sub-models with different sparsities are generated through weight pruning and activation quantization techniques, which helps to select the sparse pattern that best suits the target hardware and application scenarios among multiple schemes; and screen out the sparse pattern that can provide the best acceleration performance within the preset accuracy loss range to ensure the best effect on different hardware accelerators.

[0225] S323, perform distillation learning on the first sub-model on the hardware of the target accelerator to obtain the actual execution YY+242174P

[0226] Execution time and acceleration effect data;

[0227] The neural network model is dynamically corrected based on the actual execution time and acceleration effect data to obtain a neural network model that meets the conditions.

[0228] In this step, the first sub-model is subjected to distillation learning on the target accelerator to obtain actual execution time and acceleration effect data, ensuring that the optimized model can achieve the expected acceleration effect on the hardware. The neural network model is dynamically corrected based on actual data, and the model is further optimized to meet specific performance and accuracy requirements, thereby achieving better application effects.

[0229] In this step, distillation learning is performed on the screened sub-model (i.e., the first sub-model) on real accelerator hardware to compensate for the accuracy loss caused by sparsification; the theoretical performance model (i.e., the neural network model) is corrected in combination with the actual execution time fed back by the hardware to guide the next round of search; and through multiple rounds of iterative optimization, the optimal sparsity pattern and accuracy threshold are gradually approached.

[0230] Distillation learning is performed by using a larger, full-precision model (often called the teacher model) to guide a sparse sub-model (called the student model) to reduce its loss in accuracy, which can be done by transferring the knowledge of the teacher model or using soft labels.

[0231] By running the selected sparse sub-models on actual hardware, actual execution time and speedup effect data are collected, which are compared with the predictions of the theoretical model and adjusted to more accurately predict the impact of sparsification on speedup performance.

[0232] According to the actual execution results and the corrected performance model, the sparsity and other model parameters are adjusted, and the search and evaluation are re-performed; each round of iteration attempts to find a better balance point to improve acceleration performance and minimize accuracy loss.

[0233] Through these steps, researchers can continuously optimize the sparsification process of neural network models to ensure the best computing acceleration effect in practical applications and operate within an acceptable range of accuracy loss. This method combines theoretical modeling, actual hardware verification and multiple rounds of iterative optimization, and is one of the key steps to efficiently achieve neural network sparsification.

[0234] The method for optimizing the neural network model disclosed in this embodiment significantly improves the reasoning speed and execution efficiency of the neural network model on hardware through sparsification and optimization, and is suitable for scenarios that require rapid response and large-scale data processing, such as real-time data processing and control of hydropower stations; while improving acceleration performance, it maintains high prediction accuracy of the model to ensure accurate prediction and analysis of key operating data; by reducing the waste of computing resources and energy consumption, it optimizes the utilization efficiency of hardware resources, thereby reducing operating costs and improving environmental friendliness; according to specific hardware platform requirements, the optimization plan is customized to ensure the best performance of the model on specific hardware and improve the overall stability and reliability of the system.

[0235] In summary, this optimization solution that integrates the HASS algorithm can not only enhance data processing and decision support capabilities in the integrated operation of hydropower stations, but also effectively improve energy utilization and safety, providing important technical support and optimization solutions for complex operating environments.

[0236] In this embodiment, the HASS algorithm is used to search for the optimal sparse pattern and optimize the sparsity of the neural network model to improve the acceleration performance of the model and maintain a high level of accuracy.

[0237] A second aspect of the embodiments of the present disclosure provides a method for constructing an intelligent platform, according to any one of the adjustment methods for making the hydropower station integrated platform adapt to multiple hardware, using the adjusted second platform as the intelligent platform for making the hydropower station integrated platform adapt to multiple hardware;

[0238] The intelligent platform is equipped with at least one of an onboard computer system, an image acquisition system, an infrared thermal imaging system, an inertial navigation system, a wireless communication system, a battery management system, a computer vision system, a machine learning system, a target detection system, a three-dimensional reconstruction system, and an interactive system.

[0239] Furthermore, hardware interfaces and interconnection topologies are designed on the intelligent platform to ensure compatibility and interoperability between modules. For example, the computer is connected to the camera (i.e., a specific component in the image acquisition system) through the MIPI CSI-2 interface and communicates with the flight control through the MAVLink protocol. The infrared thermal imager outputs the video stream through HDMI and is connected to the computer through the SDI acquisition card. The wireless communication module interacts with the computer through the PCIe bus and provides an external air interface link.

[0240] Hardware installation and debugging and environmental adaptability testing can also be performed on the intelligent platform. Considering the harsh working environment of the drone, the hardware needs to be specially treated with dustproof, waterproof, shockproof, heat dissipation, etc. For example, IP67 protection is used for computers and storage media, shock-absorbing and fixed sensors are used, and heat dissipation is optimized through air ducts and heat pipes. At the same time, the working performance of each module under extreme conditions such as high temperature, low pressure, and strong electromagnetic interference is tested, and corresponding compensation calibration is performed.

[0241] Taking the computer operating system as an example, you can choose embedded Linux distributions such as Ubuntu, QNX, and VxWorks, and perform kernel configuration and driver development based on hardware characteristics (such as CPU architecture, memory size, and Flash type). For flight control systems with high real-time requirements, real-time operating systems such as FreeRTOS and RT-Thread can be used.

[0242] Integrate various software function modules, use robot middleware such as ROS and MOOS, and provide standardized inter-module communication interfaces. For domestic chips (such as Kirin and Ascend), transplant and optimize open source libraries such as OpenCV and TensorFlow, and use acceleration instructions such as NEON and NPU for optimization.

[0243] It is also possible to develop human-computer interaction and remote control programs on the intelligent platform to support real-time monitoring and task assignment of drones by ground stations. Adopt UI frameworks such as QT and MFC to design friendly interface layouts; realize remote telemetry, remote control and image transmission through high-bandwidth links such as 5G and satellite communications; develop special algorithm plug-ins such as power tower identification, ice detection, and terrain analysis based on actual application needs.

[0244] On the intelligent platform, the hardware platform and software system can also be integrated and debugged to verify the end-to-end business process. From power equipment collection, drone inspection, edge analysis, cloud processing, abnormal alarm and other links, the completeness of functions, correctness of interfaces, and performance satisfaction can be tested one by one. The system's fault tolerance and stability can be verified through fault injection, limit testing and other means.

[0245] It can also optimize the system's resource allocation and task scheduling, minimizing hardware overhead while meeting the functional requirements. Taking computer memory as an example, it can streamline unnecessary background programs and optimize cache and swap area settings; use technologies such as NUMA and CPU binding to reduce task migration overhead; and use zero copy, pipeline, data compression and other methods for critical paths (such as image acquisition and reasoning) to minimize latency and bandwidth usage.

[0246] Evaluate the overall performance and verify the effect of the system, and compare it with the industry baseline. Take turbine blade recognition as an example to test the detection accuracy and real-time performance of the drone under different environmental conditions (such as light, haze, and vibration). On the standard test set, analyze the system's missed detection rate, false detection rate, average detection time and other indicators. According to the application scenario, set performance optimization goals (such as recognition accuracy of more than 99% and results within 5 seconds), and continue to optimize and iterate.

[0247] Through the above steps, we can realize a set of UAV systems for hydropower intelligent inspection based on domestic software and hardware. Taking a large hydropower station as an example, 4 UAVs equipped with this system are deployed to carry out daily inspections of core assets such as 5 dams, 10 water diversion tunnels, and 20 generator sets with an area of ​​500 square kilometers. In terms of hardware, an airborne computing platform based on Feiteng CPU and Ascend NPU is used, which has the ability to process 50 billion operations per second, and cooperates with 2 million pixel visible light and 640x480 thermal infrared dual-spectrum cameras to meet the all-weather detection needs under working conditions. In terms of software, more than 20 open source software modules have been transplanted and adapted, and more than 10 industry-specific algorithms have been developed, covering key functions such as equipment identification, defect diagnosis, and 3D modeling. At the same time, the deep integration of software and hardware, storage and computing integration, and end-cloud collaboration have realized the integrated design of flight platform, payload platform, and analysis platform.

[0248] After the system was put into use, the manpower demand for hydropower station inspections was reduced by 80%, the inspection frequency increased by 5 times, and the average time to discover hidden dangers was shortened from 1 week to 1 day. The drone inspection data is connected with the energy management system and the equipment status maintenance system, and the intelligence level of the power station's pre-warning, in-process monitoring, and post-event tracing has been greatly improved. This system has set a benchmark for domestic substitution in the hydropower industry, escorted autonomous and controllable key infrastructure, and explored a path for the application of drones in a wider range of industrial scenarios. It is a typical case of the deep integration of robotics technology and industry knowledge.

[0249] Example 1: Use the HASS algorithm to perform sparsity search on the Huawei Ascend 310 accelerator card. When the weight sparsity is 0.7 and the activation sparsity is 0.6, the inference performance can be improved by 2.5 times compared to directly deploying AlexNet.

[0250] Example 2: Transplant PLC control software based on the Loongson 3A5000 processor, using its 12 CPU cores to parallelly process I / O acquisition and logic operations to meet the real-time requirements of Gigabit Ethernet communication.

[0251] Example 3: Customize the Tornadovm virtual machine for the Feiteng FT-2000+ processor, and use a combination of Just-in-Time compilation and Ahead-of-Time compilation to make the performance of Java applications close to that of native programs.

[0252] In short, to apply chip-level autonomous controllable hardware to the integrated platform of hydropower stations, the coordinated optimization of software and hardware is crucial. Targeted design is carried out at multiple levels such as driver development, software transplantation, and sparse acceleration to improve the performance and efficiency of the overall system.

[0253] Reference Fig. 9The embodiment of the present disclosure also provides an adjustment system 10 for adapting a hydropower station integrated platform to multiple hardware, which adopts the following technical solutions:

[0254] The configuration module 11 is used to configure the underlying driver information according to the architecture and instruction set characteristics of the target domestic chip to obtain the first platform; the underlying driver information includes underlying key characteristic parameters, preset strategies, peripheral interface abstraction strategies, peripheral interface packaging strategies and device optimization strategies;

[0255] A migration module 12, used to migrate the industrial control software in the hydropower station integrated platform to the first platform according to a preset migration strategy and adaptation strategy;

[0256] The sparse collaborative optimization module 13 is used to configure a data flow accelerator in the first platform, perform sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and record the optimized first platform as the second platform;

[0257] The dynamic adjustment module 14 is used to build a chip-level autonomous and controllable hardware test environment in the second platform, perform comprehensive testing in the test environment, and dynamically adjust the software information in the second platform according to the test information.

[0258] The computer device according to the embodiment of the present disclosure includes a memory and a processor. The memory is used to store non-temporary computer-readable instructions. Specifically, the memory may include one or more computer program products, and the computer program product may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may, for example, include a random access memory (RAM) and / or a cache memory (cache), etc. The non-volatile memory may, for example, include a read-only memory (ROM), a hard disk, a flash memory, etc.

[0259] The processor may be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and may control other components in the computer device to perform desired functions. In one embodiment of the present disclosure, the processor is used to run the computer-readable instructions stored in the memory, so that the computer device executes all or part of the steps of the aforementioned adjustment method for adapting the hydropower station integrated platform to multiple hardware in each embodiment of the present disclosure.

[0260] Those skilled in the art should be able to understand that in order to solve the technical problem of how to obtain a good user experience, the present embodiment may also include well-known structures such as a communication bus and an interface, and these well-known structures should also be included in the protection scope of the present disclosure.

[0261] like Fig.10A schematic diagram of the structure of a computer device provided in an embodiment of the present disclosure is shown, which is a schematic diagram of the structure of a computer device suitable for implementing the embodiment of the present disclosure. Fig.10 The computer device shown is only an example and should not bring any limitation to the functions and scope of use of the embodiments of the present disclosure.

[0262] like Fig.10 As shown, the computer device may include a processor (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) or a program loaded from a storage device into a random access memory (RAM). In the RAM, various programs and data required for the operation of the computer device are also stored. The processor, ROM, and RAM are connected to each other via a bus. An input / output (I / O) interface is also connected to the bus.

[0263] Typically, the following devices can be connected to the I / O interface: input devices such as sensors or visual information acquisition devices; output devices such as display screens; storage devices such as tapes, hard disks, etc.; and communication devices. The communication device can allow the computer device to communicate with other devices (such as edge computing devices) wirelessly or by wire to exchange data. Fig.10 A computer device having various devices is shown, but it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed instead.

[0264] In particular, according to an embodiment of the present disclosure, the process described above with reference to the flowchart can be implemented as a computer software program. For example, an embodiment of the present disclosure includes a computer program product, which includes a computer program carried on a non-transitory computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through a communication device, or installed from a storage device, or installed from a ROM. When the computer program is executed by a processor, all or part of the steps of the adjustment method of adapting a hydropower station integrated platform to multiple hardware of an embodiment of the present disclosure are executed.

[0265] For detailed description of this embodiment, reference may be made to the corresponding descriptions in the aforementioned embodiments, which will not be repeated here.

[0266] According to the computer-readable storage medium of the embodiment of the present disclosure, non-transitory computer-readable instructions are stored thereon. When the non-transitory computer-readable instructions are executed by the processor, all or part of the steps of the adjustment method for adapting the hydropower station integrated platform to multiple hardware in the above-mentioned embodiments of the present disclosure are executed.

[0267] The above-mentioned computer-readable storage media include, but are not limited to: optical storage media (e.g., CD-ROM and DVD), magneto-optical storage media (e.g., MO), magnetic storage media (e.g., magnetic tape or mobile hard disk), media with built-in rewritable non-volatile memory (e.g., memory card) and media with built-in ROM (e.g., ROM box).

[0268] For detailed description of this embodiment, reference may be made to the corresponding descriptions in the aforementioned embodiments, which will not be repeated here.

[0269] The basic principles of the present disclosure are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present disclosure. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, and are not limitations. The above details do not limit the present disclosure to the necessity of adopting the above specific details to be implemented.

[0270] In the present disclosure, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. The block diagrams of the devices, devices, equipment, and systems involved in the present disclosure are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, devices, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.

[0271] Additionally, as used herein, "or" used in a list of items beginning with "at least one" means YY+242174P

[0272] The term "exemplary" does not mean that the described example is preferred or better than other examples.

[0273] It should also be noted that in the system and method of the present disclosure, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present disclosure.

[0274] Various changes, substitutions, and modifications of the techniques described herein may be made without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of the present disclosure is not limited to the specific aspects of the processes, machines, manufactures, compositions of events, means, methods, and actions described above. Currently existing or later to be developed processes, machines, manufactures, compositions of events, means, methods, or actions that perform substantially the same functions or achieve substantially the same results as the corresponding aspects described herein may be utilized. Thus, the appended claims include such processes, machines, manufactures, compositions of events, means, methods, or actions within their scope.

[0275] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Therefore, the present disclosure is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0276] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present disclosure to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims

1. A method for adjusting a hydropower station integrated platform to adapt to multiple hardware, characterized in that: include: According to the architecture and instruction set characteristics of the target domestic chip, configure the underlying driver information to obtain the first platform; The underlying driver information includes underlying key characteristic parameters, preset strategies, peripheral interface abstraction strategies, peripheral interface encapsulation strategies and device optimization strategies; Migrating the industrial control software in the hydropower station integration platform to the first platform according to the preset migration strategy and adaptation strategy; A data flow accelerator is configured in the first platform to perform sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and the optimized first platform is recorded as a second platform; A test environment for chip-level autonomous and controllable hardware is established in the second platform, comprehensive testing is performed in the test environment, and software information in the second platform is dynamically adjusted according to the test information.

2. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 1, characterized in that: The step of configuring the underlying driver information according to the architecture and instruction set characteristics of the target domestic chip to obtain the first platform includes: The underlying key characteristic parameters are configured based on the parameter information of the target domestic chip; the underlying key characteristic parameters include at least one of the number of cores, cache capacity, bus bandwidth, and dynamic operation parameters; Introducing the preset strategy in the driver; the prediction strategy includes a cache pre-fetch strategy, a locking strategy and a preset batch IO device interrupt processing strategy; Based on all serial communication interfaces of the target domestic chip, configure a unified device driver framework; Determine a common operation interface based on the unified driver framework of the device and peripheral interfaces with different functions; Optimizing the device driver of the target domestic chip by using an object-oriented programming paradigm to obtain a first driver; The first platform includes the underlying key feature parameters, the preset strategy, the device unified driver framework, the public operation interface and the first driver.

3. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 2, characterized in that: The method of optimizing the device driver of the target domestic chip by adopting the object-oriented programming paradigm to obtain the first driver includes: Creating an abstract device class based on several target devices of the target domestic chip, wherein the abstract device class includes the basic operation interface of all devices; Creating a subclass according to the target device, wherein the subclass inherits from the abstract device class; The subclass is controlled by the abstract device class to perform corresponding operations.

4. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 1, characterized in that: The step of migrating the industrial control software in the hydropower station integrated platform to the first platform according to a preset migration strategy and an adaptation strategy includes: Based on the module composition of the industrial control software and the calling relationship between different modules, identifying platform-related codes; the platform-related codes include assembly codes and inline assembly codes; Recompile the platform-related code based on the operating system of the target domestic chip; Introduce middleware and reconstruct platform-dependent modules; Based on the recompiled platform-related code and the reconstructed platform-dependent module, an intermediate platform is obtained; The hardware environment is simulated on the intermediate platform, and the industrial control software is encapsulated in the image of the virtual machine; the virtual machine communicates with the physical hardware through the virtual network card mechanism and the virtual serial port mechanism; A real-time enhancement strategy is introduced into the hypervisor of the virtual machine to obtain the first platform.

5. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 4, characterized in that: The real-time enhancement strategy includes one or more of a paravirtualization driver strategy, a direct I / O strategy, a CPU core binding strategy, a NUMA affinity scheduling strategy, and a statically compiled custom image strategy.

6. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 4, characterized in that: The operating system based on the target domestic chip, recompiling the platform-related code, includes: Obtaining instruction set and system call information of the operating system; The platform-related code is rewritten based on the instruction set, the system call information, the architecture specification of the instruction set, the data type length rule, and the byte alignment rule.

7. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 6, characterized in that: The introduction of middleware and reconstruction of platform-dependent modules include: Introducing the determined real-time middleware into the industrial control software; Reconstruct the key modules of the industrial control software based on the real-time middleware; the key modules include a task scheduling module and a process communication module; The control logic execution strategy is determined by the preset task scheduling mechanism and the preset task scheduling algorithm.

8. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 1, characterized in that: The configuring a data flow accelerator in the first platform, performing sparse collaborative optimization of CPU performance, accelerator performance, and storage performance, and recording the optimized first platform as the second platform, includes: Establishing a neural network model of sparsity and acceleration performance in the first platform; the neural network model includes the hardware architecture of the target accelerator, key parameters, and mathematical mapping relationships in the sparse computing mode, and the mathematical mapping relationships include the relationship between weight sparsity, activation sparsity, and actual acceleration ratio and energy efficiency ratio; Searching for a target sparse pattern based on a HASS algorithm, and optimizing the neural network model according to the target sparse pattern to obtain the neural network model that meets the conditions; Optimizing the storage process and calculation process of the neural network model that meets the conditions to obtain a first model; Based on the structured pruning strategy, the unstructured pruning strategy, and the activated sparse strategy, customized sparsity processing is performed on the first model to obtain a second model; Based on the data reuse characteristics and access mode of the second model, a multi-level heterogeneous storage structure is constructed to obtain a third model; the third model is configured with a direct memory access mechanism, and the heterogeneous storage structure includes accelerator storage information and CPU-side storage information; A fine-grained hybrid scheduling strategy is configured in the third model to obtain a fourth model; the hybrid scheduling strategy includes an instruction scheduling strategy of the accelerator, a scheduling strategy of the CPU, and a scheduling strategy of data storage; Performing data flow fusion processing on the fourth model to obtain a fifth model; the fifth model is configured with a graph optimization strategy, a dynamic adjustment strategy and a just-in-time compilation strategy; The second platform includes the fifth model.

9. The method for adjusting the hydropower station integrated platform to adapt to multiple hardware according to claim 8, characterized in that: The searching for the target sparse pattern based on the HASS algorithm and optimizing the neural network model according to the target sparse pattern to obtain the neural network model that meets the conditions includes: The pre-trained neural network model is used as the input of the HASS algorithm, the weight / activation sparsity is used as the search variable, the model accuracy and acceleration performance are used as the optimization goals, and the search space is constructed; During the search process, initial sub-models with different sparsities are generated through weight pruning and activation quantization techniques; the accuracy loss and acceleration potential of several initial sub-models are obtained based on the neural network model, the target sparsity pattern is screened out, and the initial sub-model corresponding to the target sparsity pattern is recorded as the first sub-model; Perform distillation learning on the first sub-model on the hardware of the target accelerator to obtain actual execution time and acceleration effect data; The neural network model is dynamically corrected based on the actual execution time and the acceleration effect data to obtain the neural network model that meets the conditions.

10. A method for constructing an intelligent platform, characterized in that: According to the adjustment method for adapting the hydropower station integrated platform to multiple hardwares according to any one of claims 1 to 9, the adjusted second platform is used as an intelligent platform for adapting the hydropower station integrated platform to multiple hardwares; The intelligent platform is equipped with an onboard computer system, an image acquisition system, an infrared thermal At least one of an imaging system, an inertial navigation system, a wireless communication system, a battery management system, a computer vision system, a machine learning system, a target detection system, a three-dimensional reconstruction system, and an interactive system.

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