Request processing method and device, equipment, storage medium and program product
By dynamically adjusting the QoS parameters of the memory and the shunt processing of processing requests in the communication chip system, the processing request failure problem caused by the competition for bandwidth resources of multiple processing modules is solved, and the processing efficiency and service quality of the memory are improved.
Patent Information
- Application Number
- CN202411903353.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-04-15
AI Technical Summary
In a communication chip system, when multiple processing modules compete for limited bandwidth resources, the memory may not be able to process processing requests normally, reducing processing efficiency.
By determining the pending processing request of the first object and its resource occupancy to the memory, dynamically adjusting the quality of service (QoS) parameters, controlling the memory to process the request according to the processing type and QoS parameter, and implementing request shunt processing for different processing types and QoS parameters.
The memory process efficiency of processing requests is improved, the memory can avoid congestion in processing requests is avoided, and the memory can provide service quality for each processing request.
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Figure CN119829246A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of computer technology, and in particular to a request processing method, apparatus, device, storage medium, and program product. Background Art
[0002] The communication chip system may include a processing module and a memory. The processing module may send a processing request to the memory. The processing request may include data transmitted by the processing module to the memory.
[0003] In related technologies, to save resources, multiple processing modules can share a bus to access memory. If bandwidth resources are limited, and multiple processing modules simultaneously send multiple processing requests to a memory via the bus, the multiple processing modules will compete for the bus bandwidth resources.
[0004] During the competition process, the bus may fail to process all processing requests of these processing modules, so that these processing modules cannot normally access the memory, resulting in low processing efficiency of the memory for each processing request. Summary of the Invention
[0005] Embodiments of the present application provide a request processing method, apparatus, device, storage medium, and program product for improving the processing efficiency of a memory for a first processing request while ensuring the service quality of the memory for a first object.
[0006] In a first aspect, an embodiment of the present application provides a request processing method, the method comprising:
[0007] Determining a first processing request to be processed by a first object;
[0008] Determine a maximum amount of memory resources allocated to the first object in a current time period and a current amount of memory resources occupied by the first object in the current time period;
[0009] Determining a quality of service (QoS) parameter of the first object according to the current resource occupancy and the maximum resource amount;
[0010] Determine a processing type corresponding to the first processing request, and control the memory to process the first processing request according to the QoS parameter and the processing type, where the processing type is a read type or a write type.
[0011] In one possible implementation, determining a first processing request to be processed by a first object includes:
[0012] determining a number of second processing requests to be sent by the first object to the memory;
[0013] In response to the number of the second processing request being one, determining the second processing request as the first processing request;
[0014] In response to the number of the second processing requests being plural, a second processing request with the highest priority is determined among the plurality of second processing requests, and the second processing request with the highest priority is determined as the first processing request.
[0015] In a possible implementation, the first object includes multiple processing components; determining a second processing request with the highest priority among the multiple second processing requests includes:
[0016] Determining a first processing component corresponding to each second processing request from the plurality of processing components to obtain a plurality of first processing components;
[0017] In response to the plurality of first processing components having the same priority, determining a second processing component among the plurality of first processing components, the second processing component being a least recently used first processing component among the plurality of first processing components;
[0018] The second processing request corresponding to the second processing component is determined as the second processing request with the highest priority.
[0019] In one possible implementation, the method further includes:
[0020] In response to different priorities of the plurality of first processing components, dividing the plurality of first processing components into a plurality of component sets, wherein the first processing components in each component set have the same priority;
[0021] Determining a component set with the highest priority among the multiple component sets;
[0022] The second processing request with the highest priority is determined according to the second processing request corresponding to each first processing component in the component set with the highest priority.
[0023] In a possible implementation, determining a quality of service (QoS) parameter of the first object according to the current resource occupancy and the maximum resource amount includes:
[0024] In response to the current resource occupancy being less than the maximum resource amount, determining the QoS parameter to be a first value;
[0025] In response to the current resource occupancy being greater than or equal to the maximum resource amount, the number of second objects requiring access to the memory is determined, and the QoS parameter is determined based on the number of the second objects.
[0026] In a possible implementation, determining the QoS parameter according to the number of the second objects includes:
[0027] In response to the number of the second objects being 0, determining the QoS parameter to be the first value;
[0028] In response to the number of the second objects being greater than or equal to one, determining the QoS parameter to be a second value;
[0029] The first value is greater than the second value.
[0030] In a possible implementation, determining a quality of service (QoS) parameter of the first object according to the current resource occupancy and the maximum resource amount includes:
[0031] determining a first amount of resources required by the memory to process the first processing request;
[0032] Determining a second resource amount according to the first resource amount and the current resource occupancy amount;
[0033] The QoS parameter is determined according to the second resource amount and the maximum resource amount.
[0034] In a possible implementation, controlling the memory to process the first processing request according to the QoS parameter and the processing type includes:
[0035] Determining a total number M of processing commands corresponding to the first processing request;
[0036] In response to the QoS parameter being a first value, sending the first processing request to the memory based on the processing type, so that the memory processes the first processing request, where the first processing request includes M processing commands;
[0037] In response to the QoS parameter being a second value, determining a maximum number N of transmissions corresponding to the processing type, and based on the processing type and N, sending at least one third processing request to the memory so that the memory processes the first processing request, the third processing request including N processing commands, and a sum of the processing commands included in the at least one third processing request being M;
[0038] Wherein, M and N are positive integers, and the first value is greater than the second value.
[0039] In a second aspect, an embodiment of the present application provides a request processing device, including:
[0040] A determination module, configured to determine a first processing request to be processed by a first object;
[0041] The determining module is further configured to determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period;
[0042] The determining module is further configured to determine a quality of service (QoS) parameter of the first object based on the current resource occupancy and the maximum resource amount;
[0043] The determining module is further configured to determine a processing type corresponding to the first processing request;
[0044] A control module is used to control the memory to process the first processing request according to the QoS parameter and the processing type, where the processing type is a read type or a write type.
[0045] In a possible implementation, the determining module is specifically configured to:
[0046] determining a number of second processing requests to be sent by the first object to the memory;
[0047] In response to the number of the second processing request being one, determining the second processing request as the first processing request;
[0048] In response to the number of the second processing requests being plural, a second processing request with the highest priority is determined among the plurality of second processing requests, and the second processing request with the highest priority is determined as the first processing request.
[0049] In a possible implementation, the first object includes multiple processing components; and the determining module is further configured to:
[0050] Determining a first processing component corresponding to each second processing request from the plurality of processing components to obtain a plurality of first processing components;
[0051] In response to the plurality of first processing components having the same priority, determining a second processing component among the plurality of first processing components, the second processing component being a least recently used first processing component among the plurality of first processing components;
[0052] The second processing request corresponding to the second processing component is determined as the second processing request with the highest priority.
[0053] In a possible implementation, the determining module is further configured to:
[0054] In response to different priorities of the plurality of first processing components, dividing the plurality of first processing components into a plurality of component sets, wherein the first processing components in each component set have the same priority;
[0055] Determining a component set with the highest priority among the multiple component sets;
[0056] The second processing request with the highest priority is determined according to the second processing request corresponding to each first processing component in the component set with the highest priority.
[0057] In a possible implementation, the determining module is further configured to:
[0058] In response to the current resource occupancy being less than the maximum resource amount, determining the QoS parameter to be a first value;
[0059] In response to the current resource occupancy being greater than or equal to the maximum resource amount, the number of second objects requiring access to the memory is determined, and the QoS parameter is determined based on the number of the second objects.
[0060] In a possible implementation, the determining module is further configured to:
[0061] In response to the number of the second objects being 0, determining the QoS parameter to be the first value;
[0062] In response to the number of the second objects being greater than or equal to one, determining the QoS parameter to be a second value;
[0063] The first value is greater than the second value.
[0064] In a possible implementation, the determining module is further configured to:
[0065] determining a first amount of resources required by the memory to process the first processing request;
[0066] Determining a second resource amount according to the first resource amount and the current resource occupancy amount;
[0067] The QoS parameter is determined according to the second resource amount and the maximum resource amount.
[0068] In a possible implementation, the control module is specifically configured to:
[0069] Determining a total number M of processing commands corresponding to the first processing request;
[0070] In response to the QoS parameter being a first value, sending the first processing request to the memory based on the processing type, so that the memory processes the first processing request, where the first processing request includes M processing commands;
[0071] In response to the QoS parameter being a second value, determining a maximum number N of transmissions corresponding to the processing type, and based on the processing type and N, sending at least one third processing request to the memory so that the memory processes the first processing request, the third processing request including N processing commands, and a sum of the processing commands included in the at least one third processing request being M;
[0072] Wherein, M and N are positive integers, and the first value is greater than the second value.
[0073] In a third aspect, an embodiment of the present application provides a chip having a computer program stored thereon, wherein when the computer program is executed by the chip, the method as described in any one of the first aspects is implemented.
[0074] In a fourth aspect, an embodiment of the present application provides a chip module, on which a computer program is stored. When the computer program is executed by the chip module, the method as described in any one of the first aspects is implemented.
[0075] In a fifth aspect, an embodiment of the present application provides a request processing device, including:
[0076] at least one processor; and
[0077] a memory communicatively connected to the at least one processor; wherein,
[0078] The memory stores instructions to be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform any one of the methods described in the first aspect.
[0079] In a sixth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, which are used to implement the method described in any one of the first aspects when the computer-executable instructions are executed by a processor.
[0080] In a seventh aspect, an embodiment of the present application provides a computer program product, comprising a computer program, which implements any one of the methods in the first aspect when executed by a processor.
[0081] The request processing method, apparatus, device, storage medium and program product provided by the embodiments of the present application can determine the first processing request to be processed by the first object, and determine the maximum resource amount of the memory allocated to the first object in the current time period, and the current resource occupancy of the memory by the first object in the current time period, and then determine the QoS parameters of the first object based on the current resource occupancy and the maximum resource occupancy; the method can also determine the processing type corresponding to the first processing request, and control the memory to process the first processing request based on the QoS parameters and the processing type. In this process, the QoS parameters of the first object are dynamically adjusted based on the current resource occupancy and the maximum resource amount of the first object in the current time period, which is conducive to ensuring the service quality of the memory for the first object and improving the processing efficiency of the memory for the first processing request; by controlling the memory to process the first processing request according to the processing type and QoS parameters, it is possible to achieve diversion processing of processing requests of different processing types and / or different QoS parameters to avoid congestion of each processing request, which is conducive to improving the processing efficiency of each processing request. BRIEF DESCRIPTION OF THE DRAWINGS
[0082] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0083] Figure 1 A schematic diagram of the structure of a data transmission system provided in an embodiment of the present application;
[0084] Figure 2 One of the flowcharts of the request processing method provided in the embodiment of the present application;
[0085] Figure 3 The second flowchart of the request processing method provided in the embodiment of the present application;
[0086] Figure 4 A schematic diagram of an arbitration mechanism provided in an embodiment of the present application;
[0087] Figure 5 Flowchart 3 of the request processing method provided in the embodiment of the present application;
[0088] Figure 6 Flowchart 4 of the request processing method provided in the embodiment of the present application;
[0089] Figure 7 Flowchart 5 of the request processing method provided in the embodiment of the present application;
[0090] Figure 8 A schematic diagram of the structure of a request processing device provided in an embodiment of the present application;
[0091] Figure 9 A schematic diagram of the structure of the request processing device provided in an embodiment of the present application.
[0092] The above drawings illustrate specific embodiments of the present application, which will be described in more detail below. These drawings and the textual description are not intended to limit the scope of the present application in any way, but rather to illustrate the concepts of the present application to those skilled in the art by reference to specific embodiments. DETAILED DESCRIPTION
[0093] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
[0094] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the technical solution of this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards, and corresponding operation entrances are provided for users to choose to authorize or refuse
[0095] It should be noted that in the embodiments of the present application, certain software, components, models and other existing solutions in the industry may be mentioned, and they should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present application, but it does not mean that the applicant has or will necessarily use the solution. In the technical solution of the present application, the term "include" and its variations may refer to non-restrictive inclusion; the term "or" and its variations may refer to "and / or". "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship.
[0096] In the technical solutions of this application, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. In this application, the term "at least one" means one or more, and "a plurality" means two or more.
[0097] In the technical solutions of the present application, words such as "in some embodiments", "in some examples", "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described in the present application as "in some embodiments", "in some examples", "exemplary" or "for example" should not be interpreted as being more preferred or more advantageous than other embodiments or design. Specifically, the use of words such as "in some embodiments", "in some examples", "exemplary" or "for example" is intended to present related concepts in a concrete way. In the present application, words such as "under the circumstances" or "when" indicate a condition.
[0098] First, the terms involved in the embodiments of the present application are explained.
[0099] Quality of Service (QoS) bus: A technology used in network and communication systems to provide different levels of service quality assurance during data transmission. The QoS bus can be used to manage traffic on the network and allocate bandwidth and priority to different types of data streams to ensure that high-priority data is better processed and transmitted, and to guarantee the transmission quality and stability of high-priority data. The QoS bus can be implemented based on various algorithms and mechanisms. For example, it can be implemented through mechanisms such as flow control, congestion control, and priority queues.
[0100] Low-Density Parity-Check Code (LDPC): A linear error-correcting code used for error detection and correction.
[0101] Base address and offset address: Assuming that a transport block (TB) can include N code blocks (CBs), the base address can be used to indicate the address of the first CB in the TB, and the offset address can be used to indicate the offset of the remaining N-1 CBs relative to the first CB, where N is a positive integer greater than 1.
[0102] In order to facilitate understanding of the request processing method provided in the embodiment of the present application, Figure 1 The architecture of the data transmission system provided in the embodiment of the present application is described. The data transmission system provided in the embodiment of the present application may include multiple processing modules, a memory, and a bus. The multiple processing modules may include at least one request sending module and a request processing module. The request processing module is configured to receive a processing request sent by the request sending module and control the memory to process the processing request via the bus.
[0103] It should be noted that in Figure 1In the embodiment, a data transmission system including a bit rand process (BRP) module, an other module, a request processing module, a bus group and a memory is used as an example for description. In some other embodiments, the data transmission system may include Figure 1 The embodiments show more or less content, the number of processing modules and memories in the data transmission system can be any number, the processing module can be any module with data transmission requirements, and the memory can be other types of memory, for example, the memory can be a double data rate synchronous dynamic random access memory (Double Data Rate, DDR).
[0104] Figure 1 This is a structural diagram of a data transmission system provided in an embodiment of the present application. Figure 1 The data transmission system may include a request sending module, a request processing module, a bus, and a memory. The request sending module may include a BRP module and other modules, which may be BRP modules or non-BRP modules. The memory may be a DDR. The request processing module may be configured to connect the request sending module and the bus, respectively. The request processing module may also be connected to the DDR via the bus.
[0105] Exemplarily, the bus may be an Advanced eXtensible Interface (AXI) bus.
[0106] The BRP module can send a processing request to the DDR based on the Hybrid Automatic Repeat reQuest (HARQ) technology. The processing request can be used for the BRP module to write data to the DDR or for the BRP module to read data from the DDR.
[0107] The BRP module may include: a first read component (HARQ_SFT_RD), a second read component (HARQ_RD), a merging component (HARQ_COMB), a matching component (DE-RM), a check component (LDPC_DEC), a first output component (HARQ_WB), a second output component (HBITS_OUT), a third output component (DLMAC_OUT) and an arbiter (ITI_ARBITER).
[0108] The BRP module can receive newly received TBs via a first read component, each TB including at least one CB. In response to a CB being newly received data, the first read component can transmit the CB to a merge component, which can then transmit the CB to a matching component. The matching component can be configured to decode the CB to obtain hard bits, and then transmit the hard bits to a check component. The check component can be configured to perform a cyclic redundancy check (CRC) calculation on the obtained hard bits to obtain a checksum (CBCRC) of the CB and determine whether the CBCRC is correct. If the CBCRC is correct, the check component can transmit the CB to an arbiter via a second output component or a third output component, so that the CB is transmitted to an address space specified by the data transmission system via the arbiter and a bus.
[0109] The data transmission system may further include a buffer module and an access control module. For example, the buffer module may be a Media Access Control Buffer (MAC_BUF) module, and the access control module may be a Data Link Layer Access Control (DLMAC_ACC) module.
[0110] The hard bits of the common channel can be output to the arbiter through the second output component and transmitted to the DDR through the arbiter and the bus. When the data link layer (DLMAC) is not enabled (bypass), the hard bits of the unicast channel can be transmitted to the arbiter through the second output component; when the DLMAC is enabled, the hard bits of the unicast channel can be transmitted to the arbiter through the third output component and output to the DDR or MAC_BUF module through the arbiter and the bus. In this process, the size of the circular buffer can be set according to the user's business processing and debugging requirements, and the hard bit storage process of each TB can be configured by software. In this software configuration method, the base address of the second and third output components when accessing the DDR is not configured by static registers, but is stored in the dynamic configuration information of each TB.
[0111] In response to the CB being newly received data and the CBCRC being correct, the third output component can output the CB to the MAC_BUF through the arbiter and the bus. After all the data of a TB is stored in the MAC_BUF, if the CBCRC corresponding to each CB in the TB is correct and the cyclic redundancy check of the TB is correct, the data transmission system can notify the DLMAC_ACC module to read the TB from the MAC_BUF. If there is a CBCRC error corresponding to at least one CB in the TB or a cyclic redundancy check error in the TB, the data transmission system can control the transfer of all the data of the TB stored in the MAC_BUF to the DDR to release the storage space occupied by the TB in the MAC_BUF. In this process, memory space can be allocated in advance for a data processing link in the MAC_BUF. When the data processing link completes the data transmission, if there is still remaining memory space in the MAC_BUF, each data processing link can directly access the MAC_BUF and update the data transmitted by the data processing link to the MAC_BUF, thereby reducing the number of times the data processing link accesses the DDR, saving the bandwidth of the DDR, and improving the data transmission speed.
[0112] The data transmission system may also include a CB buffer. In response to the CB being retransmitted data, the second read component may obtain the latest data of the CB currently being processed by the first read component through the CB buffer, and send a read processing request to the arbitrator to read the historical data of the currently processed CB from the DDR through the arbitrator and the bus. The second read component may also send the historical data to the merging component, and the merging component may merge the historical data of the CB with the latest data, and process the CB in sequence through the matching component and the verification component to obtain the CBCRC of the CB. When the CBCRC is correct, the third output component may be used to transmit the merged data of the CB to the corresponding position of the CB in the DDR until all data transmission of the TB corresponding to the CB is completed, the CBCRC corresponding to each CB in the TB is correct, and the cyclic redundancy check of the TB is correct. The data transmission system may read the TB from the DDR through the DLMAC_ACC module.
[0113] In some embodiments, the bandwidth of the second read component and the first output component when accessing the DDR can be controlled based on configuration information. The first output component can be used to write data to the DDR, and the second read component can be used to read data from the DDR. The base address of the DDR accessed by the first output component and the second read component can be configured through registers, and the offset address of the DDR accessed by the first output component and the second read component can be determined based on the harq identifier (harq_id) and CB index (cb_index) accessed by the first output component and the second read component.
[0114] In some embodiments, a bandwidth allocation mechanism can be used to allocate idle bandwidth from output channels to input channels receiving data packets. This can satisfy the required bandwidth of the input channels, prevent data packet retransmissions, and improve data transmission efficiency. For example, when the second read component is idle, the idle bandwidth of the second read component can be allocated to the first output component to improve the first output component's data transmission efficiency.
[0115] The second read component can be used to send a read processing request to the arbitrator when it is determined that the CB currently being processed is retransmitted data, so as to read the historical data of the CB currently being processed from the DDR. Before executing the read task of the second read component, the second read component can read the CB buffer position corresponding to the CB to determine whether the CB is stored in the DDR, so as to avoid being restricted when the second read component reads the historical data of the CB from the DDR. If it is determined that the CB is stored in the DDR, the second read component can use the read head pointer as the address of the DDR, adopt the information transfer interface (ITI) structure to read the historical data of the CB from the DDR, and write the read data into a first-in-first-out (FIFO) queue. When the data written in the FIFO queue exceeds one page, the page data is read out.
[0116] In some embodiments, the software feature of outputting a CB can be configured via software. If the software has been configured to output the soft bits of a CB, the first output component can be configured to receive the merged data of the CB transmitted by the merge component and compress the merged data and write it to the DDR. Before executing the first output component's write task, the first output component can read the CB buffer corresponding to the CB to determine whether the CB is stored in the DDR, thereby avoiding restrictions on the first output component's ability to write the merged data of the CB to the DDR. When the page length in the FIFO queue is updated or if the software has been configured to output the soft bits of the CB, the first output component can be configured to write the soft bits of the CB to the DDR. The first output component can calculate the address to be written to the DDR by the page based on the configuration information and the base address of the CB. The DDR can reserve sufficient storage space for each CB to ensure that each CB can be stored in the DDR. If the CB was previously stored in the DDR as hard bits, the first output component can store all newly received soft bits of the CB in the DDR. If the CB was previously stored in the DDR as hard bits and the codebook has not changed, the first output component can write the remaining unwritten data of the CB to the DDR. After the writing task of the first output component is completed, the first transmission component can update the CB buffer.
[0117] To conserve resources, the BRP module can access the DDR via a set of ITI buses. However, the second read component, first output component, second output component, and third output component in the BRP module all need to access the DDR via these buses. To avoid conflicts among the processing components in the BRP module when accessing the DDR, an embodiment of the present application adds an arbiter to the BRP module. The arbiter can be used to receive read processing requests sent by the second read component, or receive write processing requests sent by the first output component, second output component, and third output component; and arbitrate multiple processing requests sent by multiple processing components in the BRP module to determine the processing priority of each of the multiple processing requests, and then send the multiple processing requests to the DDR via the bus in sequence based on the processing priority of each processing request.
[0118] In some embodiments, to conserve resources, the BRP module can share a set of ITI buses with other modules to access the DDR. If bandwidth resources are limited, and the BRP module and other modules simultaneously require access to the DDR, they will compete for bandwidth resources. This competition may cause the bus to fail to process requests from the BRP module or other modules, resulting in the BRP module or other modules being unable to access the DDR and inefficiently processing requests from the DDR.
[0119] To solve the above problems, an embodiment of the present application adds a request processing module to the data transmission system. The request processing module can be used to execute the request processing method provided by the embodiment of the present application. The method can determine the first processing request to be processed by the first object, and dynamically adjust the QoS parameters of the first object through the current resource occupancy and maximum resource amount of the first object in the current time period to ensure the service quality of the memory to the first object based on the bus, and improve the processing efficiency of the memory for the first processing request; the method can also determine the processing type corresponding to the first processing request, and control the memory to process the first processing request according to the processing type and QoS parameters to realize the diversion processing of processing requests of different processing types and / or different QoS parameters to avoid congestion of each processing request, which is conducive to improving the processing efficiency of each processing request.
[0120] It should be noted that the data transmission system provided in the embodiment of the present application can be applied to a communication chip system, for example, the communication chip system can be a cellular communication chip system. It is understandable that in a communication chip system, different modules (for example, a BRP module, other modules and a DDR) can transmit data to each other. Under the condition of limited bandwidth resources, in order to ensure the data transmission efficiency between each module, the request processing method provided in the embodiment of the present application can be used to coordinate the processing requests of different modules, so as to improve the processing efficiency of the processing requests of each module as much as possible on the basis of ensuring the service quality of each module, thereby improving the data transmission efficiency of each module. For example, the request processing method provided in the embodiment of the present application can reduce the bandwidth waste in the process of the BRP module accessing the DDR in the communication chip system, reduce resource consumption, speed up the bit processing rate, and improve the working performance of the communication chip system.
[0121] The method of the present application is described below through specific embodiments. It should be noted that the following embodiments can exist independently or in combination with each other, and the same or similar contents will not be repeated in different embodiments.
[0122] Figure 2 This is one of the flowcharts of the request processing method provided in the embodiment of the present application. The execution subject of the embodiment of the present application can be a request processing device, or a chip, chip module or request processing device set in the request processing device, etc. The request processing device can be implemented by software or by a combination of software and hardware. The request processing device may include Figure 1 All or part of the content in the data transmission system in the embodiment, for example, the request processing device may include a request processing module in the data transmission system; or, the request processing device may also include a request processing module, a BRP module and other modules; or, the request processing device may also include a request processing module, a BRP module, other modules, a bus; or, the request processing device may also include a request processing module, a BRP module, other modules, a bus and a DDR.
[0123] See Figure 2 , the request processing method may specifically include the following steps:
[0124] S201: Determine a first processing request to be processed by a first object.
[0125] The first object may be any request sending module in the data transmission system.
[0126] The first object may be used to perform bit-level data processing. For example, the first object may be a BRP module.
[0127] The first processing request may be a read data request or a write data request. For example, the first processing request may be a read data request sent by the second read component in the BRP module through the arbitrator; the first processing request may also be a write data request sent by any one of the first output component, the second output component, and the third output component in the BRP module through the arbitrator.
[0128] The first processing request may include data to be transmitted, for example, the data to be transmitted may be one TB. The first processing request may also include an object identifier of the first object and an identifier of the data to be transmitted of the first object.
[0129] In some embodiments, the first processing request can also be determined in the following manner: determine the number of second processing requests to be sent by the first object to the memory; in response to the number of second processing requests being 1, determine the second processing request as the first processing request; in response to the number of second processing requests being multiple, determine the second processing request with the highest priority among the multiple second processing requests, and determine the second processing request with the highest priority as the first processing request.
[0130] Assuming that the first object is a BRP module, the BRP module may include multiple processing components that have access requirements to the memory. For example, these multiple processing components may include Figure 1 The second read component, the first output component, the second output component, the third output component, and the arbiter are included in the memory. At least one processing component among the second read component, the first output component, the second output component, and the third output component can send a second processing request to the memory via the arbiter, so that the number of second processing requests to be sent by the first object to the memory at the same time can be one or more. It is understood that when the number of second processing requests is one, the arbiter does not need to perform arbitration processing; when the number of second processing requests is multiple, the arbiter needs to perform arbitration processing to ensure that the second processing request with the highest priority is sent first.
[0131] It should be noted that the detailed description of determining the second processing request with the highest priority among multiple second processing requests will be Figure 3 The details are described in the examples.
[0132] S202: Determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period.
[0133] The maximum resource amount may include the bandwidth resource amount and / or storage capacity of the memory; the current resource occupancy may include the bandwidth resource amount of the memory occupied by the first object in the current time period, and / or the storage capacity of the memory occupied by the first object in the current time period.
[0134] Each object can access the memory via a bus, and the bandwidth resource amount of the memory can be used to indicate the bandwidth resource amount of the bus. Exemplarily, the bus can be an AXI bus.
[0135] It is understood that in a communication chip system, the amount of memory data that each object (or "request sending module") is allowed to access and write within a certain time period is limited. The request processing device can allocate a maximum amount of memory resources to each object based on the time period and the amount of data to be processed by each object, to ensure that each object can normally access the memory within each time period.
[0136] Users can configure the length of the time period according to business needs. For example, the time period can be 1 minute. In different time periods, the maximum amount of memory resources allocated by the user to the same object can be different. For example, assuming the amount of memory resources is N, the maximum amount of memory resources allocated to the first object in the first time period and the second time period are 0.6N and 0.4N respectively.
[0137] In some embodiments, the request processing device may be provided with a management tool that can be used to record time period information, as well as the maximum resource usage and current resource usage of each object in each time period. The request processing device can invoke the management tool using a query command based on the object identifier of the first object to query the maximum resource usage and current resource usage of the first object in the current time period.
[0138] S203: Determine a quality of service (QoS) parameter of the first object according to the current resource occupancy and the maximum resource amount.
[0139] The first object can access the memory through the bus. When designing the bus, at least one object connected to the bus can be determined, and the bandwidth resources of the bus can be guaranteed to meet the scenario of the at least one object concurrently accessing the bus. During the resource control process of the bus, the following situations may exist: (1) High-priority objects may occupy the bandwidth resources of the bus for a long time, resulting in other objects being unable to obtain sufficient bandwidth resources, thereby causing other objects to have a longer access delay. (2) Due to the complexity of the bus architecture or the different data buffering methods of each object on the transmission path, the data transmission process of some high-priority objects may be blocked by the sequential transmission of low-priority objects, resulting in a longer access delay for high-priority objects.
[0140] In order to solve the above problems, the request processing method provided in the embodiment of the present application can use the QoS bus to access the memory, and introduce the dynamic control mechanism of the QoS bus in the process of memory resource control to ensure that each object can continuously and stably obtain the required bandwidth resources in the QoS bus, so that each object can access the memory (for example, DDR) normally and efficiently through the bandwidth resources, avoiding the situation where the memory response delay is too large and affects the user experience.
[0141] It should be noted that the "QoS bus" in the embodiment of the present application is the integration of QoS bus technology into the AXI bus. The dynamic control mechanism of the QoS bus means that when at least one object simultaneously initiates various processing requests to the AXI bus, the priority of each object's access to the memory can be determined by the QoS parameters, and then the bandwidth resources occupied by each object on the AXI bus can be dynamically adjusted according to the priority corresponding to each object, so as to balance the access requirements of the at least one object to the AXI bus. By introducing the dynamic control mechanism of the QoS bus in the request processing process, it is beneficial to ensure that the request processing device processes various processing requests sent by at least one object in an orderly manner, and ensures that the processing requests are transmitted efficiently and orderly.
[0142] The QoS parameter may be used to indicate the priority of the first object's access to the memory, and the QoS parameter may be used to reflect the quality of service of the bus (or memory) to the first object.
[0143] When the parameter value of the QoS parameter is larger, it means that the priority of the first object to access the memory is higher, and the bus (or memory) can provide a higher quality of service for the first object; when the parameter value of the QoS parameter is smaller, it means that the priority of the first object to access the memory is lower, and the quality of service that the bus (or memory) can provide to the first object is reduced.
[0144] The request processing device can constrain the first object's access to the DDR by allocating a maximum amount of resources to the first object (e.g., a BRP module). It is understandable that when the current resource occupancy of the first object is greater than or equal to the maximum amount of resources, the first object has already transferred most of the data to the memory. At this time, a smaller parameter value can be set for the QoS parameter of the first object, so that the priority of the first object accessing the memory is lower than the priority of other modules accessing the DDR, thereby avoiding the phenomenon of congestion caused by the first object blocking other modules from accessing the DDR and ensuring the quality of service of other modules when accessing the memory. When the current resource occupancy of the first object is less than the maximum amount of resources, a larger parameter value can be set for the QoS parameter of the first object, so that the priority of the first object accessing the memory is higher than the priority of other modules accessing the DDR, thereby ensuring that the first object has priority access to the memory.
[0145] S204: Determine a processing type corresponding to the first processing request, and control the memory to process the first processing request according to the QoS parameter and the processing type.
[0146] The processing type may be a read type or a write type, wherein the read type may be used to indicate reading data from a memory; the write type may be used to indicate writing data into a memory.
[0147] In some embodiments, the total number M of processing commands corresponding to the first processing request may also be determined, where M is a positive integer; and the memory may be controlled to process the first processing request based on the total number M, QoS parameters, and processing type.
[0148] Each object is provided with an ITI interface, through which each object can access the AXI bus. A QoS parameter can be introduced into the AXI bus signal output by the first object (e.g., a BRP module), and the AXI bus signal can be dynamically adjusted based on the parameter value of the QoS parameter.
[0149] Signals on the AXI bus include Adaptive Write Quality of Service (AWQOS) and Adaptive Read Quality of Service (ARQOS). The AWQOS signal reflects the priority of write operations, while the ARQOS signal reflects the priority of read operations. AXI bus signals can be dynamically controlled based on QoS parameters, the total number N, and the transaction type.
[0150] It should be noted that the detailed process of controlling the memory to process the first processing request will be described in Figure 7 The details are described in the examples.
[0151] The request processing method provided in the embodiment of the present application can determine the first processing request to be processed by the first object, and dynamically adjust the QoS parameters of the first object through the current resource occupancy and maximum resource amount of the first object in the current time period to ensure the service quality of the memory to the first object based on the bus, and improve the processing efficiency of the memory for the first processing request; the method can also determine the processing type corresponding to the first processing request, and control the memory to process the first processing request according to the processing type and QoS parameters to realize the diversion processing of processing requests of different processing types and / or different QoS parameters to avoid congestion of each processing request, which is conducive to improving the processing efficiency of each processing request.
[0152] The above embodiment relates to the process of determining the second processing request with the highest priority among multiple second processing requests. Figure 3 , which explains the process in detail.
[0153] Figure 3 The second flowchart of the request processing method provided in the embodiment of the present application is as follows: Figure 3 As shown, the embodiment of the present application is Figure 2 Based on the embodiment, the request processing method is described in detail. The method may specifically include the following steps:
[0154] S301: Determine a first processing component corresponding to each second processing request among multiple processing components to obtain multiple first processing components.
[0155] The first object may include multiple processing components. For example, the first object is a BRP module, and the multiple processing components may include Figure 1 The second reading component, the first output component, the second output component and the third output component are shown.
[0156] The second processing request may be a read data request or a write data request. If the second processing request is a read data request, the first processing component may be a second read component; if the second processing request is a write data request, the first processing component may be any one of the following processing components: a first output component, a second output component, and a third output component.
[0157] S302: In response to the plurality of first processing components having the same priority, determine a second processing component from the plurality of first processing components.
[0158] The second processing component may be a least recently used first processing component among the plurality of first processing components.
[0159] In some embodiments, the arbitrator may determine the second processing component from among the plurality of first processing components based on a Least Recently Granted (LRD) algorithm.
[0160] S303: Determine the second processing request corresponding to the second processing component as the second processing request with the highest priority.
[0161] By giving priority to the second processing request of the second processing component, the arbitrator can avoid the second processing request of the second processing component being unable to be processed for a long time, resulting in a long request delay of the second processing component and affecting user experience.
[0162] S304: In response to different priorities of the multiple first processing components, divide the multiple first processing components into multiple component sets.
[0163] The first processing components in each component set have the same priority, and each component set may include at least one first processing component.
[0164] S305: Determine a component set with the highest priority among multiple component sets.
[0165] In some embodiments, the first object may be provided with an arbitrator. The arbitrator of the first object may divide the multiple processing components in the first object into multiple component sets based on their processing requirements, and configure a priority for each component set to obtain configuration information. The request processing device may obtain the priority corresponding to each component set based on the configuration information and determine the component set with the highest priority.
[0166] For example, in the BRP module, the arbitrator can be set with two component sets, wherein component set 1 includes the second read component; component set 2 includes the first output component, the second output component and the third output component, wherein the priority of component set 1 is higher than the priority of component set 2.
[0167] S306: Determine the second processing request with the highest priority according to the second processing request corresponding to each first processing component in the component set with the highest priority.
[0168] In some embodiments, if the component set with the highest priority includes a first processing component, the second processing request corresponding to the first processing component is determined as the second processing request with the highest priority; if the component set with the highest priority includes multiple first processing components, and these multiple first processing components have the same priority, the second processing request with the highest priority can be determined by referring to steps S302 and S303.
[0169] Figure 4 This is a schematic diagram of an arbitration mechanism provided in an embodiment of the present application. Figure 4 The first object includes two component sets, wherein component set 1 includes processing component M0, and component set 2 includes processing components M1 to M3.
[0170] In process A, M2 in component set 2 wins the arbitration, and the arbitrator will give priority to M2's processing request. M1 and M3 in component set 2 are still waiting for processing by the arbitrator. The priority of M1 and M3 is determined according to the LRD algorithm. Among them, M1 is the least recently used processing component, so M1's priority is higher than M3's priority.
[0171] Under process B, after processing the processing request of M2 is completed, the arbitrator may set the priority of M2 to the lowest priority and determine M1 with the highest priority as the next processing component to be processed.
[0172] Under process C, the arbitrator receives the processing request of M0 before processing the processing request of M1. Since the priority of component set 1 is higher than that of component set 2, the arbitrator gives priority to processing the processing request of M0 in component set 1, temporarily suspends the processing request of component set M1, and sets the priority of M1 to the lowest priority according to the LRD algorithm.
[0173] In process D, the arbitrator finishes processing the processing request of M0 and continues to process the processing request of M1. At this time, the priority ranking results of each processing component in component set 2 remain unchanged.
[0174] In the E process, the arbitrator completes processing of M1's request.
[0175] The request processing method provided in the embodiment of the present application can determine the number of second processing requests to be sent by the first object to the memory, and when the number of second processing requests is multiple, dynamically adjust the priorities of multiple second processing requests to control the first object to send these multiple second processing requests to the memory in order of priority, to ensure that second processing requests with higher priorities are sent first, to ensure the service quality and stability of these second processing requests with higher priorities, to avoid long request delays caused by the inability to process second processing requests with higher priorities for a long time, and to help improve user experience.
[0176] The above embodiment relates to the process of determining the QoS parameters of the first object. Figure 5 and Figure 6 , which explains the process in detail.
[0177] Figure 5 The third flowchart of the request processing method provided in the embodiment of the present application is as follows: Figure 5 As shown, the embodiment of the present application is Figure 2 Based on the embodiment, the request processing method is described in detail. The method may specifically include the following steps:
[0178] S501: Determine a first processing request to be processed by a first object.
[0179] S502: Determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period.
[0180] It should be noted that the specific execution process of steps S501 and S502 can refer to the specific execution process of steps S201 and S202, and will not be repeated here.
[0181] S503: In response to the current resource occupancy being less than the maximum resource amount, determine the QoS parameter to be a first value.
[0182] In some embodiments, the first value may be used to indicate that the priority of the first object is higher than the priority of the second object, the second object and the first object have access requirements to the memory at the same time, and the number of the second objects may be one or more.
[0183] It is understandable that if there is still "margin" in the maximum amount of resources allocated by the memory to the first object, the first processing request of the first object can be processed with priority. In this case, the QoS parameter of the first object can be set to the first value, so that the priority of the first object is higher than that of the second object, thereby ensuring that the first processing request of the first object is processed with priority.
[0184] S504: In response to the current resource occupancy being greater than or equal to the maximum resource amount, determine the number of second objects requiring access to the memory, and determine a QoS parameter according to the number of second objects.
[0185] In some embodiments, in response to the number of second objects being 0, the QoS parameter is determined to be a first value; in response to the number of second objects being greater than or equal to 1, the QoS parameter is determined to be a second value; wherein the first value is greater than the second value.
[0186] In some embodiments, the second value may be used to indicate that the priority of the first object is lower than the priority of the second object.
[0187] It is understandable that the memory can allocate part of its resources to the first object, and flexibly configure the remaining resources. In the case where the number of second objects is 0, if the first object is restricted from accessing the memory because its current resource usage is greater than or equal to the maximum resource amount, the remaining resources of the memory will be wasted, resulting in low memory resource utilization. In this case, the QoS parameter of the first object can be set to the first value to ensure that the first processing request of the first object continues to be processed with priority.
[0188] If there is no "margin" in the maximum amount of resources allocated by the memory to the first object, it means that most of the processing requests of the first object have been processed by the DDR. In the case of a second object, in order to avoid the first object occupying the bus and memory resources for a long time, which causes the processing request of the second object to time out, the QoS parameter of the first object can be set to the second value, so that the priority of the first object is lower than that of the second object, thereby ensuring that the first processing request of the second object can be processed first, which is beneficial to improving the processing efficiency of the memory for the processing request of the second object.
[0189] The request processing method provided in the embodiment of the present application can flexibly configure QoS parameters according to the maximum resource amount and current resource occupancy corresponding to the first object after determining the first processing request; it can also determine the number of second objects that have access requirements to the memory when the current resource occupancy is greater than or equal to the maximum resource amount, and flexibly adjust the QoS parameters according to the number of second objects to avoid resource waste caused by the first object being unable to access the memory when there is no second object accessing the memory, which is beneficial to improving the resource utilization of the memory; it can also timely adjust the QoS parameters to flexibly adjust the priorities of the first object and the second object when the current resource occupancy of the first object is greater than or equal to the maximum resource amount and the first object and the second object access the memory at the same time, to avoid the first object occupying the bus and memory resources for a long time, resulting in the processing request of the second object timing out, which is beneficial to improving the processing efficiency of the processing request of the second object and enhancing the user experience.
[0190] Figure 6 The fourth flowchart of the request processing method provided in the embodiment of the present application is as follows: Figure 6 As shown, the embodiment of the present application is Figure 2 Based on the embodiment, the request processing method is described in detail. The method may specifically include the following steps:
[0191] S601: Determine a first processing request to be processed by a first object.
[0192] S602: Determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period.
[0193] It should be noted that the specific execution process of steps S601 and S602 can refer to the specific execution process of steps S201 and S202, and will not be repeated here.
[0194] S603: Determine a first resource amount required by the memory to process the first processing request.
[0195] The first resource amount may be a bandwidth resource amount and / or a storage capacity of the memory.
[0196] In some embodiments, the first resource amount may be determined in the following manner: determining the amount of data in the first processing request, and determining the first resource amount based on the data amount.
[0197] S604: Determine a second resource amount according to the first resource amount and the current resource occupancy amount.
[0198] The second resource amount may be a bandwidth resource amount and / or a storage capacity of the memory.
[0199] In some embodiments, the second resource amount=the first resource amount+the current resource occupancy amount.
[0200] S605: Determine QoS parameters according to the second resource amount and the maximum resource amount.
[0201] In some embodiments, step S605 may further include the following steps:
[0202] (1) In response to the second resource amount being greater than or equal to the maximum resource amount, determining a difference between the second resource amount and the maximum resource amount, and determining a QOS parameter according to the difference.
[0203] It is understandable that if the memory resource usage of the first object just exceeds the maximum resource amount during the process of processing the first processing request, the first processing request can be completed first.
[0204] The user can pre-set a threshold according to business needs, and dynamically adjust the QoS parameters based on the threshold and the difference. For example, the threshold can be 3%.
[0205] When the difference is less than the threshold, the QOS parameter can be set to the first value; when the difference is greater than or equal to the threshold, the number of second objects that require access to the memory can be determined, and the QoS parameter can be determined based on the number of second objects.
[0206] The specific execution process of determining the QoS parameter according to the number of second objects can refer to the specific execution process of step S504, which will not be described again here.
[0207] (2) In response to the second resource amount being less than the maximum resource amount, determining the QoS parameter to be the first value.
[0208] The request processing method provided in the embodiment of the present application can, after determining the first processing request, further determine the first resource amount required for the memory to process the first processing request, and accurately and flexibly configure QoS parameters based on the maximum resource amount, current resource occupancy and first resource amount corresponding to the first object to improve the resource utilization of the memory and speed up the processing efficiency of the first processing request.
[0209] The above embodiment relates to a process of controlling the memory to process the first processing request according to the QoS parameters and the processing type. Figure 7 , which explains the process in detail.
[0210] Figure 7 The fifth flow chart of the request processing method provided in the embodiment of the present application is as follows: Figure 7 As shown, the embodiment of the present application is Figure 2Based on the embodiment, the request processing method is described in detail. The method may specifically include the following steps:
[0211] S701: Determine the total number M of processing commands corresponding to a first processing request.
[0212] M is a positive integer.
[0213] The processing command can be a read command or a write command.
[0214] The AXI bus has an outstanding transmission characteristic, which refers to the presence of multiple processing requests in the bus system at the same time, some of which are waiting to be completed. In some embodiments, the processing command can be an outstanding command, that is, an outstanding or unresolved command currently waiting to be processed.
[0215] The outstanding commands may include a read address command, a write address command, and a write data command. The number of outstanding commands may be 0, 1, or more.
[0216] The request processing device can control the bus to perform the corresponding read operation or write operation based on the processing type. The specific process is as follows:
[0217] (1) Read operation: Read address command → Wait for read data to return → ... → Read address command → Wait for read data to return.
[0218] During a read operation, N read address commands can be sent continuously to the bus. If the read data is not returned during this period, you need to wait for the read data to return. If read data is returned, and if several read data are returned, you can still send several read address commands. In other words, the maximum number of read address commands sent can be N. If the read data returns slowly, it will result in a longer bus wait time and lower bus processing efficiency. In this case, to improve bus processing efficiency, N can be appropriately increased to reduce the bus delay caused by the read data return without causing bus congestion.
[0219] (2) Write operation: write address command → write data → wait for write response to return → ... → write address command → write data → wait for write response to return.
[0220] During a write operation, N sets of write address (write data) commands can be issued to the bus continuously. If no write response is returned during this period, the bus must wait for the response to be returned before issuing the next write address (write data) command. If a write response is returned, then the number of outstanding write responses can be N at most.
[0221] S702: In response to the QoS parameter being a first value, send a first processing request to the memory based on the processing type, so that the memory processes the first processing request.
[0222] The first processing request includes M processing commands.
[0223] When the QoS parameter is the first value, the bandwidth resources of the first object in the memory are sufficient in the current time period, and the first object sends all processing commands of the first processing request to the memory so that the memory processes them.
[0224] S703: In response to the QoS parameter being the second value, determine a maximum sending quantity N corresponding to the processing type, and based on the processing type and N, send at least one third processing request to the memory so that the memory processes the first processing request.
[0225] The third processing request may include N processing commands, and the sum of the processing commands included in at least one third processing request is M; wherein N is a positive integer, and the first value is greater than the second value.
[0226] When the QoS parameter is the second value, the first object needs to compete with the second object for bandwidth resources in the memory during the current time period. If the first object sends many outstanding commands to the memory at this time, since the priority of the first object is lower than that of the second object, the waiting time for processing of these outstanding commands will be longer. As a result, after entering the next time period of the current time period, the outstanding commands accumulated by the first object in the current time period have not been processed by the DDR, which reduces the processing efficiency of the DDR for the processing requests of the first object in the next period.
[0227] In order to solve the above problem, the request processing device can control the maximum number N of outstanding commands sent by the first object to the memory each time during the current time period when the QoS parameter is the second value. Based on the characteristics of the bus in performing read operations and write operations, N set for different processing types can be different. For example, in Figure 1 In the BRP module shown, the processing type corresponding to the first output component is the write type. When the first output component sends a write command to the DDR, the maximum number of outstanding commands sent, N, can be set to 1; the processing type corresponding to the second read component is the read type. When the second read component sends a read command to the DDR, the maximum number of outstanding commands sent, N, can be set to 2 to 3.
[0228] The request processing method provided in the embodiment of the present application can realize separate control of the reading and writing processes of the memory based on the processing type to avoid congestion of each processing request, which is conducive to improving the processing efficiency of each processing request; it can also control the number of processing commands sent by the first object to the memory each time in the current time period based on the processing type of the first processing request and the maximum sending number N corresponding to the processing type when the QoS parameter is the second value, so as to avoid the situation where the processing commands accumulated by the first object in the current time period have not been processed by the DDR after entering the next time period of the current time period, resulting in a decrease in the processing efficiency of the DDR for the processing requests of the first object in the next period.
[0229] Figure 8 This is a schematic diagram of the structure of a request processing device provided in an embodiment of the present application. The request processing device can be a chip or a chip module. Figure 8 , the request processing device 10 may include:
[0230] A determination module 11, configured to determine a first processing request to be processed by a first object;
[0231] The determining module 11 is further configured to determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period;
[0232] The determining module 11 is further configured to determine a quality of service (QoS) parameter of the first object based on the current resource occupancy and the maximum resource amount;
[0233] The determining module 11 is further configured to determine a processing type corresponding to the first processing request;
[0234] The control module 12 is configured to control the memory to process the first processing request according to the QoS parameter and the processing type, where the processing type is a read type or a write type.
[0235] In a possible implementation, the determining module 11 is specifically configured to:
[0236] determining a number of second processing requests to be sent by the first object to the memory;
[0237] In response to the number of the second processing request being one, determining the second processing request as the first processing request;
[0238] In response to the number of the second processing requests being plural, a second processing request with the highest priority is determined among the plurality of second processing requests, and the second processing request with the highest priority is determined as the first processing request.
[0239] In a possible implementation, the first object includes multiple processing components; the determining module 11 is further configured to:
[0240] Determining a first processing component corresponding to each second processing request from the plurality of processing components to obtain a plurality of first processing components;
[0241] In response to the plurality of first processing components having the same priority, determining a second processing component among the plurality of first processing components, the second processing component being a least recently used first processing component among the plurality of first processing components;
[0242] The second processing request corresponding to the second processing component is determined as the second processing request with the highest priority.
[0243] In a possible implementation, the determining module 11 is further configured to:
[0244] In response to different priorities of the plurality of first processing components, dividing the plurality of first processing components into a plurality of component sets, wherein the first processing components in each component set have the same priority;
[0245] Determining a component set with the highest priority among the multiple component sets;
[0246] The second processing request with the highest priority is determined according to the second processing request corresponding to each first processing component in the component set with the highest priority.
[0247] In a possible implementation, the determining module 11 is further configured to:
[0248] In response to the current resource occupancy being less than the maximum resource amount, determining the QoS parameter to be a first value;
[0249] In response to the current resource occupancy being greater than or equal to the maximum resource amount, the number of second objects requiring access to the memory is determined, and the QoS parameter is determined based on the number of the second objects.
[0250] In a possible implementation, the determining module 11 is further configured to:
[0251] In response to the number of the second objects being 0, determining the QoS parameter to be the first value;
[0252] In response to the number of the second objects being greater than or equal to one, determining the QoS parameter to be a second value;
[0253] The first value is greater than the second value.
[0254] In a possible implementation, the determining module 11 is further configured to:
[0255] determining a first amount of resources required by the memory to process the first processing request;
[0256] Determining a second resource amount according to the first resource amount and the current resource occupancy amount;
[0257] The QoS parameter is determined according to the second resource amount and the maximum resource amount.
[0258] In a possible implementation, the control module 12 is specifically configured to:
[0259] Determining a total number M of processing commands corresponding to the first processing request;
[0260] In response to the QoS parameter being a first value, sending the first processing request to the memory based on the processing type, so that the memory processes the first processing request, where the first processing request includes M processing commands;
[0261] In response to the QoS parameter being a second value, determining a maximum number N of transmissions corresponding to the processing type, and based on the processing type and N, sending at least one third processing request to the memory so that the memory processes the first processing request, the third processing request including N processing commands, and a sum of the processing commands included in the at least one third processing request being M;
[0262] Wherein, M and N are positive integers, and the first value is greater than the second value.
[0263] The request processing device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment. Its implementation principles and beneficial effects are similar and will not be repeated here.
[0264] Figure 9 This is a schematic diagram of the structure of the request processing device provided in the embodiment of this application. Figure 9 The request processing device 20 may include a memory 21 and a processor 22. Exemplarily, the memory 21 and the processor 22 are interconnected via a bus 23.
[0265] The memory 21 is used to store program instructions;
[0266] The processor 22 is configured to execute the program instructions stored in the memory, so as to enable the image processing device 20 to execute the method shown in the above method embodiment.
[0267] It is understood that the request processing device may include at least one processor and a memory in communication with the at least one processor. The memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the method shown in the above embodiment.
[0268] The request processing device provided in the embodiment of the present application can execute the technical solution shown in the above method embodiment. Its implementation principles and beneficial effects are similar and will not be repeated here.
[0269] An embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, which are used to implement the above-mentioned request processing method when executed by a processor.
[0270] An embodiment of the present application may also provide a computer program product, including a computer program, which, when executed by a processor, can implement the above-mentioned request processing method.
[0271] All or part of the steps of the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a readable memory. When the program is executed, it performs the steps of the above-mentioned method embodiments; and the aforementioned memory (storage medium) includes: read-only memory (ROM), random access memory (RAM), flash memory, hard disk, solid state drive, magnetic tape, floppy disk, optical disc, and any combination thereof.
[0272] The embodiments of the present application are described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processing unit of the computer or other programmable data processing device generate instructions for implementing the steps in the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0273] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.
[0274] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.
[0275] Obviously, those skilled in the art may make various changes and modifications to the embodiments of the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations.
[0276] In this application, the term "include" and its variations may refer to non-restrictive inclusion; the term "or" and its variations may refer to "and / or". In this application, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. In this application, "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship.
Claims
1. A request processing method, characterized in that: The method comprises: Determining a first processing request to be processed by a first object; Determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period; Determine a quality of service (QoS) parameter of the first object according to the current resource occupancy and the maximum resource amount; Determine a processing type corresponding to the first processing request, and control the memory to process the first processing request according to the QoS parameter and the processing type, where the processing type is a read type or a write type.
2. The method according to claim 1, characterized in that Determining a first processing request to be processed by a first object includes: determining a number of second processing requests to be sent by the first object to the memory; In response to the number of the second processing request being 1, determining the second processing request as the first processing request; In response to the number of the second processing requests being plural, a second processing request with the highest priority is determined among the plurality of second processing requests, and the second processing request with the highest priority is determined as the first processing request.
3. The method according to claim 2, characterized in that The first object includes a plurality of processing components; Determining a second processing request with the highest priority among the multiple second processing requests includes: Determine a first processing component corresponding to each second processing request among the multiple processing components to obtain multiple first processing components; In response to the plurality of first processing components having the same priority, determining a second processing component among the plurality of first processing components, the second processing component being a least recently used first processing component among the plurality of first processing components; The second processing request corresponding to the second processing component is determined as the second processing request with the highest priority.
4. The method according to claim 3, characterized in that The method further comprises: In response to different priorities of the plurality of first processing components, dividing the plurality of first processing components into a plurality of component sets, wherein the first processing components in each component set have the same priority; Determine a component set with the highest priority among the multiple component sets; The second processing request with the highest priority is determined according to the second processing request corresponding to each first processing component in the component set with the highest priority.
5. The method according to any one of claims 1 to 4, characterized in that: Determining a quality of service QoS parameter of the first object according to the current resource occupancy and the maximum resource amount includes: In response to the current resource occupancy being less than the maximum resource amount, determining the QoS parameter to be a first value; In response to the current resource occupancy being greater than or equal to the maximum resource amount, the number of second objects requiring access to the memory is determined, and the QoS parameter is determined based on the number of the second objects.
6. The method according to claim 5, characterized in that Determining the QoS parameter according to the number of the second objects includes: In response to the number of the second objects being 0, determining the QoS parameter to be the first value; In response to the number of the second objects being greater than or equal to 1, determining the QoS parameter to be a second value; The first value is greater than the second value.
7. The method according to any one of claims 1 to 4, characterized in that: Determining a quality of service QoS parameter of the first object according to the current resource occupancy and the maximum resource amount includes: determining a first amount of resources required by the memory to process the first processing request; Determine a second resource amount according to the first resource amount and the current resource occupancy amount; The QoS parameter is determined according to the second resource amount and the maximum resource amount.
8. The method according to any one of claims 1 to 4, characterized in that: Controlling the memory to process the first processing request according to the QoS parameter and the processing type includes: Determine a total number M of processing commands corresponding to the first processing request; In response to the QoS parameter being a first value, sending the first processing request to the memory based on the processing type, so that the memory processes the first processing request, wherein the first processing request includes M processing commands; In response to the QoS parameter being a second value, determining a maximum sending quantity N corresponding to the processing type, and based on the processing type and the N, sending at least one third processing request to the memory so that the memory processes the first processing request, the third processing request including N processing commands, and the sum of the processing commands included in the at least one third processing request being the M; Wherein, the M and the N are positive integers, and the first value is greater than the second value.
9. A request processing device, characterized in that: include: A determination module, configured to determine a first processing request to be processed by a first object; The determination module is further configured to determine a maximum amount of memory resources allocated to the first object in a current time period, and a current amount of memory resources occupied by the first object in the current time period; The determination module is further configured to determine a quality of service QoS parameter of the first object according to the current resource occupancy and the maximum resource amount; The determining module is further used to determine a processing type corresponding to the first processing request; A control module is used to control the memory to process the first processing request according to the QoS parameter and the processing type, where the processing type is a read type or a write type.
10. A request processing device, characterized in that: include: at least one processor; as well as a memory communicatively connected to the at least one processor; wherein, The memory stores instructions to be executed by the at least one processor, where the instructions are executed by the at least one processor so as to enable the at least one processor to perform the method according to any one of claims 1 to 8.