Simulation method for extracting parasitic parameters and considering influence of loop on electrical result

Abstract

The invention discloses a simulation method for extracting parasitic parameters and considering the influence of a loop on an electrical result, and the method comprises the steps: 1, building a three-dimensional structure model of a power module according to a tested sample, 2, extracting the parasitic parameters and drawing an equivalent circuit, 3, building double-pulse simulation, and carrying out the simulation, 4, carrying out the actual test, and 5, carrying out the simulation. 5, verifying according to a simulation result and a test result; relates to the technical field of simulation, and solves the technical problem that a worker cannot finely know the working characteristics of a power module. Electrical simulation of the power module is set up by adopting a parasitic parameter extraction method, the accuracy of the method is verified through comparison of a double-pulse experiment and simulation, the method can better fit the electrical performance of the power module under the actual working condition, an application party can better grasp the working characteristics of the power module, and the application cost is reduced. And an application party is helped to shorten the design period of the power module.

Description

Technical Field

[0001] The invention belongs to the field of simulation technology, and in particular is a simulation method for extracting parasitic parameters and considering the influence of a loop on an electrical result. Background Art

[0002] The rapid development of modern integrated circuits is largely due to the increasing power and widespread application of semiconductor device simulation technology. As we all know, power module design is a complex process. The performance of the module is mutually restricted and influenced by many parameters. The change of a certain parameter often includes many aspects of influence, which increases the difficulty of design. On the other hand, in today's semiconductor integrated circuit industry where equipment is extremely expensive, verifying the design results by tape-out testing will inevitably lead to huge losses of manpower and material resources, so simulation technology is particularly important. Semiconductor device simulation is to predict the performance and behavior of the device through computer simulation and modeling, using mathematical algorithms and physical equations.

[0003] Therefore, when it is simulated through simulation, it is in a relatively ideal state. The simulation results may have errors with the actual experimental results. When the error is large, the simulation results cannot be used directly. At present, it is impossible to understand the error between the simulation results and the experiment. Therefore, the simulation results have a high degree of credibility, which makes it impossible to understand the working characteristics of the power module in detail. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art; to this end, the present invention proposes a simulation method for extracting parasitic parameters taking into account the influence of the circuit on the electrical results, which is used to solve the technical problem that the staff cannot have a detailed understanding of the working characteristics of the power module. The present invention uses a parasitic parameter extraction method to build an electrical simulation of the power module, and solves the above problem by comparing the double pulse experiment and the simulation to verify the accuracy of the method.

[0005] To achieve the above object, a first aspect of the present invention provides a simulation method for extracting parasitic parameters considering the influence of the circuit on the electrical result, comprising the following steps:

[0006] Step 1: Establish a three-dimensional structural model of the power module based on the sample under test;

[0007] Step 2: Extract the parasitic parameters inside the electrical circuit and draw the equivalent circuit diagram of the power module according to the parasitic parameters;

[0008] Step 3: Build a double-pulse electrical simulation according to the equivalent circuit diagram, and obtain the simulation results of the power module in the on and off states in the double-pulse electrical simulation;

[0009] Step 4: Perform a double pulse platform test on the power module under full performance to obtain the test results;

[0010] Step 5: Verify the results based on simulation and test results.

[0011] Preferably, the three-dimensional structural model of the power module is established according to the sample under test, comprising the following steps:

[0012] S11: Establishing a three-dimensional structure in a three-dimensional modeling software according to the structural structure of the sample to be tested;

[0013] S12: adjusting the three-dimensional structure model according to the structural dimensions of the sample to be tested and then splicing the model to obtain a three-dimensional structure model.

[0014] Preferably, the three-dimensional structural model includes the structural configuration of a chip, an upper copper layer, a solder layer, a ceramic layer, a lower copper layer, a substrate, power terminals and bonding wires in the IGBT.

[0015] Preferably, the extracting of parasitic parameters inside the electrical circuit comprises the following steps:

[0016] The electrical circuit is simulated by electromagnetic simulation software, and the physical structure that causes parasitic effects is marked as parasitic parameters.

[0017] Preferably, drawing an equivalent circuit diagram of the power module according to the parasitic parameters includes:

[0018] S21: Import and build a 3D model in ANSYS Q3D software;

[0019] S22: Select automatic meshing in ANSYS Q3D software and retain the loop where the parasitic parameters are located to obtain the screening circuit;

[0020] S23: Screening the material properties of the internal current loop of the power module in the circuit according to the settings in the ANSYS Q3D software;

[0021] S24: Draw an equivalent circuit diagram of the power module including parasitic parameters according to the screening circuit.

[0022] Preferably, the double-pulse electrical simulation is constructed according to the equivalent circuit diagram, and the simulation results of the power module in the on and off states are obtained in the double-pulse electrical simulation, including:

[0023] S31: Build a precise double-pulse simulation circuit in LTspice according to the equivalent circuit; the turn-on time and the size of the freewheeling inductance of the double-pulse simulation circuit remain the same as those in the actual test;

[0024] S32: testing through a double pulse simulation circuit to obtain a basic voltage waveform and a basic current waveform for turning on and off;

[0025] S33: obtaining a plurality of simulated voltage waveforms and simulated current waveforms by adjusting the simulated current value and the simulated gate resistance value of the double-pulse simulation circuit, and recording the simulated current value and the simulated gate resistance value.

[0026] It should be noted that the simulation results include: a simulated voltage waveform, a simulated current waveform, a basic voltage waveform and a basic current waveform.

[0027] Preferably, the double pulse platform test of the power module under full performance includes:

[0028] S41: Perform a double pulse platform test on the power module, and record the experimental voltage waveform and experimental current waveform of the power module when it is turned on and off through an oscilloscope;

[0029] S42: Changing the current value and the gate resistance value flowing through the power module according to the simulated current value and the simulated gate resistance value, and obtaining a plurality of test current waveforms and test voltage waveforms.

[0030] It should be noted that the test results include an experimental voltage waveform, an experimental current waveform, a test current waveform and a test voltage waveform.

[0031] Preferably, the verification result based on the simulation result and the test result includes:

[0032] The simulation results and test results with the same simulation current value and simulation gate resistance value are grouped to obtain several simulation groups and experimental groups;

[0033] The voltage waveform in each simulation group is marked as Vf(t), and the current waveform is marked as If(t), and the voltage waveform of the corresponding experimental group is marked as Vs(t), and the current waveform is marked as Is(t);

[0034] Calculate the characteristic error E based on the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) t and loss ratio; where the loss ratio includes the opening loss ratio E on and turn-off loss ratio E off ;

[0035] By calculating the characteristic error E t , opening loss ratio E on and turn-off loss ratio E off The average value of is obtained.

[0036] The evaluation value is compared with the preset standard value. When the evaluation value is greater than the preset standard setting, the verification result is marked as accurate; otherwise, the verification result is marked as having deviation.

[0037] Preferably, the characteristic error E t Ways to obtain include:

[0038] The peak voltage and peak current of the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) are extracted and marked as Vfmax, Ifmax, Vsmax, and Ismax respectively; through the formula Calculate the current error EV and voltage error EI respectively;

[0039] Convert the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) to the frequency domain, identify the corresponding oscillation amplitude effective value, and mark them as RVf, RIf, RVs, and RIs in turn. Calculate the voltage vibration error RV and the current vibration error RI respectively;

[0040] The characteristic error is calculated by the formula Et=a1×EV+a2×EI+b1×RV+b2×RI; wherein a1, a2, b1 and b2 are preset proportional coefficients respectively.

[0041] Preferably, the method for obtaining the loss ratio includes:

[0042] By formula Calculate the opening loss ratio E on ; where t 0 is the starting time, t on is the opening time;

[0043] By formula Calculate the turn-off loss ratio E off ; where t off is the turn-off time, t 1 is the end time;

[0044] It should be noted that the starting time t 0 It is the time point when the switching process starts, usually refers to the moment when the gate drive signal changes from low level to high level, that is, the moment when the turn-on command is issued;

[0045] Opening time t on is the actual turn-on moment, i.e. the point in time when the device transitions from the non-conducting state to the fully conducting state. At this moment, the device current has risen to the steady-state value, and the voltage drop has dropped to near the saturation voltage;

[0046] Turn-off time t off is the actual turn-off moment, i.e., the point in time when the device transitions from the conducting state to the non-conducting state. At this moment, the current of the device has dropped to nearly zero, while the voltage has risen to nearly its blocking voltage;

[0047] End time t 1 It is the time point when the switching process ends, usually refers to the moment when the gate drive signal changes from high level to low level, that is, the moment when the shutdown command is issued.

[0048] Compared with the prior art, the beneficial effects of the present invention are as follows: a parasitic parameter extraction method is used to build an electrical simulation of a power module, and the accuracy of the method is verified by comparing a double-pulse experiment with a simulation. This method is more suitable for the electrical performance of the power module under actual working conditions, which helps the application party to better grasp the working characteristics of the power module and helps the application party to shorten the design cycle of the power module; and in the present invention, a three-dimensional structural model and a double-pulse electrical simulation are constructed, and simulation results are obtained by simulation simulation, and then experiments are conducted with the current value and gate resistance value during simulation to obtain simulation results and experimental results, and the simulation results are compared and analyzed with the experimental test results, and the characteristic characteristic error Et and the turn-on loss ratio Et are calculated. on and turn-off loss ratio E off , a comprehensive evaluation is conducted on the data to determine whether the simulation results are accurate. This method can further help engineers better understand the differences between simulation and reality, find potential design defects or optimization space, and then improve the design and enhance product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0050] Figure 1 It is a schematic diagram of the process of the present invention. DETAILED DESCRIPTION

[0051] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] See also Figure 1 As shown, the first embodiment of the present invention provides a simulation method for extracting parasitic parameters considering the influence of the circuit on the electrical result, comprising the following steps:

[0053] Step 1: Establish a three-dimensional structural model of the power module based on the sample under test;

[0054] Step 2: Extract the parasitic parameters inside the electrical circuit and draw the equivalent circuit diagram of the power module according to the parasitic parameters;

[0055] Step 3: Build a double-pulse electrical simulation according to the equivalent circuit diagram, and obtain the simulation results of the power module in the on and off states in the double-pulse electrical simulation;

[0056] Step 4: Perform a double pulse platform test on the power module under full performance to obtain the test results;

[0057] Step 5: Verify the results based on simulation and test results.

[0058] The specific implementation method of step one is as follows:

[0059] S11: According to the structural structure of the IGBT module, a three-dimensional structure is established in a three-dimensional modeling software; wherein the three-dimensional structure model includes the structural structure of the unsealed device housing, the chip in the IGBT, the upper copper layer, the solder layer, the ceramic layer, the lower copper layer, the substrate, the power terminals and the bonding wires.

[0060] S12: adjusting the three-dimensional structure model according to the structural size of the IGBT module and then splicing it to obtain a three-dimensional structure model; wherein the size of the IGBT module is obtained according to the SAM scanning analysis.

[0061] The implementation method of step 2 in this embodiment is as follows:

[0062] The electrical circuit is simulated by electromagnetic simulation software, and the physical structure that causes parasitic effects is marked as parasitic parameters.

[0063] Import and build a 3D model in ANSYS Q3D software;

[0064] In ANSYS Q3D software, select automatic meshing and retain the loop where the parasitic parameters are located to obtain the screening circuit;

[0065] The material properties of the current loop inside the power module in the screening circuit are set in ANSYS Q3D software;

[0066] The equivalent circuit diagram of the power module including parasitic parameters is drawn according to the screening circuit.

[0067] Exemplarily, in ANSYS Q3D software, the material properties of the upper copper layer, the lower copper layer, the substrate and the power terminal are set to metallic copper, and the material properties of the bonding wires are set to Al.

[0068] The implementation method of step three of this embodiment is as follows:

[0069] S31: Build a precise double-pulse simulation circuit in LTspice according to the equivalent circuit; the turn-on time and the size of the freewheeling inductance of the double-pulse simulation circuit remain the same as those in the actual test;

[0070] S32: testing through a double pulse simulation circuit to obtain a basic voltage waveform and a basic current waveform for turning on and off;

[0071] S33: obtaining a plurality of simulated voltage waveforms and simulated current waveforms by adjusting the simulated current value and the simulated gate resistance value of the double-pulse simulation circuit, and recording the simulated current value and the simulated gate resistance value.

[0072] The implementation method of step 4 in this embodiment is as follows:

[0073] S41: Perform a double pulse platform test on the power module, and record the experimental voltage waveform and experimental current waveform of the power module when it is turned on and off through an oscilloscope;

[0074] S42: Changing the current value and the gate resistance value flowing through the power module according to the simulated current value and the simulated gate resistance value, and obtaining a plurality of test current waveforms and test voltage waveforms.

[0075] It should be noted that the test results include an experimental voltage waveform, an experimental current waveform, a test current waveform and a test voltage waveform.

[0076] The implementation method of step five in this embodiment is as follows:

[0077] The simulation results and test results with the same simulation current value and simulation gate resistance value are grouped to obtain several simulation groups and experimental groups;

[0078] The voltage waveform in each simulation group is marked as Vf(t), and the current waveform is marked as If(t), and the voltage waveform of the corresponding experimental group is marked as Vs(t), and the current waveform is marked as Is(t);

[0079] Calculate the characteristic error E based on the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) t and loss ratio; where the loss ratio includes the opening loss ratio E on and turn-off loss ratio E off ;

[0080] By calculating the characteristic error E t , opening loss ratio E on and turn-off loss ratio E off The average value of is obtained.

[0081] The evaluation value is compared with the preset standard value. When the evaluation value is greater than the preset standard setting, the verification result is marked as accurate; otherwise, the verification result is marked as having deviation.

[0082] Specifically, the characteristic error E t Ways to obtain include:

[0083] The peak voltage and peak current of the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) are extracted and marked as Vfmax, Ifmax, Vsmax, and Ismax respectively; through the formula Calculate the current error EV and voltage error EI respectively;

[0084] Preprocess the voltage waveform Vf(t), the current waveform If(t), the voltage waveform Vs(t), and the current waveform Is(t); then select a suitable FFT window, apply FFT to perform frequency domain conversion, and obtain a frequency domain graph;

[0085] Find the frequency points with the largest amplitude in the frequency domain plot. These points correspond to the main oscillation frequencies. You can use a peak detection algorithm (such as Scipy's find_peaks function) to automatically identify these frequency points;

[0086] For each identified oscillation frequency, record its corresponding amplitude value. The amplitude value can be directly read from the FFT result and then calculated by the formula Identify the corresponding oscillation amplitude effective value and mark it as RVf, RIf, RVs, RIs in turn; where X(f i ) is the complex spectrum value of the i-th frequency point, and N is the length of the FFT window;

[0087] By formula Calculate the voltage vibration error RV and the current vibration error RI respectively;

[0088] By formula E t =a1×EV+a2×EI+b1×RV+b2×RI to calculate the characteristic characteristic error; wherein a1, a2, b1 and b2 are respectively proportional coefficients less than 1, and the above preset proportional coefficients are set by technical experts in the field according to the degree of influence of different types of data on the error, that is, the greater the influence, the larger the corresponding proportional coefficient.

[0089] It is worth noting that the above preprocessing includes:

[0090] Remove noise: If the waveform contains noise, you can use a low-pass filter or other denoising techniques to clean up the data.

[0091] Align Time Axis: Ensures that the time axes of all related waveforms are aligned to facilitate subsequent analysis.

[0092] In this implementation, the above loss ratio is obtained by:

[0093] By formula Calculate the opening loss ratio E on ; where t 0 is the starting time, t on is the opening time;

[0094] By formula Calculate the turn-off loss ratio E off ; where t off is the turn-off time, t 1 is the end time.

[0095] Part of the data in the above formula is calculated by removing the dimension and taking its numerical value. The formula is a formula closest to the actual situation obtained by software simulation of a large amount of collected data; the preset parameters and preset thresholds in the formula are set by technical personnel in this field according to actual conditions or obtained through simulation of a large amount of data.

[0096] The above embodiments are only used to illustrate the technical method of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical method of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical method of the present invention.

Claims

1. A simulation method for extracting parasitic parameters and considering the influence of the circuit on the electrical results, characterized in that: The following steps are involved: Step 1: Establish a three-dimensional structural model of the power module based on the sample under test; Step 2: Extract the parasitic parameters inside the electrical circuit and draw the equivalent circuit diagram of the power module according to the parasitic parameters; Step 3: Build a double-pulse electrical simulation according to the equivalent circuit diagram, and obtain the simulation results of the power module in the on and off states in the double-pulse electrical simulation; Step 4: Perform a double pulse platform test on the power module under full performance to obtain the test results; Step 5: Verify the results based on simulation and test results.

2. A simulation method for extracting parasitic parameters considering the influence of the circuit on the electrical results according to claim 1, characterized in that: The three-dimensional structural model of the power module is established according to the sample to be tested, comprising the following steps: S11: Establishing a three-dimensional structure in a three-dimensional modeling software according to the structural structure of the sample to be tested; S12: adjusting the three-dimensional structure model according to the structural dimensions of the sample to be tested and then splicing the model to obtain a three-dimensional structure model.

3. A simulation method for extracting parasitic parameters considering the influence of the circuit on the electrical results according to claim 2, characterized in that: The three-dimensional structural model includes the structural configuration of a chip, an upper copper layer, a solder layer, a ceramic layer, a lower copper layer, a substrate, a power terminal and bonding wires in an IGBT.

4. A simulation method for extracting parasitic parameters considering the influence of the circuit on the electrical results according to claim 1, characterized in that: The extracting of parasitic parameters inside the electrical circuit comprises the following steps: The electrical circuit is simulated by electromagnetic simulation software, and the physical structure that causes parasitic effects is marked as parasitic parameters.

5. A simulation method for extracting parasitic parameters considering the influence of the circuit on the electrical results according to claim 1, characterized in that: Drawing an equivalent circuit diagram of the power module according to the parasitic parameters includes: S21: Import and build a 3D model in ANSYS Q3D software; S22: Select automatic meshing in ANSYS Q3D software and retain the loop where the parasitic parameters are located to obtain the screening circuit; S23: Screening the material properties of the internal current loop of the power module in the circuit according to the settings in the ANSYS Q3D software; S24: Draw an equivalent circuit diagram of the power module including parasitic parameters according to the screening circuit.

6. A simulation method for extracting parasitic parameters considering the influence of loops on electrical results according to claim 1, characterized in that: The double-pulse electrical simulation is constructed according to the equivalent circuit diagram, and the simulation results of the power module in the on and off states are obtained in the double-pulse electrical simulation, including: S31: Build a precise double-pulse simulation circuit in LTspice according to the equivalent circuit; the turn-on time and the size of the freewheeling inductance of the double-pulse simulation circuit remain the same as those in the actual test; S32: testing through a double pulse simulation circuit to obtain a basic voltage waveform and a basic current waveform for turning on and off; S33: obtaining a plurality of simulated voltage waveforms and simulated current waveforms by adjusting the simulated current value and the simulated gate resistance value of the double-pulse simulation circuit, and recording the simulated current value and the simulated gate resistance value.

7. A simulation method for extracting parasitic parameters considering the influence of loops on electrical results according to claim 1, characterized in that: The double pulse platform test of the power module under full performance includes: S41: Perform a double pulse platform test on the power module, and record the experimental voltage waveform and experimental current waveform of the power module when it is turned on and off through an oscilloscope; S42: Changing the current value and the gate resistance value flowing through the power module according to the simulated current value and the simulated gate resistance value, and obtaining a plurality of test current waveforms and test voltage waveforms.

8. A simulation method for extracting parasitic parameters taking into account the influence of the circuit on the electrical results according to claim 1, characterized in that: The verification results based on simulation results and test results include: The simulation results and test results with the same simulation current value and simulation gate resistance value are grouped to obtain several simulation groups and experimental groups; The voltage waveform in each simulation group is marked as Vf(t), and the current waveform is marked as If(t), and the voltage waveform of the corresponding experimental group is marked as Vs(t), and the current waveform is marked as Is(t); Calculate the characteristic error E based on the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) t and loss ratio; where the loss ratio includes the opening loss ratio E on and turn-off loss ratio E off ; By calculating the characteristic error E t , opening loss ratio E on and turn-off loss ratio E off The average value of is obtained. The evaluation value is compared with the preset standard value. When the evaluation value is greater than the preset standard setting, the verification result is marked as accurate; otherwise, the verification result is marked as having deviation.

9. A simulation method for extracting parasitic parameters taking into account the influence of the circuit on the electrical results according to claim 8, characterized in that: The characteristic error E t Ways to obtain include: The peak voltage and peak current of the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) are extracted and marked as Vfmax, Ifmax, Vsmax, and Ismax respectively; through the formula Calculate the current error EV and voltage error EI respectively; Convert the voltage waveform Vf(t), current waveform If(t), voltage waveform Vs(t), and current waveform Is(t) to the frequency domain, identify the corresponding oscillation amplitude effective value, and mark them as RVf, RIf, RVs, and RIs in turn. Calculate the voltage vibration error RV and the current vibration error R respectively; By formula E t =a1×EV+a2×EI+b1×RV+b2×RI to calculate the characteristic error; wherein a1, a2, b1 and b2 are preset proportional coefficients respectively.

10. A simulation method for extracting parasitic parameters taking into account the influence of the circuit on the electrical result according to claim 8, characterized in that: The method for obtaining the loss ratio includes: By formula Calculate the opening loss ratio E on ; Among them, t0 is the starting time, t on is the opening time; By formula Calculate the turn-off loss ratio E off ; where t off is the turn-off time, and t1 is the end time.

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