Ultra-wideband 6-bit numerical control attenuator with low attenuation amplitude error and low phase change

Abstract

The invention discloses an ultra-wideband 6-bit numerical control attenuator with low attenuation amplitude error and low phase change. The digital attenuator is composed of six attenuation units of 0.5 dB, 1 dB, 2 dB, 4 dB, 8 dB and 16 dB. The attenuation units are cascaded according to the attenuation amounts of 0.5 dB, 4dB, 16dB, 8dB, 2dB and 1dB, the attenuation units with the attenuation amounts of 0.5 dB and 1dB adopt a simplified T-shaped structure, the attenuation unit with the attenuation amount of 2dB adopts a bridge T-shaped structure, the attenuation unit with the attenuation amount of 4dB adopts a pi-shaped structure with bypass capacitance compensation, and the attenuation unit with the attenuation amount of 8dB adopts a pi-shaped structure with a bypass compensation capacitor and a branch communication compensation capacitor. And the attenuation unit with the attenuation amount of 16dB is formed by cascading two improved 8dB SPDT switch path type attenuation units. According to the invention, reverse compensation is carried out on phase lag caused by a low-pass filtering network formed by a reference state of a traditional attenuation structure or phase lead caused by a high-pass filtering network formed by an attenuation state, so that the phases of the two are close, and the phase difference between the reference state and the attenuation state is greatly reduced.

Description

Technical Field

[0001] The invention relates to the technical field of phased arrays, and in particular to an ultra-wideband 6-bit digitally controlled attenuator with low attenuation amplitude error and low phase variation. Background Art

[0002] Phased array systems use antenna arrays and control systems to achieve electronic beam orientation and control. They have the advantages of fast orientation, high-precision orientation, anti-interference and stealth, and are therefore widely used in radar, wireless communications, aerospace and other fields. As the amplitude control circuit of the phased array system, the attenuator module balances the total gain of the receiving channel, ensures that all T / R components have the same amplitude at the output, and constrains the sidelobe level by adjusting the amplitude of the signal. Compared with variable gain amplifiers, digital step attenuators have no DC power consumption, higher linearity, and can provide more precise amplitude and phase control, so they are widely used.

[0003] There are three types of current mainstream attenuator circuit structures: switch path, distributed, and switch embedded. Figure 8 , using the single-pole double-throw switch between the attenuation units to select between the attenuation path and the reference path. The switch path structure has high symmetry, high circuit reliability, and is not easily affected by external factors and process deviations. It is usually used in circuits with high attenuation requirements. However, due to the introduction of the single-pole double-throw switch in the attenuation unit, there are problems such as excessive insertion loss of the attenuation unit and increased chip area. Distributed structure, such as Fig. 9 As shown in the figure, it consists of a parallel variable resistor and a quarter-wave transmission line connected to it. There is no cascade switch in the series path of the distributed attenuator, which makes the circuit insertion loss and additional phase shift low and the bandwidth large. However, the quarter-wave transmission line occupies too much chip area, which is not conducive to the integrated design of the chip. The switch embedded structure, such as Fig.10 , is the most commonly used structure in attenuator modules. It has three structural forms: T-type ( Fig.10 a), Bridge T type ( Fig.10 b) and π type ( Fig.10 (c) in Fig. 3. Although the switch embedded structure has advantages such as compact chip area and low insertion loss, the bandwidth of this structure is narrow and the additional phase shift is large due to the influence of the parasitic parameters of the MOS tube. Summary of the invention

[0004] The technical problem to be solved by the present invention is the problems commonly existing in the current attenuator design, such as narrow bandwidth, large additional phase shift and insufficient attenuation accuracy. In order to solve the above problems, an ultra-wideband 6-bit digitally controlled attenuator with low attenuation amplitude error and low phase change is provided.

[0005] The object of the present invention is achieved in the following manner: The invention discloses an ultra-wideband 6-bit digitally controlled attenuator with low attenuation amplitude error and low phase change. The digital attenuator is composed of six attenuation units of 0.5dB, 1dB, 2dB, 4dB, 8dB and 16dB. The attenuation units are cascaded according to attenuation amounts of 0.5dB, 4dB, 16dB, 8dB, 2dB and 1dB, wherein the attenuation units with attenuation amounts of 0.5dB and 1dB adopt a simplified T-type structure, the attenuation unit with attenuation amount of 2dB adopts a bridge T-type structure, the attenuation unit with attenuation amount of 4dB adopts a π-type structure with bypass capacitor compensation, the attenuation unit with attenuation amount of 8dB adopts a π-type structure with bypass compensation capacitor and branch connection compensation capacitor, and the attenuation unit with attenuation amount of 16dB is formed by cascading two improved 8dB SPDT switch path attenuation units.

[0006] The gate of the MOS tube in the attenuation unit with an attenuation of 0.5dB is connected to the control level, the source of the MOS tube is grounded through a resistor R1, and the drain is connected to IN / OUT; the gate of the MOS tube in the attenuation unit with an attenuation of 1dB is connected to the control level, the source of the MOS tube is grounded through a resistor R2, and the drain is connected to IN / OUT; the source of the MOS tube is also connected to the capacitor C1, and the other end of the capacitor C1 is grounded.

[0007] The gate of the MOS tube M3 of the attenuation unit with an attenuation of 2 dB is connected to the control level Vctrl, the drain of the MOS tube M3 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout. The resistor R3 is connected in parallel with the MOS tube M3, with the left end connected to the signal input terminal Vin and the right end connected to the signal output terminal Vout; the left end of the resistor R4 is connected to the signal input terminal Vin, and the right end is connected to the left end of the resistor R5, the right end of the resistor R5 is connected to the signal output terminal Vout, the gate of the MOS tube M4 is connected to the control level, the drain of M4 is connected to the right end of the resistor R4 and the left end of the resistor R5, the source of M4 is connected to one end of the resistor R6 and the capacitor C2 respectively, and the other ends of the resistor R6 and the capacitor C2 are grounded.

[0008] The gate of the MOS tube M5 of the attenuation unit with an attenuation of 4 dB is connected to the control level Vctrl, the drain of M5 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout, the resistor R7 is connected in parallel with the MOS tube M5, and the left and right ends of the resistor R7 are respectively connected to the signal input terminal Vin and the signal output terminal Vout; the drain of the MOS tube M6 is connected to the signal input terminal Vin, the gate is connected to the control level, the source of M6 is respectively connected to one end of the resistor R8 and the capacitor C3, and the other ends of the resistor R8 and the capacitor C3 are grounded; the drain of the MOS tube M7 is connected to the signal output terminal Vout, the gate is connected to the control level, the source of M7 is respectively connected to one end of the resistor R9 and the capacitor C4, and the other ends of the resistor R9 and the capacitor C4 are grounded.

[0009] The gate of the MOS tube M8 of the attenuation unit with an attenuation of 8 dB is connected to the control level Vctrl, the drain of M8 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout, the resistor R10 is connected in parallel with the MOS tube M8, and the left and right ends of the resistor R10 are respectively connected to the signal input terminal Vin and the signal output terminal Vout; the drain of the MOS tube M9 is connected to the signal input terminal Vin, the gate is connected to the control level, the source of M9 is respectively connected to one end of the resistor R11 and the capacitor C5, and the other ends of the resistor R11 and the capacitor C5 are grounded; the drain of the MOS tube M10 is connected to the signal output terminal Vout, the gate is connected to the control level, the source of M10 is respectively connected to one end of the resistor R12 and the capacitor C6, and the other ends of the resistor R12 and the capacitor C6 are grounded; the left end of the capacitor C7 is connected to the source of the MOS tube M9, and the right end is connected to the source of the MOS tube M10.

[0010] The attenuation unit with an attenuation of 16 dB includes two improved 8dB SPDT switch path attenuation units with the same structure, wherein the gates of MOS tubes M11 and M12 in one of the improved 8dB SPDT switch path attenuation units are connected to the control level Vctrl, the gates of MOS tubes M13 and M14 are connected to the control level, the drain of M11 is connected to the signal input terminal Vin and the drain of M13; the source of M13 is respectively connected to the left end of the resistor R13, one end of the resistor R14, and one end of the capacitor C8, and the other end of the resistor R14 and the other end of the capacitor C8 are grounded; the source of M11 is connected to the drain of M12, the source of M12 is connected to the source of M14, and the drain of M14 is connected to the right end of the resistor R13, one end of the resistor R15, and one end of the capacitor C9; the other end of the resistor R15 and the other end of the capacitor C9 are grounded.

[0011] Beneficial effects of the present invention: The present invention reversely compensates for the phase lag caused by the low-pass filter network formed in the reference state of the traditional attenuation structure or the phase advance caused by the high-pass filter network formed in the attenuation state, so that the phases of the two are close, which greatly reduces the phase difference between the reference state and the attenuation state. In addition, an improved SPDT switch path attenuation structure is introduced on the largest attenuation unit, and the advantages of this structure are used to track the phase from the attenuation state to the reference state, so that the phase difference between the two approaches zero. In addition, the layout of the cascade sequence has an important influence on the attenuation amplitude error and the overall return loss. Through the reasonable layout of the cascade sequence, the proposed attenuator has certain advantages in input and output return loss. In addition, the proposed attenuator is also within a reasonable range in terms of linearity and insertion loss. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1It is a cascade principle diagram of the six-digit digital controlled attenuator proposed by the present invention.

[0013] Figure 2 This is the circuit diagram of the attenuator 0.5dB attenuation unit.

[0014] Figure 3 This is the circuit diagram of the attenuator 1dB attenuation unit.

[0015] Figure 4 This is the circuit diagram of the attenuator 2dB attenuation unit.

[0016] Figure 5 This is the circuit diagram of the attenuator 4dB attenuation unit.

[0017] Figure 6 This is the circuit diagram of the attenuator 8dB attenuation unit.

[0018] Figure 7 This is the circuit diagram of the attenuator 16dB attenuation unit.

[0019] Figure 8 It is a switch path structure in the prior art.

[0020] Fig. 9 It is a distributed structure in the prior art.

[0021] Fig.10 The invention is a switch embedded structure in the prior art.

[0022] Fig.11 It is an equivalent small signal model of the reference state and decay state of the π-type decay unit.

[0023] Fig.12 It is the transmission phase diagram of the π-type structure.

[0024] Fig.13 It is a filtering network formed when the 8dB attenuation unit is in the attenuation state.

[0025] Fig.14 It is a SPDT switch path attenuation structure. DETAILED DESCRIPTION

[0026] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0027] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same technical meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0028] like Figure 1As shown, an ultra-wideband 6-bit low attenuation amplitude error and low phase change digitally controlled attenuator is provided, wherein the digital attenuator is composed of six attenuation units of 0.5dB, 1dB, 2dB, 4dB, 8dB and 16dB; the attenuation units of 0.5dB and 1dB are cascaded according to the attenuation amounts of 0.5dB, 4dB, 16dB, 8dB, 2dB and 1dB, wherein the attenuation units of 0.5dB and 1dB adopt a simplified T-type structure, the attenuation unit of 2dB adopts a bridge T-type structure, the attenuation unit of 4dB adopts a π-type structure with bypass capacitor compensation, the attenuation unit of 8dB adopts a π-type structure with bypass compensation capacitor and branch connection compensation capacitor, and the attenuation unit of 16dB is formed by cascading two improved 8dB SPDT switch path attenuation units.

[0029] like Figure 2 As shown, the gate of the MOS tube in the attenuation unit with an attenuation of 0.5 dB is connected to the control level, the source of the MOS tube is grounded through a resistor R1, and the drain is connected to IN / OUT; Figure 3 As shown, the gate of the MOS tube in the attenuation unit with an attenuation of 1 dB is connected to the control level, the source of the MOS tube is grounded through a resistor R2, and the drain is connected to IN / OUT; the source of the MOS tube is also connected to a capacitor C1, and the other end of the capacitor C1 is grounded.

[0030] like Figure 4 As shown, the gate of the MOS tube M3 of the attenuation unit with an attenuation of 2 dB is connected to the control level Vctrl, the drain of the MOS tube M3 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout. The resistor R3 is connected in parallel with the MOS tube M3, with the left end connected to the signal input terminal Vin and the right end connected to the signal output terminal Vout; the left end of the resistor R4 is connected to the signal input terminal Vin, and the right end is connected to the left end of the resistor R5, the right end of the resistor R5 is connected to the signal output terminal Vout, the gate of the MOS tube M4 is connected to the control level, the drain of M4 is connected to the right end of the resistor R4 and the left end of the resistor R5, the source of M4 is connected to one end of the resistor R6 and the capacitor C2 respectively, and the other ends of the resistor R6 and the capacitor C2 are grounded.

[0031] like Figure 5As shown, the gate of the MOS tube M5 of the attenuation unit with an attenuation of 4 dB is connected to the control level Vctrl, the drain of M5 is connected to the signal input terminal Vin, the source is connected to the signal output terminal Vout, the resistor R7 is connected in parallel with the MOS tube M5, and the left and right ends of the resistor R7 are respectively connected to the signal input terminal Vin and the signal output terminal Vout; the drain of the MOS tube M6 is connected to the signal input terminal Vin, the gate is connected to the control level, the source of M6 is respectively connected to one end of the resistor R8 and the capacitor C3, and the other ends of the resistor R8 and the capacitor C3 are grounded; the drain of the MOS tube M7 is connected to the signal output terminal Vout, the gate is connected to the control level, the source of M7 is respectively connected to one end of the resistor R9 and the capacitor C4, and the other ends of the resistor R9 and the capacitor C4 are grounded.

[0032] like Figure 6 As shown, the gate of the MOS tube M8 of the attenuation unit with an attenuation of 8 dB is connected to the control level Vctrl, the drain of M8 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout, the resistor R10 is connected in parallel with the MOS tube M8, and the left and right ends of the resistor R10 are respectively connected to the signal input terminal Vin and the signal output terminal Vout; the drain of the MOS tube M9 is connected to the signal input terminal Vin, the gate is connected to the control level, the source of M9 is respectively connected to one end of the resistor R11 and the capacitor C5, and the other ends of the resistor R11 and the capacitor C5 are grounded; the drain of the MOS tube M10 is connected to the signal output terminal Vout, the gate is connected to the control level, the source of M10 is respectively connected to one end of the resistor R12 and the capacitor C6, and the other ends of the resistor R12 and the capacitor C6 are grounded; the left end of the capacitor C7 is connected to the source of the MOS tube M9, and the right end is connected to the source of the MOS tube M10.

[0033] like Figure 7 As shown, the attenuation unit with an attenuation of 16 dB includes two improved 8dB SPDT switch path attenuation units with the same structure, wherein the gates of the MOS tubes M11 and M12 in one of the improved 8dB SPDT switch path attenuation units are connected to the control level Vctrl, the gates of the MOS tubes M13 and M14 are connected to the control level, the drain of M11 is connected to the signal input terminal Vin and the drain of M13; the source of M13 is respectively connected to the left end of the resistor R13, one end of the resistor R14, and one end of the capacitor C8, and the other end of the resistor R14 and the other end of the capacitor C8 are grounded; the source of M11 is connected to the drain of M12, the source of M12 is connected to the source of M14, and the drain of M14 is connected to the right end of the resistor R13, one end of the resistor R15, and one end of the capacitor C9; the other end of the resistor R15 and the other end of the capacitor C9 are grounded.

[0034] like Figure 8 , 9As shown in Figures 1 and 10, in the switch embedded structure, T-type and π-type structures are its main topological structures. Fig.10 Take the π-type attenuation structure shown in (c) as an example. This structure switches the attenuation state and the reference state by controlling the MOS tube switch. For the convenience of analysis, when we only consider the main parasitic parameters such as the parasitic capacitance introduced when the MOS tube is closed and the on-resistance brought by the MOS tube when it is turned on, and ignore other parasitic effects such as body effect and parasitic inductance, the equivalent small signal models of the reference state and attenuation state of the π-type attenuation unit are as follows: Fig.11 (b) and 11 (c). Due to the existence of parasitic capacitance of MOS tube, the transmission phase of reference state and attenuation state of MOS tube has different changes, especially at high frequency, the influence of parasitic effect is more obvious, and as the frequency continues to increase, the phase and attenuation amplitude error of attenuation unit continues to deteriorate. The lag and lead of the reference state and attenuation state transmission phase of the traditional switch embedded structure are actually caused by the low-pass and high-pass filter networks they form. The phase of the low-pass network lags behind that of the high-pass network. Therefore, we can use a filter network to reversely compensate the phase of the reference state or attenuation state to make their phases close to each other. As shown in Figure 5 As shown, the present invention introduces a bypass capacitor Ccomp in the attenuation branch. The introduction of the bypass capacitor forms a low-pass filter network in the attenuation state. The low-pass filter network has a phase lag, which compensates for the phase advance effect of the attenuation state. Fig.12 As shown, Fig.12 In the figure, the left side shows the traditional π-type structure phase shift, and the right side shows the π-type structure phase shift with bypass capacitors, which makes the phase difference between the attenuation state and the reference state of the attenuation structure in a smaller range within a wider frequency band. At the same time, due to the introduction of the bypass capacitor Ccomp, the number of zero poles of the structure is increased. By reasonably selecting the value of the bypass capacitor, the position of the zero poles of the circuit can be changed, eliminating adverse effects, and making the amplitude and phase curves of the attenuation structure remain flat within a wider frequency band, expanding the bandwidth of the attenuation structure.

[0035] like Fig.10 As shown in a, since the T-type attenuation structure only contains two MOS tubes, the parasitic parameters are relatively small, so it is less affected by frequency and is usually used in small attenuation units. However, when the attenuation is large, the use of the T-type structure will cause a large phase change, deterioration of attenuation flatness, and poor impedance matching, so the T-type structure is not suitable for large attenuation units. Fig.10 As shown in c, the π-type structure, which has two attenuation branches to the ground, is often suitable for large attenuation module design. Similarly, for the π-type attenuation structure, as the attenuation increases, the bandwidth limitation of the attenuation structure becomes more and more obvious, and it is impossible to achieve a low additional phase shift while taking into account the attenuation flatness in a wider frequency band.

[0036] In order to achieve a stable attenuation amplitude of a large attenuation unit such as 8dB while keeping the phase change at a low level, the present invention adds a branch connection compensation capacitor Ccon in the π-type structure with a bypass compensation capacitor, such as Figure 6 shown. Fig.13 The comparison of the filter network formed in the attenuation state before and after adding the branch connection compensation capacitor to the attenuation unit. Fig.13 (a) is without Ccon, 13 (b) is with Ccon. Fig.13 As shown in (b), due to the addition of the branch connection compensation capacitor, when the attenuator switches to the attenuation state, a new low-pass filter network is formed, which together with the low-pass filter network formed by the bypass capacitor constructs a higher-order low-pass filter network. Therefore, the branch connection compensation capacitor can further lag the advanced phase of the attenuation state, thereby playing a role in compensating the phase difference between the attenuation state and the reference state.

[0037] The deterioration of the additional phase shift and attenuation accuracy of the attenuator is mainly due to the introduction of the parasitic capacitance of the MOS tube. In order to solve the problem that the additional phase shift of the large attenuation unit is difficult to control, the present invention uses an improved SPDT switch path attenuation structure as the topology of the 16dB attenuation unit. The SPDT switch path structure has a high degree of symmetry, so its reference path and attenuation path have similar transmission paths, so that the parasitic parameter effects of the attenuation state and the reference state can be approximately offset. At the same time, the phase of the reference state is regulated by adjusting the transmission line on the reference path, and the phase tracking from the reference state to the attenuation state is further realized, thereby achieving the purpose of low additional phase shift, such as Fig.14 As shown in (a), (a) is a traditional SPDT switch path attenuation structure. Due to the use of a large number of transmission lines and the disadvantage of integration, the SPDT switch path structure is often limited to attenuators of compound processes such as GaAs. In order to give full play to the performance advantages of the SPDT switch path attenuator in large attenuation units, the present invention uniquely improves the SPDT switch path attenuation structure and introduces it into the attenuator of CMOS process, such as Fig.14 As shown in (b), Fig.14 (b) is an improved SPDT switch path attenuation structure, which uses lumped elements to replace the use of transmission lines. By introducing bypass capacitors on the attenuation branch, the freedom of attenuation state phase adjustment is increased, thereby achieving phase tracking from the attenuation state to the reference state, effectively expanding the bandwidth. In addition, unlike most designs, this design eliminates Fig.14The use of four parallel isolated MOS switches as shown in (a) is because isolation is not the function of the attenuator. The cancellation of the four parallel isolated MOS switches effectively reduces the area occupied by the attenuation unit, which is beneficial to the integration of the chip. Too many MOS tubes will introduce more parasitic capacitance, which not only worsens the phase error and attenuation accuracy, but also brings new leakage paths for the signal to the substrate and ground, which increases the insertion loss and makes the attenuation difficult to control. Fig.14 As shown, compared with the structure adopted by most designs in (a), the improved SPDT switch embedded structure adopted by the present invention in (b) is more compact and has a clearer signal transmission mechanism, which is conducive to structural analysis and performance regulation.

[0038] When a single SPDT switch path attenuation structure is used as a 16dB attenuation unit, the greater attenuation requirement makes it more difficult to compromise various aspects of performance, and the impedance matching characteristics are not ideal, resulting in signal reflection, thereby affecting the phase and amplitude of the previous and next stage units. Figure 7 The two SPDT switch path attenuation structures shown are cascaded to form a 16dB attenuation unit, which greatly improves the impedance characteristics of the attenuation unit.

[0039] In order to verify the specific performance and advantages of the proposed attenuator, the attenuator structure proposed in the present invention is simulated and verified. The proposed attenuator is based on CMOS 180nm process, adopts 6-bit cascade, and has an attenuation range of 0-31.5dB. At 0-20GHz, the attenuation accuracy RMS of the attenuator after simulation is 0.34dB, the phase error RMS is 1.9°, the insertion loss is 3-7dB, the return loss is better than 12dB, and the IP1dB is greater than 11.4dBm.

[0040] The simulation results show that the proposed attenuator structure has a lower attenuation amplitude error and leading phase change within a wider bandwidth, which is due to the in-depth analysis of the attenuator performance characteristics and a series of improvements made by the present invention. By analyzing the zero-pole response of the proposed attenuator in the frequency domain, the dominant zero-pole is offset, thereby keeping the attenuation curve of the attenuation unit stable, greatly expanding the bandwidth of the circuit. At the same time, by reversely compensating for the phase lag caused by the low-pass filter network formed in the reference state of the traditional attenuation structure or the phase advance caused by the high-pass filter network formed in the attenuation state, the phases of the two are close, greatly reducing the phase difference between the reference state and the attenuation state. In addition, on the largest attenuation unit, an improved SPDT switch path attenuation structure is introduced, and the advantages of this structure are used to track the phase from the attenuation state to the reference state, so that the phase difference between the two approaches zero. In addition, the layout of the cascade order has an important influence on the attenuation amplitude error and the overall return loss. Through the reasonable layout of the cascade order, the proposed attenuator has certain advantages in input and output return loss. In addition, the proposed attenuator is also in a reasonable range in terms of linearity and insertion loss.

[0041] The above is only a preferred embodiment of the present invention. It should be pointed out that for those skilled in the art, several changes and improvements can be made without departing from the overall concept of the present invention, which should also be regarded as the scope of protection of the present invention.

Claims

1. An ultra-wideband 6-bit digitally controlled attenuator with low attenuation amplitude error and low phase variation, characterized in that: The digital attenuator consists of six attenuation units of 0.5dB, 1dB, 2dB, 4dB, 8dB and 16dB, which are cascaded according to attenuation amounts of 0.5dB, 4dB, 16dB, 8dB, 2dB and 1dB, wherein the attenuation units with attenuation amounts of 0.5dB and 1dB adopt a simplified T-type structure, the attenuation unit with attenuation amount of 2dB adopts a bridge T-type structure, the attenuation unit with attenuation amount of 4dB adopts a π-type structure with bypass capacitor compensation, the attenuation unit with attenuation amount of 8dB adopts a π-type structure with bypass compensation capacitors and branch connection compensation capacitors, and the attenuation unit with attenuation amount of 16dB is formed by cascading two improved 8dB SPDT switch path attenuation units.

2. The ultra-wideband 6-bit low attenuation amplitude error and low phase variation digitally controlled attenuator according to claim 1, characterized in that: The gate of the MOS tube in the attenuation unit with an attenuation of 0.5dB is connected to the control level, the source of the MOS tube is grounded through a resistor R1, and the drain is connected to IN / OUT; the gate of the MOS tube in the attenuation unit with an attenuation of 1dB is connected to the control level, the source of the MOS tube is grounded through a resistor R2, and the drain is connected to IN / OUT; the source of the MOS tube is also connected to the capacitor C1, and the other end of the capacitor C1 is grounded.

3. The ultra-wideband low attenuation amplitude error low phase change digitally controlled attenuator according to claim 1 is characterized in that: The gate of the MOS tube M3 of the attenuation unit with an attenuation of 2 dB is connected to the control level Vctrl, the drain of the MOS tube M3 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout. The resistor R3 is connected in parallel with the MOS tube M3, with the left end connected to the signal input terminal Vin and the right end connected to the signal output terminal Vout; the left end of the resistor R4 is connected to the signal input terminal Vin, and the right end is connected to the left end of the resistor R5, the right end of the resistor R5 is connected to the signal output terminal Vout, the gate of the MOS tube M4 is connected to the control level, the drain of M4 is connected to the right end of the resistor R4 and the left end of the resistor R5, the source of M4 is connected to one end of the resistor R6 and the capacitor C2 respectively, and the other ends of the resistor R6 and the capacitor C2 are grounded.

4. The ultra-wideband 6-bit low attenuation amplitude error and low phase variation digitally controlled attenuator according to claim 1, characterized in that: The gate of the MOS tube M5 of the attenuation unit with an attenuation of 4 dB is connected to the control level Vctrl, the drain of M5 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout, the resistor R7 is connected in parallel with the MOS tube M5, and the left and right ends of the resistor R7 are respectively connected to the signal input terminal Vin and the signal output terminal Vout; the drain of the MOS tube M6 is connected to the signal input terminal Vin, the gate is connected to the control level, the source of M6 is respectively connected to one end of the resistor R8 and the capacitor C3, and the other ends of the resistor R8 and the capacitor C3 are grounded; the drain of the MOS tube M7 is connected to the signal output terminal Vout, the gate is connected to the control level, the source of M7 is respectively connected to one end of the resistor R9 and the capacitor C4, and the other ends of the resistor R9 and the capacitor C4 are grounded.

5. The ultra-wideband 6-bit low attenuation amplitude error and low phase variation digitally controlled attenuator according to claim 1, characterized in that: The gate of the MOS tube M8 of the attenuation unit with an attenuation of 8 dB is connected to the control level Vctrl, the drain of M8 is connected to the signal input terminal Vin, and the source is connected to the signal output terminal Vout, the resistor R10 is connected in parallel with the MOS tube M8, and the left and right ends of the resistor R10 are respectively connected to the signal input terminal Vin and the signal output terminal Vout; the drain of the MOS tube M9 is connected to the signal input terminal Vin, the gate is connected to the control level, the source of M9 is respectively connected to one end of the resistor R11 and the capacitor C5, and the other ends of the resistor R11 and the capacitor C5 are grounded; the drain of the MOS tube M10 is connected to the signal output terminal Vout, the gate is connected to the control level, the source of M10 is respectively connected to one end of the resistor R12 and the capacitor C6, and the other ends of the resistor R12 and the capacitor C6 are grounded; the left end of the capacitor C7 is connected to the source of the MOS tube M9, and the right end is connected to the source of the MOS tube M10.

6. The ultra-wideband 6-bit low attenuation amplitude error and low phase variation digitally controlled attenuator according to claim 1, characterized in that: The attenuation unit with an attenuation of 16 dB includes two improved 8dB SPDT switch path attenuation units with the same structure, wherein the gates of MOS tubes M11 and M12 in one of the improved 8dB SPDT switch path attenuation units are connected to the control level Vctrl, the gates of MOS tubes M13 and M14 are connected to the control level, the drain of M11 is connected to the signal input terminal Vin and the drain of M13; the source of M13 is respectively connected to the left end of the resistor R13, one end of the resistor R14, and one end of the capacitor C8, and the other end of the resistor R14 and the other end of the capacitor C8 are grounded; the source of M11 is connected to the drain of M12, the source of M12 is connected to the source of M14, and the drain of M14 is connected to the right end of the resistor R13, one end of the resistor R15, and one end of the capacitor C9; the other end of the resistor R15 and the other end of the capacitor C9 are grounded.

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