Array substrate and display panel

Abstract

The invention discloses an array substrate and a display panel. The array substrate comprises a substrate; the signal transmission line is arranged on the substrate, and the signal transmission line comprises a first part, a connecting part and a second part; the first part and the second part are connected through a connecting part, and the extending directions of the first part and the second part are different; at least part of the side face of the connecting part is an arc face. Therefore, the first part and the second part can be in smooth transition at the corner and / or the wire changing position through the cambered surface, so that the density of current on the signal transmission line at the corner and / or the wire changing position can be reduced, and the heat concentration phenomenon of the signal transmission line at the corner and / or the wire changing position is improved; the risks of signal abnormity of the signal transmission line and burnout of the array substrate are reduced, and the reliability of the display panel is improved. Meanwhile, the overall wiring design of the array substrate can be prevented from being influenced, and the electrical performance and the mechanical performance of the array substrate are guaranteed.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of display, and in particular to an array substrate and a display panel. Background Art

[0002] At present, the brightness of the display panel in the High Brightness Mode (HBM) is gradually increased, which makes the current of the display panel gradually increase, causing the power consumption of the display panel to increase sharply. At this time, there is a phenomenon of local heat concentration on the display panel, which can easily cause abnormal signal output of the display panel or the risk of screen burn-in, reducing the reliability of the display panel. Summary of the invention

[0003] The present invention provides an array substrate and a display panel, so as to improve the phenomenon of local heat concentration of the display panel and enhance the reliability of the display panel.

[0004] In a first aspect, an embodiment of the present invention provides an array substrate, including:

[0005] substrate;

[0006] A signal transmission line is arranged on the substrate, and the signal transmission line includes a first part, a connecting part and a second part; the first part and the second part are connected by the connecting part, and the first part and the second part extend in different directions; at least part of the side surface of the connecting part is an arc surface.

[0007] Optionally, the first portion, the connecting portion and the second portion are arranged in the same layer, the first portion extends along a first direction, and the second portion extends along a second direction; wherein the first direction intersects with the second direction;

[0008] Preferably, the connecting portion comprises a first side surface and a second side surface which are arranged opposite to each other, the first side surface connects one side surface of the first part and the second part, and the second side surface connects the other side surface of the first part and the second part; the first side surface and the second side surface are both arc surfaces;

[0009] Preferably, the bending direction of the first side surface is the same as the bending direction of the second side surface;

[0010] Preferably, the first side surface and the second side surface have the same shape;

[0011] Preferably, the bending direction of the first side surface is opposite to the bending direction of the second side surface.

[0012] Optionally, the signal transmission line includes a first conductive layer and a second conductive layer stacked together, the connecting portion includes a first connecting structure formed by the first conductive layer and a second connecting structure formed by the second conductive layer, and at least part of the side surfaces of the first connecting structure and / or the second connecting structure are curved surfaces.

[0013] Optionally, a width difference between the first conductive layer and the second conductive layer is less than or equal to a preset value, and a vertical projection of a side surface of the first connecting structure on the substrate and a vertical projection of a side surface of the second connecting structure on the substrate at least partially overlap;

[0014] Preferably, the first side surface includes a first sub-side surface of the first connecting structure and a second sub-side surface of the second connecting structure; at least one of the first sub-side surface and the second sub-side surface is a curved surface;

[0015] And / or, the second side surface includes a third sub-side surface of the first connecting structure and a fourth sub-side surface of the second connecting structure; and at least one of the third sub-side surface and the fourth sub-side surface is a curved surface.

[0016] Optionally, a width difference between the first conductive layer and the second conductive layer is greater than a preset value, and a vertical projection of a side surface of the first connecting structure on the substrate does not overlap with a vertical projection of a side surface of the second connecting structure on the substrate;

[0017] Preferably, the first side surface includes a first sub-side surface of the first connecting structure and a second sub-side surface of the second connecting structure; at least one of the first sub-side surface and the second sub-side surface is a curved surface;

[0018] And / or, the second side surface includes a third sub-side surface of the first connecting structure and a fourth sub-side surface of the second connecting structure; and at least one of the third sub-side surface and the fourth sub-side surface is a curved surface.

[0019] Optionally, the second portion includes a first sub-portion and a second sub-portion which are stacked, the first sub-portion and the second sub-portion extend along a first direction, and the first sub-portion is arranged in the same layer and connected to the first portion and part of the connecting portion; or the second sub-portion is arranged in the same layer and connected to the first portion and part of the connecting portion;

[0020] Preferably, the connecting portion comprises a third sub-portion and a fourth sub-portion which are stacked, the third sub-portion is arranged on the same layer as the first sub-portion, and the fourth sub-portion is arranged on the same layer as the second sub-portion;

[0021] Preferably, the first part includes a plurality of signal branch lines extending along the second direction, the signal branch lines are connected to the third sub-part; along the first direction, a convex extension portion is provided on a side of the first signal branch line away from another signal branch line, and a vertical projection of the convex extension portion on the substrate overlaps with a vertical projection of the third sub-part on the substrate;

[0022] Preferably, a curved portion is provided between adjacent signal branch lines, the curved portion is connected to the adjacent signal branch lines, and a side of the curved portion away from the fourth sub-portion has an arc surface.

[0023] Optionally, the array substrate further includes a third conductive layer and a fourth conductive layer, the fourth conductive layer is arranged on a side of the third conductive layer away from the substrate, the first portion and the first sub-portion are arranged on the third conductive layer, and the second sub-portion is arranged on the fourth conductive layer;

[0024] Preferably, the array substrate also includes a first conductive layer and a second conductive layer, the first conductive layer is arranged on the substrate, and the second conductive layer is arranged between the first conductive layer and the third conductive layer; the array substrate also includes a scanning signal line and a storage capacitor, the scanning signal line and the first electrode plate of the storage capacitor are arranged on the first conductive layer, and the second electrode plate of the storage capacitor is arranged on the second conductive layer.

[0025] Optionally, the array substrate further includes a bending area, the bending area is arranged on one side of the display area, and at least part of the connecting portion extends to the bending area.

[0026] Optionally, the signal transmission line includes a first power signal line and / or a second power signal line, the first power signal line is used to provide a first power signal to the pixels in the display area; the second power signal line is used to provide a second power signal to the pixels in the display area;

[0027] Preferably, the array substrate further comprises a display area, in which the first power signal line comprises a first sub-power signal line extending along a first direction and a second sub-power signal line extending along a second direction, and the first sub-power signal line and the second sub-power signal line are connected and arranged in different layers;

[0028] Preferably, the array substrate further comprises a frame area, the frame area is at least partially arranged around the display area, and the second power signal line comprises a third sub-power signal line arranged in the frame area;

[0029] Preferably, the second power signal line also includes a fourth sub-power signal line and a fifth sub-power signal line arranged in the display area, the fourth sub-power signal line extends along the first direction, the fifth sub-power signal line extends along the second direction, and the fourth sub-power signal line and the fifth sub-power signal line are both connected to the third sub-power signal line and are arranged on the same layer.

[0030] In a second aspect, an embodiment of the present invention further provides a display panel, comprising the array substrate described in the first aspect.

[0031] The technical solution of the embodiment of the present invention is to connect the first part and the second part through a connecting part, and at least part of the side surface of the connecting part is a curved surface, so that the first part and the second part can smoothly transition through the curved surface at the corner and / or the line change, thereby reducing the density of the current on the signal transmission line at the corner and / or the line change, improving the heat concentration phenomenon of the signal transmission line at the corner and / or the line change, reducing the signal anomaly of the signal transmission line and the risk of burning the array substrate, and improving the reliability of the display panel. At the same time, it can avoid affecting the overall routing design of the array substrate, and ensure the electrical and mechanical properties of the array substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 A schematic diagram of local current density simulation of a display panel provided for related technology;

[0033] Figure 2 A schematic diagram of local current density distribution simulation of a display panel provided for related technology;

[0034] Figure 3 Another schematic diagram of local current density distribution simulation of a display panel provided for related technology;

[0035] Figure 4 A schematic structural diagram of an array substrate provided by an embodiment of the present invention;

[0036] Figure 5 for Figure 4 A partial enlarged schematic diagram of the array substrate at position P is provided;

[0037] Figure 6 A schematic diagram of a local layout structure of an array substrate provided in an embodiment of the present invention;

[0038] Figure 7 A schematic diagram of local current density simulation of an array substrate provided by an embodiment of the present invention;

[0039] Figure 8 A schematic diagram of a local current density distribution simulation of an array substrate provided by an embodiment of the present invention;

[0040] Fig. 9 A schematic plan view of a signal transmission line provided by an embodiment of the present invention;

[0041] Fig.10 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention;

[0042] Fig.11 A schematic cross-sectional structure diagram of a signal transmission line connection portion provided by an embodiment of the present invention;

[0043] Fig.12 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention;

[0044] Fig.13 A schematic cross-sectional structure diagram of another signal transmission line connection portion provided by an embodiment of the present invention;

[0045] Fig.14 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention;

[0046] Fig.15 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention;

[0047] Fig.16 A schematic diagram of a partial layout structure of another array substrate provided in an embodiment of the present invention;

[0048] Fig.17 A schematic diagram of local current density distribution simulation of another array substrate provided by an embodiment of the present invention;

[0049] Fig.18 A schematic structural diagram of a display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0050] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0051] Figure 1 A schematic diagram of local current density simulation of a display panel provided for related technology, Figure 2 A schematic diagram of local current density distribution simulation of a display panel provided for related technology, Figure 3 Another schematic diagram of local current density distribution simulation of a display panel provided by the related art. Figures 1 to 3As shown, the display panel includes a bending area 1 and a display area 2, the bending area 1 is arranged on one side of the display area 1, and a border area 3 is arranged between the bending area 1 and the display area 2. The display panel also includes a power signal line, the power signal line is changed from the side 10 of the bending area 1 away from the display area 2, and extends to the display area 2 after passing through the bending area 1 and the border area 3, and is used to provide a low-level power signal for the pixels of the display area 2. When the power signal line extends from the bending area 1 to the display area 2 in the direction of the border area 3, the extension direction of the power signal line changes, so that the power signal line generates a corner 20. At this time, the current on the power signal line is easily concentrated at the line change 10 and the corner 20, so that the current density at the line change 10 and the corner 20 is relatively large. Exemplarily, the current density at the corner 20 reaches 4.59e+08A / m 2 , the current density at line 10 reaches 1.69e+09A / m 2 This results in heat concentration at the line change 10 and the corner 20, which may easily cause power signal abnormality in the display area 2 or the risk of screen burn-in, thereby reducing the reliability of the display panel.

[0052] In view of the above technical problems, an embodiment of the present invention provides an array substrate. Figure 4 A schematic diagram of the structure of an array substrate provided by an embodiment of the present invention, Figure 5 for Figure 4 A partial enlarged schematic diagram of the array substrate at position P is provided. Figure 6 A schematic diagram of a local layout structure of an array substrate provided by an embodiment of the present invention. Figures 4 to 6 As shown, the array substrate includes:

[0053] Substrate 110;

[0054] The signal transmission line 120 is disposed on the substrate 110, and includes a first portion 121, a connecting portion 122 and a second portion 123; the first portion 121 and the second portion 123 are connected by the connecting portion 122, and the first portion 121 and the second portion 123 extend in different directions; at least part of the side surface of the connecting portion 122 is an arc surface.

[0055] Specifically, the substrate 110 may be a flexible substrate or a rigid substrate. The array substrate may include a display area AA and a non-display area NAA. The signal transmission line 120 is connected to the driver chip through the non-display area NAA and extends to the display area AA to provide a driving signal for the pixels in the display area AA to drive the pixels in the display area AA to emit light. Figure 4In the embodiment, the signal transmission line 120 may include a first power signal line VDD and a second power signal line VEE, which are respectively used to provide the first power signal and the second power signal to the pixels of the display area AA to drive the pixels to emit light. At P, the first part 121 and the second part 123 of the second power signal line VEE are connected by a connecting part 122, and the side surface of the connecting part 122 is an arc surface. Figure 5 and Figure 6 It is exemplarily shown that the first part 121 extends along the first direction X, and the second part 123 extends along the second direction Y. The first part 121 and the second part 123 extend in different directions, which will form a corner at the part where the first part 121 and the second part 123 are connected. When the first part 121 and the second part 123 are connected by the connecting portion 122, at least part of the side surface of the connecting portion 122 is an arc surface, which can make the corner of the first part 121 and the second part 123 smoothly transition through the arc surface, thereby reducing the density of the current on the signal transmission line 120 at the corner, improving the heat concentration phenomenon of the signal transmission line 120 at the corner, reducing the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improving the reliability of the display panel. At the same time, it can avoid affecting the overall routing design of the array substrate, ensuring the electrical and mechanical properties of the array substrate. Exemplarily, Figure 7 A schematic diagram of local current density simulation of an array substrate provided by an embodiment of the present invention, Figure 8 The following is a schematic diagram of a local current density distribution simulation of an array substrate provided by an embodiment of the present invention. Figure 7 and Figure 8 As shown, at the corner 100 between the first portion 121 and the second portion 123, the current density is 2.67e+08A / m 2 . Relative to Figure 1 and Figure 2 The current density at the middle corner decreases by about 42%.

[0056] The technical solution of this embodiment is to connect the first part and the second part through a connecting part, and at least part of the side surface of the connecting part is a curved surface, so that the first part and the second part can smoothly transition through the curved surface at the corner and / or the line change, thereby reducing the density of the current on the signal transmission line at the corner and / or the line change, improving the heat concentration phenomenon of the signal transmission line at the corner and / or the line change, reducing the signal anomaly of the signal transmission line and the risk of burning the array substrate, and improving the reliability of the display panel. At the same time, it can avoid affecting the overall routing design of the array substrate, and ensure the electrical and mechanical properties of the array substrate.

[0057] Continue to refer Figure 5The first part 121, the connecting part 122 and the second part 123 are arranged in the same layer, the first part 121 extends along the first direction X, and the second part 123 extends along the second direction Y; wherein the first direction X and the second direction Y intersect.

[0058] Specifically, the array substrate may include pixels arranged in an array, the first portion 121 may extend in the direction of the pixel row, and the second portion 123 may extend in the direction of the pixel column. At this time, the extension directions of the first portion 121 and the second portion 123 are perpendicular, and the corner therebetween is a right angle. By setting at least part of the side surface of the connecting portion 122 as a curved surface, the corner of the first portion 121 and the second portion 123 can be smoothly transitioned through the curved surface, which can reduce the current density at the corner and improve the heat concentration phenomenon at the corner.

[0059] Continue to refer Figure 5 The connecting portion 122 includes a first side surface 1221 and a second side surface 1222 that are arranged opposite to each other, the first side surface 1221 connects one side surface of the first part 121 and the second part 123, and the second side surface 1222 connects the other side surface of the first part 121 and the second part 123; the first side surface 1221 and the second side surface 1222 are both arc surfaces.

[0060] Specifically, Figure 5 As shown, when the first part 121 and the second part 123 are connected by the connecting part 122, the first side surface 1221 and the second side surface 1222 can be simultaneously set to be arc surfaces, so that the two side surfaces at the corner where the first part 121 and the second part 123 are connected can be transitioned through the arc surface, which can further reduce the current density on the signal transmission line 120 at the corner, improve the heat concentration phenomenon of the signal transmission line 120 at the corner, reduce the signal abnormality of the signal transmission line 120 and the risk of burning of the array substrate, and improve the reliability of the display panel.

[0061] Continue to refer Figure 5 , the bending direction of the first side surface 1221 is the same as the bending direction of the second side surface 1222 .

[0062] Specifically, when the bending directions of the first side surface 1221 and the second side surface 1222 are the same, the centers of the arcs formed by the vertical projections of the first side surface 1221 and the second side surface 1222 on the substrate 110 are located on the same side of the arcs, so that the first side surface 1221 is convex inwardly toward the signal transmission line 120, and the second side surface 122 is convex outwardly toward the signal transmission line 120. The intersection of the first portion 121 and the connecting portion 122, and the intersection of the second portion 123 and the connecting portion 122 can be made smoother, which is more conducive to reducing the current density at the corners.

[0063] It should be noted that Figure 5exemplarily shows that the first side surface 1221 is convex toward the signal transmission line 120, and the second side surface 1222 is convex toward the signal transmission line 120. In other embodiments, the second side surface 1222 may be convex toward the signal transmission line 120, and the first side surface 1221 may be convex toward the signal transmission line 120, which is not limited here.

[0064] Continue to refer Figure 5 The first side surface 1221 and the second side surface 1222 have the same shape, that is, the length of the arc formed by the vertical projection of the first side surface 1221 and the second side surface 1222 on the substrate 110, and the center radius of the arc corresponding to the arc are the same, which is beneficial to optimizing the current distribution on the signal transmission line 120. Figure 5 2 shows that the shapes of the first side surface 1221 and the second side surface 1222 are both arc-shaped. In some embodiments, the shapes of the first side surface 1221 and the second side surface 1222 may be different, which is not limited here.

[0065] Fig. 9 A schematic plan view of a signal transmission line provided by an embodiment of the present invention. Fig. 9 As shown, the bending direction of the first side surface 1221 is opposite to the bending direction of the second side surface 1222 .

[0066] Specifically, when the bending direction of the first side surface 1221 is opposite to the bending direction of the second side surface 1222, the centers of the arcs formed by the vertical projections of the first side surface 1221 and the second side surface 1222 on the substrate 110 are respectively located on both sides of the arcs, so that the first side surface 1221 bulges outward toward the signal transmission line 120, and the second side surface 122 bulges outward toward the signal transmission line 120. Similarly, the intersection of the first portion 121 and the connecting portion 122, and the intersection of the second portion 123 and the connecting portion 122 can be smoothly transitioned through the arc surface, thereby reducing the current density at the corners.

[0067] Fig.10 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention, Fig.11 The cross-sectional structure diagram of a signal transmission line connection portion provided by an embodiment of the present invention. Fig.10 and Fig.11 As shown, the signal transmission line 120 includes a first conductive layer M1 and a second conductive layer M2 which are stacked, and the connecting portion 122 includes a first connecting structure 122A formed by the first conductive layer M1 and a second connecting structure 122B formed by the second conductive layer M2, and at least part of the side surfaces of the first connecting structure 122A and / or the second connecting structure 122B are arc surfaces.

[0068] Specifically, when the signal transmission line 120 includes two stacked first conductive layers M1 and second conductive layers M2, the first conductive layers M1 and second conductive layers M2 can be in contact and connected in parallel, and the impedance on the signal transmission line 120 can be reduced on the basis of the width of the signal transmission line 120 being unchanged, and the heating phenomenon on the signal transmission line 120 can be further reduced, and the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate are reduced, thereby improving the reliability of the display panel. At this time, the connection portion 122 may include a first connection structure 122A and a second connection structure 122B stacked, the first connection structure 122A is used to connect the first part 121 and the second part 123 on the first conductive layer M1, and the second connection structure 122B is used to connect the first part 121 and the second part 123 on the second conductive layer M2. At this time, at least part of the side surfaces of the first connection structure 122A and / or the second connection structure 122B can be set as curved surfaces, so that the corners of the first part 121 and the second part 123 on the first conductive layer M1, and / or the corners of the first part 121 and the second part 123 on the second conductive layer M2 can be smoothly transitioned through the curved surfaces, thereby reducing the current density of the first conductive layer M1 and / or the second conductive layer M2 at the corners, improving the heat concentration phenomenon of the signal transmission line 120 at the corners, reducing the signal anomaly of the signal transmission line 120 and the risk of burning of the array substrate, and improving the reliability of the display panel.

[0069] Continue to refer Fig.10 , a width difference between the first conductive layer M1 and the second conductive layer M2 is less than or equal to a preset value, and a vertical projection of a side surface of the first connection structure 122A on the substrate 110 at least partially overlaps with a vertical projection of a side surface of the second connection structure 122B on the substrate 110 .

[0070] Specifically, the preset value can be determined according to the manufacturing process accuracy of the signal transmission line 120. When the width difference between the first conductive layer M1 and the second conductive layer M2 is less than or equal to the preset value, it can be determined that the widths of the first conductive layer M1 and the second conductive layer M2 are equal, and at this time, the shapes of the two-layer structures of the signal transmission line 120 are the same. At this time, the vertical projection of the side of the first connection structure 122A on the substrate 110 and the vertical projection of the side of the second connection structure 122B on the substrate 110 can be set to at least partially overlap. When at least one side of the connecting portion 122 is a curved surface, at least one side of the first connection structure 122A and at least one side of the second connection structure 122B are curved surfaces, which can simultaneously reduce the current density of the first conductive layer M1 and the second conductive layer M2 at the corners, improve the heat concentration phenomenon of the signal transmission line 120 at the corners, reduce the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improve the reliability of the display panel.

[0071] Continue to refer Fig.11The first side surface 1221 includes a first sub-side surface 1221A of the first connection structure 122A and a second sub-side surface 1221B of the second connection structure 122B; at least one of the first sub-side surface 1221A and the second sub-side surface 1221B is a curved surface.

[0072] Specifically, Fig.11 As shown, the first connection structure 122A includes two side surfaces, namely, a first sub-side surface 1221A and a third sub-side surface 1222A. The second connection structure 122B includes two side surfaces, namely, a second sub-side surface 1221B and a fourth sub-side surface 1222B. The first sub-side surface 1221A and the second sub-side surface 1221B are located on the same side of the connection portion 122, and constitute the first side surface 1221. When at least part of the first side surface 1221 is a curved surface, at least one of the first sub-side surface 1221A and the second sub-side surface 1221B is a curved surface, so that at least one side surface of the first connection structure 122A and the second connection structure 122B is a curved surface, which can reduce the current density of the first conductive layer M1 and / or the second conductive layer M2 at the corner, improve the heat concentration phenomenon of the signal transmission line 120 at the corner, reduce the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improve the reliability of the display panel.

[0073] Continue to refer Fig.11 The second side surface 1222 includes a third sub-side surface 1222A of the first connection structure 122A and a fourth sub-side surface 1222B of the second connection structure 122B; at least one of the third sub-side surface 1222A and the fourth sub-side surface 1222B is a curved surface.

[0074] Specifically, Fig.11 As shown, the third sub-side surface 1222A and the fourth sub-side surface 1222B are located on the same side of the connecting portion 122, forming the second side surface 1222. When at least a portion of the second side surface 1222 is a curved surface, at least one of the third sub-side surface 1222A and the fourth sub-side surface 1222B is a curved surface, so that at least one of the other side surfaces of the first connection structure 122A and the second connection structure 122B can be a curved surface, which can reduce the current density of the first conductive layer M1 and / or the second conductive layer M2 at the corner, improve the heat concentration phenomenon of the signal transmission line 120 at the corner, reduce the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improve the reliability of the display panel.

[0075] Fig.12 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention, Fig.13 FIG. 1 is a schematic cross-sectional structure diagram of another signal transmission line connection portion provided by an embodiment of the present invention. Fig.12 and Fig.13As shown, the width difference between the first conductive layer M1 and the second conductive layer M2 is greater than a preset value, and the vertical projection of the side surface of the first connection structure 122A on the substrate 110 does not overlap with the vertical projection of the side surface of the second connection structure 122B on the substrate 110 .

[0076] Specifically, when the width difference between the first conductive layer M1 and the second conductive layer M2 is greater than a preset value, it can be determined that the width of the first conductive layer M1 and the width of the second conductive layer M2 are not equal. At this time, the shapes of the two-layer structures of the signal transmission line 120 are different, and the vertical projection of the side of the first connection structure 122A on the substrate 110 and the vertical projection of the side of the second connection structure 122B on the substrate 110 do not overlap. When the sides of the first connection structure 122A and the second connection structure 122B have curved surfaces, the curved surface of the first connection structure 122A and the curved surface of the second connection structure 122B are different curved surfaces. The curved surface of the first connection structure 122A can reduce the current density of the first conductive layer M1 at the corner, and the curved surface of the second connection structure 122B can reduce the current density of the second conductive layer M2 at the corner, so that the heat concentration phenomenon of the two conductive layers of the signal transmission line 120 at the corner can be improved at the same time, reducing the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improving the reliability of the display panel.

[0077] It should be noted that when the width of the first conductive layer M1 and the width of the second conductive layer M2 are not equal, the shapes of the curved surfaces of the first connection structure 122A and the second connection structure 122B may be different. For example, the ratio of the radius corresponding to the curved surface of the first connection structure 122A to the width of the first conductive layer M1 may be set equal to the ratio of the radius corresponding to the curved surface of the second connection structure 122B to the width of the second conductive layer M2, so that the current density of the first conductive layer M1 at the corner and the current density of the second conductive layer M2 at the corner are both reduced, thereby improving the heat concentration phenomenon of the two conductive layers of the signal transmission line 120 at the corner, reducing the risk of signal abnormality of the signal transmission line 120 and burning of the array substrate, and improving the reliability of the display panel.

[0078] Continue to refer Fig.12 and Fig.13 The first side surface 1221 includes a first sub-side surface 1221A of the first connection structure 122A and a second sub-side surface 1221B of the second connection structure 122B; at least one of the first sub-side surface 1221A and the second sub-side surface 1221B is a curved surface.

[0079] Specifically, Fig.12 and Fig.13As shown, the first connection structure 122A includes two side surfaces, namely, a first sub-side surface 1221A and a third sub-side surface 1222A. The second connection structure 122B includes two side surfaces, namely, a second sub-side surface 1221B and a fourth sub-side surface 1222B. The first sub-side surface 1221A and the second sub-side surface 1221B are located on the same side of the connection portion 122, and constitute the first side surface 1221. When at least part of the first side surface 1221 is a curved surface, at least one of the first sub-side surface 1221A and the second sub-side surface 1221B is a curved surface, so that at least one side surface of the first connection structure 122A and the second connection structure 122B is a curved surface, which can reduce the current density of the first conductive layer M1 and / or the second conductive layer M2 at the corner, improve the heat concentration phenomenon of the signal transmission line 120 at the corner, reduce the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improve the reliability of the display panel.

[0080] Continue to refer Fig.12 and Fig.13 The second side surface 1222 includes a third sub-side surface 1222A of the first connection structure 122A and a fourth sub-side surface 1222B of the second connection structure 122B; at least one of the third sub-side surface 1222A and the fourth sub-side surface 1222B is a curved surface.

[0081] Specifically, Fig.12 and Fig.13 As shown, the third sub-side surface 1222A and the fourth sub-side surface 1222B are located on the same side of the connecting portion 122, forming the second side surface 1222. When at least a portion of the second side surface 1222 is a curved surface, at least one of the third sub-side surface 1222A and the fourth sub-side surface 1222B is a curved surface, so that at least one of the other side surfaces of the first connection structure 122A and the second connection structure 122B can be a curved surface, which can reduce the current density of the first conductive layer M1 and / or the second conductive layer M2 at the corner, improve the heat concentration phenomenon of the signal transmission line 120 at the corner, reduce the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improve the reliability of the display panel.

[0082] It should be noted that the arc shapes of the first connection structure 122A and the second connection structure 122B may be different. Fig.14 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention is shown in FIG. Fig.14As shown, in some embodiments, the first sub-side surface 1221A of the first connecting structure 122A and the second sub-side surface 1221B of the second connecting structure 122B can be set to have the same bending direction, and the third sub-side surface 1222A of the first connecting structure 122A and the fourth sub-side surface 1222B of the second connecting structure 122B can be set to have opposite bending directions, which can also improve the heat concentration phenomenon of the two conductive layers of the signal transmission line 120 at the corners. Fig.15 A schematic diagram of a planar structure of another signal transmission line provided by an embodiment of the present invention is shown in FIG. Fig.15 As shown, in some embodiments, the first sub-side surface 1221A of the first connecting structure 122A and the second sub-side surface 1221B of the second connecting structure 122B can be set to have opposite bending directions, and the third sub-side surface 1222A of the first connecting structure 122A and the fourth sub-side surface 1222B of the second connecting structure 122B can be set to have opposite bending directions. This can also improve the heat concentration phenomenon of the two conductive layers of the signal transmission line 120 at the corners, which is not limited here.

[0083] In some embodiments, the second portion includes a first sub-portion and a second sub-portion arranged in a stacked manner, the first sub-portion and the second sub-portion extend along a first direction, and the first sub-portion is arranged in the same layer and connected with the first portion and the partial connecting portion;

[0084] Specifically, when the second part is a two-layer structure, the first part can be a one-layer structure, so that the signal transmission line is a one-layer structure by jumping the two-layer structure of the second part. Among them, the one-layer structure of the first part is arranged on the same layer as one layer of the two-layer structure of the second part. When the first sub-section is arranged on the same layer and connected with the first part and the part of the connecting part, the extension direction of the first sub-section is different from the extension direction of the first part, and is arranged on the same layer, and is connected by the connecting part arranged on the same layer, so that there is a corner between the first sub-section and the first part. At this time, the connecting part arranged on the same layer as the first sub-section has an arc surface, which can reduce the density of the current on the signal transmission line at the corner of the first sub-section and the first part, and improve the heat concentration phenomenon of the signal transmission line at the jumper between the first part and the second part. The signal abnormality of the signal transmission line and the risk of burning of the array substrate are reduced, and the reliability of the display panel is improved. At this time, the extension direction of the second sub-section is different from the extension direction of the first part, and is arranged in different layers.

[0085] In some embodiments, the second sub-section is arranged in the same layer as the first section and part of the connecting section and is connected. In this case, the extension direction of the second sub-section is different from the extension direction of the first section, and they are arranged in the same layer and connected through the connecting section arranged in the same layer, so that there is a corner between the second sub-section and the first section. In this case, the connecting section arranged in the same layer as the second sub-section has a curved surface, which can reduce the density of the current on the signal transmission line at the corner of the second sub-section and the first section, and improve the heat concentration phenomenon of the signal transmission line at the jumper in the first section and the second section. The signal anomaly of the signal transmission line and the risk of burning of the array substrate are reduced, and the reliability of the display panel is improved. In this case, the extension direction of the first sub-section is different from the extension direction of the first section, and they are arranged in different layers.

[0086] In some embodiments, the connecting portion includes a third sub-portion and a fourth sub-portion which are stacked, the third sub-portion is arranged in the same layer as the first sub-portion, and the fourth sub-portion is arranged in the same layer as the second sub-portion.

[0087] Specifically, the connecting portion may also include a third sub-portion and a fourth sub-portion which are stacked and arranged in the same layer as the first sub-portion and the second sub-portion, respectively. The first portion may be arranged in the same layer as the third sub-portion or the fourth sub-portion. When the first portion is arranged in the same layer as the third sub-portion, the third sub-portion may be arranged to have a curved surface. When the first portion is arranged in the same layer as the fourth sub-portion, the fourth sub-portion may be arranged to have a curved surface.

[0088] Fig.16 A schematic diagram of a partial layout structure of another array substrate provided by an embodiment of the present invention. Fig.16 As shown, the first portion 121 includes a plurality of signal branch lines 1211 extending along the second direction Y, and the signal branch lines 1211 are connected to the third sub-portion 122C; along the first direction X, a convex extension portion 124 is provided on the side of the first signal branch line 1211 away from another signal branch line 1211, and the vertical projection of the convex extension portion 124 on the substrate 110 overlaps with the vertical projection of the third sub-portion 122C on the substrate 110.

[0089] Specifically, the array substrate further includes a bending area S, which is disposed on one side of the display area AA. The array substrate is bent in the bending area S, so that the side of the bending area S away from the display area AA is bent to the back of the array substrate, so as to realize a narrow frame design of the array substrate. A plurality of signal branch lines 1211 can be disposed in the bending area S, which can reduce the stress acting on the signal branch lines 1211 when the array substrate is bent in the bending area S, thereby reducing the risk of the signal branch lines 1211 being broken. Along the first direction X, a convex extension portion 124 is provided on the side of the first signal branch line 1211 away from the other signal branch line 1211, and the vertical projection of the convex extension portion 124 on the substrate 110 overlaps with the vertical projection of the third sub-portion 122C on the substrate 110, so that when the first signal branch line 1211 overlaps with the side of the connecting portion 122, the current at the overlap can be shunted by the convex extension portion 124, thereby further reducing the current density at the overlap of the first signal branch line 1211 and the side of the connecting portion 122, further improving the heat concentration phenomenon of the signal transmission line 120 at the line change, reducing the signal abnormality of the signal transmission line 120 and the risk of burning the array substrate, and improving the reliability of the display panel. At the same time, it can avoid affecting the overall routing design of the array substrate, and ensure the electrical and mechanical properties of the array substrate.

[0090] Continue to refer Fig.16 A curved portion 125 is disposed between adjacent signal branch lines 1211 , the curved portion 125 is connected to the adjacent signal branch lines 1211 , and a side of the curved portion 125 away from the fourth sub-portion 122D has an arc surface.

[0091] Specifically, Fig.16 It is exemplarily shown that a curved portion 125 is provided between each two adjacent signal branch lines 1211. The curved portion 125 can shunt the current between adjacent signal branch lines 1211, thereby reducing the current density between adjacent signal branch lines 1211, improving the heat concentration phenomenon between adjacent signal branch lines 1211, and also reducing the risk of signal abnormality of the signal transmission line 120 and burning of the array substrate, thereby improving the reliability of the display panel.

[0092] For example, Fig.17 A schematic diagram of a local current density distribution simulation of another array substrate provided by an embodiment of the present invention. Figure 7 and Fig.17 As shown, at the changeover 200 between the first portion 121 and the second portion 123, the current density is 1.8e+08A / m 2 . Relative to Figure 1 and Figure 3The current density at the middle switching line is reduced by about 89%. At the same time, the current density between adjacent signal branch lines 1211 is greatly reduced, thereby improving the phenomenon of heat concentration on the signal transmission line 120 and improving the reliability of the display panel.

[0093] In some embodiments, the array substrate also includes a first conductive layer and a second conductive layer, the first conductive layer is arranged on the substrate, and the second conductive layer is arranged between the first conductive layer and the third conductive layer; the array substrate also includes a scanning signal line and a storage capacitor, the scanning signal line and the first electrode plate of the storage capacitor are arranged in the first conductive layer, and the second electrode plate of the storage capacitor is arranged in the second conductive layer.

[0094] Specifically, the array substrate may include a first conductive layer and a second conductive layer arranged in sequence, and the first conductive layer and the second conductive layer may be metal layers. The array substrate may also include an active layer, and the active layer overlaps with the scanning signal line in the first conductive layer to form a transistor for forming a pixel circuit. In addition, the first conductive layer may also include a first plate of a storage capacitor, which is arranged opposite to the second plate of the storage capacitor in the second conductive layer, and is used to form a storage capacitor to form a pixel circuit.

[0095] In some embodiments, the array substrate further includes a third conductive layer and a fourth conductive layer, the fourth conductive layer is disposed on a side of the third conductive layer away from the substrate, the first portion is disposed on the third conductive layer, and the second portion is disposed on the fourth conductive layer.

[0096] Specifically, the third conductive layer and the fourth conductive layer are used to form signal connection lines and signal transmission lines required for the pixel circuit. When the first part and the second part of the signal transmission line are arranged in different layers, the first part is arranged in the third conductive layer, and the second part is arranged in the fourth conductive layer, the signal transmission line can be made into a mesh shape, which is conducive to further reducing the resistance on the signal transmission line, and can also avoid abnormalities of the array substrate caused by short circuits intersecting with other lines.

[0097] In some embodiments, continue to refer to Figure 4 The array substrate further includes a bending region S, which is disposed on one side of the display region AA, and at least a portion of the connecting portion 122 extends to the bending region S.

[0098] Specifically, the bending area S is a part of the non-display area NAA, and the array substrate is bent in the bending area S, so that the bending area S is bent away from the display area AA to the back of the array substrate, which is beneficial to reduce the proportion of the non-display area NAA of the array substrate and improve the screen-to-body ratio of the display panel. Near the bending area S, at least part of the connecting portion 122 extends to the bending area S, so that the signal transmission line 120 has a corner and a line change near the bending area S. At this time, the side surface of the connecting portion 122 is provided with a curved surface, which can reduce the current density of the signal transmission line 120 at the corners and line changes near the bending area S, improve the heat concentration phenomenon near the bending area S, and improve the reliability of the display panel.

[0099] In some embodiments, continue to refer to Figure 4 The signal transmission line 120 includes a first power signal line VDD and / or a second power signal line VEE. The first power signal line VDD is used to provide a first power signal for the pixels in the display area AA; the second power signal line FEE is used to provide a second power signal for the pixels in the display area AA.

[0100] Specifically, Figure 4 The signal transmission line 120 is exemplarily shown to include a first power signal line VDD and a second power signal line VEE. The first power signal provided by the first power signal line VDD can be a high-level signal, and the second power signal provided by the second power signal line VEE can be a low-level signal. When the HBM brightness of the display panel gradually increases, the absolute values ​​of the voltages of the first power signal and the second power signal become larger and larger. At this time, the first power signal line VDD and the second power signal line VEE can be set to smoothly transition through an arc surface at the corners and the line change, which can reduce the current density of the first power signal line VDD and the second power signal line VEE at the corners and the line change, thereby reducing the heat concentration phenomenon of the first power signal line VDD and the second power signal line VEE at the corners and the line change, reducing the resistance voltage drop of the first power signal and the second power signal transmitted to the pixel, thereby improving the accuracy and consistency of the first power signal and the second power signal transmitted to the pixel, and improving the brightness accuracy and consistency of the display panel.

[0101] In some embodiments, continue to refer to Figure 4 The array substrate also includes a display area AA. In the display area AA, the first power signal line VDD includes a first sub-power signal line VDD1 extending along the first direction X and a second sub-power signal line VDD2 extending along the second direction Y. The first sub-power signal line VDD1 and the second sub-power signal line VDD2 are connected and arranged in different layers.

[0102] Specifically, the first sub-power signal line VDD1 and the second sub-power signal line VDD2 extend in different directions, and the first sub-power signal line VDD1 and the second sub-power signal line VDD2 are arranged in different layers, so that the power signal line VDD can be prevented from intersecting and short-circuiting with other signal lines. At the same time, the first sub-power signal line VDD1 and the second sub-power signal line VDD2 can be connected through a via, so that the first power signal line VDD is in a mesh shape, reducing the resistance of the first power signal line VDD.

[0103] In some embodiments, the array substrate further includes a frame area B, the frame area B is at least partially arranged around the display area AA, and the second power signal line VEE includes a third sub-power signal line VEE1 arranged in the frame area B.

[0104] Specifically, the frame area B may be arranged around the display area AA, and the third sub-power signal line VEE1 may extend from the bending area S to the frame area B and be arranged around the display area AA in the frame area B to provide a second power signal for the display area AA.

[0105] In some embodiments, the second power signal line VEE also includes a fourth sub-power signal line VEE2 and a fifth sub-power signal line VEE3 disposed in the display area AA, the fourth sub-power signal line VEE2 extends along the first direction X, the fifth sub-power signal line VEE3 extends along the second direction Y, and the fourth sub-power signal line VEE2 and the fifth sub-power signal line VEE3 are both connected to the third sub-power signal line VEE1 and are disposed on the same layer.

[0106] Specifically, Figure 4 As shown, after the third sub-power signal line VEE1 is arranged around the display area AA, the second power signal line VEE also includes a fourth sub-power signal line VEE2 and a fifth sub-power signal line VEE3. The fourth sub-power signal line VEE2 and the fifth sub-power signal line VEE3 are meshed in the display area AA, which can reduce the resistance on the second power signal line VEE, thereby reducing the resistance voltage drop transmitted from the second power signal line VEE to the pixel.

[0107] An embodiment of the present invention further provides a display panel. Fig.18 FIG. 1 is a schematic diagram of a display panel provided by an embodiment of the present invention. Fig.18 As shown, the display panel 200 includes the array substrate provided by any embodiment of the present invention. Since the display panel 200 includes the array substrate provided by any embodiment of the present invention, it has the same beneficial effects as the array substrate provided by any embodiment of the present invention, and will not be repeated here. The display panel can be, for example, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a smart wearable device, an information inquiry machine in a public place hall, and any other product or component with a display function.

[0108] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An array substrate, characterized in that: include: substrate; A signal transmission line is arranged on the substrate, and the signal transmission line includes a first part, a connecting part and a second part; the first part and the second part are connected by the connecting part, and the first part and the second part extend in different directions; at least part of the side surface of the connecting part is an arc surface.

2. The array substrate according to claim 1, characterized in that: The first part, the connecting part and the second part are arranged in the same layer, the first part extends along a first direction, and the second part extends along a second direction; wherein the first direction intersects with the second direction; Preferably, the connecting portion comprises a first side surface and a second side surface which are arranged opposite to each other, the first side surface connects one side surface of the first part and the second part, and the second side surface connects the other side surface of the first part and the second part; the first side surface and the second side surface are both arc surfaces; Preferably, the bending direction of the first side surface is the same as the bending direction of the second side surface; Preferably, the first side surface and the second side surface have the same shape; Preferably, the bending direction of the first side surface is opposite to the bending direction of the second side surface.

3. The array substrate according to claim 2, characterized in that: The signal transmission line includes a first conductive layer and a second conductive layer stacked together, the connecting portion includes a first connecting structure formed by the first conductive layer and a second connecting structure formed by the second conductive layer, and at least part of the side surfaces of the first connecting structure and / or the second connecting structure are arc surfaces.

4. The array substrate according to claim 3, characterized in that: The width difference between the first conductive layer and the second conductive layer is less than or equal to a preset value, and a vertical projection of a side surface of the first connecting structure on the substrate at least partially overlaps with a vertical projection of a side surface of the second connecting structure on the substrate; Preferably, the first side surface includes a first sub-side surface of the first connecting structure and a second sub-side surface of the second connecting structure; at least one of the first sub-side surface and the second sub-side surface is a curved surface; And / or, the second side surface includes a third sub-side surface of the first connecting structure and a fourth sub-side surface of the second connecting structure; and at least one of the third sub-side surface and the fourth sub-side surface is a curved surface.

5. The array substrate according to claim 3, characterized in that: The width difference between the first conductive layer and the second conductive layer is greater than a preset value, and a vertical projection of a side surface of the first connecting structure on the substrate does not overlap with a vertical projection of a side surface of the second connecting structure on the substrate; Preferably, the first side surface includes a first sub-side surface of the first connecting structure and a second sub-side surface of the second connecting structure; at least one of the first sub-side surface and the second sub-side surface is a curved surface; And / or, the second side surface includes a third sub-side surface of the first connecting structure and a fourth sub-side surface of the second connecting structure; and at least one of the third sub-side surface and the fourth sub-side surface is a curved surface.

6. The array substrate according to claim 1, characterized in that: The second portion includes a first sub-portion and a second sub-portion which are stacked, the first sub-portion and the second sub-portion extend along a first direction, and the first sub-portion is arranged in the same layer and connected with the first portion and part of the connecting portion; or, The second sub-section is arranged in the same layer and connected with the first section and part of the connecting section; Preferably, the connecting portion comprises a third sub-portion and a fourth sub-portion which are stacked, the third sub-portion is arranged on the same layer as the first sub-portion, and the fourth sub-portion is arranged on the same layer as the second sub-portion; Preferably, the first part includes a plurality of signal branch lines extending along the second direction, the signal branch lines are connected to the third sub-part; along the first direction, a convex extension portion is provided on a side of the first signal branch line away from another signal branch line, and a vertical projection of the convex extension portion on the substrate overlaps with a vertical projection of the third sub-part on the substrate; Preferably, a curved portion is provided between adjacent signal branch lines, the curved portion is connected to the adjacent signal branch lines, and a side of the curved portion away from the fourth sub-portion has an arc surface.

7. The array substrate according to claim 6, characterized in that: It also includes a third conductive layer and a fourth conductive layer, wherein the fourth conductive layer is arranged on a side of the third conductive layer away from the substrate, the first portion and the first sub-portion are arranged on the third conductive layer, and the second sub-portion is arranged on the fourth conductive layer; Preferably, the array substrate also includes a first conductive layer and a second conductive layer, the first conductive layer is arranged on the substrate, and the second conductive layer is arranged between the first conductive layer and the third conductive layer; the array substrate also includes a scanning signal line and a storage capacitor, the scanning signal line and the first electrode plate of the storage capacitor are arranged on the first conductive layer, and the second electrode plate of the storage capacitor is arranged on the second conductive layer.

8. The array substrate according to claim 1, characterized in that: The array substrate further includes a bending area, which is disposed on one side of the display area, and at least a portion of the connecting portion extends to the bending area.

9. The array substrate according to claim 1, characterized in that: The signal transmission line includes a first power signal line and / or a second power signal line, wherein the first power signal line is used to provide a first power signal to the pixels in the display area; and the second power signal line is used to provide a second power signal to the pixels in the display area; Preferably, the array substrate further comprises a display area, in which the first power signal line comprises a first sub-power signal line extending along a first direction and a second sub-power signal line extending along a second direction, and the first sub-power signal line and the second sub-power signal line are connected and arranged in different layers; Preferably, the array substrate further comprises a frame area, the frame area is at least partially arranged around the display area, and the second power signal line comprises a third sub-power signal line arranged in the frame area; Preferably, the second power signal line also includes a fourth sub-power signal line and a fifth sub-power signal line arranged in the display area, the fourth sub-power signal line extends along the first direction, the fifth sub-power signal line extends along the second direction, and the fourth sub-power signal line and the fifth sub-power signal line are both connected to the third sub-power signal line and are arranged on the same layer.

10. A display panel, characterized in that: The invention comprises the array substrate according to any one of claims 1 to 9.

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