Electronic device including camera

Abstract

An electronic device according to embodiments disclosed herein may include an image sensor, a processor, and a memory. The image sensor may include: at least one photodiode; a transfer gate connecting the at least one photodiode to a first node (FD1 node); a first capacitor connected to the first node and having a first capacitance; a dynamic range gate connected between the first node and a second node (FD2 node); a second capacitor connected to the second node and having a second capacitance; and a microcontroller unit. Other embodiments understood by the present specification are also feasible.

Description

Technical Field

[0001] Embodiments disclosed in this specification relate to an electronic device including a camera. Background Art

[0002] An electronic device such as a smartphone or a tablet PC may include a camera module (alternatively, a camera, a camera device, or an imaging device). An electronic device such as a smartphone or a tablet PC may include a camera module and may capture photos or videos. The electronic device provides image conversion effects according to various shooting modes. A user may select a shooting mode according to a shooting environment and may shoot an image to which various image effects are applied.

[0003] Among the image processing effects provided by electronic devices, high dynamic range (HDR) refers to a technology that extends the dynamic range (hereinafter referred to as "DR") for dark and bright parts. Through HDR, the expression of the dark part of the image can be improved, and the saturation of the bright part of the image can be suppressed.

[0004] HDR images can be generated by using multi-frame high dynamic range (MF HDR) technology. MF HDR technology refers to a technology that extends DR by obtaining and synthesizing multiple images corresponding to different exposure times. The electronic device can obtain an HDR image based on a short exposure image for a bright part and a long exposure image for a dark part. Summary of the invention

[0005] Technical issues When an electronic device applies HDR, the electronic device can perform HDR synthesis by using multiple images with different exposures. In this case, a ghosting phenomenon may occur due to the movement of the object or the shaking of the user's hand. Alternatively, the electronic device can perform HDR synthesis using an image obtained by changing the exposure of each part in an image. In this case, an increase in noise due to reduced resolution and short images may occur.

[0006] Technical Solution According to an embodiment, an electronic device may include an image sensor, a processor, and a memory. The image sensor may include: at least one photodiode; a transmission gate connecting the at least one photodiode to a first node (FD1 node); a first capacitor connected to the first node and having a first capacitance; a dynamic range gate (DRG) connected between the first node and a second node (FD2 node); a second capacitor connected to the second node and having a second capacitance; and a microcontroller unit configured to obtain first analog data at the first node by disabling the DRG and obtain second analog data at the second node by enabling the DRG. The processor may generate a high dynamic range (HDR) image based on the first analog data and the second analog data.

[0007] According to an embodiment, an electronic device may include a camera module, a processor, and a memory. The camera module may include a lens, an image sensor, and an image signal processor. The image sensor may include: at least one photodiode; a transmission gate connecting the at least one photodiode to a first node (FD1 node); a first capacitor connected to the first node and having a first capacitance; a DRG connected between the first node and a second node (FD2 node); and a second capacitor connected to the second node and having a second capacitance. The image signal processor may obtain first analog data at the first node by disabling the DRG, obtain second analog data at the second node by enabling the DRG, and generate a high dynamic range (HDR) image based on the first analog data and the second analog data. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a block diagram of an electronic device in a network environment according to various embodiments.

[0009] Figure 2 is a block diagram of a camera module according to various embodiments.

[0010] Figure 3 is a block diagram of an electronic device according to various embodiments.

[0011] Figure 4 is a circuit diagram of a unit pixel of an image sensor according to an embodiment.

[0012] Figure 5 The operation of the image sensor according to the embodiment through HCG and HSG is illustrated.

[0013] Figure 6 The operation of the image sensor according to the embodiment through the LCG and the LSG is illustrated.

[0014] Figure 7Generation of an HDR image through DR extension according to an embodiment is shown.

[0015] Figure 8 A noise reduction mode operation according to an embodiment is shown.

[0016] With regard to the description of the drawings, the same or similar components will be marked by the same or similar reference symbols. DETAILED DESCRIPTION

[0017] Hereinafter, various embodiments of the present disclosure will be described with reference to the accompanying drawings. Therefore, those skilled in the art will recognize that the various embodiments described herein may be modified, equivalent and / or replaced without departing from the scope and spirit of the present disclosure.

[0018] Figure 1 1 is a block diagram illustrating an electronic device 101 in a network environment 100 according to various embodiments. Figure 1 , the electronic device 101 in the network environment 100 may communicate with the electronic device 102 via the first network 198 (e.g., a short-range wireless communication network), or communicate with at least one of the electronic device 104 or the server 108 via the second network 199 (e.g., a long-range wireless communication network). According to an embodiment, the electronic device 101 may communicate with the electronic device 104 via the server 108. According to an embodiment, the electronic device 101 may include a processor 120, a memory 130, an input module 150, a sound output module 155, a display module 160, an audio module 170, a sensor module 176, an interface 177, a connection terminal 178, a haptic module 179, a camera module 180, a power management module 188, a battery 189, a communication module 190, a user identification module (SIM) 196, or an antenna module 197. In some embodiments, at least one of the above components (e.g., the connection terminal 178) may be omitted from the electronic device 101, or one or more other components may be added to the electronic device 101. In some embodiments, some of the above-described components (eg, sensor module 176 , camera module 180 , or antenna module 197 ) may be implemented as a single integrated component (eg, display module 160 ).

[0019] The processor 120 may run, for example, software (e.g., program 140) to control at least one other component (e.g., hardware component or software component) of the electronic device 101 connected to the processor 120, and may perform various data processing or calculations. According to one embodiment, as at least part of the data processing or calculation, the processor 120 may store a command or data received from another component (e.g., sensor module 176 or communication module 190) in the volatile memory 132, process the command or data stored in the volatile memory 132, and store the resultant data in the non-volatile memory 134. According to an embodiment, the processor 120 may include a main processor 121 (e.g., a central processing unit (CPU) or an application processor (AP)) or an auxiliary processor 123 (e.g., a graphics processing unit (GPU), a neural processing unit (NPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)) that is independent of or combined with the main processor 121 in operation. For example, when the electronic device 101 includes a main processor 121 and an auxiliary processor 123, the auxiliary processor 123 may be adapted to consume less power than the main processor 121, or adapted to be dedicated to a specific function. The auxiliary processor 123 may be implemented separately from the main processor 121, or as part of the main processor 121.

[0020] When the main processor 121 is in an inactive (e.g., sleep) state, the auxiliary processor 123 (rather than the main processor 121) may control at least some of the functions or states related to at least one component among the components of the electronic device 101 (e.g., display module 160, sensor module 176, or communication module 190), or when the main processor 121 is in an active state (e.g., running an application), the auxiliary processor 123 may control at least some of the functions or states related to at least one component among the components of the electronic device 101 (e.g., display module 160, sensor module 176, or communication module 190) together with the main processor 121. According to an embodiment, the auxiliary processor 123 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., camera module 180 or communication module 190) that is functionally related to the auxiliary processor 123. According to an embodiment, the auxiliary processor 123 (e.g., a neural processing unit) may include a hardware structure dedicated to artificial intelligence model processing. The artificial intelligence model may be generated through machine learning. For example, such learning can be performed by the electronic device 101 where the artificial intelligence is executed or via a separate server (e.g., server 108). The learning algorithm may include, but is not limited to, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, for example. The artificial intelligence model may include multiple artificial neural network layers. The artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), or a deep Q network or a combination of two or more thereof, but is not limited thereto. Additionally or optionally, the artificial intelligence model may include a software structure in addition to a hardware structure.

[0021] The memory 130 may store various data used by at least one component of the electronic device 101 (e.g., the processor 120 or the sensor module 176). The various data may include, for example, software (e.g., the program 140) and input data or output data for commands related thereto. The memory 130 may include a volatile memory 132 or a non-volatile memory 134.

[0022] The program 140 may be stored as software in the memory 130 , and may include, for example, an operating system (OS) 142 , middleware 144 , or applications 146 .

[0023] The input module 150 may receive commands or data to be used by other components (e.g., the processor 120) of the electronic device 101 from outside (e.g., a user) of the electronic device 101. The input module 150 may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus).

[0024] The sound output module 155 can output sound signals to the outside of the electronic device 101. The sound output module 155 may include, for example, a speaker or a receiver. The speaker may be used for general purposes such as playing multimedia or playing records. The receiver may be used to receive incoming calls. Depending on the embodiment, the receiver may be implemented as a separate part from the speaker, or as part of the speaker.

[0025] The display module 160 may visually provide information to the outside of the electronic device 101 (e.g., a user). The display device 160 may include, for example, a display, a holographic device, or a projector, and a control circuit for controlling a corresponding one of the display, the holographic device, and the projector. According to an embodiment, the display module 160 may include a touch sensor adapted to detect a touch or a pressure sensor adapted to measure the strength of a force caused by a touch.

[0026] The audio module 170 may convert sound into an electrical signal, or vice versa. According to an embodiment, the audio module 170 may obtain sound via the input module 150, or output sound via the sound output module 155 or an earphone of an external electronic device (e.g., electronic device 102) directly (e.g., wired) or wirelessly connected to the electronic device 101.

[0027] The sensor module 176 may detect an operating state (e.g., power or temperature) of the electronic device 101 or an environmental state (e.g., a user's state) outside the electronic device 101, and then generate an electrical signal or data value corresponding to the detected state. According to an embodiment, the sensor module 176 may include, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illumination sensor.

[0028] The interface 177 may support one or more specific protocols to be used to connect the electronic device 101 directly (e.g., wired) or wirelessly to an external electronic device (e.g., the electronic device 102). According to an embodiment, the interface 177 may include, for example, a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, a secure digital (SD) card interface, or an audio interface.

[0029] The connection end 178 may include a connector, wherein the electronic device 101 can be physically connected to an external electronic device (e.g., the electronic device 102) via the connector. According to an embodiment, the connection end 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0030] The haptic module 179 may convert the electric signal into mechanical stimulation (eg, vibration or motion) or electric stimulation recognizable by the user via his sense of touch or kinesthetic sense. According to an embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electric stimulator.

[0031] The camera module 180 may capture still images or moving images. According to an embodiment, the camera module 180 may include one or more lenses, an image sensor, an image signal processor, or a flash.

[0032] The power management module 188 may manage power supply to the electronic device 101. According to one embodiment, the power management module 188 may be implemented as, for example, at least a portion of a power management integrated circuit (PMIC).

[0033] The battery 189 may power at least one component of the electronic device 101. According to an embodiment, the battery 189 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0034] The communication module 190 may support establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (e.g., electronic device 102, electronic device 104, or server 108), and perform communication via the established communication channel. The communication module 190 may include one or more communication processors capable of operating independently from the processor 120 (e.g., an application processor (AP)) and supporting direct (e.g., wired) communication or wireless communication. According to an embodiment, the communication module 190 may include a wireless communication module 192 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (e.g., a local area network (LAN) communication module or a power line communication (PLC) module). A corresponding one of these communication modules can communicate with an external electronic device via a first network 198 (e.g., a short-range communication network such as Bluetooth, Wireless Fidelity (Wi-Fi) Direct, or Infrared Data Association (IrDA)) or a second network 199 (e.g., a long-range communication network such as a traditional cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or a wide area network (WAN))). These various types of communication modules may be implemented as a single component (e.g., a single chip), or may be implemented as multiple components (e.g., multiple chips) separated from each other. The wireless communication module 192 may identify and authenticate the electronic device 101 in a communication network (such as the first network 198 or the second network 199) using user information (e.g., an International Mobile Subscriber Identity (IMSI)) stored in the user identification module 196.

[0035] The wireless communication module 192 can support 5G networks after 4G networks and next-generation communication technologies (e.g., new radio (NR) access technology). NR access technology can support enhanced mobile broadband (eMBB), massive machine type communication (mMTC), or ultra-reliable low latency communication (URLLC). The wireless communication module 192 can support high frequency bands (e.g., millimeter wave bands) to achieve, for example, high data transmission rates. The wireless communication module 192 can support various technologies for ensuring performance on high frequency bands, such as, for example, beamforming, massive multiple input multiple output (massive MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, or massive antennas. The wireless communication module 192 can support various requirements specified in the electronic device 101, an external electronic device (e.g., electronic device 104), or a network system (e.g., a second network 199). According to an embodiment, the wireless communication module 192 may support a peak data rate for implementing eMBB (e.g., 20 Gbps or greater), loss coverage for implementing mMTC (e.g., 164 dB or less), or U-plane delay for implementing URLLC (e.g., 0.5 ms or less for each of the downlink (DL) and uplink (UL), or 1 ms or less for a round trip).

[0036] The antenna module 197 may transmit or receive a signal or power to or from the outside of the electronic device 101 (e.g., an external electronic device). According to an embodiment, the antenna module 197 may include an antenna including a radiation element formed of a conductive material or a conductive pattern formed in or on a substrate (e.g., a printed circuit board (PCB)). According to an embodiment, the antenna module 197 may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication scheme used in a communication network (such as the first network 198 or the second network 199) may be selected from the plurality of antennas by, for example, the communication module 190 (e.g., the wireless communication module 192). A signal or power may then be transmitted or received between the communication module 190 and the external electronic device via the selected at least one antenna. According to an embodiment, another component (e.g., a radio frequency integrated circuit (RFIC)) other than the radiation element may be additionally formed as a part of the antenna module 197.

[0037] According to various embodiments, the antenna module 197 may form a millimeter wave antenna module. According to an embodiment, the millimeter wave antenna module may include a printed circuit board, a radio frequency integrated circuit (RFIC), and a plurality of antennas (e.g., array antennas), wherein the RFIC is disposed on a first surface (e.g., bottom surface) of the printed circuit board, or adjacent to the first surface and capable of supporting a designated high frequency band (e.g., millimeter wave band), and the plurality of antennas are disposed on a second surface (e.g., top surface or side surface) of the printed circuit board, or adjacent to the second surface and capable of transmitting or receiving signals of the designated high frequency band.

[0038] At least some of the above components may be connected to each other via an inter-peripheral communication scheme (e.g., a bus, a general purpose input output (GPIO), a serial peripheral interface (SPI), or a mobile industry processor interface (MIPI)) and communicatively transfer signals (e.g., commands or data) therebetween.

[0039] According to an embodiment, a command or data may be sent or received between the electronic device 101 and the external electronic device 104 via the server 108 connected to the second network 199. Each of the electronic device 102 or the electronic device 104 may be a device of the same type as the electronic device 101, or a device of a different type from the electronic device 101. According to an embodiment, all or some operations to be executed in the electronic device 101 may be executed in one or more of the external electronic device 102, the external electronic device 104, or the server 108. For example, if the electronic device 101 should automatically execute a function or service or should execute a function or service in response to a request from a user or another device, the electronic device 101 may request the one or more external electronic devices to execute at least part of the function or service instead of executing the function or service, or the electronic device 101 may request the one or more external electronic devices to execute at least part of the function or service in addition to executing the function or service. The one or more external electronic devices receiving the request may execute at least part of the requested function or service, or execute another function or another service related to the request, and transmit the result of the execution to the electronic device 101. The electronic device 101 may provide the result as at least a partial reply to the request with or without further processing the result. To this end, cloud computing technology, distributed computing technology, mobile edge computing (MEC) technology, or client-server computing technology, for example, may be used. The electronic device 101 may use, for example, distributed computing or mobile edge computing to provide ultra-low latency services. In another embodiment, the external electronic device 104 may include an Internet of Things (IoT) device. The server 108 may be an intelligent server using machine learning and / or neural networks. According to an embodiment, the external electronic device 104 or the server 108 may be included in the second network 199. The electronic device 101 may be applied to intelligent services (e.g., smart homes, smart cities, smart cars, or healthcare) based on 5G communication technology or IoT-related technologies.

[0040] Figure 2 is a block diagram 200 illustrating a camera module 180 according to various embodiments.

[0041] Reference Figure 2, the camera module 180 may include a lens assembly 210, a flash 220, an image sensor 230, an image stabilizer 240, a memory 250 (e.g., a buffer memory), or an image signal processor 260. The lens assembly 210 may collect light emitted or reflected from an object whose image is to be captured. The lens assembly 210 may include one or more lenses. According to an embodiment, the camera module 180 may include a plurality of lens assemblies 210. In this case, the camera module 180 may form, for example, a dual camera, a 360-degree camera, or a spherical camera. Some of the plurality of lens assemblies 210 may have the same lens properties (e.g., viewing angle, focal length, autofocus, f-number, or optical zoom), or at least one lens assembly may have one or more lens properties different from those of another lens assembly. The lens assembly 210 may include, for example, a wide-angle lens or a telephoto lens.

[0042] The flash 220 may emit light, wherein the emitted light is used to enhance the light reflected from the object. According to an embodiment, the flash 220 may include one or more light emitting diodes (LEDs) (e.g., red, green, blue (RGB) LEDs, white LEDs, infrared (IR) LEDs, or ultraviolet (UV) LEDs) or xenon lamps. The image sensor 230 may acquire an image corresponding to the object by converting light emitted or reflected from the object and transmitted through the lens assembly 210 into an electrical signal. According to an embodiment, the image sensor 230 may include one image sensor selected from a plurality of image sensors having different properties (such as an RGB sensor, a black and white (BW) sensor, an IR sensor, or a UV sensor), a plurality of image sensors having the same properties, or a plurality of image sensors having different properties. Each image sensor included in the image sensor 230 may be implemented using, for example, a charge coupled device (CCD) sensor or a complementary metal oxide semiconductor (CMOS) sensor.

[0043] The image stabilizer 240 may move the image sensor 230 or at least one lens included in the lens assembly 210 in a specific direction, or control an operational property of the image sensor 230 (e.g., adjust the readout timing) in response to the movement of the camera module 180 or the electronic device 101 including the camera module 180. In this way, at least a portion of the negative effects (e.g., image blur) generated due to the movement of the image being captured is allowed to be compensated. According to an embodiment, the image stabilizer 240 may sense such movement of the camera module 180 or the electronic device 101 using a gyro sensor (not shown) or an acceleration sensor (not shown) arranged inside or outside the camera module 180. According to an embodiment, the image stabilizer 240 may be implemented as, for example, an optical image stabilizer.

[0044] The memory 250 may at least temporarily store at least a portion of an image acquired via the image sensor 230 for subsequent image processing tasks. For example, if multiple images are captured quickly or image capture is delayed due to shutter lag, the acquired original image (e.g., Bayer pattern image, high-resolution image) may be stored in the memory 250, and its corresponding copy image (e.g., low-resolution image) may be previewed via the display module 160. Then, if a specified condition is met (e.g., by a user's input or a system command), at least a portion of the original image stored in the memory 250 may be acquired and processed by, for example, the image signal processor 260. According to an embodiment, the memory 250 may be configured as at least a portion of the memory 130, or the memory 250 may be configured as a separate memory that operates independently of the memory 130.

[0045] The image signal processor 260 may perform one or more image processing on an image acquired via the image sensor 230 or an image stored in the memory 250. The one or more image processing may include, for example, depth map generation, three-dimensional (3D) modeling, panorama generation, feature point extraction, image synthesis, or image compensation (e.g., noise reduction, resolution adjustment, brightness adjustment, blurring, sharpening, or softening). Additionally or alternatively, the image signal processor 260 may perform control (e.g., exposure time control or readout timing control) on at least one of the components included in the camera module 180 (e.g., the image sensor 230). The image processed by the image signal processor 260 may be stored back to the memory 250 for further processing, or the image may be provided to an external component (e.g., the memory 130, the display module 160, the electronic device 102, the electronic device 104, or the server 108) outside the camera module 180. According to an embodiment, the image signal processor 260 may be configured as at least a part of the processor 120, or the image signal processor 260 may be configured as a separate processor that operates independently of the processor 120. If the image signal processor 260 is configured as a separate processor from the processor 120 , at least one image processed by the image signal processor 260 may be displayed as it is by the processor 120 via the display module 160 , or may be displayed after being further processed.

[0046] According to an embodiment, the electronic device 101 may include a plurality of camera modules 180 having different properties or functions. In this case, at least one of the plurality of camera modules 180 may form, for example, a wide-angle camera, and at least another of the plurality of camera modules 180 may form a telephoto camera. Similarly, at least one of the plurality of camera modules 180 may form, for example, a front camera, and at least another of the plurality of camera modules 180 may form a rear camera.

[0047] Figure 3 is a block diagram of an electronic device according to various embodiments.

[0048] refer to Figure 3 , the electronic device 301 (eg, Figure 1 The electronic device 101 in the figure may be a device that collects light reflected from an external subject to capture a picture or video. The electronic device 301 may include a lens 310, an image sensor (or imaging element unit) 330, a sensor interface 335, an image processor 340, a memory 370, and a display 380.

[0049] The lens 310 may collect light reaching the device from the subject, and an image may be formed on the image sensor 330 by the collected light.

[0050] The image sensor 330 may convert light into electronic image data by using a photoelectric conversion effect. The image data may be transmitted to the image processor 340 through the sensor interface 335. The image sensor 330 may include a pixel group arranged in two dimensions, and may convert light into electronic image data at each pixel. The image sensor 330 may read out the electronic image data recorded at each pixel according to the photoelectric conversion effect.

[0051] According to an embodiment, the image sensor 330 may include a micro lens array. The micro lens array may be positioned to correspond to each pixel of the image sensor 330.

[0052] According to an embodiment, the image sensor 330 may include a separate computing unit (eg, a microcontroller unit; MCU). Hereinafter, at least some operations of the image processor 340 may be performed by the computing unit (or microcontroller unit) of the image sensor 330 .

[0053] According to various embodiments, the image sensor 330 may adjust the amount of light (exposure amount) delivered to the image sensor 330 using the exposure time determined by the image processor 340 .

[0054] The sensor interface 335 may perform an interface between the image sensor 330 and the image processor 340. According to an embodiment, the sensor interface 335 may be located in front of or behind the pre-processor 350 inside the image processor 340 depending on the configuration of the electronic device 301.

[0055] The image processor 340 may process the image data collected by the image sensor 330 through various processes, and may store the processed image data in the memory 370 or output the processed image data to the display 380 .

[0056] According to an embodiment, the image processor 340 may be a processor inside the electronic device 301 (eg, Figure 1 According to another embodiment, the image processor 340 may be connected to a processor within the electronic device 301 (eg, Figure 1 At least a portion of the functions performed by the image processor 340 may be performed by the processor 120 inside the electronic device 301 .

[0057] In various embodiments, the image processor 340 may include a pre-processor 350 (eg, a pre-ISP) and a main processor 360 (eg, an image signal processor (ISP)).

[0058] The pre-processor 350 (eg, pre-ISP) may store an image (or image frame) obtained by the image sensor 330. The pre-processor 350 may process or convert the image by loading the stored image.

[0059] The main processor 360 (e.g., an application processor (AP) or an ISP) may perform digital signal processing on the image signal processed by the preprocessor 350. The main processor 360 may generate an image signal by correcting or synthesizing a signal received from the preprocessor 350. The main processor 360 may allow the display 350 to display the generated image signal. The main processor 360 may perform conversion, such as amplification, conversion, and processing of an image data signal.

[0060] Memory 370 (eg, Figure 1 The memory 130 in the image processing unit may store the current image, information required to control the imaging device, and the like.

[0061] Display 380 (eg, Figure 1 The display module 160 in the image processor 340 may output an image by using the image data processed by the image processor 340.

[0062] Figure 4 is a circuit diagram of a unit pixel of an image sensor according to an embodiment.

[0063] refer to Figure 3 and Figure 4 The unit pixel 401 may receive light and convert it into an electrical signal. A plurality of unit pixels 401 may be included in the image sensor 330 .

[0064] The unit pixel 401 may include: a photodiode (hereinafter referred to as "PD") 410, a transfer gate (hereinafter referred to as "TG") 420, a first capacitor 435, a dynamic range gate (or conversion switch) (hereinafter referred to as "DRG") (440), a second capacitor 465, a reset gate (or reset switch) (hereinafter referred to as "RST") 450, a source follower (hereinafter referred to as "SF") 470, a row selector (hereinafter referred to as "SEL") 480 and an analog-to-digital converter (hereinafter referred to as "ADC") 490.

[0065] During a designated exposure time, the PD 410 may generate charges using light. The PD 410 may be connected to a first floating diffusion (FD) 430 through a TG 420. When the TG 420 is enabled (alternatively, when the TG 420 is turned on), charges accumulated in the PD 410 may be charged into a first capacitor 435 connected to the first FD 430.

[0066] The first capacitor 435 may be connected between the first FD 430 and the ground. When the TG 420 is enabled, the first capacitor 435 may mainly store charges transferred from the PD 410. According to an embodiment, the capacitance of the first capacitor 435 may be smaller than the capacitance of the second capacitor 465.

[0067] The DRG 440 may be connected between the first FD 430 and the second FD 460. A conversion gain of analog data may be adjusted according to on / off of the DRG 440.

[0068] For example, when the TG 420 is enabled and the DRG 440 is disabled (high conversion gain; hereinafter referred to as “HCG”), the charges charged in the first capacitor 435 may not move to the second capacitor 465. In the HCG, the charges charged in the first capacitor 435 may be read out through the SF 470 (hereinafter referred to as “first analog data”).

[0069] For another example, when the TG 420 and the DRG 440 are enabled (low conversion gain; hereinafter referred to as "LCG"), the first FD 430 and the second FD 460 may be connected to each other. In this case, the charge remaining in the PD 410 or the charge charged in the first capacitor 435 may be moved to the second capacitor 465. In the LCG, the charge charged in the first capacitor 435 and the second capacitor 465 may be read out through the SF 470 (hereinafter referred to as "second analog data").

[0070] The second capacitor 465 may be connected between the second FD 460 and the ground. When the TG 420 and the DRG 440 are enabled (LCG), the second capacitor 465 may store the charge remaining in the PD 410 or the charge transferred from the first capacitor 435. According to an embodiment, the capacitance of the second capacitor 465 may be greater than that of the first capacitor 435 (eg, 3 times).

[0071] The RST 450 may be connected between the power source VDD and the second FD 460. When the RST 450 and the DRG 440 are enabled, the first capacitor 435 and the second capacitor 465 may be reset to VDD.

[0072] According to an embodiment, in a state before the charge delivered by the PD 410 is stored in the first capacitor 435 and the second capacitor 465, the image sensor 330 may perform a correlated double sampling (CDS) operation to reduce noise. For example, the image sensor 330 may reset the data accumulated in the first capacitor and the second capacitor by turning on the RST 450 and the DRG 440. The image sensor 330 may read out the reset data remaining after the reset. The reset data may be data according to the charge remaining in the first capacitor or the second capacitor in the reset state instead of the charge charged by the PD 410. The image sensor 330 may obtain the actual image data by removing (e.g., eliminating using a subtractor) the reset data from the first analog data or the second analog data.

[0073] The SF 470 may be connected between the first FD 430 and the SEL 480. When the SEL 480 is enabled, the SF 470 may deliver the first analog data or the second analog data to the ADC 490.

[0074] When the SEL 480 is enabled, analog data may be converted to digital data. The image sensor 330 may enable the SEL 480 to output image data in a specific row.

[0075] ADC 490 may generate digital data by converting analog data to a specified gain (or analog gain). In HCG, ADC 490 may convert first analog data into first digital data by using a saturation voltage corresponding to a relatively high first gain (e.g., ×4) (high slope gain (HSG)). In addition, in LCG, ADC 490 may convert second analog data into second digital data by using a saturation voltage corresponding to a relatively low second gain (e.g., ×1) (low slope gain (LSG)).

[0076] According to an embodiment, the ADC 490 may be implemented as a plurality of ADCs 490. When one ADC 490 is provided, HSG and LSG may be performed in time sequence (time division). When a plurality of ADCs 490 exist, the plurality of ADCs 490 may operate at different gains, and digital data may be generated quickly.

[0077] Hereinafter, description will be made for the case where the first gain is ×4 and the second gain is ×1. However, the embodiment is not limited thereto. The first gain or the second gain may be adjusted or changed to the extent permitted by the ADC 490. For example, the first gain may be ×8 and the second gain may be ×0.5.

[0078] According to an embodiment, the image sensor 330 may charge the first capacitor 435 (HCG) through one exposure to obtain first analog data. The image sensor 330 may apply a relatively high first gain (e.g., ×4) to the first analog data obtained in the HCG through the ADC 490 to generate first digital data. Thereafter, the image sensor 330 may transfer the remaining charge in the PD 410 or the charge of the first capacitor 435 to the second capacitor 465 (LCG) without additional exposure, and may obtain second analog data. The image sensor 330 may apply a relatively low second gain (e.g., ×1) to the second analog data obtained in the LCG through the ADC 490 to generate second digital data.

[0079] The image sensor 330 (or alternatively, the processor 120 or the image processor 340) can generate an HDR image based on the first digital data through HCG and HSG and the second digital data through LCG and LSG. In this case, an image with a high HDR ratio can be obtained and noise can be improved.

[0080] Figure 4 It is shown that the unit pixel 401 includes one PD 410, but is not limited thereto. For example, the unit pixel 401 may include first to fourth PDs and first to fourth TGs. The first PD may be connected to the first FD via the first TG. The second PD may be connected to the first FD via the second TG. The third PD may be connected to the first FD via the third TG. The fourth PD may be connected to the first FD via the fourth TG. The image sensor 330 may expose the first to fourth PDs at one time, and may apply dual conversion gain (DCG: HCG and LCG) and dual slope gain (DSG; HSG and LSG).

[0081] Figure 5 The operation of the image sensor according to the embodiment through HCG and HSG is illustrated.

[0082] refer to Figure 5 , the PD 410 may generate charges by using light during a designated exposure time. When the TG 420 is enabled, the charges accumulated in the PD 410 may be charged in the first capacitor 435 connected to the first FD 430. In the HCG where the DRG 440 is disabled, the charges stored in the first capacitor 435 may be maintained without being moved to the second capacitor 465. In the tank model 501, the first tank 435a corresponding to the first capacitor 435 may contain water (corresponding to the charges being charged), and the second tank 465a corresponding to the second capacitor 465 may not contain water.

[0083] According to an embodiment, the charge remaining after resetting (reset data), instead of the charge delivered from PD 410, may be retained in first capacitor 435. The reset data may be removed by a separate CDS operation (see Figure 7 ).

[0084] While ADC 490 converts the first analog data obtained in HCG into first digital data, the saturation voltage can be adjusted (HSG) to correspond to a relatively high first gain (e.g., x4). In the box model 501, the first gain of ADC 490 can correspond to a scale 490a for measuring the water level in the box. As the gain increases, the scale interval of the scale for measuring the water level can be reduced. Therefore, as the scale interval decreases, the height of the water can be read as a relatively large value. The first digital data generated by HCG and HSG can be data that is conducive to representing a dark part because the input conversion noise value (=noise / gain) is reduced.

[0085] Figure 6 The operation of the image sensor according to the embodiment through the LCG and the LSG is illustrated.

[0086] refer to Figure 6 , the PD 410 may generate charges by using light during a designated exposure time. When the TG 420 is enabled, the charges accumulated in the PD 410 may be charged in the first capacitor 435 connected to the first FD 430. In the LCG where the DRG 440 is enabled, the charges remaining in the PD 410 or the charges charged in the first capacitor 435 may move to the second capacitor 465. In the tank model 601, water (corresponding to the charges being charged) may be contained in the second tank 495a corresponding to the first capacitor 435 and the second capacitor 465. The capacity of the second tank 495a may be greater than Figure 5 Therefore, when containing the same amount of water, the water level of the second tank 495a can be lower than Figure 5 The first box 435a.

[0087] According to an embodiment, the charge remaining after resetting (reset data), which is not the charge delivered from PD 410, may be retained in first capacitor 435 or second capacitor 465. The reset data may be removed by a separate CDS operation (see Figure 7 ).

[0088] While ADC 490 converts the second analog data obtained in LCG into second digital data, the saturation voltage can be adjusted (LSG) to correspond to a relatively low second gain (e.g., x1). In the box model 601, the second gain of ADC 490 can correspond to a scale 490b for measuring the water level in the box. As the gain decreases, the scale interval of the scale for measuring the water level can increase. Therefore, as the scale interval increases, the height of the water can be read as a relatively low value. The second digital data generated by LCG and LSG can be data that is conducive to reducing the saturation of the bright part and represents the bright part.

[0089] Figure 7 Generation of an HDR image by DR extension according to an embodiment is shown. Figure 7 This is just an example, but not limiting.

[0090] refer to Figure 7 The image sensor 330 may obtain the first digital data and the second digital data by applying a dual conversion gain (DCG) (HCG or LCG) and a dual slope gain (DSG) (HSG or LSG) after one exposure. The image sensor 330 may extend the DR by using the first digital data and the second digital data, and may generate an HDR image.

[0091] According to an embodiment, the image sensor 330 may perform a CDS operation to reduce noise. For example, the image sensor 330 may enable RST 450 and DRG 440 to reset the first capacitor 435 and the second capacitor 465 to VDD. The image sensor 330 may read out the reset data remaining after the reset. The reset data may be data of the charge remaining in the first capacitor 435 or the second capacitor 465 in the reset state instead of the charge charged by the PD 410. The reset data may be stored in a separate CDS circuit. Afterwards, the image sensor 330 may deactivate RST 450 and DRG 440, and may perform DCG and DSG to obtain the first analog data and the second analog data based on the charge obtained by the PD 410. The image sensor 330 may obtain actual image data by removing (e.g., eliminating using a subtractor) the reset data from the first analog data and the second analog data.

[0092] According to an embodiment, when DCG is applied but DSG is not applied (701), DR may be extended according to the ratio between the capacitance of the first capacitor 435 and the capacitance of the second capacitor 465. For example, the capacitance of the second capacitor may be three times the capacitance of the first capacitor. In this case, the conversion gain between the HCG digital data 715 and the LCG digital data 725 may be 1:4. The HDR image 730 may be generated by performing tone mapping on the HCG digital data 715 and the LCG digital data 725.

[0093] The HCG data 713 may be converted into 10-bit HCG digital data 715. For example, the image sensor 330 may generate the HCG digital data 715 by removing the HCG reset data 711 from the HCG data 713. The HCG digital data 715 may be relatively bright data obtained by using the charge charged in the first capacitor 435. The HCG digital data 715 may increase saturated pixels in a bright portion, but may be advantageous in displaying a dark portion.

[0094] The LCG data 723 may be converted into 10-bit LCG digital data 725. For example, the image sensor 330 may generate the LCG digital data 725 by removing the LCG reset data 721 from the LCG data 723. The LCG digital data 725 may be relatively dark data obtained by using the charges charged in the first capacitor 435 and the second capacitor 465. Saturated pixels are reduced in a bright portion of the LCG digital data 725, which may facilitate display of the bright portion.

[0095] The image sensor 330 may generate HDR data 730 having DR extended to 12 bits by combining the HCG digital data 715 and the LCG digital data 725. Dark data (or lower bits) (0th and first bits) of the HDR data 730 may be based on the HCG digital data 715. Bright data (or upper bits) (10th and 11th bits) of the HDR data 730 may be based on the LCG digital data 725.

[0096] For example, the image sensor 330 may generate the HDR data 730 by performing zero padding and tone mapping on the HCG digital data 715 and the LCG digital data 725. The processor 120 may add dummy data (e.g., 00) to the HCG digital data 715 by using the most significant bit (MSB) zero padding, and may add dummy data (e.g., 00) to the LCG digital data 725 by using the least significant bit (LSB) zero padding. Thereafter, the processor 120 may generate the HDR data 730 by performing tone mapping.

[0097] When DSG is additionally applied to DCG (Multi-Conversion Slope Gain (MCSG)) ( 702 ), DR may be expanded depending on the gain of the ADC 490 and the capacitance ratio between the first capacitor 435 and the second capacitor 465 .

[0098] In HCG and HSG, the first analog data (HCG+HSG) 763 may be converted into 10-bit first digital data 765. For example, the image sensor 330 may remove the reset data (HCG+HSG) 761 from the first analog data (HCG+HSG) 763, and may generate the first digital data 765 by applying the first gain (×4). The first digital data 765 may be relatively bright data obtained from the charge charged in the first capacitor 435. The first digital data 765 may increase saturated pixels in a bright portion, but may be advantageous in displaying a dark portion.

[0099] In LCG and LSG, the second analog data (LCG+LSG) 773 may be converted into 10-bit second digital data 775. For example, the image sensor 330 may remove the reset data (LCG+LSG) 771 from the second analog data 773, and may generate the second digital data 775 by applying the second gain (x1). The second digital data 775 may be relatively dark data obtained from the charges charged in the first capacitor 435 and the second capacitor 465. Saturated pixels are reduced in the bright portion of the second digital data 775, which may facilitate display of the bright portion.

[0100] The image sensor 330 may generate HDR data 780 having a DR extended to 14 bits by combining the first digital data 765 and the second digital data 775. Dark data (or lower bits) (0th to third bits) of the HDR data 780 may be based on the first digital data 765. Bright data (or upper bits) (10th to 13th bits) of the HDR data 780 may be based on the second digital data 775.

[0101] For example, the processor 120 may generate the HDR data 780 by performing zero padding and tone mapping on the first digital data 765 and the second digital data 775. The processor 120 may add dummy data (e.g., 0000) to the first digital data 765 by using MSB zero padding, and may add dummy data (e.g., 0000) to the second digital data 775 by using LSB zero padding. Thereafter, the processor 120 may generate the HDR data 780 by performing tone mapping.

[0102] According to an embodiment, the HDR data 730 may be provided by Figure 3 Image processor 340 or Figure 1 The processor 120 may generate, or may respond to, Figure 3Image processor 340 or Figure 1 Generated by a control signal generated by the processor 120.

[0103] Figure 8 A noise reduction mode operation according to an embodiment is shown.

[0104] refer to Figure 8 , when DSG is additionally applied to DCG (Multi-Conversion Slope Gain (MCSG)) (801), the image sensor 330 may reduce noise by operating in a low noise mode (LN mode).

[0105] In HCG and HSG, the first analog data (HCG+HSG) 863 may be converted into 10-bit first digital data 865. For example, the image sensor 330 may remove the reset data (HCG+HSG) 861 from the first analog data (HCG+HSG) 863 and may generate the first digital data 865 by applying a first gain (×4).

[0106] In HCG and HSG, the image sensor 330 may obtain first analog data (HCG+HSG) 863 in a low noise mode (LN mode). The image sensor 330 may perform readout in HCG and HSG multiple times and may calculate the first analog data (HCG+HSG) 863 by averaging the readout results.

[0107] According to an embodiment, the image sensor 330 may obtain reset data (HCG+HSG) 861 in the LN mode. The image sensor 330 may perform readout of the reset data multiple times in HCG and HSG, and may calculate the reset data (HCG+HSG) 861 by averaging the readout results.

[0108] In LCG and LSG, the second analog data (LCG+LSG) 873 may be converted into 10-bit second digital data 875. For example, the image sensor 330 may remove the reset data (LCG+LSG) 871 from the second analog data 873, and may generate the second digital data 875 by applying the second gain (x1). The image sensor 330 may generate HDR data 880 having a DR extended to 14 bits by combining the first digital data 865 and the second digital data 875. Dark data (0th to third bits) of the HDR data 880 may be based on the first digital data 865. Bright data (10th to 13th bits) of the HDR data 880 may be based on the second digital data 875.

[0109] According to an embodiment, the image sensor 330 may change the method of applying DCG or DSG according to the shooting environment. For example, in a high illumination environment where the noise deviation is not large, the image sensor 330 may apply HDR of the DSG method. For another example, in a low illumination environment, the image sensor 330 may operate in LN mode to reduce readout noise.

[0110] According to an embodiment, an electronic device (101; 301) may include an image sensor (230; 330), a processor (120) and a memory (130). The image sensor (230; 330) may include: at least one photodiode (410), a transmission gate (TG) (420) connecting the at least one photodiode (410) to a first node (FD1 node) (430), a first capacitor (435) connected to the first node (430) and having a first capacitance, a dynamic range gate (DRG) (440) connected between the first node (430) and a second node (FD2 node) (460), a second capacitor (465) connected to the second node (460) and having a second capacitance, a microcontroller unit selectively obtaining first analog data and second analog data at the first node (430) or the second node (460) by controlling the DRG (440), and an analog-to-digital converter (ADC) (490) converting the first analog data and the second analog data into digital data with different gains.

[0111] According to an embodiment, the microcontroller unit can charge at least one photodiode (410) through one exposure, can charge the first capacitor (435) by turning on the TG (420) while deactivating the DRG (440), and can obtain first analog data by reading out the charge charged in the first capacitor (435).

[0112] According to an embodiment, the microcontroller unit charges the second capacitor (465) by turning on TG (420) and DRG (440) after obtaining the first analog data, and obtains the second analog data by reading out the charges charged in the first capacitor (435) and the second capacitor (465).

[0113] According to an embodiment, the image sensor (230; 330) may further include a reset switch (450) connected between the second node (460) and a power supply. Before exposing the at least one photodiode (410), the image sensor (230; 330) may enable the reset switch (450) and the DRG (440).

[0114] According to an embodiment, the image sensor (230; 330) may store a value of residual charge of the first capacitor (435) or the second capacitor (465) before obtaining the first analog data and the second analog data, and may obtain the first analog data and the second analog data based on the value of the residual charge.

[0115] According to an embodiment, the microcontroller unit may convert the first analog data into the first digital data by applying a first saturation voltage corresponding to the first gain to the ADC (490), and may convert the second analog data into the second digital data by applying a second saturation voltage corresponding to a second gain smaller than the first gain to the ADC (490).

[0116] According to an embodiment, the first gain may be four times the second gain.

[0117] According to an embodiment, the microcontroller unit may generate an HDR image by combining the first digital data and the second digital data.

[0118] According to an embodiment, the microcontroller unit may generate an HDR image by performing zero padding and tone mapping on the first digital data and the second digital data.

[0119] According to an embodiment, in the HDR image, the microcontroller unit may generate dark data below a first reference value based on the first digital data, and may generate bright data above a second reference value based on the second digital data, the second reference value being greater than the first reference value.

[0120] According to an embodiment, the HDR image may have an HDR ratio of 16 times that of the first digital data or the second digital data.

[0121] According to an embodiment, the second capacitance may be three times the first capacitance.

[0122] According to an embodiment, the ADC (490) may include a plurality of ADCs (490). The plurality of ADCs (490) may operate at different gains from each other.

[0123] According to an embodiment, the microcontroller unit may read out the first analog data or the second analog data a plurality of times, and may supply an average value to the ADC (490).

[0124] According to an embodiment, the electronic device (101; 301) may further include a sensor module (179). The processor (120) may obtain information related to capturing an image using the sensor module (179), and may allow the image sensor (230; 330) to obtain the first analog data or the second analog data, or adjust the gain of the ADC (490) based on the information.

[0125] According to an embodiment, an electronic device (101; 301) may include a camera module (180), a processor (120) and a memory (130). The camera module (180) may include a lens (210; 310), an image sensor (230; 330) and an image signal processor (260). The image sensor (230; 330) may include: at least one photodiode (410), a transmission gate (TG) (420) connecting the at least one photodiode (410) to a first node (FD1 node) (430), a first capacitor (435) connected to the first node (430) and having a first capacitance, a DRG (440) connected between the first node (430) and a second node (FD2 node) (460), and a second capacitor (465) connected to the second node (460) and having a second capacitance. The image signal processor (260) can selectively obtain the first analog data and the second analog data at the first node (430) or the second node (460) by controlling the DRG (440), and can convert the first analog data and the second analog data into digital data having different gains.

[0126] According to an embodiment, the image signal processor (260) can charge at least one photodiode (410) through one exposure, can charge the first capacitor (435) by turning on the TG (420) while deactivating the DRG (440), and can obtain first analog data by reading out the charge charged in the first capacitor (435).

[0127] According to an embodiment, after obtaining the first analog data, the image signal processor (260) charges the second capacitor (465) by turning on the TG (420) and the DRG (440), and obtains the second analog data by reading out the charges charged in the first capacitor (435) and the second capacitor (465).

[0128] According to an embodiment, the image signal processor (260) can convert the first analog data into the first digital data by applying a first saturation voltage corresponding to the first gain, and can convert the second analog data into the second digital data by applying a second saturation voltage corresponding to a second gain smaller than the first gain.

[0129] According to an embodiment, the image signal processor (260) may generate an HDR image by combining the first digital data and the second digital data.

[0130] According to an embodiment, the second capacitance may be three times the first capacitance.

[0131] The electronic device according to the embodiments disclosed in this specification can generate an HDR image by adjusting the readout of the image sensor. Therefore, unlike the HDR method using multiple images at different exposure time points, since the HDR image can be generated by a single exposure, side effects such as ghosting effects do not occur.

[0132] According to the embodiments disclosed in the specification, the electronic device may enhance the HDR effect and improve the dark portion SNR by applying dual conversion gain (DCG) (HCG and LCG) and dual slope gain (DSG) (HSG and LSG) related to readout of an image sensor.

[0133] It should be understood that the various embodiments of the present disclosure and the terms used therein are not intended to limit the technical features set forth herein to specific embodiments, but include various changes, equivalent forms or alternative forms for the corresponding embodiments. For the description of the accompanying drawings, similar reference numerals may be used to refer to similar or related elements. It will be understood that the nouns in the singular form corresponding to the term may include one or more things unless the relevant context clearly indicates otherwise. As used herein, each of the phrases such as "A or B", "at least one of A and B", "at least one of A or B", "A, B or C", "at least one of A, B and C" and "at least one of A, B or C" may include any one or all possible combinations of the items listed together with the corresponding one of the multiple phrases. As used herein, terms such as "1st" and "2nd" or "first" and "second" may be used to simply distinguish the corresponding component from another component, and do not limit the component in other aspects (e.g., importance or order). It will be understood that if an element (e.g., a first element) is referred to as being “coupled with another element (e.g., the second element)”, “coupled to another element (e.g., the second element)”, “connected with another element (e.g., the second element)”, or “connected to another element (e.g., the second element)” with or without the terms “operably” or “communicatively” being used, it means that the element may be directly (e.g., wired) connected to the other element, wirelessly connected to the other element, or connected to the other element via a third element.

[0134] As used in connection with various embodiments of the present disclosure, the term "module" may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with other terms (e.g., "logic," "logic block," "portion," or "circuit"). A module may be a single integrated component adapted to perform one or more functions or a minimum unit or portion of the single integrated component. For example, according to an embodiment, a module may be implemented in the form of an application specific integrated circuit (ASIC).

[0135] The various embodiments described herein may be implemented as software (e.g., program 140) including one or more instructions stored in a storage medium (e.g., internal memory 136 or external memory 138) that can be read by a machine (e.g., electronic device 101). For example, under the control of a processor, a processor (e.g., processor 120) of the machine (e.g., electronic device 101) may call at least one of the one or more instructions stored in the storage medium and execute the at least one instruction with or without the use of one or more other components. This enables the machine to operate to perform at least one function according to the at least one instruction called. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Among them, the term "non-transitory" only means that the storage medium is a tangible device and does not include signals (e.g., electromagnetic waves), but the term does not distinguish between data being semi-permanently stored in the storage medium and data being temporarily stored in the storage medium.

[0136] According to an embodiment, the method according to various embodiments of the present disclosure may be included and provided in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be released in the form of a machine-readable storage medium (e.g., a compact disk read-only memory (CD-ROM)), or may be downloaded via an application store (e.g., Play Store TM ) the computer program product may be published (e.g., downloaded or uploaded) online, or the computer program product may be distributed (e.g., downloaded or uploaded) directly between two user devices (e.g., smart phones). If published online, at least part of the computer program product may be temporarily generated, or at least part of the computer program product may be at least temporarily stored in a machine-readable storage medium (such as a memory of a manufacturer's server, a server of an application store, or a forwarding server).

[0137] According to various embodiments, each of the above-mentioned components (e.g., a module or a program) may include a single entity or multiple entities, and some of the multiple entities may be separately arranged in different components. According to various embodiments, one or more of the above-mentioned components may be omitted, or one or more other components may be added. Alternatively or additionally, multiple components (e.g., a module or a program) may be integrated into a single component. In this case, according to various embodiments, the integrated component may still perform the one or more functions of each of the multiple components in the same or similar manner as a corresponding one of the multiple components performing one or more functions before integration. According to various embodiments, the operations performed by a module, a program or another component may be performed sequentially, in parallel, repeatedly or in a heuristic manner, or one or more of the operations may be run or omitted in a different order, or one or more other operations may be added.

Claims

1. An electronic device (101; 301), the electronic device (101; 301) comprising: Image sensor (230; 330); Processor (120); as well as Memory (130), Wherein, the image sensor (230; 330) comprises: at least one photodiode (410); a transmission gate (TG) (420) connecting the at least one photodiode (410) to a first node (FD1 node) (430); a first capacitor (435) connected to the first node (430) and having a first capacitance; a dynamic range gate (440) connected between the first node (430) and a second node (FD2 node) (460); a second capacitor (465) connected to the second node (460) and having a second capacitance; a microcontroller unit configured to obtain first analog data at the first node (430) by deactivating the dynamic range gate (440) and to obtain second analog data at the second node (460) by enabling the dynamic range gate (440), The processor is configured to generate a high dynamic range (HDR) image based on the first simulation data and the second simulation data.

2. The electronic device (101; 301) according to claim 1, wherein: The microcontroller unit is further configured to: charging the at least one photodiode (410) by performing a single exposure, By enabling the TG (420) and disabling the dynamic range gate (440), the first capacitor (435) is charged, and The first analog data is obtained by reading out the charge in the first capacitor (435).

3. The electronic device (101; 301) according to claim 2, wherein: The microcontroller unit is further configured to: After obtaining the first analog data, charging the second capacitor (465) by enabling the transmission gate (420) and enabling the dynamic range gate (440), and The second analog data is obtained by reading out the charge in the first capacitor (435) and the charge in the second capacitor (465).

4. The electronic device (101; 301) according to claim 2, wherein: The image sensor (230; 330) further includes a reset switch (450) connected between the second node (460) and a power source, and The microcontroller unit is further configured to: enable the reset switch (450) and enable the dynamic range gate (440) before performing the single exposure on the at least one photodiode (410) to determine the value of the residual charge on the first capacitor (435) or the second capacitor (465).

5. The electronic device (101; 301) according to claim 4, wherein: The image sensor (230; 330) is configured as follows: before obtaining the first analog data and the second analog data, storing the value of the residual charge, and The first analog data and the second analog data are obtained based on the value of the residual charge.

6. The electronic device (101; 301) according to claim 1, wherein: The image sensor further includes an analog-to-digital converter (ADC) (490) configured to convert analog data into digital data based on the gain value, and Wherein, the microcontroller unit is further configured as: converting the first analog data into first digital data by applying a first saturation voltage corresponding to a first gain to the ADC (490), and The second analog data is converted into second digital data by applying a second saturation voltage corresponding to a second gain smaller than the first gain to the ADC (490).

7. The electronic device (101; 301) according to claim 6, wherein: The first gain is four times the second gain.

8. The electronic device (101; 301) according to claim 6, wherein: The processor is further configured to generate the HDR image by combining the first digital data and the second digital data.

9. The electronic device (101; 301) according to claim 8, wherein: The processor is further configured to generate the HDR image by performing zero padding and tone mapping on the first digital data and the second digital data.

10. The electronic device (101; 301) according to claim 8, wherein: The processor is further configured to: generating dark portion data based on the first digital data, wherein the value of the dark portion data is equal to or smaller than a first reference value, generating highlight data based on the second digital data, the highlight data having a value greater than or equal to a second reference value, the second reference value being greater than the first reference value, and The HDR image is generated based on the generated dark portion data and the generated bright portion data.

11. The electronic device (101; 301) according to claim 8, wherein: The HDR image has a high dynamic range ratio of 16 times between the first digital data and the second digital data.

12. The electronic device (101; 301) according to claim 1, wherein: The second capacitance is three times the first capacitance.

13. The electronic device (101; 301) according to claim 6, further comprising a plurality of ADCs (490), each ADC (490) of the plurality of ADCs (490) operating at a different gain value.

14. The electronic device (101; 301) according to claim 6, wherein: The microcontroller unit is further configured to: The first digital data is obtained by providing an average of multiple readings of the charge in the first capacitor to the ADC (490), and The second digital data is obtained by providing an average of multiple readings of the charge in the first capacitor and the charge in the second capacitor to the ADC (490).

15. An electronic device (101; 301), comprising: Camera module (180); Processor (120); and a memory (130), Wherein, the camera module (180) comprises: Lens (210; 310); an image sensor (230; 330); and Image signal processor (260), Wherein, the image sensor (230; 330) comprises: at least one photodiode (410); a transmission gate (TG) (420) connecting the at least one photodiode (410) to a first node (FD1 node) (430); a first capacitor (435) connected to the first node (430) and having a first capacitance; a dynamic range gate (440) connected between the first node (430) and a second node (FD2 node) (460); and a second capacitor (465) connected to the second node (460) and having a second capacitance, and Wherein, the image signal processor (260) is configured as: obtaining first simulation data at the first node (430) by deactivating the dynamic range gate (440), obtaining second simulation data at the second node (460) by enabling the dynamic range gate (440), and A high dynamic range (HDR) image is generated based on the first simulation data and the second simulation data.

Images