Signal processing circuit and measuring system

Abstract

The invention discloses a signal processing circuit and a measuring system. A signal processing circuit (18) for a measuring instrument (12) is described. The signal processing circuit (18) includes a measurement input (20), a first measurement channel (26), a second measurement channel (28), and a noise cancellation circuit (30). The first measurement channel (26) includes a first broadband analog-to-digital converter (ADC) (48) and a first conversion circuit (50). The output signal of the first measurement channel (26) is a first frequency domain signal. The output signal of the second measurement channel (28) is a second frequency domain signal. The first frequency domain signal and the second frequency domain signal are respectively complex valued signals. The noise cancellation circuit (30) is configured to receive the first frequency domain signal and the second frequency domain signal, and to determine a combined average of the first frequency domain signal and the second frequency domain signal within a predetermined number of frequency bins, thereby obtaining a complex valued averaged signal. Further, a measurement system (10) is described.

Description

Technical Field

[0001] The present invention generally relates to a signal processing circuit for a measuring instrument. The present invention also relates to a measuring system. Background Art

[0002] An important figure of merit for the performance of an electronic device under test is the noise figure of the device under test, ie, the noise generated by the device under test measured within a specific frequency band.

[0003] Different techniques are known in the art for obtaining the noise figure of an electronic device under test, in particular the so-called Y-factor method and the so-called cold source method.

[0004] In general, it is desirable to reduce the measurement time required to determine the noise figure. In addition, it is desirable to improve the accuracy of the determined noise figure.

[0005] It is therefore an object of the present invention to provide a signal processing circuit and a measurement system which allow testing of a device under test in a time efficient and accurate manner. Summary of the invention

[0006] According to the present invention, the problem is solved by a signal processing circuit for a measuring instrument. The signal processing circuit includes a measurement input, a first measurement channel, a second measurement channel and a noise elimination circuit. The first measurement channel and the second measurement channel are arranged in parallel. The first measurement channel and the second measurement channel are each connected to the measurement input, so that the input signal received via the measurement input is forwarded to the first measurement channel and the second measurement channel, respectively. The first measurement channel includes a first wideband analog-to-digital converter (ADC) and a first conversion circuit. The first wideband ADC is configured to digitize the signal processed by the first measurement channel, thereby obtaining a first digitized signal. The first conversion circuit is configured to transform the first digitized signal or a processed version of the first digitized signal into a frequency domain, so that the output signal of the first measurement channel is a first frequency domain signal. The second measurement channel includes a second wideband ADC and a second conversion circuit. The second wideband ADC is configured to digitize the signal processed by the second measurement channel, thereby obtaining a second digitized signal. The second conversion circuit is configured to transform the second digitized signal or a processed version of the second digitized signal into a frequency domain, so that the output signal of the second measurement channel is a second frequency domain signal. The first frequency domain signal and the second frequency domain signal are respectively complex valued signals. The noise cancellation circuit is configured to receive the first frequency domain signal and the second frequency domain signal and determine a combined average of the first frequency domain signal and the second frequency domain signal within a predetermined number of frequency bins, thereby obtaining a complex-valued average signal.

[0007] Therein and hereinafter, the term "circuitry" is understood to describe suitable hardware, suitable software, or a combination of hardware and software, which is configured to have a certain function.

[0008] The hardware may include, among other things, a CPU, a GPU, an FPGA, an ASIC, or other types of electronic circuitry.

[0009] In other words, the term "circuit" is understood to mean a module having suitable hardware, suitable software, or a combination of hardware and software, which is configured to have a certain function.

[0010] Both the first frequency domain signal and the second frequency domain signal are associated with the same input signal received from the device under test.

[0011] The signal processing circuit according to the invention is based on the idea of ​​using wideband ADCs in the measurement channels respectively. The wideband ADC allows the complete relevant bandwidth of the input signal to be converted into the digital domain simultaneously, so that the complete relevant frequency band can be processed simultaneously downstream of the ADC by converting the corresponding signals into the frequency domain.

[0012] In the prior art, only a narrow band of about 1 MHz to 5 MHz is converted into the digital domain and processed simultaneously. The relevant spectrum of the input signal is sampled in steps of about 1 MHz to 5 MHz and processed iteratively. Therefore, multiple measurement steps are necessary in order to cover the complete relevant spectrum.

[0013] Since the signal processing circuit according to the invention allows the complete relevant frequency spectrum to be processed simultaneously, the time required to perform measurements on the device under test is significantly reduced.

[0014] Both the first frequency domain signal and the second frequency domain signal include noise originating from the device under test, namely phase noise and amplitude noise, such that these parts of the frequency domain signals are correlated with each other and do not cancel when a combined average is performed.

[0015] On the other hand, the noise originating from parallel measurement channels processing the input signals in parallel is uncorrelated with each other and at least partially cancels out when performing a combined averaging.

[0016] Thus, noise originating from the parallel measurement channels is suppressed in the complex-valued average signal, which allows the noise figure of the device under test to be determined with improved accuracy because noise originating from the signal processing circuitry is suppressed.

[0017] According to one aspect of the present invention, the bandwidth of the wideband ADC is equal to or greater than 20 MHz. In particular, the bandwidth of the wideband ADC is equal to or greater than 50 MHz, 100 MHz or 150 MHz.

[0018] According to another aspect of the present invention, the bandwidth of the wideband ADC is equal to or greater than 250 MHz. In particular, the bandwidth of the wideband ADC is equal to or greater than 500 MHz, 1 GHz or 1.5 GHz.

[0019] A further aspect of the invention provides that the bandwidth of the wideband ADC is equal to or greater than 2.5 GHz. In particular, the bandwidth of the wideband ADC is equal to or greater than 5 GHz, 10 GHz, 15 GHz or 50 GHz.

[0020] In an embodiment of the present invention, the noise cancellation circuit is configured to determine the absolute value of the complex-valued average signal, thereby obtaining the output signal. The absolute value of the complex-valued average signal is a measure of the power of the desired signal (also referred to as the "useful signal") for the device under test (including the noise contribution of the device under test), because other noise contributions are partially or completely cancelled due to the combined averaging performed.

[0021] In a further embodiment of the invention, the noise cancellation circuit is configured to determine the real part of the complex-valued average signal, thereby obtaining the output signal. It has been shown that the real part of the complex-valued average signal is also a suitable measure of the power of the desired signal of the device under test (including the noise contribution of the device under test), in particular if the predetermined number of frequency bins is large. However, in some cases, using the real part may not be appropriate, for example, if the real part is negative.

[0022] According to an aspect of the invention, the predetermined number of frequency bins is adjustable.In general, the resolution of the complex-valued average signal in the frequency domain can be adjusted by adjusting the predetermined number of frequency bins.

[0023] In particular, the first measurement channel and the second measurement channel are functionally identical. In other words, the two parallel measurement channels are identically constructed, i.e. they comprise identically constructed electronic components. Thus, the two parallel measurement channels process input signals received from the device under test in the same manner. However, noise originating from the first measurement channel is uncorrelated with noise originating from the second measurement channel and is therefore cancelled when performing a combined averaging of the frequency domain signals.

[0024] The first measurement channel and the second measurement channel can be synchronized. In other words, the same portion of the input signal is processed simultaneously by the two parallel measurement channels so that the frequency domain signals correspond to the same time domain portion of the input signal. This ensures that the desired signal (also referred to as the "useful signal") including the noise generated by the device under test is not eliminated when performing the combined average.

[0025] In an embodiment of the present invention, the signal processing circuit further comprises a visualization circuit, wherein the visualization circuit is configured to generate visualization data associated with the complex-valued average signal. The visualization data can be displayed on a display. Thus, information about the complex-valued average signal (and therefore information about the noise figure of the device under test) is presented to the user in an illustrative manner.

[0026] In a further embodiment of the invention, the first transformation circuit and the second transformation circuit are each configured to perform a Fast Fourier Transformation.Thereby, the respective signal is transformed into the frequency domain in a particularly efficient manner.

[0027] According to another aspect of the invention, the first measurement channel includes a first mixer circuit that receives a first local oscillator signal, wherein the second measurement channel includes a second mixer circuit that receives a second local oscillator signal, and wherein the first local oscillator signal and the second local oscillator signal have the same frequency. Typically, the first mixer circuit is configured to down-convert an input signal processed by the first measurement channel to an intermediate frequency suitable for processing by an electronic component downstream of the first mixer circuit. Similarly, the second mixer circuit is configured to down-convert an input signal processed by the second measurement channel to an intermediate frequency suitable for processing by an electronic component downstream of the second mixer circuit.

[0028] Since the first local oscillator signal and the second local oscillator signal have the same frequency, the signals processed by the parallel measurement channels are converted to the same intermediate frequency.

[0029] According to the present invention, the problem is further solved by a measurement system. The measurement system comprises the signal processing circuit described above, a device under test and an analysis circuit. The output of the device under test is connected to a measurement input of the signal processing circuit. The analysis circuit is configured to determine the noise figure of the device under test based on the output signal of the signal processing circuit.

[0030] In particular, the measuring system comprises a signal processing circuit according to any of the variants described above.

[0031] With regard to advantages and further properties of the measuring system, reference is made to the explanations given above with regard to the signal processing circuit, which also applies to the measuring system and vice versa.

[0032] In an embodiment of the present invention, the measurement system further comprises a calibrated noise source, wherein the calibrated noise source is connected to the input of the device under test. Typically, the calibrated noise source is configured to generate a noise signal having a known improved noise ratio, i.e., a noise level that is a known multiple of thermal noise.

[0033] For example, the calibrated noise source may be a noise diode, wherein a predetermined voltage is applied to the noise diode.

[0034] According to one aspect of the invention, the measurement system is configured to determine the noise figure of the device under test by means of a Y-factor method. Thus, the complex-valued average signal is determined twice, i.e. once when the calibrated noise source is activated and once when the calibrated noise source is deactivated. Based on the two measurements, the actual noise figure of the device under test can be determined based on the complex-valued average signal obtained from the two measurements.

[0035] In a further embodiment of the present invention, the measuring system further comprises a terminal load, wherein the terminal load is connected to the input terminal of the device under test. The terminal load may have an impedance suitable for the corresponding device under test, for example, between 25 ohms and 75 ohms, so that a matching condition is obtained.

[0036] According to another aspect of the invention, the measurement system is configured to determine the noise figure of the device under test by means of a cold source method. Thus, the complex-valued average signal is determined using a terminal load attached to the input of the device under test. The noise figure of the device under test is determined based on the complex-valued average signal and based on the gain of the device under test.

[0037] The gain of the device under test may have been determined in a previous calibration step, for example in the measurement of the S21 parameter of the device under test.

[0038] In particular, the measurement system further comprises a power meter, which is arranged downstream of the device under test and upstream of the measurement input. Typically, the power meter is configured to determine the power of the output signal of the device under test.

[0039] The analysis circuit may be configured to determine a gain of the device under test based on the determined power of the output signal of the device under test.

[0040] A further aspect of the invention provides that the signal processing circuit and the analysis circuit are integrated into a measuring instrument.Typically, a measuring instrument is configured to perform a measurement on a device under test, ie a measurement of the noise figure of the device under test.

[0041] In particular, the measuring instrument is a signal analyzer, a spectrum analyzer, a noise figure meter, a vector network analyzer or an oscilloscope.

[0042] However, it should be understood that the measuring instrument may be any other suitable type of measuring instrument. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The foregoing aspects, as well as many of the attendant advantages of the claimed subject matter, will become more readily appreciated and better understood with reference to the following detailed description when taken in conjunction with the accompanying drawings, in which:

[0044] - Figure 1 Schematically shows a measuring system according to a first variant of the invention;

[0045] - Figure 2 schematically shows a measuring system according to a second variant of the invention; and

[0046] - Figure 3 The schematic diagram in more detail shows Figure 1 or Figure 2 Signal processing circuit of the measurement system. DETAILED DESCRIPTION

[0047] The detailed description set forth below in conjunction with the accompanying drawings is intended as a description of various embodiments of the disclosed subject matter, and is not intended to represent the only embodiments, wherein like numbers refer to like elements. Each embodiment described in the present disclosure is provided merely as an example or illustration, and should not be interpreted as being superior to or beneficial to other embodiments. The illustrative examples provided herein are not intended to be exhaustive or to limit the claimed subject matter to the precise form disclosed.

[0048] For purposes of this disclosure, the phrase "at least one of A, B, and C" means, for example, (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C), including all further possible permutations when more than three elements are listed. In other words, the term "at least one of A and B" generally means "A and / or B", i.e., "A" alone, "B" alone, or "A and B".

[0049] Figure 1 A measurement system 10 including a measuring instrument 12 and a device under test 14 is schematically shown.

[0050] Typically, the measurement instrument 12 is configured to analyze an input signal received from the device under test 14 in order to analyze certain properties of the device under test 14 , in particular, the noise figure of the device under test 14 .

[0051] For example, the measuring instrument 12 is a signal analyzer, a spectrum analyzer, a noise figure meter, a vector network analyzer, or an oscilloscope.

[0052] However, it should be understood that the measuring instrument 12 may be any other suitable type of measuring instrument.

[0053] The device under test 14 can be established as any electronic device configured to process radio frequency (RF) signals. For example, the device under test 14 includes one or more electronic circuits that process RF signals, wherein the performance of the (one or more) electronic circuits is evaluated by means of the measuring instrument 12.

[0054] In particular, the device under test 14 may be built as an amplifier, a filter, a mixer or any other electronic two-port device.

[0055] The device under test 14 is connected to the measuring instrument 12 .

[0056] In practice, the output of the device under test 14 is connected to the signal input 16 of the measuring instrument 12 , so that the electrical signal output by the device under test 14 is transmitted from the device under test 14 to the measuring instrument 12 , in particular via a cable.

[0057] The measuring instrument 12 comprises a signal processing circuit 18 having a measurement input 20 which is connected to the signal input 16 , optionally via an attenuator 22 .

[0058] The signal processing circuit 18 includes a splitter circuit 24 , a first measurement channel 26 connected to the splitter circuit 24 , a second measurement channel 28 connected to the splitter circuit 24 , and a noise cancellation circuit 30 connected to the measurement channels 26 , 28 .

[0059] The structure and function of the signal processing circuit 18 will be described in more detail below.

[0060] The measuring instrument 12 further comprises an analysis circuit 32 which is connected to the noise cancellation circuit 30 .

[0061] The measuring instrument 12 may also include a visualization circuit 33 which is connected to the analysis circuit 32 .

[0062] Further, the measuring instrument 12 may comprise an integrated display. Alternatively, the measuring instrument 12 may be connectable to a display.

[0063] exist Figure 1 In the exemplary embodiment shown, measurement system 10 includes a calibrated noise source 34 that is connected to an input of device under test 14 .

[0064] Typically, the calibrated noise source 34 is configured to generate a noise signal having a known improved noise ratio, ie, a noise level that is a known multiple of the thermal noise.

[0065] For example, the calibrated noise source 34 may be a noise diode, wherein a predetermined voltage is applied to the noise diode.

[0066] Figure 2 A further variant of the measuring system 10 is schematically shown, wherein only the differences compared to the first variant described above are explained below.

[0067] The measurement system 10 includes a terminal load 36 having a predefined impedance.

[0068] For example, the terminal load 36 has an impedance between 25 ohms and 75 ohms, in particular 50 ohms.

[0069] Optionally, the measurement system 10 further includes a signal generator 38 configured to generate and output a test signal.

[0070] For example, the signal generator 38 may be an arbitrary waveform generator so that the test signal may have an arbitrary shape.

[0071] Optionally, a switch circuit 40 is provided, which is connected to the terminal load 36 and the signal generator 38 .

[0072] The switch circuit 40 is configured to selectively connect the terminal load 36 or the signal generator 38 to the input terminal of the device under test 14 .

[0073] The first power meter 42 may be disposed between the output terminal of the device under test 14 and the signal input terminal 16 .

[0074] Furthermore, the second power meter 44 may be disposed between the switch circuit 40 and the input terminal of the device under test 14 .

[0075] Figure 3 The signal processing circuit 18 is shown in more detail. Note that the signal processing circuit 18 may be configured identically in the different variations of the measurement system 10 described above.

[0076] The first measurement channel 26 includes a first mixer circuit 46 that receives the first local oscillator signal LO1 .

[0077] The first mixer circuit 46 is configured to down-convert an input signal processed by the first measurement channel 26 to an intermediate frequency suitable for processing by electronic components downstream of the first mixer circuit 46 .

[0078] The first measurement channel 26 further includes a first wideband ADC 48 which is arranged downstream of the first mixer circuit 46 .

[0079] The first wideband ADC 48 is configured to digitize the signal processed by the first measurement channel 26 (ie, the down-converted signal), thereby obtaining a first digitized signal x1 ( t ), wherein the first digitized signal x1 ( t ) is a time domain signal.

[0080] The first wideband ADC 48 may have a bandwidth equal to or greater than 20 MHz, 50 MHz, 100 MHz, 150 MHz, 250 MHz, 500 MHz, 1 GHz, 1.5 GHz, 2.5 GHz, 5 GHz, 10 GHz, 15 GHz, or 50 GHz.

[0081] The first measurement channel 26 further comprises a first transformation circuit 50 which is arranged downstream of the first wideband ADC 48 .

[0082] The first transform circuit 50 is configured to apply a fast Fourier transform (FFT) to the first digitized signal x1 ( t ), thereby obtaining a first frequency domain signal X1 ( f ).

[0083] The first frequency domain signal X1(f) is a complex-valued signal.

[0084] The first transformation circuit 50 is connected to the noise elimination circuit 30 so that the first frequency domain signal X1 ( f ) is forwarded to the noise elimination circuit 30 .

[0085] Optionally, the first measurement channel 26 may include an amplifier 52 or any other suitable signal shaping circuit(s) at a suitable location within the first measurement channel 26 .

[0086] The second measuring channel 28 is functionally identical to the first measuring channel 26. In particular, the second measuring channel 28 can be synchronized with the first measuring channel 26.

[0087] The second measurement channel 28 comprises a second mixer circuit 54 which receives a second local oscillator signal LO2 having the same frequency as the first local oscillator signal LO1 .

[0088] The second mixer circuit 54 is configured to down-convert the input signal processed by the second measurement channel 28 to an intermediate frequency, ie, the same intermediate frequency as in the first measurement channel 26 .

[0089] The second measurement channel 28 further includes a second wideband ADC 56 , which is disposed downstream of the second mixer circuit 54 .

[0090] The second wideband ADC 56 is configured to digitize the signal processed by the second measurement channel 28 (ie, the down-converted signal), thereby obtaining a second digitized signal x2 (t), wherein the second digitized signal x2 (t) is a time domain signal.

[0091] The second wideband ADC 56 has the same bandwidth as the first wideband ADC 48 .

[0092] The second measurement channel 28 further includes a second transformation circuit 58 , which is arranged downstream of the second wideband ADC 56 .

[0093] The second transform circuit 58 is configured to apply a fast Fourier transform (FFT) to the second digitized signal x2 ( t ), thereby obtaining a second frequency domain signal X2 ( f ).

[0094] The second frequency domain signal X2(f) is a complex valued signal.

[0095] The second transformation circuit 58 is connected to the noise elimination circuit 30 so that the second frequency domain signal X2 ( f ) is forwarded to the noise elimination circuit 30 .

[0096] Optionally, the second measurement channel 28 may include an amplifier 60 or any other suitable signal shaping circuit(s) at a suitable location within the second measurement channel 28 .

[0097] The noise cancellation circuit 30 is configured to determine a combined average of the first frequency domain signal X1 ( f ) and the second frequency domain signal X2 ( f ) over a predetermined number of frequency bins, thereby obtaining a complex-valued average signal.

[0098] More precisely, the noise elimination circuit 30 is configured to multiply the first frequency domain signal X1(f) by the complex conjugate of the second frequency domain signal X2(f), thereby obtaining a complex-valued multiplication signal X(f), namely

[0099]

[0100] The noise cancellation circuit 30 is further configured to average the complex-valued multiplication signal in a predetermined number N of frequency bins, thereby obtaining a complex-valued average signal.

[0101] Therein, the predetermined number N may be adjustable, for example via a user interface of the measuring instrument 12 .

[0102] Alternatively or additionally, the measuring instrument 12 may be configured to adapt to the predetermined number N automatically.

[0103] Because X1(f) and are frequency domain signals, so the complex-valued average signal corresponds to the trace of the cross-correlation matrix of the first frequency domain signal X1(f) and the second frequency domain signal X2(f) divided by a predetermined number N of frequency bins.

[0104] The noise elimination circuit 30 is further configured to determine the absolute value of the complex-valued average signal or the real part of the complex-valued average signal, thereby obtaining the output signal X of the signal processing circuit 18. out .

[0105] The output signal X out In this case, the noise originating from the measuring channels 26 , 28 is at least partially eliminated, in particular completely eliminated.

[0106] This can be seen as follows. The frequency domain signals X1, X2 can be split into a correlated portion (a) coming from the device under test 14 and two uncorrelated noise portions (n1 and n2) coming from the measurement channels 26, 28:

[0107] X1=a+n1,

[0108] X2=a+n2.

[0109] The output signal X of the signal processing circuit 18 out Then it is given by:

[0110]

[0111] Note that this is the result for the absolute value case. The absolute value can be replaced by the real part.

[0112] The first term, that is, 1 / N∑|a i | 2 , corresponding to the average power of the input signal received from the device under test 14.

[0113] The other terms correspond to the multiplication of uncorrelated signals and are therefore at least partially cancelled. More precisely, the other terms correspond to the noise originating from the measurement channels 26, 28.

[0114] In practice, it has been shown that these undesirable noise contributions are reduced by approximately 5·log 10 (N)dB or

[0115] The output signal X of the signal processing circuit 18 out is forwarded to the analysis circuit 32 .

[0116] The analysis circuit 32 is configured to generate a signal based on the output signal X of the signal processing circuit 18. out To determine the noise figure of the device under test 14.

[0117] exist Figure 1 In the illustrated variation of the measurement system 10 , the noise figure of the device under test 14 may be determined via a Y-factor method.

[0118] In this case, the output signal X of the signal processing circuit 18 is out As described above, φ is determined twice, ie, once when the calibrated noise source 34 is activated, and once when the calibrated noise source 34 is deactivated.

[0119] The noise figure of the device under test 14 is then determined based on the output signal X out to be sure.

[0120] More precisely, the noise figure NF of the device under test 14 can be determined according to the following formula:

[0121] NF=ENR-10log(10 Y / 10 -1),

[0122] where ENR is the enhanced noise ratio of the calibrated noise source 34 .

[0123] Further, the Y-factor Y is the first measured power P when the calibrated noise source 34 is activated. on and the second measured power P with the calibrated noise source 34 deactivated off The difference, that is, Y = P on -P off .

[0124] According to the following formula, the improved noise ratio ENR and the first measurement power P on and the second measured power P off It is related to the gain G of the device under test 14 according to the following formula:

[0125]

[0126] where k is the Boltzmann constant, B is the resolution bandwidth defined by the FFT window, and T is the temperature.

[0127] exist Figure 2 In the illustrated variation of the measurement system 10 , the noise figure of the device under test 14 may be determined via a cold source method.

[0128] In an optional calibration step, signal generator 38 may be connected to the input of device under test 14 via switching circuit 40 .

[0129] Signal generator 38 generates a predefined test signal, which is processed by device under test 14 .

[0130] The power of the output signal of the device under test 14 is measured by means of a first power meter 42 .

[0131] In order to improve the accuracy of the measurement, the power of the predefined test signal can be measured upstream of the device under test 14 by means of a second power meter 44 .

[0132] The gain of the device under test 14 is then determined based on the measured power of the output signal and optionally based on the measured power of a predefined test signal.

[0133] After the calibration step, the terminal load 36 is connected to the device under test 14 via the switching circuit 40, and the output signal X is determined with the terminal load 36 applied to the input of the device under test 14 as described above. out .

[0134] The noise figure of the device under test 14 is then based on the output signal X out and is determined based on the determined gain of the device under test 14 .

[0135] Visualization data associated with the complex-valued average signal, in particular visualization data of the determined noise figure of the device under test 14 , may be determined by means of the visualization circuit 33 .

[0136] The visualization data may be displayed on a display integrated into the measuring instrument 12 and / or on a display connected to the measuring instrument 12 .

[0137] Specific embodiments disclosed herein, in particular corresponding module(s) and / or unit(s), utilize circuit systems (e.g., one or more circuits) to implement the standards, protocols, methods, or techniques disclosed herein, operably couple two or more components, generate information, process information, analyze information, generate signals, encode / decode signals, convert signals, transmit and / or receive signals, control other devices, etc. Any type of circuit system may be used.

[0138] In an embodiment, the circuit system includes, among other aspects, one or more computing devices such as a processor (e.g., a microprocessor), a central processing unit (CPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a system on a chip (SoC), or the like, or any combination thereof; and may include discrete digital or analog circuit elements or electronic devices, or a combination thereof. In an embodiment, the circuit system includes a hardware circuit implementation (e.g., an implementation in an analog circuit system, an implementation in a digital circuit system, and the like, and a combination thereof).

[0139] In an embodiment, the circuit system includes a combination of circuits and a computer program product having software or firmware instructions stored on one or more computer-readable memories that work together to cause the device to perform one or more protocols, methods, or techniques described herein. In an embodiment, the circuit system includes circuits that require software, firmware, and the like to operate, such as, for example, a microprocessor or a portion of a microprocessor. In an embodiment, the circuit system includes one or more processors or portions thereof, and accompanying software, firmware, hardware, and the like.

[0140] The present application may quote quantities and numbers. Unless otherwise specified, such quantities and numbers should not be considered as limiting, but examples of possible quantities or numbers associated with the present application. In addition, in this regard, the present application may use the term "plurality" to quote numbers or numbers. In this regard, the term "plurality" means any quantity greater than one, for example, two, three, four, five, etc. The terms "approximately", "approximately", "close to", etc. mean plus or minus 5% of a specified value.

Claims

1. A signal processing circuit for a measuring instrument (12), The signal processing circuit (18) comprises a measurement input terminal (20), a first measurement channel (26), a second measurement channel (28) and a noise elimination circuit (30). wherein the first measuring channel (26) and the second measuring channel (28) are arranged in parallel, wherein the first measurement channel (26) and the second measurement channel (28) are each connected to the measurement input terminal (20), so that an input signal received via the measurement input terminal (20) is forwarded to the first measurement channel (26) and the second measurement channel (28), respectively, wherein the first measurement channel (26) comprises a first broadband analog-to-digital converter (ADC) (48) and a first transformation circuit (50), wherein the first broadband ADC (48) is configured to digitize a signal processed by the first measurement channel (26) to thereby obtain a first digitized signal, wherein the first transformation circuit (50) is configured to transform the first digitized signal or a processed version of the first digitized signal into a frequency domain such that an output signal of the first measurement channel (26) is a first frequency domain signal, wherein the second measurement channel (28) comprises a second wideband ADC (56) and a second transformation circuit (58), wherein the second wideband ADC (56) is configured to digitize a signal processed by the second measurement channel (28) to thereby obtain a second digitized signal, wherein the second transformation circuit (58) is configured to transform the second digitized signal or a processed version of the second digitized signal into a frequency domain so that the output signal of the second measurement channel (28) is a second frequency domain signal, The first frequency domain signal and the second frequency domain signal are respectively complex valued signals, The noise cancellation circuit (30) is configured to receive the first frequency domain signal and the second frequency domain signal, and determine a combined average of the first frequency domain signal and the second frequency domain signal within a predetermined number of frequency bins, thereby obtaining a complex-valued average signal.

2. The signal processing circuit according to claim 1, wherein: The bandwidth of the wideband ADC (48, 56) is equal to or greater than 20 MHz, in particular, equal to or greater than 250 MHz or 2.5 GHz.

3. The signal processing circuit according to claim 1 or claim 2, wherein: The noise cancellation circuit (30) is configured to determine an absolute value of the complex-valued average signal, thereby obtaining an output signal, or wherein the noise cancellation circuit (30) is configured to determine a real part of the complex-valued average signal, thereby obtaining an output signal.

4. The signal processing circuit according to any one of the preceding claims, wherein: The predetermined number of frequency bins is adjustable.

5. The signal processing circuit according to any one of the preceding claims, wherein: The first measuring channel (26) and the second measuring channel (28) are functionally identical.

6. A signal processing circuit according to any one of the preceding claims, wherein: The first measurement channel (26) and the second measurement channel (28) are synchronized.

7. The signal processing circuit according to any one of the preceding claims, further comprising: A visualization circuit (33), wherein the visualization circuit (33) is configured to generate visualization data associated with the complex-valued average signal.

8. A signal processing circuit according to any one of the preceding claims, wherein: The first transform circuit (50) and the second transform circuit (58) are each configured to perform a fast Fourier transform.

9. The signal processing circuit according to any one of the preceding claims, wherein: The first measurement channel (26) includes a first mixer circuit (46) receiving a first local oscillator signal, wherein the second measurement channel includes a second mixer circuit (54) receiving a second local oscillator signal, and wherein the first local oscillator signal and the second local oscillator signal have the same frequency.

10. A measuring system, the measuring system (10) comprising a signal processing circuit (18) according to any one of the preceding claims, a device under test (14) and an analysis circuit (32), wherein the output terminal of the device under test (14) is connected to the measurement input terminal (20) of the signal processing circuit (18), and The analysis circuit (32) is configured to determine a noise figure of the device under test (14) based on an output signal of the signal processing circuit (18).

11. The measurement system according to claim 10, further comprising: A calibrated noise source (34) is provided, wherein the calibrated noise source (34) is connected to an input of the device under test (14).

12. The measurement system according to claim 11, wherein: The measurement system (10) is configured to determine the noise figure of the device under test (14) by means of a Y-factor method.

13. The measurement system according to claim 10, further comprising: A terminal load (36), wherein the terminal load (36) is connected to an input terminal of the device under test (14).

14. The measurement system according to claim 13, wherein: The measurement system (10) is configured to determine the noise figure of the device under test (14) by means of a cold source method.

15. The measurement system according to claim 14, wherein: The measurement system (10) further comprises a power meter (42) which is arranged downstream of the device under test (14) and upstream of the measurement input terminal (20).

16. The measuring system according to any one of claims 10 to 15, wherein: The signal processing circuit (18) and the evaluation circuit (32) are integrated into the measuring instrument (12).

17. The measurement system according to claim 16, wherein: The measuring instrument (12) is a signal analyzer, a spectrum analyzer, a noise figure meter, a vector network analyzer or an oscilloscope.

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