Battery monitoring chip hot plug test method, system and device and storage medium

Abstract

The invention provides a battery monitoring chip hot plug test method, system and device and a storage medium. A battery monitoring chip corresponds to a plurality of test switches. The method comprises the following steps: adopting at least one mode: performing a hot plug test in a first mode; the hot plug test in each mode comprises the following steps of: performing hot plug power-on according to a corresponding mode; the hot plug power-on in the first mode comprises the steps that the first N test switches which are powered on firstly are completed in sequence according to all possible enumeration sequences, and the remaining test switches are closed in sequence according to a preset power-on sequence; wherein N is a positive integer, and N is less than or equal to M; after hot plug power-on is completed, working data of the battery monitoring chip are collected; judging whether the battery monitoring chip is damaged or not according to the working data; and hot plug power-off is carried out. According to the technical scheme provided by the invention, the power-on sequence combination of the chip which is most easily damaged can be searched through the first mode, the test times are feasible, the test time and the test cost are saved, and an effective and feasible test scheme is provided.

Description

Technical Field

[0001] The present invention relates to the field of BMS technology, and in particular to a hot-swap test method, system, device and storage medium for a battery monitoring chip. Background Art

[0002] As the core component of the BMS system, the battery monitoring chip's main function is to collect parameters such as the voltage, current, and temperature of the battery module, and there is a direct physical connection between the battery module and the battery module.

[0003] Taking a 16-series battery monitoring chip as an example, the simplified connection diagram is as follows: Figure 1 As shown in the figure, CELL1~16 are battery modules, S1~S19 are controllable switches, and VP and GND are power supply pins of the battery monitoring chip. When the acquisition harness is reliably connected and all components are working properly, the current will only flow into the battery monitoring chip from the VP pin and out from the GND. During the battery module testing or loading process, the battery monitoring chip will inevitably face hot-swap scenarios. A hot-swap power-on is equivalent to the switch S1~S19 switching from a fully disconnected state to a fully closed state in a completely disordered manner for a period of time. The battery module has a large energy density and a high instantaneous output power. When only a part of the switch S1~S19 is closed, the battery module will supply power to the battery monitoring chip through the channel where the switch has been closed. In this process, some abnormal current paths may be formed inside the battery monitoring chip. This process is very short, but the current may reach the ampere level. The devices on the abnormal current path are likely to be damaged by heat, which ultimately leads to the failure of the battery monitoring chip function. Therefore, the BMS system has very high requirements for the hot-swap performance of battery monitoring chips, but the industry has not yet formed a unified and effective standard and method for hot-swap testing of battery monitoring chips.

[0004] When the battery module includes a large number of batteries, taking the hot-swap power-on process of 16 battery monitoring chips as an example, if the exhaustive method is used to traverse, there are a total of 19! combinations, which is too many to test, and it is almost impossible to complete from the perspective of test time and test cost. Summary of the invention

[0005] The present invention provides a hot-swap test method, system, device and storage medium for a battery monitoring chip, so as to solve the problem in the prior art that there is no effective and feasible hot-swap test method when the number of batteries is relatively large.

[0006] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:

[0007] According to a first aspect of the present invention, a hot-swap test method for a battery monitoring chip is provided, wherein a battery monitoring chip corresponds to a plurality of test switches;

[0008] The method includes: using at least one mode: a first mode to perform hot plug test;

[0009] Each mode hot-swap test includes:

[0010] Hot-swap power-on is performed according to the corresponding mode; wherein the hot-swap power-on in the first mode includes: the first N test switches that are powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to the preset power-on order; wherein N is a positive integer, and N≤M, and M is the number of the test switches corresponding to the battery monitoring chip;

[0011] After the hot-swap power-on is completed, the working data of the battery monitoring chip is collected;

[0012] After the working data of the battery monitoring chip is collected, it is determined whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip;

[0013] After the working data collection of the battery monitoring chip is completed, hot plugging and powering off are performed.

[0014] Optionally, it also includes: using the second mode to perform hot plug test;

[0015] The hot-swap power-on in the second mode includes: all test switches are closed in sequence according to a completely random power-on sequence; and the number of hot-swap tests in the second mode is much less than M!.

[0016] Optionally, it also includes: adopting a third mode to perform a hot plug test;

[0017] The hot-swap power-on in the third mode includes: in each round of hot-swap test, all test switches are divided into two groups, the test switches in one group are closed first, and then the test switches in the other group are closed; the test switches in different rounds of hot-swap test are grouped differently.

[0018] Optionally, in the hot-swap power-on in the third mode, different rounds of hot-swap testing include all possible groupings of test switches.

[0019] Optionally, in the hot-swap power-on in the third mode, each round of hot-swap test includes multiple hot-swap test processes.

[0020] Optionally, judging whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip specifically includes:

[0021] Determining whether the battery monitoring chip is damaged according to the pin leakage current of the battery monitoring chip; and / or,

[0022] Whether the battery monitoring chip is damaged is determined according to the sampling value of the battery monitoring chip.

[0023] Optionally, the hot-swap power-off specifically includes: the test switches are disconnected in sequence according to a preset power-off sequence.

[0024] According to a second aspect of the present invention, a battery monitoring chip hot-swap test system is provided, wherein a battery monitoring chip corresponds to a plurality of test switches;

[0025] The system includes:

[0026] A hot-swap test device for performing a hot-swap test using at least one mode: a first mode;

[0027] The hot-swap test device specifically comprises:

[0028] A hot-swap power-on module, used for hot-swap power-on according to a corresponding mode; wherein the hot-swap power-on in the first mode includes: the first N test switches that are powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to a preset power-on order; wherein N is a positive integer, and N≤M, and M is the number of the test switches corresponding to the battery monitoring chip;

[0029] A working data acquisition module, used for collecting working data of the battery monitoring chip after the hot-swap power-on is completed;

[0030] A damage judgment module, which is used to judge whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip after the working data of the battery monitoring chip is collected;

[0031] The hot-swap power-off module is used to perform hot-swap power-off after the working data collection of the battery monitoring chip is completed.

[0032] According to a third aspect of the present invention, there is provided an electronic device, comprising:

[0033] processor;

[0034] and, a memory for storing processor-executable instructions;

[0035] The processor implements the steps in the above method by running the executable instructions.

[0036] According to a fourth aspect of the present invention, there is provided a storage medium having a computer program stored thereon, wherein the computer program implements the steps in the above-mentioned method when executed by a processor.

[0037] The hot-swap test method, system, device and storage medium of a battery monitoring chip provided by the present invention provide a first mode, in which the hot-swap power-on includes: the first N test switches powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to a preset power-on order. This mode can search for a power-on sequence combination that is most likely to damage the chip. Through the above test method, an effective hot-swap test can be effectively performed on the battery monitoring chip; in addition, N≤M, from the perspective of test time and test cost, when M is relatively large, N can be selected as a number smaller than M, so that the number of tests is much less than the exhaustive method M!, which is effective and feasible, saving test time and test cost.

[0038] In an optional solution of the present invention, a second mode is also combined. In this mode, the hot-swap power-on includes: the power-on sequence of the test switches is in a completely random order. This mode can simulate the real hot-swap application scenario, making the hot-swap test more comprehensive and effective; and the number of tests in the second mode is much smaller than M! When M is relatively large, N can be selected as a number smaller than M, so that the sum of the number of tests in the first mode and the second mode is also much smaller than the exhaustive method, which is still feasible.

[0039] Another optional scheme of the present invention is also combined with a third mode. The hot-swap power-on in this mode includes: dividing the test switch into two groups, completing the closure of one group first, and then closing the other group. This mode can simulate the application scenario in which the sampling harness of a battery monitoring chip is connected through two connectors, and the hot-swap test is more comprehensive and effective; and when M is relatively large, N can be selected as a number smaller than M, so that the first mode plus the third mode, or even the second mode, the number of tests is far less than the exhaustive method, and it is still feasible. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0041] Figure 1 This is a schematic diagram of a 16-string battery monitoring chip;

[0042] Figure 2 A flowchart of a hot-swap test method for a battery monitoring chip according to an embodiment of the present invention;

[0043] Figure 3 A diagram showing the steps of a hot-swap test method for a battery monitoring chip according to an embodiment of the present invention;

[0044] Figure 4A schematic diagram of a hot-swap test system for a battery monitoring chip according to an embodiment of the present invention;

[0045] Figure 5 A diagram showing the steps of a hot-swap test method for a battery monitoring chip according to another embodiment of the present invention;

[0046] Figure 6 A diagram showing the steps of a hot-swap test method for a battery monitoring chip according to another embodiment of the present invention;

[0047] Figure 7 A schematic diagram of a hot-swap test system for a battery monitoring chip according to an embodiment of the present invention;

[0048] Figure 8 A schematic diagram of a battery monitoring chip hot-swap test system according to another embodiment of the present invention;

[0049] Fig. 9 is a schematic diagram of an electronic device according to an embodiment of the present invention;

[0050] Description of reference numerals:

[0051] 11-Hot-swap power-on module;

[0052] 12-Working data collection module;

[0053] 13- Whether the module is damaged

[0054] 14-Hot-swap the power module;

[0055] 21- Processor;

[0056] 22-internal bus;

[0057] 23- Network interface;

[0058] 24-Memory;

[0059] 25-Memory. DETAILED DESCRIPTION

[0060] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0061] In the description of the specification of the present invention, it is necessary to understand that the orientation or position relationship indicated by the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc. is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0062] In the description of the present specification, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0063] In the description of the present invention, "plurality" means a plurality, such as two, three, four, etc., unless otherwise clearly and specifically defined.

[0064] In the description of the present invention, unless otherwise clearly specified and limited, the term "connection" and other terms should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0065] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0066] In one embodiment, a hot-swap test method for a battery monitoring chip is provided. One battery monitoring chip corresponds to multiple test switches. For example, taking a 16-string battery module as an example, the number of test switches can be 19. Figure 1 As shown, the positive and negative electrodes of each battery module string and the positive and negative electrodes of the entire battery module are connected to the battery monitoring chip through corresponding test switches.

[0067] Practically, the test switch can be implemented by a relay, and the output wiring harness of the battery module is first connected to the normally open contact of the relay, and the other side of the normally open contact is connected to the battery monitoring chip.

[0068] The hot-swap test method of this embodiment includes: adopting at least one mode: a first mode to perform hot-swap test.

[0069] Please refer to Figure 2 , each hot-swap test includes:

[0070] Step 1: Perform hot-swap power-on according to the corresponding mode, that is, complete the closing of all test switches according to the power-on sequence in the corresponding mode.

[0071] The hot-swap power-on in the first mode specifically includes: the first N test switches that are powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to the preset power-on order; where N is a positive integer, and N≤M, and M is the number of test switches corresponding to the battery monitoring chip. The first mode can be used to search for the power-on sequence combination that is most likely to damage the chip.

[0072] From the perspective of test coverage, the larger N is, the better; however, from the perspective of test time and cost, the smaller N is, the better. In this case, the effectiveness of the test can be improved by increasing the number of samples. The value of N can be determined after weighing the actual needs.

[0073] From the perspective of test coverage and test time, when M is relatively small, such as when M≤8, it is recommended to directly take N=M, that is, traverse all possible combinations; when M is relatively large, such as when M>8, it should be ensured that N≥3. Taking M=19 and N=3 as an example, the number of tests corresponding to the first mode is 19*18*17=5814.

[0074] Step 2: After the hot-swap power-on is completed, collect the working data of the battery monitoring chip.

[0075] Preferably, after the hot-swap power-on is completed, the working data of the battery monitoring chip can be collected after waiting for a certain period of time. After waiting for a certain period of time, the voltages of all nodes can be fully established, and the collection can be performed at this time, and the result is more accurate.

[0076] Step 3: After the working data of the battery monitoring chip is collected, determine whether the battery monitoring chip is damaged based on the working data of the battery monitoring chip.

[0077] As an implementation method, collecting the working data of the battery monitoring chip includes: the pin leakage current of the battery monitoring chip and / or the sampling value of the battery monitoring chip. Furthermore, judging whether the battery monitoring chip is damaged according to the working data includes: judging whether the battery monitoring chip is damaged according to the pin leakage current of the battery monitoring chip and / or the sampling value of the battery monitoring chip. The pin leakage current can be used to judge whether the port of the battery voltage monitoring chip is damaged; the sampling value of the battery monitoring chip can be used to judge whether the battery voltage monitoring chip has a functional abnormality.

[0078] Preferably, the sampling value of the battery monitoring chip may include: battery voltage sampling value, and may also include: chip internal signal sampling value, such as: internal reference source voltage, internal LDO output voltage, chip temperature, etc. To determine whether the battery monitoring chip is damaged based on the sampling value of the battery monitoring chip, any one of the following conditions is met:

[0079] 1) If the difference between the battery voltage sampling value and the actual battery voltage value exceeds a certain value, such as 50mV, it means that the battery sampling path is abnormally damaged;

[0080] 2) The internal signal sampling value of the chip exceeds the preset range, which means that the internal circuit module is abnormally damaged. For example, the normal voltage range of the 2.5V reference source is [2.45V, 2.55V], and the normal voltage range of the 5V LDO is [4.9V, 5.1V].

[0081] As an example, when the battery monitoring chip is working normally, the pin leakage current is generally required to be less than 2uA; when the pin leakage current is much more than 2uA, such as more than 50uA, it can be considered that the battery voltage monitoring chip is damaged. When the battery monitoring chip is working normally, the deviation between the battery voltage sampling value and the actual battery voltage value is generally less than 5mV; when the deviation is much more than 5mV, such as more than 50 m V, it can be considered that the battery voltage monitoring chip is damaged.

[0082] Step 4: After the working data collection of the battery monitoring chip is completed, hot-swap power is turned off; that is, all test switches are switched from the closed state to the open state.

[0083] As an implementation mode, regardless of the power-on sequence, the test switches can be disconnected in sequence according to a preset power-off sequence, such as a relatively safe power-off sequence, during hot-swap power-off.

[0084] Taking the above 16-string battery module as an example, when S1 and S19 are closed, the GND and VP pins of the battery monitoring chip are normally powered, and a certain voltage is established between VP and GND. At this time, regardless of whether S2 to S18 are closed, the voltage of other pins will not exceed VP, and no abnormal current path will be formed. Therefore, a relatively safe hot-swap power-on sequence can be defined as closing the switches in sequence: S1, S19, S2, S3, ..., S17, S18; correspondingly, a relatively safe hot-swap power-off sequence is opening the switches in sequence: S18, S17, ..., S3, S2, S19, S1.

[0085] In different embodiments, the relatively safe hot-plug power-on sequence and the relatively safe hot-plug power-off sequence may also be different from those in the above examples, as long as it is ensured that S1 and S19 are closed first, and S19 and S1 are disconnected last. In the above embodiments, steps S3 and S4 are not in a sequential order and may also be performed simultaneously.

[0086] Preferably, after a hot-plug test is completed, waiting for a certain period of time before performing the next hot-plug test can fully release the voltages of all nodes, and thus the independence of each hot-plug test can be ensured.

[0087] The following takes a 16-series battery module 11, i.e., M = 19 and N = 2, as an example to illustrate the hot-plug test in the first mode:

[0088] As an implementation manner, please refer to Figure 3 , the hot-plug test in the first mode can be implemented through the following steps:

[0089] Step 101: According to the above description, the relatively safe hot-plug power-on sequence is to sequentially close the switches: S1, S19, S2, S3,..., S17, S18, and define an array Def_Order[i] corresponding to this sequence, where i = 0 to 18;

[0090] Step 102: Move Def_Order[m] to the first position. For 0 < i ≤ m, move Def_Order[i - 1] one position backward; for i > m, keep Def_Order[i] unchanged, and denote the new sequence with the changed positions as 1st_Order[i], where i = 0 to 18;

[0091] Step 103: Move 1st_Order[n] to the second position. For 1 < i ≤ n, move 1st_Order[i - 1] one position backward; for i = 0 or i > n, keep 1st_Order[i] unchanged, and denote the new sequence with the changed positions as 2nd_Order[i], where i = 0 to 18;

[0092] Step 104: Close the 19 switches in sequence according to the sequence of 2nd_Order at intervals of a certain time (e.g., 100 ms), and wait for a certain time (e.g., 2S) to enable the battery monitoring chip to complete the power-on process;

[0093] Step 105: Send 2nd_Order[0] to 2nd_Order

[18] representing the power-on sequence to the control terminal (PC);

[0094] The above S101 to S105 can be implemented by the MCU in the battery monitoring chip hot-plug test system as shown in Figure 4 the battery monitoring chip hot-plug test system.

[0095] Step 106: Measure the leakage current on the sampling lines corresponding to the switches S2 to S18 and send it to the PC, so that the PC can determine whether the battery monitoring chip is damaged through the leakage current;

[0096] The leakage current measurement in S106 can be read by the MCU as follows Figure 4 The data collected by the ammeter shown in is implemented.

[0097] Step 107: Sending a command to start the ADC of the battery monitoring chip to read the sampling value of the battery monitoring chip, such as the battery voltage sampling value, and sending the sampling value of the battery monitoring chip to the PC to determine whether the battery monitoring chip is damaged according to the sampling value of the battery monitoring chip;

[0098] Preferably, the sampled values ​​of the battery monitoring chip read in step S107 include, in addition to the battery voltage sampled values ​​exemplified above, the chip internal signal sampled values, such as the voltage of the internal reference source, the output voltage of the internal LDO, the chip temperature, etc. To determine whether the battery monitoring chip is damaged based on the sampled values ​​of the battery monitoring chip, any one of the following conditions may be met:

[0099] 1) If the difference between the battery voltage sampling value and the actual battery voltage value exceeds a certain value, such as 50mV, it means that the battery sampling path is abnormally damaged;

[0100] 2) The internal signal sampling value of the chip exceeds the preset range, which means that the internal circuit module is abnormally damaged. For example, the normal voltage range of the 2.5V reference source is [2.45V, 2.55V], and the normal voltage range of the 5V LDO is [4.9V, 5.1V].

[0101] Step 108: disconnect the switches in a relatively safe power-off sequence: S18, S17, ..., S3, S2, S19, S1; wait for a certain period of time (e.g., 2S) to restore the battery monitoring chip and peripheral devices to their initial state;

[0102] The above S108 can be achieved by Figure 4 The MCU implementation shown in .

[0103] Step 109: judging whether the battery monitoring chip is damaged according to the leakage current and / or the sampling value of the battery monitoring chip;

[0104] The above S109 can be Figure 4 The PC implementation shown in .

[0105] Step 110: the value of n starts from 1, with a step of 1, and traverses to 18 in sequence, and repeats steps S103 to S109;

[0106] Step 111: the value of m starts from 0 with a step of 1, and traverses to 18 in sequence, and steps S102 to S110 are repeated;

[0107] Step 112: The hot-swap test of the first mode is terminated after the above traversal process is completed, or the hot-swap test is terminated when the battery monitoring chip is damaged.

[0108] In the above implementation, step 108 and step 109 are not performed in any particular order and may be performed simultaneously.

[0109] In another embodiment, a hot-swap test method for a battery monitoring chip is provided. Based on the hot-swap test performed in the first mode, this embodiment adds: performing the hot-swap test in the second mode.

[0110] The hot-swap power-on in the second mode includes: all test switches are closed in sequence according to a completely random power-on order; the number of hot-swap tests in the second mode is much less than M!. The second mode can simulate a real hot-swap application scenario.

[0111] The following continues to take 16 battery modules and the number of hot-swap times in the second mode as an example to illustrate the hot-swap test in the second mode:

[0112] As an implementation, please refer to Figure 5 , the hot-swap test in the second mode can be implemented by the following steps:

[0113] Step 201: Generate 19 independent random numbers t[i] within 1000, i=0-18;

[0114] Step 202: The counter count is incremented by 1 every time a certain period of time (e.g., 1 ms) is waited, and when the value of count is equal to t[i], the switch S[i+1] is closed;

[0115] Step 203: After the count reaches 1000, wait for a certain period of time (e.g., 2 seconds) to allow the battery monitoring chip to complete the power-on process;

[0116] Step 204: Send t[0] to t

[18] representing the power-on sequence to the control terminal (PC);

[0117] Step 205: Measure the leakage current on the sampling lines corresponding to the switches S2 to S18 and send it to the PC;

[0118] Step 206: Sending a command to start the ADC of the battery monitoring chip to read the sampling value of the battery monitoring chip, such as the battery voltage sampling value, and sending the sampling value of the battery monitoring chip to the PC to determine whether the battery monitoring chip is damaged according to the sampling value of the battery monitoring chip;

[0119] Preferably, the sampled values ​​of the battery monitoring chip read in step S107 include, in addition to the battery voltage sampled values ​​exemplified above, the chip internal signal sampled values, such as the voltage of the internal reference source, the output voltage of the internal LDO, the chip temperature, etc. To determine whether the battery monitoring chip is damaged based on the sampled values ​​of the battery monitoring chip, any one of the following conditions may be met:

[0120] 1) If the difference between the battery voltage sampling value and the actual battery voltage value exceeds a certain value, such as 50mV, it means that the battery sampling path is abnormally damaged;

[0121] 2) The internal signal sampling value of the chip exceeds the preset range, which means that the internal circuit module is abnormally damaged. For example, the normal voltage range of the 2.5V reference source is [2.45V, 2.55V], and the normal voltage range of the 5V LDO is [4.9V, 5.1V].

[0122] Step 207: disconnect the switches in a relatively safe power-off sequence: S18, S17, ..., S3, S2, S19, S1; wait for a certain period of time (e.g., 2S) to restore the battery monitoring chip and peripheral devices to their initial state;

[0123] Step 208: Determine whether the battery monitoring chip is damaged according to the leakage current and / or the sampling value of the battery monitoring chip.

[0124] Step 209: The hot plug test of the second mode is terminated after the hot plug test is completed 1000 times, or the hot plug test is terminated when the battery monitoring chip is damaged.

[0125] In the above implementation, step 207 and step 208 are not sequentially performed and may be performed simultaneously.

[0126] In another embodiment, a hot-swap test method for a battery monitoring chip is provided. This embodiment adds the following steps: performing a hot-swap test using a third mode based on the first mode or the first and second modes of hot-swap testing.

[0127] The hot-swap power-on in the third mode includes: in each round of hot-swap test, all test switches are divided into two groups, one group of test switches is closed first, and then the other group of test switches is closed; the test switches in different rounds of hot-swap test are grouped differently. The third mode can simulate the application scenario where the sampling harness of a battery monitoring chip is connected through two connectors.

[0128] As an implementation manner, in the hot-swap power-up in the third mode, different rounds of hot-swap testing include all possible groups of test switches.

[0129] As an implementation manner, in the hot-swap power-on in the third mode, each round of hot-swap test process includes multiple hot-swap test processes.

[0130] The following continues to use 16 battery modules, each round of hot-swap test includes 100 hot-swap test processes as an example to illustrate the hot-swap test of the third mode:

[0131] As an implementation, please refer to Figure 6 , the hot-swap test in the third mode can be implemented by the following steps:

[0132] Step S301: divide the 19 switches into two groups according to the order of numbers, which are named as a high channel group and a low channel group. The high channel group includes S[m+1] to S19, and the low channel group includes S1 to S[m], where m=1 to 18.

[0133] Step S302: first close the switch of the high channel group, wait for a certain time (such as 2S), then close the switch of the low channel group, wait for a certain time (such as 2S), so that the battery monitoring chip completes the power-on process;

[0134] Step S303: sending m representing the boundary between the high and low channel groups to the PC;

[0135] Step S304: measuring the leakage current on the sampling lines corresponding to the switches S2 to S18 and sending the information to the PC;

[0136] Step S305: Sending an instruction to start the ADC of the battery monitoring chip to read the sampling value of the battery monitoring chip, such as the battery voltage sampling value, and sending the sampling value of the battery monitoring chip to the PC to determine whether the battery monitoring chip is damaged according to the sampling value of the battery monitoring chip;

[0137] Preferably, the sampled values ​​of the battery monitoring chip read in step S107 include, in addition to the battery voltage sampled values ​​exemplified above, the chip internal signal sampled values, such as the voltage of the internal reference source, the output voltage of the internal LDO, the chip temperature, etc. To determine whether the battery monitoring chip is damaged based on the sampled values ​​of the battery monitoring chip, any one of the following conditions may be met:

[0138] 1) If the difference between the battery voltage sampling value and the actual battery voltage value exceeds a certain value, such as 50mV, it means that the battery sampling path is abnormally damaged;

[0139] 2) The internal signal sampling value of the chip exceeds the preset range, which means that the internal circuit module is abnormally damaged. For example, the normal voltage range of the 2.5V reference source is [2.45V, 2.55V], and the normal voltage range of the 5V LDO is [4.9V, 5.1V].

[0140] Step S306: disconnect the switches in a relatively safe power-off sequence: S18, S17, ..., S3, S2, S19, S1; wait for a certain period of time (e.g., 2S) to restore the battery monitoring chip and peripheral devices to their initial state;

[0141] Step S307: judging whether the battery monitoring chip is damaged according to the leakage current and / or the battery monitoring chip sampling value.

[0142] Step S308: Repeat steps S302 to S307 100 times;

[0143] Step S309: the value of m starts from 1, with a step of 1, and traverses to 18 in sequence, and steps S302 to S308 are repeated;

[0144] Step S310: The hot plug test of the third mode is terminated after the two groups of hot plug tests are completed, or the hot plug test is terminated when the battery monitoring chip is damaged.

[0145] In the above implementation, step 306 and step 307 are not performed in any particular order and may be performed simultaneously.

[0146] In one embodiment, a battery monitoring chip hot-swap test system is also provided, wherein the battery monitoring chip corresponds to a plurality of test switches, such as Figure 4 The hot-swap test system includes:

[0147] A hot-swap test device for performing a hot-swap test using at least one mode: a first mode;

[0148] Specifically, please refer to Figure 7 , the hot-swap test module specifically includes:

[0149] A hot-swap power-on module 11 is used to perform hot-swap power-on in a corresponding mode; wherein, the hot-swap power-on in the first mode includes: the first N test switches that are powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to a preset power-on order; wherein N is a positive integer, and N≤M, and M is the number of the test switches corresponding to the battery monitoring chip;

[0150] Working data collection module 12, used for collecting working data of battery monitoring chip after hot plugging and powering on;

[0151] A damage judgment module 13 is used to judge whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip after the working data of the battery monitoring chip is collected;

[0152] The hot-swap power-off module 14 is used to perform hot-swap power-off after the working data collection of the battery monitoring chip is completed.

[0153] It should be noted that the hot-swappable power-on module and the hot-swappable power-off module can be implemented by executing different on / off logics through the same hardware.

[0154] As an implementation mode, the hot-swap power-on module 11, the working data acquisition module 12, and the hot-swap power-off module 13 may be included in Figure 4 The damage judgment module 12 may be included in the MCU of the battery monitoring chip hot-swap test system shown in FIG. Figure 4 The PC shown.

[0155] As another implementation, the hot-swap power-on module 11, the working data acquisition module 12, and the hot-swap power-off module may also be included in the Figure 8 The battery monitoring chip is shown in the MCU in the hot-swap test system.

[0156] like Figure 8 In the hot-swap test system for the battery monitoring chip shown in the figure, a filter resistor is set between the test switch and the battery monitoring chip, and an ESD capacitor (CE1 to CE18 in the figure) and a filter capacitor (C1 to C18 in the figure) are connected in parallel between each two adjacent acquisition lines. The ESD capacitor and the filter capacitor are located at both ends of the filter resistor, respectively. The ESD capacitor is close to the battery module and mainly plays a role in port protection. The filter capacitor is close to the battery monitoring chip and forms an RC filter with the filter resistor.

[0157] In another embodiment, the hot-swap test device is further used to: perform hot-swap test in a second mode. The hot-swap power-on in the second mode includes: all test switches are closed in sequence according to a completely random power-on sequence; and the number of hot-swap tests in the second mode is much less than M!.

[0158] In another embodiment, the hot-swap test device is further used to: perform hot-swap test in a third mode. The hot-swap power-on in the third mode includes: in each round of hot-swap test, all test switches are divided into two groups, and the test switches in one group are closed first, and then the test switches in the other group are closed; the test switches in different rounds of hot-swap test are grouped differently.

[0159] In one embodiment, an electronic device is also provided, please refer to Fig. 9. At the hardware level, the device includes a processor 21, an internal bus 22, a network interface 23, a memory 24 and a storage 25, and may also include hardware required for other services. One or more embodiments of the present invention may be implemented based on software, such as the processor 21 reading the corresponding computer program from the storage 25 into the memory 24 and then running it. Of course, in addition to software implementation, one or more embodiments of the present invention do not exclude other implementation methods, such as logic devices or a combination of software and hardware, etc., that is, the execution subject of the following processing flow is not limited to each logic unit, but may also be hardware or logic devices.

[0160] The systems, devices, modules or units described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which may be in the form of a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email transceiver, a game console, a tablet computer, a wearable device or a combination of any of these devices.

[0161] In a typical configuration, a computer includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0162] The memory may include non-permanent storage in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0163] Computer-readable media include permanent and non-permanent, removable and non-removable media that can be used to store information by any method or technology. Information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassettes, disk storage, quantum memory, graphene-based storage media or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include temporary computer-readable media (transitory media), such as modulated data signals and carrier waves.

[0164] The above describes specific embodiments of the present invention. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0165] In the description of this specification, the description with reference to the terms "an implementation", "an example", "a specific implementation process", "an example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0166] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A hot-swap test method for a battery monitoring chip, characterized in that: One battery monitoring chip corresponds to multiple test switches; The method includes: using at least one mode: a first mode to perform hot plug test; Each mode hot-swap test includes: Hot-swap power-on is performed according to the corresponding mode; wherein the hot-swap power-on in the first mode includes: the first N test switches that are powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to the preset power-on order; wherein N is a positive integer, and N≤M, and M is the number of the test switches corresponding to the battery monitoring chip; After the hot-swap power-on is completed, the working data of the battery monitoring chip is collected; After the working data of the battery monitoring chip is collected, it is determined whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip; After the working data collection of the battery monitoring chip is completed, hot plugging and powering off are performed.

2. The hot-swap test method for a battery monitoring chip according to claim 1, characterized in that: Also includes: Use the second mode to perform hot-swap testing; The hot-swap power-on in the second mode includes: all test switches are closed in sequence according to a completely random power-on sequence; The number of hot-swap tests in the second mode is much smaller than M!.

3. The hot-swap test method for a battery monitoring chip according to claim 2, characterized in that: Also included: using a third mode to perform hot-swap testing; The hot-swap power-on in the third mode includes: in each round of hot-swap test, all test switches are divided into two groups, the test switches in one group are closed first, and then the test switches in the other group are closed; the test switches in different rounds of hot-swap test are grouped differently.

4. The hot-swap test method for a battery monitoring chip according to claim 3, characterized in that: In the hot-swap power-up in the third mode, different rounds of hot-swap testing include all possible groups of test switches.

5. The hot-swap test method for a battery monitoring chip according to claim 3, characterized in that: In the hot-plug power-on in the third mode, each round of hot-plug test includes multiple hot-plug test processes.

6. The hot-swap test method for a battery monitoring chip according to any one of claims 1 to 5, characterized in that: Judging whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip specifically includes: Determining whether the battery monitoring chip is damaged according to the pin leakage current of the battery monitoring chip; and / or, Whether the battery monitoring chip is damaged is determined according to the sampling value of the battery monitoring chip.

7. The hot-swap test method for a battery monitoring chip according to any one of claims 1 to 5, characterized in that: The hot-swap power-off specifically includes: the test switches are disconnected in sequence according to a preset power-off sequence.

8. A battery monitoring chip hot-swap test system, characterized in that: One battery monitoring chip corresponds to multiple test switches; The system includes: A hot-swap test device for performing a hot-swap test using at least one mode: a first mode; The hot-swap test device specifically comprises: A hot-swap power-on module, used for hot-swap power-on according to a corresponding mode; wherein the hot-swap power-on in the first mode includes: the first N test switches that are powered on first are completed in sequence according to all possible enumeration orders, and the remaining test switches are closed in sequence according to a preset power-on order; wherein N is a positive integer, and N≤M, and M is the number of the test switches corresponding to the battery monitoring chip; A working data acquisition module, used for collecting working data of the battery monitoring chip after the hot-swap power-on is completed; A damage judgment module, which is used to judge whether the battery monitoring chip is damaged according to the working data of the battery monitoring chip after the working data of the battery monitoring chip is collected; The hot-swap power-off module is used to perform hot-swap power-off after the working data collection of the battery monitoring chip is completed.

9. An electronic device, characterized in that: include: processor; and, a memory for storing processor-executable instructions; The processor implements the steps in the method of any one of claims 1 to 7 by running the executable instructions.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed by a processor, the steps in the method according to any one of claims 1 to 7 are implemented.

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