Voltage modulator with reduced transient voltage drop

Abstract

The invention relates to the technical field of voltage modulators, in particular to a voltage modulator with reduced transient voltage drop. According to the voltage modulator provided by the invention, the transistors M5 and M13, the resistors R3 and R4 and the capacitors C2 and C3 realize a transient voltage drop reducing function. When the output voltage VOUT drops quickly, the change condition is coupled to a node V1 through a capacitor C2, so that the V1 drops along with the change condition, the current of a transistor M5 is increased, the current flows through a transistor M13, so that the voltage of a node V2 is increased, then the current is coupled to a grid node V3 of a transistor M11 through a capacitor C3, the current of the transistor M11 is increased, the current is discharged from a grid node V4 of a transistor M4 through a transistor M7, and the voltage of the transistor V4 is increased. And the current of the transistor M4 is increased and is used for pulling back the output voltage VOUT, so that the transient voltage drop is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of voltage modulators, and in particular to a voltage modulator with reduced transient voltage drop. Background Art

[0002] ‌‌Voltage modulator‌ is a modulator based on electronic technology. Its main function is to convert analog signals into digital signals so as to transmit data in digital communication and realize the function of signal modulation. After inputting the original signal, the voltage modulator uses the voltage modulation chip to modulate the digital signal and finally outputs the modulated voltage signal. Its main functions include improving the speed and accuracy of voltage signal transmission, thereby achieving more efficient and accurate voltage data transmission. The working principle of the voltage modulator is to modulate the digital signal by using the voltage modulation chip after inputting the original signal. The specific process includes: input signal processing‌: processing the input analog signal; modulation processing‌: digitally modulating the signal through the voltage modulation chip; output modulated signal‌: finally outputting the modulated digital signal‌.

[0003] In the prior art, voltage modulators generally use a two-stage structure. The first stage is an error amplifier, and the second stage is a flipped source follower (Flipped Source Follower, FVF). The main pole is at the output of the first-stage amplifier. The first-stage amplifier provides gain, and the second-stage FVF achieves a rapid response to changes in the output voltage. When the output voltage drops rapidly, the gate of the power tube is quickly pulled down, and the power tube is quickly turned on to pull the output voltage back. Among them, when the output voltage drops rapidly, the current of the following PMOS decreases, and the gate of the power tube is discharged through the N-type current source. Considering power consumption, the current of the N-type current source is usually not large, so the ability to discharge the gate of the power tube is not strong, and the response to the output voltage is insufficient. Summary of the invention

[0004] In view of this, the present invention proposes a voltage modulator with reduced transient voltage drop, which is used to quickly pull back the output voltage.

[0005] In order to achieve the above object, a voltage modulator with reduced transient voltage drop is provided, comprising: Error amplifier AMP, transistor M3, transistor M4, transistor M7, transistor M11, transistor M12, transistor M14, transistor M1, transistor M2, transistor M6, transistor M8, transistor M9, transistor M10, transistor M5, transistor M13, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R1; wherein the transistor M3, the transistor M4, the transistor M7, the transistor M11, the transistor M12, the transistor M14 constitute a flip source follower, the transistor M1, the transistor M2, the transistor M6, the transistor M8, the transistor M9, the transistor M10 constitute a bias circuit; wherein the power input The input (VDD) is connected to the drains of the transistors M3 and M4, the positive input terminal of the error amplifier (AMP) is connected to the reference voltage (VREF), the negative input terminal is connected to the feedback voltage (VFB), and the output of the error amplifier (AMP) is connected to the gate of the transistor M2; the source of the transistor M1 is grounded (GND), the drain of the transistor M1 is connected to the gate of M2, the drain of the transistor M2 is connected to the gates of the transistors M3 and M4, and the sources of the transistors M3 and M4 are connected together; the drain of the transistor M5 is connected to the sources of the transistors M3 and M4, and the gate of the transistor M5 is connected to VDD.

[0006] Preferably, the transistor M6 and the transistor M7 form a current mirror, the drain of the transistor M6 is connected to the source of the transistor M2, and the drain of the transistor M7 is connected to the gate of the transistor M14.

[0007] Preferably, the transistor M8 and the transistor M9 form a pull-down network, the drain of the transistor M8 is connected to the source of the transistor M6, and the drain of the transistor M9 is connected to the ground (GND).

[0008] Preferably, the transistor M10 and the transistor M11 form a current mirror, the drain of the transistor M10 is connected to the source of the transistor M8, and the drain of the transistor M11 is connected to the gate of M12.

[0009] Preferably, the transistors M12 and M13 form a pull-down network, the drain of the transistor M12 is connected to the source of the transistor M10, and the drain of the transistor M13 is connected to the ground (GND).

[0010] Preferably, the resistor R1 and the resistor R2 are respectively connected between the output voltage (VOUT) and the feedback voltage (VFB) to achieve voltage division.

[0011] Preferably, the capacitor C1 is connected between the drain of the transistor M6 and the ground for filtering, the capacitor C2 is connected between the source of the transistor M3 and the transistor M4 and the ground for filtering, and the capacitor C3 is connected between the drain of the transistor M11 and the ground for filtering.

[0012] Preferably, the diode V1 is connected between the drain and source of the transistor M5, the diode V2 is connected between the drain and source of the transistor M12, the diode V3 is connected between the source of the transistor M11 and the drain of the transistor M12, and the diodes V4 and V5 are respectively connected between the source of the transistor M3 and the source of the transistor M4 and the ground to prevent reverse current.

[0013] Preferably, the voltage modulator further comprises: a resistor R5, wherein the resistor R5 is arranged between the gate and the drain of the transistor M13.

[0014] The advantages and beneficial effects of the present invention are: The voltage modulator of the present invention has transistors M5 and M13, resistors R3 and R4, and capacitors C2 and C3 to realize the function of reducing transient voltage drop. When the output voltage VOUT drops rapidly, the change is coupled to the node V1 through the capacitor C2, so that V1 also drops, the current of the transistor M5 increases, and this current flows through the transistor M13, so that the voltage of the node V2 increases, and then coupled to the gate node V3 of the transistor M11 through the capacitor C3, the current of the transistor M11 increases, and this current discharges the gate node V4 of the transistor M4 through the transistor M7, thereby increasing the current of the transistor M4, and this current is used to pull back the output voltage VOUT, thereby realizing the reduction of transient voltage drop. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the description of the present invention or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 A schematic diagram of a voltage modulator with reduced transient voltage drop provided by Embodiment 1 of the present invention; Figure 2 A schematic diagram of a voltage modulator with reduced transient voltage drop provided by Embodiment 2 of the present invention. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] Attached Figure 1 A schematic diagram of a voltage modulator with reduced transient voltage drop is shown in the attached Figure 1 As shown, a voltage modulator with reduced transient voltage drop comprises: Error amplifier AMP, transistor M3, transistor M4, transistor M7, transistor M11, transistor M12, transistor M14, transistor M1, transistor M2, transistor M6, transistor M8, transistor M9, transistor M10, transistor M5, transistor M13, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R1; wherein the transistor M3, the transistor M4, the transistor M7, the transistor M11, the transistor M12, the transistor M14 constitute a flip source follower, the transistor M1, the transistor M2, the transistor M6, the transistor M8, the transistor M9, the transistor M10 constitute a bias circuit; wherein the power input The input (VDD) is connected to the drains of the transistors M3 and M4, the positive input terminal of the error amplifier (AMP) is connected to the reference voltage (VREF), the negative input terminal is connected to the feedback voltage (VFB), and the output of the error amplifier (AMP) is connected to the gate of the transistor M2; the source of the transistor M1 is grounded (GND), the drain of the transistor M1 is connected to the gate of M2, the drain of the transistor M2 is connected to the gates of the transistors M3 and M4, and the sources of the transistors M3 and M4 are connected together; the drain of the transistor M5 is connected to the sources of the transistors M3 and M4, and the gate of the transistor M5 is connected to VDD.

[0019] The transistor M6 and the transistor M7 form a current mirror, the drain of the transistor M6 is connected to the source of the transistor M2, and the drain of the transistor M7 is connected to the gate of the transistor M14.

[0020] The transistor M8 and the transistor M9 form a pull-down network, the drain of the transistor M8 is connected to the source of the transistor M6, and the drain of the transistor M9 is connected to the ground (GND).

[0021] The transistor M10 and the transistor M11 form a current mirror, the drain of the transistor M10 is connected to the source of the transistor M8, and the drain of the transistor M11 is connected to the gate of M12.

[0022] The transistors M12 and M13 form a pull-down network, the drain of the transistor M12 is connected to the source of the transistor M10, and the drain of the transistor M13 is connected to the ground (GND).

[0023] The resistor R1 and the resistor R2 are respectively connected between the output voltage (VOUT) and the feedback voltage (VFB) to achieve voltage division.

[0024] Among them, the capacitor C1 is connected between the drain of the transistor M6 and the ground for filtering, the capacitor C2 is connected between the source of the transistor M3 and the transistor M4 and the ground for filtering, and the capacitor C3 is connected between the drain of the transistor M11 and the ground for filtering.

[0025] Among them, the diode V1 is connected between the drain and source of the transistor M5, the diode V2 is connected between the drain and source of the transistor M12, the diode V3 is connected between the source of the transistor M11 and the drain of the transistor M12, and the diodes V4 and V5 are respectively connected between the source of the transistor M3 and the transistor M4 and the ground to prevent reverse current.

[0026] Among them, the transistors M5 and M13 of this embodiment, as well as the resistors R3 and R4, and the capacitors C2 and C3 realize the transient voltage drop reduction function. When the output voltage VOUT drops rapidly, the change is coupled to the node V1 through the capacitor C2, so that V1 also follows the drop, the current of the transistor M5 increases, and this current flows through the transistor M13, so that the voltage of the node V2 increases, and then coupled to the gate node V3 of the transistor M11 through the capacitor C3, the current of the transistor M11 increases, and this current discharges through the transistor M7 The gate node V4 of the transistor M4 increases the current of the transistor M4, and this current is used to pull back the output voltage VOUT, thereby realizing the transient voltage drop reduction; at the same time, the current mirror and the pull-down network ensure the stability and response speed of the circuit. The combination of capacitors and resistors is used to reduce voltage fluctuations and noise.

[0027] Embodiment 2, attached Figure 2 A schematic diagram of another voltage modulator with reduced transient voltage drop is shown in the attached Figure 2As shown, a voltage modulator with reduced transient voltage drop in this embodiment includes: an error amplifier AMP, a transistor M3, a transistor M4, a transistor M7, a transistor M11, a transistor M12, a transistor M14, a transistor M1, a transistor M2, a transistor M6, a transistor M8, a transistor M9, a transistor M10, a transistor M5, a transistor M13, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a resistor R1; wherein the transistor M3, the transistor M4, the transistor M7, the transistor M11, the transistor M12, and the transistor M14 constitute a flip-type source follower, and the transistor M1, the transistor M2, the transistor M6, the transistor M8, the transistor M9, the transistor M10, the transistor M5, the transistor M13, a capacitor C1, a capacitor C2, a capacitor C3, a resistor R1, a resistor R1; 0 constitutes a bias circuit; wherein, a power supply input (VDD) is connected to the drains of the transistors M3 and M4, a positive input terminal of the error amplifier (AMP) is connected to a reference voltage (VREF), a negative input terminal is connected to a feedback voltage (VFB), and an output of the error amplifier (AMP) is connected to the gate of the transistor M2; a source of the transistor M1 is grounded (GND), a drain of the transistor M1 is connected to the gate of M2, a drain of the transistor M2 is connected to the gates of the transistors M3 and M4, and sources of the transistors M3 and M4 are connected together; a drain of the transistor M5 is connected to the sources of the transistors M3 and M4, and a gate of the transistor M5 is connected to VDD; At the same time, the voltage modulator also includes: a resistor R5, which is arranged between the gate and the drain of the transistor M13. The increase of the resistor R5 can pull up the voltage of the node V2 more quickly when the current of the transistor M5 increases, so that the output change can be coupled to the transistor M11 more efficiently, and the output voltage change can be responded to more quickly, thereby reducing the transient voltage drop.

[0028] It should be understood by those skilled in the art that the embodiments of this article can be provided as methods, devices (equipment), or computer program products. Therefore, this article can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Including but not limited to RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassette, tape, disk storage or other magnetic storage device, or any other medium that can be used to store desired information and can be accessed by a computer. In addition, it is well known to those of ordinary skill in the art that communication media generally contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0029] This document is described with reference to flowcharts and / or block diagrams of methods, apparatuses (devices), and computer program products according to the embodiments of this document. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0030] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0031] The embodiments and / or implementation methods described above are only used to illustrate the preferred embodiments and / or implementation methods of the technology of the present invention, and are not intended to impose any formal restrictions on the implementation methods of the technology of the present invention. Any person skilled in the art may make some changes or modifications to other equivalent embodiments without departing from the scope of the technical means disclosed in the content of the present invention, but they should still be regarded as the technology or embodiments that are essentially the same as the present invention. Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described here, and that various obvious changes, readjustments and substitutions can be made to those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention is described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may also include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A voltage modulator with reduced transient voltage drop, characterized in that: include: Error amplifier AMP, transistor M3, transistor M4, transistor M7, transistor M11, transistor M12, transistor M14, transistor M1, transistor M2, transistor M6, transistor M8, transistor M9, transistor M10, transistor M5, transistor M13, capacitor C1, capacitor C2, capacitor C3, resistor R1, resistor R1; wherein the transistor M3, the transistor M4, the transistor M7, the transistor M11, the transistor M12, the transistor M14 constitute a flip source follower, the transistor M1, the transistor M2, the transistor M6, the transistor M8, the transistor M9, the transistor M10 constitute a bias circuit; wherein the power input The input (VDD) is connected to the drains of the transistors M3 and M4, the positive input terminal of the error amplifier (AMP) is connected to the reference voltage (VREF), the negative input terminal is connected to the feedback voltage (VFB), and the output of the error amplifier (AMP) is connected to the gate of the transistor M2; the source of the transistor M1 is grounded (GND), the drain of the transistor M1 is connected to the gate of M2, the drain of the transistor M2 is connected to the gates of the transistors M3 and M4, and the sources of the transistors M3 and M4 are connected together; the drain of the transistor M5 is connected to the sources of the transistors M3 and M4, and the gate of the transistor M5 is connected to VDD.

2. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The transistor M6 and the transistor M7 form a current mirror, the drain of the transistor M6 is connected to the source of the transistor M2, and the drain of the transistor M7 is connected to the gate of the transistor M14.

3. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The transistor M8 and the transistor M9 form a pull-down network, the drain of the transistor M8 is connected to the source of the transistor M6, and the drain of the transistor M9 is connected to the ground.

4. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The transistor M10 and the transistor M11 form a current mirror, the drain of the transistor M10 is connected to the source of the transistor M8, and the drain of the transistor M11 is connected to the gate of M12.

5. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The transistors M12 and M13 form a pull-down network, the drain of the transistor M12 is connected to the source of the transistor M10, and the drain of the transistor M13 is connected to the ground (GND).

6. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The resistor R1 and the resistor R2 are connected between the output voltage (VOUT) and the feedback voltage (VFB), respectively.

7. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The capacitor C1 is connected between the drain of the transistor M6 and the ground for filtering, the capacitor C2 is connected between the source of the transistor M3 and the transistor M4 and the ground for filtering, and the capacitor C3 is connected between the drain of the transistor M11 and the ground.

8. The voltage modulator with reduced transient voltage drop according to claim 1, characterized in that: The diode V1 is connected between the drain and source of the transistor M5, the diode V2 is connected between the drain and source of the transistor M12, the diode V3 is connected between the source of the transistor M11 and the drain of the transistor M12, and the diodes V4 and V5 are respectively connected between the source of the transistor M3 and the transistor M4 and the ground.

9. The voltage modulator with reduced transient voltage drop according to any one of claims 1 to 7, characterized in that: The voltage modulator further includes a resistor R5 , which is arranged between the gate and the drain of the transistor M13 .

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