Electronic device and method for managing microoperations

Abstract

The invention provides an electronic device and a method for managing microoperation. In an embodiment, the method comprises: when a processing unit executes a translation instruction, determining, by the processing unit, whether a microoperation corresponding to the translation instruction is stored in a translation buffer and a microoperation cache; when the microoperation corresponding to the translation instruction is not stored in the translation buffer area and the microoperation cache, outputting a specific microoperation by the processing unit to enter a system management mode; translating, by the processing unit, the translation instruction into a micro-operation corresponding to the translation instruction in a management mode; and storing, by the processing unit, a microoperation corresponding to the translation instruction in a microoperation cache.

Description

Technical Field

[0001] The present invention relates to instruction translation, and in particular to a method for storing micro-operations generated after translation. Background Art

[0002] Micro-operation (also known as μ A micro-operation (op or uop) is a detailed low-level instruction. A micro-operation can be the simplest operation performed by a processing unit. A complex machine instruction can be converted into multiple micro-operations so that the processing unit implements the machine instruction by executing multiple micro-operations. The converted micro-operations can be stored for reuse. However, how to store as many micro-operations as possible in a limited storage space is one of the problems to be solved in the art. Summary of the invention

[0003] An embodiment of the present invention provides an electronic device, comprising: a memory, a micro-operation cache, and a processing unit. The memory includes a translation buffer. The processing unit is used to determine whether the micro-operation corresponding to the translation instruction is stored in the translation buffer and the micro-operation cache when executing the translation instruction. The processing unit is also used to output a specific micro-operation to enter a system management mode when the micro-operation corresponding to the translation instruction is not stored in the translation buffer and the micro-operation cache. The processing unit is also used to translate the translation instruction into the micro-operation corresponding to the translation instruction in the management mode. The processing unit is also used to store the micro-operation corresponding to the translation instruction in the micro-operation cache.

[0004] The embodiment of the present invention provides a method for managing micro-operations. The method includes: when a processing unit executes a translation instruction, the processing unit determines whether a micro-operation corresponding to the translation instruction is stored in a translation buffer and a micro-operation cache; when the micro-operation corresponding to the translation instruction is not stored in the translation buffer and the micro-operation cache, the processing unit outputs a specific micro-operation to enter a system management mode; the processing unit translates the translation instruction into a micro-operation corresponding to the translation instruction in the management mode; and the processing unit stores the micro-operation corresponding to the translation instruction in the micro-operation cache. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 is a block diagram of an electronic device according to an embodiment of the present invention.

[0006] Figure 2 is a flow chart of a method for managing micro-operations according to an embodiment of the present invention.

[0007] Figure 3 is a flow chart of a method for managing micro-operations according to an embodiment of the present invention.

[0008]

Explanation of symbols

[0009] 100: Electronic devices

[0010] 110: Processing unit

[0011] 120: Memory

[0012] 121: Translation Buffer

[0013] 130: Micro-operation cache

[0014] 200, 300: Method

[0015] 201, 202, 203, 204, 205, 206, 207, 208, 301, 302, 303, 304, 305, 306: Operation DETAILED DESCRIPTION

[0016] In order to make the purpose, features and advantages of the present invention more clearly understood, specific embodiments of the present invention are given below with reference to the accompanying drawings for detailed description as follows.

[0017] refer to Figure 1 , Figure 1 1 is a block diagram of an electronic device 100 according to an embodiment of the present invention. The electronic device 100 includes a processing unit 110, a memory 120, a micro-operation cache (also called μ The micro-operation cache 130 may be a micro-operation cache or uopcache. The electronic device 100 may be a computing device, a mobile device, a wearable device, or an Internet of Things device. For example, the electronic device 100 may be a desktop computer, a notebook computer, a tablet computer, a smart phone, or other similar devices.

[0018] The processing unit 110 provides the ability to calculate and process data. The processing unit 110 can be used to execute programs, software, firmware, modules, and operating systems. The processing unit 110 can be implemented in the form of one or more integrated circuit chips. In some embodiments, the processing unit 110 can be implemented using multiple electronic components, including transistors, diodes, capacitors, resistors, or inductors. These electronic components are configured to achieve the specific purpose of the embodiments of the present invention. For example, the processing unit 110 may include a general-purpose processor, a special-purpose processor, a central processing unit, an instruction set processor, and / or a microcontroller unit.

[0019] The memory 120 may include a non-volatile memory, such as a read-only memory and a flash memory. The memory 120 may also include a volatile memory, such as a dynamic random access memory and a static random access memory. The memory 120 includes a translation buffer 121. The translation buffer 121 and the micro-operation cache 130 are used to store the micro-operations output by the instruction decoding unit. The instruction decoding unit is used to translate instructions into micro-operations. Translation is an instruction decoding technology used to convert an instruction into a target instruction, such as a micro-operation. Instructions and micro-operations are program instructions or machine languages ​​that instruct the processing unit 110 to perform operations such as data movement, arithmetic calculations, or logical operations. Micro-operations are detailed low-level instructions. Micro-operations can be the simplest operations performed by the processing unit 110. A complex machine instruction can be converted into multiple micro-operations so that the processing unit 110 implements the machine instruction by executing multiple micro-operations. In some embodiments, the instruction decoding unit is a hardware component similar to the processing unit 110. In other embodiments, the instruction decoding unit is a software module. For example, it is a software module implemented by the processing unit 110 running program instructions. In some embodiments, the micro-operation cache 130 can be integrated in the memory 120. The execution of translation requires the processing unit 110 to enter the system management mode and maintain the translation buffer 121 in the system management mode. In the system management mode, the translation instruction is translated into a micro-operation. The converted micro-operation can be stored in the translation buffer 121 for reuse. When the same translation instruction is executed again, the processing unit 110 will determine whether the micro-operation corresponding to the translation instruction is stored in the translation buffer 121. If the micro-operation corresponding to the translation instruction is stored in the translation buffer 121, the processing unit 110 reads and executes the corresponding micro-operation. However, the storage capacity of the translation buffer 121 is limited. The content stored in the translation buffer 121 will be gradually replaced. If there is no micro-operation corresponding to the translation instruction in the translation buffer 121, it is necessary to perform translation again. This will consume a lot of time.

[0020] refer to Figure 2 , Figure 22 is a flow chart of a method 200 for managing micro-operations according to an embodiment of the present invention. The method 200 can be implemented in the electronic device 100. In operation 201, the processing unit 110 executes a translation instruction. The instruction set of the processing unit 110 includes a coding space, and the coding space includes a plurality of instructions. In some embodiments, the coding space of this instruction set is an unused coding space reserved in an older processing unit to allow the older processing unit to execute functions added in the future. These instructions are, for example, machine languages. When these instructions are used by software or programs, the processing unit is triggered to execute the method 200 to search for micro-operations corresponding to these instructions, or to translate these instructions into at least one micro-operation. In the present disclosure, these instructions may be referred to as translation instructions.

[0021] When the processing unit 110 executes the translation instruction, the processing unit 110 performs operations 202 and 203. In operation 202, the processing unit 110 determines whether the micro-operation corresponding to the translation instruction is stored in the micro-operation cache 130. When the micro-operation corresponding to the translation instruction is stored in the micro-operation cache 130, the processing unit 110 performs operation 208. When the micro-operation corresponding to the translation instruction is not stored in the micro-operation cache 130, the processing unit 110 performs operation 203. In operation 203, the processing unit 110 determines whether the micro-operation corresponding to the translation instruction is stored in the translation buffer 121. When the micro-operation corresponding to the translation instruction is stored in the translation buffer 121, the processing unit 110 performs operation 207. When the micro-operation corresponding to the translation instruction is not stored in the translation buffer 121, the processing unit 110 performs 204. In some embodiments, the processing unit 110 first searches whether the micro-operation corresponding to the translation instruction is stored in the micro-operation cache 130. When the micro-operation cache 130 does not store the micro-operation corresponding to the translated instruction, the processing unit 110 searches the translation buffer 121 to see whether the micro-operation corresponding to the translated instruction is stored. When the micro-operation cache 130 and the translation buffer 121 do not store the micro-operation corresponding to the translated instruction (for example, when the translated instruction is executed for the first time and has never been translated), the processing unit 110 performs operation 204 to execute the translation process.

[0022] In operation 204, the processing unit 110 outputs a specific micro-operation. The specific micro-operation is used to trigger a system management interrupt (SMI) inside the processing unit 110 so that the processing unit 110 enters a system management mode (SMM). In operation 205, the processing unit 110 converts the translation instruction into at least one micro-operation corresponding to the translation instruction in the system management mode (e.g., by an instruction translation unit). In some embodiments, the instruction translation unit is a dedicated hardware unit designed specifically for the conversion of the translation instruction, rather than a conventional instruction decoding unit. In detail, the instruction translation unit uses a handler of the system management mode to issue a special x86 instruction to trigger the components inside the processing unit 110 to generate micro-operations corresponding to the translation instructions, and store the micro-operations in the translation buffer 121. In operation 206, the processing unit 110 stores the micro-operations corresponding to the translation instructions in the translation buffer 121 and exits the system management mode. In some embodiments, the processing unit 110 stores the micro-operations in the translation buffer 121 in the system management mode and then exits the system management mode. In other embodiments, the processing unit 110 first exits the system management mode and then stores the micro-operations in the translation buffer 121.

[0023] After exiting the system management mode, the processing unit 110 performs operation 201. That is, after exiting the system management mode, the processing unit 110 executes the translation instruction again. After that, the processing unit 110 performs operations 202 and 203. Since the micro-operation corresponding to the translation instruction has been stored in the translation buffer 121, but not stored in the micro-operation cache 130, the processing unit 110 performs operation 207. In operation 207, the processing unit 110 stores the micro-operation corresponding to the translation instruction in the translation buffer 121 into the micro-operation cache 130. After that, the processing unit 110 performs operation 208. In operation 208, the processing unit 110 executes the micro-operation corresponding to the translation instruction.

[0024] After the processing unit 110 has executed operations 204, 205, 206, and 207, the micro-operations corresponding to the translated instructions are stored in the micro-operation cache 130. Therefore, when the translated instructions are executed again, the processing unit 110 can execute the micro-operations corresponding to the translated instructions in the micro-operation cache 130 without having to execute the translation process again. That is, the processing unit 110 executes operations 201, 202, and 208 in sequence.

[0025] In some embodiments, the processing unit 110 does not store specific micro-operations in the translation buffer 121 or the micro-operation cache 130. This is because the specific micro-operations will trigger a system management interrupt and cause the processing unit 110 to enter a system management mode. If the specific micro-operations are stored in the translation buffer 121 or the micro-operation cache 130, each subsequent execution of the translation instruction will cause the processing unit 110 to enter the system management mode. This will increase the delay in executing the translation instruction.

[0026] In some embodiments, the micro-operation cache 130 includes a counter. The count value of the counter indicates the number of micro-operations corresponding to the translated instructions stored in the micro-operation cache 130. As described above, the translated instructions are instructions belonging to the same encoding space in the instruction set of the processing unit 110. The micro-operation cache 130 is also used to store micro-operations of instructions in other encoding spaces. When the count value is greater than a threshold value, the processing unit 110 does not store the micro-operations corresponding to the translated instructions in the micro-operation cache 130. When the count value is less than the threshold value, the processing unit 110 stores the micro-operations corresponding to the translated instructions in the micro-operation cache 130. In some embodiments, the threshold value is configured by a model specific register (MSR), and the threshold value can be adjusted by software through the model specific register. In some embodiments, the threshold value is adjusted by a hardware element. In some embodiments, the processing unit 110 is used to adjust the threshold value according to the number of micro-operations stored in the micro-operation cache 130 and the count value. The processing unit 110 adjusts the threshold value according to the number of all micro-operations stored in the cache 130 and the number of micro-operations corresponding to the translated instructions.

[0027] In some embodiments, the processing unit 110 is used to store the micro-operations in the translation buffer 121 into the micro-operation cache 130. The processing unit 110 is also used to store the micro-operations in the micro-operation cache 130 into the translation buffer 121. Therefore, the replaced micro-operations in the translation buffer 121 can be stored in the micro-operation cache 130. The replaced micro-operations in the micro-operation cache 130 can be stored in the translation buffer 121. In this way, the total number of micro-operations that can be stored can be increased.

[0028] The embodiment of the present invention can increase the number of micro-operations that can be stored by storing the micro-operations of the translation instructions in the micro-operation cache 130. In addition, using the cache 130 to store the micro-operations of the corresponding translation instructions is conducive to reducing the area and power consumption of the translation buffer 121. Even if the micro-operations in the translation buffer 121 are replaced because of the capacity upper limit, the micro-operations of the corresponding translation instructions are still stored in the micro-operation cache 130. This allows the processing unit 110 to skip the translation process execution instruction by reading the micro-operations in the micro-operation cache 130. In addition, the embodiment of the present invention can avoid the need to frequently replace the content stored therein due to the small capacity of the translation buffer 121. Therefore, the embodiment of the present invention can improve the efficiency of executing instructions.

[0029] refer to Figure 3 , Figure 3 300 is a flow chart of a method 300 for managing micro-operations according to an embodiment of the present invention. The method 300 can be implemented in the electronic device 100. In operation 301, the processing unit 110 executes a translation instruction. In operation 302, when executing the translation instruction, the processing unit 110 determines whether the micro-operations corresponding to the translation instruction are stored in the translation buffer 121 and the micro-operation cache 130. When the micro-operations corresponding to the translation instruction are stored in the translation buffer 121 and the micro-operation cache 130, the processing unit 110 executes operation 306. In operation 306, the processing unit 110 executes the micro-operations corresponding to the translation instruction. When the micro-operations corresponding to the translation instruction are not stored in the translation buffer 121 and the micro-operation cache 130, the processing unit 110 executes operation 303. In operation 303, the processing unit 110 outputs a specific micro-operation to enter a system management mode. In operation 304, the processing unit 110 translates the translation instruction into the micro-operations corresponding to the translation instruction in the management mode. In operation 305, the processing unit 110 stores the micro-operation corresponding to the translated instruction in the micro-operation cache 130. In some embodiments, operation 305 is performed after the processing unit 110 exits the system management mode.

[0030] In some embodiments, the method 300 further includes: the processing unit 110 stores the micro-operation corresponding to the translated instruction in the translation buffer 121; the processing unit 110 executes the translated instruction again after exiting the system management mode; and when the translation buffer 121 stores the micro-operation corresponding to the translated instruction, the processing unit 110 stores the micro-operation corresponding to the translated instruction in the translation buffer 121 in the micro-operation cache 130. In some embodiments, the method 300 further includes when the micro-operation corresponding to the translated instruction is stored in the micro-operation cache 130, the processing unit 110 executes the micro-operation corresponding to the translated instruction.

[0031] In the above embodiments, a series of operations or events are used to describe or illustrate, but it should be understood that the order of operation or event description should not be used to limit. For example, some operations can occur in different orders within a reasonable range, remove other operations or events described here, or different operations can occur simultaneously. In addition, one or more operations described here can be performed with one or more separated operations and / or stages.

[0032] Although the present invention is disclosed as above in terms of preferred embodiments, it is not intended to limit the scope of the present invention. Those skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined in the attached claims.

Claims

1. An electronic device, comprising: Memory, including translation buffers; Micro-operation cache; as well as A processing unit for: When executing a translation instruction, determining whether the translation buffer and the micro-operation cache store micro-operations corresponding to the translation instruction; When the micro-operation corresponding to the translation instruction is not stored in the translation buffer and the micro-operation cache, a specific micro-operation is output to enter a system management mode; translating the translated instruction into the micro-operation corresponding to the translated instruction in the management mode; as well as The micro-operation corresponding to the translated instruction is stored in the micro-operation cache.

2. The electronic device as claimed in claim 1, wherein the processing unit is further configured to: Storing the micro-operation corresponding to the translation instruction into the translation buffer; After exiting the system management mode, executing the translation instruction again; and When the translation buffer stores the micro-operation corresponding to the translation instruction, the micro-operation corresponding to the translation instruction in the translation buffer is stored in the micro-operation cache.

3. The electronic device as claimed in claim 1, wherein the processing unit is further configured to: When the micro-operation corresponding to the translation instruction is stored in the micro-operation cache, the micro-operation corresponding to the translation instruction is executed. 4 . The electronic device as claimed in claim 1 , wherein the processing unit does not store the specific micro-operation in the translation buffer or the micro-operation cache.

5. The electronic device as claimed in claim 1, wherein: The micro-operation cache includes a counter, a count value of the counter indicating the number of micro-operations corresponding to the translation instruction stored in the micro-operation cache; Wherein, when the count value is greater than a threshold, the processing unit does not store the micro-operation corresponding to the translated instruction into the micro-operation cache; When the count value is less than the threshold, the processing unit stores the micro-operation corresponding to the translated instruction into the micro-operation cache. 6 . The electronic device as claimed in claim 1 , wherein the processing unit is further configured to adjust the threshold value according to the number of micro-operations stored in the micro-operation cache and the count value.

7. The electronic device as claimed in claim 1, wherein: The processing unit is also used to: storing the micro-operations in the translation buffer into the micro-operation cache; or The micro-operations in the micro-operation cache are stored in the translation buffer.

8. A method for managing micro-operations, comprising: When the processing unit executes a translation instruction, the processing unit determines whether a micro-operation corresponding to the translation instruction is stored in the translation buffer and the micro-operation cache; When the micro-operation corresponding to the translation instruction is not stored in the translation buffer and the micro-operation cache, the processing unit outputs a specific micro-operation to enter a system management mode; translating, by the processing unit in the management mode, the translated instruction into the micro-operation corresponding to the translated instruction; as well as The processing unit stores the micro-operation corresponding to the translated instruction in the micro-operation cache.

9. The method of claim 8, further comprising: storing the micro-operation corresponding to the translation instruction in the translation buffer by the processing unit; After the processing unit exits the system management mode, the translation instruction is executed again; as well as When the translation buffer stores the micro-operation corresponding to the translation instruction, the processing unit stores the micro-operation corresponding to the translation instruction in the translation buffer into the micro-operation cache.

10. The method of claim 8, further comprising: When the micro-operation corresponding to the translation instruction is stored in the micro-operation cache, the micro-operation corresponding to the translation instruction is executed by the processing unit.

11. The method of claim 8, wherein the processing unit does not store the specific micro-operation in the translation buffer or the micro-operation cache.

12. The method of claim 8, wherein: The micro-operation cache includes a counter, a count value of the counter indicating the number of micro-operations corresponding to the translation instruction stored in the micro-operation cache; The method further comprises: When the count value is greater than a threshold, the micro-operation corresponding to the translated instruction is not stored in the micro-operation cache by the processing unit; When the count value is less than the threshold, the processing unit stores the micro-operation corresponding to the translated instruction into the micro-operation cache.

13. The method of claim 12, further comprising: The processing unit adjusts the threshold according to the number of micro-operations stored in the micro-operation cache and the count value.

14. The method of claim 8, further comprising: storing the micro-operations in the translation buffer into the micro-operation cache by the processing unit; or The micro-operations in the micro-operation cache are stored in the translation buffer by the processing unit.

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