Fault detection method, device, equipment and medium

Abstract

The invention discloses a fault detection method and device, equipment and a medium, and relates to the field of fault detection, and the method comprises the steps that a computer system maps a main memory storing a kernel variable to be monitored to a process address space through virtual equipment created in a CPU, and maps the process address space to a target address space in a GPGPU according to an opencl model, establishing a mapping relation between the main memory and the target address space; compiling the original detection code containing the to-be-monitored kernel variable into an intermediate code by using a compiler, and converting a CPU virtual address of the to-be-monitored kernel variable in the intermediate code into a GPU access address to obtain an executable code; and executing the executable code through a fault detector running on the GPGPU, so as to obtain variable data of the kernel variable to be monitored from the main memory by utilizing the mapping relation when the target address space is accessed based on the GPU access address, and realize fault detection on the CPU from the interior of the system according to the variable data.

Description

Technical Field

[0001] The present invention relates to the field of fault detection, and in particular to a fault detection method, device, equipment and medium. Background Art

[0002] In today's digital age, computer systems, especially cloud computing systems, play a vital role in all fields. With the rapid development of cloud computing technology, the scale of the system is growing exponentially, and the system architecture is becoming more and more complex. Numerous servers, storage devices, network components, and software applications are intertwined to form a large and complex system. In this context, the frequency and scope of system failures are also expanding, and once a system fails, it may cause a series of serious consequences. Therefore, with the continuous expansion of system scale and increasing complexity, system fault detection has become an inevitable problem.

[0003] Traditional fault detection methods are mainly divided into black-box detection and white-box detection. Black-box detection, such as heartbeat detection, determines whether the system is operating normally by regularly sending requests to the system's host and server and waiting for responses. Although this method can ensure continuous detection of the system to a certain extent, it can only observe the system's operating status from the outside and cannot deeply understand the detailed information inside the system. Therefore, it is difficult to accurately determine the specific type and root cause of the system failure. Although white-box detection can accurately obtain fault information within the system, it is heavily dependent on the system. Once the system fails, white-box detection may also be affected and cannot work normally. Summary of the invention

[0004] In view of this, the purpose of the present invention is to provide a fault detection method, device, equipment and medium, by deploying the fault detector in GPGPU, so as to realize the fault detection of CPU from the inside of the system through the fault detector, and also to deeply understand the detailed information inside the system, so as to improve the accuracy of fault detection. The specific scheme is as follows:

[0005] In a first aspect, the present application provides a fault detection method, which is applied to a computer system, wherein the computer system includes a CPU, a GPGPU, and a compiler; the method includes:

[0006] A virtual device is created in the CPU to map a main memory storing kernel variables to be monitored to a process address space by using the virtual device, and the mapped process address space is mapped to a target address space in the GPGPU according to an opencl model to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU;

[0007] Compiling the original detection code including the kernel variable to be monitored into an intermediate code by using the compiler, and converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address, so as to convert the intermediate code into an executable code;

[0008] The executable code is executed by a fault detector running on the GPGPU so that when the target address space is accessed based on the GPU access address, the variable data of the kernel variable to be monitored is obtained from the main memory using the mapping relationship, and fault detection is performed on the CPU based on the variable data.

[0009] Optionally, converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address to convert the intermediate code into an executable code includes:

[0010] Searching for a load instruction in the intermediate code, and determining a target data structure of the kernel variable to be monitored based on the load instruction;

[0011] Determine a corresponding target address translation logic based on the target data structure, and generate an address translation instruction according to the target address translation logic and the kernel variable to be monitored, so as to translate the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address translation instruction;

[0012] The address conversion instruction is inserted into the intermediate code to obtain an executable code.

[0013] Optionally, when the target data structure represents that the CPU virtual address of the kernel variable to be monitored is located in a direct address mapping area in the process address space, converting the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction includes:

[0014] Based on the CPU virtual address and the preset offset of the kernel variable to be monitored, a CPU physical address is determined, and based on the CPU physical address and the base address of the target address space, a GPU access address is determined.

[0015] Optionally, when the target data structure represents that the CPU virtual address of the kernel variable to be monitored is located in a non-direct address mapping area in the process address space, converting the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction includes:

[0016] The CPU physical address corresponding to the CPU virtual address of the kernel variable to be monitored is determined by traversing the kernel page table, and the GPU access address is determined based on the CPU physical address and the base address of the target address space.

[0017] Optionally, when the kernel symbol of the kernel variable to be monitored represented by the target data structure is located in a system mapping file, converting the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction includes:

[0018] Acquire a CPU virtual address corresponding to the kernel symbol of the kernel variable to be monitored from the system mapping file; the system mapping file records the virtual addresses corresponding to each kernel symbol;

[0019] Based on the CPU virtual address and the preset offset of the kernel variable to be monitored, a CPU physical address is determined, and based on the CPU physical address and the base address of the target address space, a GPU access address is determined.

[0020] Optionally, the method further includes:

[0021] Locking a reference count of each memory page in the main memory so as to keep the reference count of each memory page in the main memory unchanged when the main memory is mapped to the process address space using the virtual device;

[0022] Correspondingly, when the mapping relationship between the main memory and the target address space is released, the reference count of each memory page in the main memory is kept unchanged.

[0023] Optionally, before mapping the mapped process address space to the target address space in the GPGPU according to the opencl model, the method further includes:

[0024] intercepting system information sent by the CPU to the GPGPU to modify the actual capacity of the main memory contained in the system information;

[0025] Sending the system information including the modified capacity to the GPGPU so that the GPGPU determines the target address space to be mapped from the local memory based on the modified capacity;

[0026] The modified capacity is greater than the actual capacity of the main memory.

[0027] In a second aspect, the present application provides a fault detection device, which is applied to a computer system, wherein the computer system includes a CPU, a GPGPU, and a compiler; the device includes:

[0028] A main memory mapping module, configured to create a virtual device in the CPU to map a main memory storing kernel variables to be monitored to a process address space by using the virtual device, and map the mapped process address space to a target address space in the GPGPU according to an opencl model to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU;

[0029] a code compiling module, used for compiling the original detection code including the kernel variable to be monitored into an intermediate code by using the compiler, and converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address, so as to convert the intermediate code into an executable code;

[0030] A fault detection module is used to execute the executable code through a fault detector running on the GPGPU, so as to obtain variable data of the kernel variable to be monitored from the main memory by using the mapping relationship when accessing the target address space based on the GPU access address, and perform fault detection on the CPU according to the variable data.

[0031] In a third aspect, the present application provides an electronic device, including:

[0032] Memory, used to store computer programs;

[0033] A processor is used to execute the computer program to implement the aforementioned fault detection method.

[0034] In a fourth aspect, the present application provides a computer-readable storage medium for storing a computer program, wherein the computer program implements the aforementioned fault detection method when executed by a processor.

[0035] The fault detection method of the present application is applied to a computer system, and the computer system includes a CPU, a GPGPU and a compiler; wherein the computer system creates a virtual device in the CPU to map a main memory storing kernel variables to be monitored to a process address space by using the virtual device, and maps the mapped process address space to a target address space in the GPGPU according to an opencl model to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU; the compiler is used to compile an original detection code containing the kernel variables to be monitored into an intermediate code, and the CPU virtual address of the kernel variables to be monitored in the intermediate code is converted into a GPU access address to convert the intermediate code into an executable code; the executable code is executed by a fault detector running on the GPGPU, so that when accessing the target address space based on the GPU access address, the variable data of the kernel variables to be monitored is obtained from the main memory by using the mapping relationship, and fault detection is performed on the CPU according to the variable data.

[0036] It can be seen that the present application takes into account that system failures are usually CPU failures, and there is a physical isolation feature between the CPU and GPGPU. Therefore, even if the CPU in the system fails, it is not easy to spread to the GPGPU. In order to be able to detect CPU faults from within the system, the present application deploys the fault detector in the GPGPU so that the fault detector can detect CPU faults from within the system. At this time, even if the CPU fails, it is not easy to affect the normal operation of the fault detector, and the fault detector can also deeply understand the detailed information inside the system to improve the accuracy of fault detection. Further, since GPGPU is not allowed to access data in the CPU in principle, the present application creates a virtual device in the CPU to use the virtual device to map the main memory to the process address space, and maps the process address space to the target address space in the GPGPU according to the opencl model, thereby establishing a mapping relationship between the main memory and the target address space, so that the GPGPU can access the data in the CPU based on the mapping relationship, and since the mapping relationship between the main memory and the target address space has been established in advance, even if the CPU fails, the GPGPU can still obtain data from the CPU based on the mapping relationship, thereby improving the availability and reliability of fault detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0038] Figure 1 A flow chart of a fault detection method disclosed in this application;

[0039] Figure 2 A code compilation flow chart disclosed in this application;

[0040] Figure 3 A fault detection flow chart disclosed in this application;

[0041] Figure 4 A schematic diagram of an address mapping disclosed in this application;

[0042] Figure 5 This is a schematic diagram of the structure of a fault detection device disclosed in this application;

[0043] Figure 6 This is a structural diagram of an electronic device disclosed in this application. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0045] With the continuous expansion of system scale and increasing complexity, system fault detection has become an inevitable problem, and both black box detection and white box detection have certain defects in system fault detection. To this end, the present application provides a fault detection method, which deploys a fault detector in a GPGPU to implement CPU fault detection from within the system through the fault detector, and can also deeply understand the detailed information inside the system to improve the accuracy of fault detection.

[0046] See also Figure 1 As shown, an embodiment of the present invention discloses a fault detection method, which is applied to a computer system, wherein the computer system includes a CPU, a GPGPU, and a compiler; the method includes:

[0047] Step S11, by creating a virtual device in the CPU, using the virtual device to map the main memory storing the kernel variables to be monitored to the process address space, and mapping the mapped process address space to the target address space in the GPGPU according to the opencl model, so as to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU.

[0048] In an embodiment of the present invention, a computer system creates a / dev / pmem virtual device in a CPU (Central Processing Unit) and sets a main memory section accessible to the virtual device, in which kernel variables to be monitored that a GPGPU (General-purpose computing on graphics processing units) wants to access are stored. Then, a memory mapping operation is performed to map the main memory storing the kernel variables to be monitored to a process address space, and further, the mapped process address space is mapped to a target address space in the GPGPU according to an OpenCL (Open Computing Language) model, so as to establish a mapping relationship between the main memory in the CPU and the target address space in the GPGPU.

[0049] Considering that normally when the main memory in the CPU is directly mapped to the GPGPU, the reference count of each memory page in the main memory is increased to ensure that the page is not accidentally released, and these memory pages are locked; and when the main memory is subsequently unmapped, the reference count of each memory page in the main memory is reduced. When the reference count of a memory page is reduced to zero, the memory page is normally recycled. However, since the main memory in the CPU is directly mapped to the GPGPU, the memory page is locked, and thus cannot be recycled, which eventually leads to the exhaustion of available memory and the inability of the system to operate normally.

[0050] Based on this, this embodiment removes the flag that the memory page is locked to lock the reference count of each memory page in the main memory, so that when the main memory is mapped to the process address space using the virtual device, the reference count of each memory page in the main memory remains unchanged; correspondingly, when the mapping relationship between the main memory and the target address space is subsequently released, the reference count of each memory page in the main memory will also remain unchanged. In this way, this embodiment can solve the problem of locked memory pages and avoid the exhaustion of available memory, thereby ensuring the normal operation of the system.

[0051] Furthermore, before mapping the mapped process address space to the target address space in GPGPU according to the opencl model, it is also necessary to intercept the system information sent by the CPU to GPGPU to modify the actual capacity of the main memory contained in the system information, and send the system information containing the modified capacity to GPGPU so that GPGPU can determine the target address space to be mapped from the local memory based on the modified capacity. It should be noted that the modified capacity is greater than the actual capacity of the main memory.

[0052] Specifically, after intercepting the system information sent by the CPU to the GPGPU, the actual capacity of the main memory contained in the system information is modified based on the preset extended capacity to obtain a modified capacity that is larger than the actual capacity of the main memory, and then the system information containing the modified capacity is sent to the GPGPU. For example, the actual capacity of the main memory is 2GB, the preset extended capacity is 1GB, and the final modified capacity = the actual capacity of the main memory + the preset extended capacity = 3GB. In this way, by intercepting the system information to inflate the actual capacity of the main memory, the opencl model can be deceived into accepting the address mapping request of the large memory.

[0053] It should also be noted that the CPU's creation of virtual devices, address mapping of main memory, and locking of reference counts of memory pages are all achieved by executing executable code on the CPU side. Specifically, the executable code on the CPU side is the code obtained by compiling the original CPU side code using clang++ (a compiler for compiling C++ programs); and the original CPU side code is code written in C language.

[0054] Step S12: using the compiler to compile the original detection code containing the kernel variable to be monitored into an intermediate code, and converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address, so as to convert the intermediate code into an executable code.

[0055] In the embodiment of the present invention, before executing the executable code on the GPU side through the fault detector running on the GPGPU, it is necessary to first compile the original detection code containing the kernel variables to be monitored into the executable code on the GPU side, wherein the original detection code is a C language code written in opencl.

[0056] Specifically, Figure 2As shown, the original detection code containing the kernel variables to be monitored is compiled into an intermediate code (IR, Intermediate Representation) by using the LLVM (Low Level Virtual Machine) compiler, and the address conversion logic is inserted according to the custom pass to convert the CPU virtual address of the kernel variables to be monitored in the intermediate code into a GPU access address, thereby converting the intermediate code into an executable code on the GPU side.

[0057] More specifically, after obtaining the intermediate code, the load instruction (an instruction for reading data from the main memory) in the intermediate code is searched, and the target data structure of the kernel variable to be monitored is determined based on the load instruction; then the corresponding target address conversion logic is determined based on the target data structure, and an address conversion instruction is generated according to the target address conversion logic and the kernel variable to be monitored, so as to convert the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction; then the address conversion instruction is inserted into the intermediate code to obtain the executable code on the GPU side.

[0058] According to one specific implementation manner, when the CPU virtual address of the kernel variable to be monitored represented by the target data structure is located in the direct address mapping area in the process address space, the CPU virtual address of the kernel variable to be monitored is converted into a GPU access address based on an address conversion instruction, specifically including: determining the CPU physical address based on the CPU virtual address of the kernel variable to be monitored and a preset offset, and determining the GPU access address based on the CPU physical address and the base address of the target address space.

[0059] The CPU physical address can be equal to the CPU virtual address of the kernel variable to be monitored minus a preset offset, or equal to the CPU virtual address of the kernel variable to be monitored plus a preset offset, which is not specifically limited here. Correspondingly, the GPU access address is equal to the CPU physical address plus the base address of the target address space.

[0060] According to another specific implementation, when the CPU virtual address of the kernel variable to be monitored represented by the target data structure is located in a non-direct address mapping area in the process address space, the CPU virtual address of the kernel variable to be monitored is converted into a GPU access address based on an address conversion instruction, specifically including: traversing the kernel page table to determine the CPU physical address corresponding to the CPU virtual address of the kernel variable to be monitored, and determining the GPU access address based on the CPU physical address and the base address of the target address space.

[0061] Among them, the CPU virtual address of the kernel variable to be monitored is located in the non-direct address mapping area in the process address space, which may also indicate that the CPU virtual address of the kernel variable to be monitored belongs to the dynamically allocated kernel heap memory.

[0062] According to another specific implementation, when the kernel symbol of the kernel variable to be monitored represented by the target data structure is located in a system mapping file (System.map file, a file used to record the virtual addresses corresponding to each kernel symbol), the CPU virtual address of the kernel variable to be monitored is converted into a GPU access address based on an address conversion instruction, specifically including: obtaining the CPU virtual address corresponding to the kernel symbol of the kernel variable to be monitored from the system mapping file, and determining the CPU physical address based on the CPU virtual address of the kernel variable to be monitored and a preset offset, thereby determining the GPU access address based on the CPU physical address and the base address of the target address space.

[0063] Step S13, executing the executable code by the fault detector running on the GPGPU, so as to obtain the variable data of the kernel variable to be monitored from the main memory by using the mapping relationship when accessing the target address space based on the GPU access address, and performing fault detection on the CPU according to the variable data.

[0064] In an embodiment of the present invention, the computer system executes the executable code on the GPU side through the fault detector running on the GPGPU to access the target address space based on the GPU access address in the executable code, and when accessing the target address space based on the GPU access address, the computer system automatically obtains the variable data of the kernel variable to be monitored from the main memory by using the mapping relationship between the main memory and the target address space, thereby performing fault detection on the CPU based on the variable data of the kernel variable to be monitored. It should be noted that the CPU and the GPGPU are connected via a DMA (Direct Memory Access) interface.

[0065] Furthermore, if a CPU fault is detected by the fault detector running on the GPGPU, the GPUDirect technology (a technology that enables direct communication and data transmission between the GPU and other devices without involving the CPU) is used to transmit the fault information to the monitoring terminal, so that the monitoring terminal can further analyze the fault information to determine the location and cause of the fault, etc., and give corresponding fault resolution suggestions, thereby making it convenient for the administrator or relevant technical personnel to promptly obtain the CPU fault information through the monitoring terminal, and promptly perform fault detection, processing, and repair operations on the CPU.

[0066] It should be noted that the kernel variables to be monitored include but are not limited to free memory, used memory, CPU time, number of timer interrupts, timer interrupt duration, number of context switches, context switch duration, etc.

[0067] It can be seen that the present application takes into account that system failures are usually CPU failures, and there is a physical isolation feature between the CPU and GPGPU. Therefore, even if the CPU in the system fails, it is not easy to spread to the GPGPU. In order to be able to detect CPU faults from within the system, the present application deploys the fault detector in the GPGPU so that the fault detector can detect CPU faults from within the system. At this time, even if the CPU fails, it is not easy to affect the normal operation of the fault detector, and the fault detector can also deeply understand the detailed information inside the system to improve the accuracy of fault detection. Further, since GPGPU is not allowed to access data in the CPU in principle, the present application creates a virtual device in the CPU to use the virtual device to map the main memory to the process address space, and maps the process address space to the target address space in the GPGPU according to the opencl model, thereby establishing a mapping relationship between the main memory and the target address space, so that the GPGPU can access the data in the CPU based on the mapping relationship, and since the mapping relationship between the main memory and the target address space has been established in advance, even if the CPU fails, the GPGPU can still obtain data from the CPU based on the mapping relationship, thereby improving the availability and reliability of fault detection.

[0068] See also Figure 3 As shown, an embodiment of the present invention discloses a fault detection method, which is applied to a computer system, wherein the computer system includes a CPU central processing unit, a GPGPU general graphics processing unit, and an LLVM compiler; the method includes:

[0069] The CPU creates a virtual device locally by executing the executable code on the CPU side, and uses the virtual device to map the main memory storing the kernel variables to be monitored to the process address space, and maps the mapped process address space to the target address space in the GPGPU according to the opencl model, thereby establishing a mapping relationship between the main memory in the CPU and the target address space in the GPGPU. The executable code on the CPU side is the code obtained by compiling the original CPU side code using clang++.

[0070] Before mapping the mapped process address space to the target address space in GPGPU according to the opencl model, it is necessary to first intercept the system information sent by the CPU to the GPGPU, modify the actual capacity of the main memory contained in the system information based on the preset extended capacity, and send the system information containing the modified capacity to the GPGPU, so that the GPGPU can determine the target address space to be mapped from the local memory based on the modified capacity that is slightly larger than the actual capacity of the main memory. Specifically, the address mapping diagram from CPU to GPGPU is as follows: Figure 4 shown.

[0071] Furthermore, the LLVM compiler is used to compile the original detection code containing the kernel variables to be monitored into intermediate code, and the address conversion logic is inserted according to the custom pass to convert the CPU virtual address of the kernel variables to be monitored in the intermediate code into the GPU access address, thereby converting the intermediate code into executable code on the GPU side.

[0072] The GPU-side executable code is executed by the fault detector running on the GPGPU to access the target address space based on the GPU access address in the executable code, and when accessing the target address space based on the GPU access address, the variable data of the kernel variable to be monitored is automatically obtained from the main memory by using the mapping relationship between the main memory and the target address space, and the CPU is fault-detected based on the variable data. It should be noted that the CPU and the GPGPU are connected through a DMA direct memory access interface, and since the kernel variable to be monitored is located in the main memory of the CPU, the variable data of the kernel variable to be monitored is also the operating system (OS) data.

[0073] If a CPU fault is detected by the fault detector running on the GPGPU, the fault information is transmitted to the monitoring terminal so that the monitoring terminal can further analyze the fault information to determine the location and cause of the fault, and give corresponding fault resolution suggestions.

[0074] It can be seen that the present application takes into account that system failures are usually CPU failures, and there is a physical isolation feature between the CPU and GPGPU. Therefore, even if the CPU in the system fails, it is not easy to spread to the GPGPU. In order to be able to detect CPU faults from within the system, the present application deploys the fault detector in the GPGPU so that the fault detector can detect CPU faults from within the system. At this time, even if the CPU fails, it is not easy to affect the normal operation of the fault detector, and the fault detector can also deeply understand the detailed information inside the system to improve the accuracy of fault detection. Further, since GPGPU is not allowed to access data in the CPU in principle, the present application creates a virtual device in the CPU to use the virtual device to map the main memory to the process address space, and maps the process address space to the target address space in the GPGPU according to the opencl model, thereby establishing a mapping relationship between the main memory and the target address space, so that the GPGPU can access the data in the CPU based on the mapping relationship, and since the mapping relationship between the main memory and the target address space has been established in advance, even if the CPU fails, the GPGPU can still obtain data from the CPU based on the mapping relationship, thereby improving the availability and reliability of fault detection.

[0075] See also Figure 5 As shown, an embodiment of the present invention discloses a fault detection device, which is applied to a computer system, wherein the computer system includes a CPU, a GPGPU, and a compiler; the device includes:

[0076] A main memory mapping module 11 is used to create a virtual device in the CPU to map the main memory storing the kernel variables to be monitored to the process address space by using the virtual device, and map the mapped process address space to the target address space in the GPGPU according to the opencl model to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU;

[0077] A code compiling module 12 is used to compile the original detection code containing the kernel variable to be monitored into an intermediate code by using the compiler, and convert the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address, so as to convert the intermediate code into an executable code;

[0078] The fault detection module 13 is used to execute the executable code through the fault detector running on the GPGPU, so as to obtain the variable data of the kernel variable to be monitored from the main memory by using the mapping relationship when accessing the target address space based on the GPU access address, and perform fault detection on the CPU according to the variable data.

[0079] It can be seen that the present application takes into account that system failures are usually CPU failures, and there is a physical isolation feature between the CPU and GPGPU. Therefore, even if the CPU in the system fails, it is not easy to spread to the GPGPU. In order to be able to detect CPU faults from within the system, the present application deploys the fault detector in the GPGPU so that the fault detector can detect CPU faults from within the system. At this time, even if the CPU fails, it is not easy to affect the normal operation of the fault detector, and the fault detector can also deeply understand the detailed information inside the system to improve the accuracy of fault detection. Further, since GPGPU is not allowed to access data in the CPU in principle, the present application creates a virtual device in the CPU to use the virtual device to map the main memory to the process address space, and maps the process address space to the target address space in the GPGPU according to the opencl model, thereby establishing a mapping relationship between the main memory and the target address space, so that the GPGPU can access the data in the CPU based on the mapping relationship, and since the mapping relationship between the main memory and the target address space has been established in advance, even if the CPU fails, the GPGPU can still obtain data from the CPU based on the mapping relationship, thereby improving the availability and reliability of fault detection.

[0080] In some specific embodiments, the code compiling module 12 includes:

[0081] A data structure determination unit, used for searching for a load instruction in the intermediate code, and determining a target data structure of the kernel variable to be monitored based on the load instruction;

[0082] an address conversion submodule, configured to determine a corresponding target address conversion logic based on the target data structure, and generate an address conversion instruction according to the target address conversion logic and the kernel variable to be monitored, so as to convert a CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction;

[0083] A code conversion unit is used to insert the address conversion instruction into the intermediate code to obtain an executable code.

[0084] In some specific embodiments, when the CPU virtual address of the kernel variable to be monitored represented by the target data structure is located in the direct address mapping area in the process address space, the address conversion submodule includes:

[0085] The first address determination unit is used to determine the CPU physical address based on the CPU virtual address and the preset offset of the kernel variable to be monitored, and determine the GPU access address based on the CPU physical address and the base address of the target address space.

[0086] In some specific embodiments, when the CPU virtual address of the kernel variable to be monitored represented by the target data structure is located in a non-direct address mapping area in the process address space, the address conversion submodule includes:

[0087] The second address determination unit is used to determine the CPU physical address corresponding to the CPU virtual address of the kernel variable to be monitored by traversing the kernel page table, and determine the GPU access address based on the CPU physical address and the base address of the target address space.

[0088] In some specific embodiments, when the kernel symbol of the target data structure representing the kernel variable to be monitored is located in a system mapping file, the address conversion submodule includes:

[0089] A virtual address acquisition unit, used for acquiring a CPU virtual address corresponding to the kernel symbol of the kernel variable to be monitored from the system mapping file; the system mapping file records the virtual addresses corresponding to the kernel symbols;

[0090] The third address determination unit is used to determine the CPU physical address based on the CPU virtual address and the preset offset of the kernel variable to be monitored, and determine the GPU access address based on the CPU physical address and the base address of the target address space.

[0091] In some specific embodiments, the fault detection device further includes:

[0092] A reference count locking unit is used to lock the reference count of each memory page in the main memory so as to keep the reference count of each memory page in the main memory unchanged when the main memory is mapped to the process address space using the virtual device; correspondingly, when the mapping relationship between the main memory and the target address space is released, the reference count of each memory page in the main memory is kept unchanged.

[0093] In some specific embodiments, the fault detection device further includes:

[0094] a capacity modification unit, configured to intercept system information sent by the CPU to the GPGPU, so as to modify the actual capacity of the main memory contained in the system information;

[0095] The address space determination unit is used to send the system information including the modified capacity to the GPGPU so that the GPGPU determines the target address space to be mapped from the local memory based on the modified capacity; wherein the modified capacity is greater than the actual capacity of the main memory.

[0096] Furthermore, the present application also discloses an electronic device. Figure 6 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content in the diagram cannot be regarded as any limitation on the scope of use of the present application.

[0097] Figure 6 A schematic diagram of the structure of an electronic device 20 provided in an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 is used to store a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the fault detection method disclosed in any of the aforementioned embodiments. In addition, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0098] In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and the external device, and the communication protocol it follows is any communication protocol that can be applied to the technical solution of the present application, and is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs and is not specifically limited here.

[0099] In addition, the memory 22, as a carrier for storing resources, can be a read-only memory, a random access memory, a disk or an optical disk, etc. The resources stored thereon can include an operating system 221, a computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0100] The operating system 221 is used to manage and control the hardware devices on the electronic device 20 and the computer program 222, which can be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program that can be used to complete the fault detection method performed by the electronic device 20 disclosed in any of the aforementioned embodiments, the computer program 222 can further include a computer program that can be used to complete other specific tasks.

[0101] Furthermore, the present application also discloses a computer-readable storage medium for storing a computer program; wherein the computer program, when executed by a processor, implements the aforementioned disclosed fault detection method. The specific steps of the method can refer to the corresponding contents disclosed in the aforementioned embodiments, and will not be repeated here.

[0102] In this specification, each embodiment is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0103] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0104] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be implemented directly using hardware, a software module executed by a processor, or a combination of the two. The software module may be placed in a random access memory (RAM), a memory, a read-only memory (ROM), an electrically programmable ROM, an electrically erasable programmable ROM, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.

[0105] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0106] The technical solution provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A fault detection method, characterized in that: Applied to a computer system, the computer system includes a CPU, a GPGPU and a compiler; the method includes: A virtual device is created in the CPU to map a main memory storing kernel variables to be monitored to a process address space by using the virtual device, and the mapped process address space is mapped to a target address space in the GPGPU according to an opencl model to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU; Compiling the original detection code including the kernel variable to be monitored into an intermediate code by using the compiler, and converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address, so as to convert the intermediate code into an executable code; The executable code is executed by a fault detector running on the GPGPU so that when the target address space is accessed based on the GPU access address, the variable data of the kernel variable to be monitored is obtained from the main memory using the mapping relationship, and fault detection is performed on the CPU based on the variable data.

2. The fault detection method according to claim 1, characterized in that: The converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address to convert the intermediate code into an executable code includes: Searching for a load instruction in the intermediate code, and determining a target data structure of the kernel variable to be monitored based on the load instruction; Determine a corresponding target address translation logic based on the target data structure, and generate an address translation instruction according to the target address translation logic and the kernel variable to be monitored, so as to translate the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address translation instruction; The address conversion instruction is inserted into the intermediate code to obtain an executable code.

3. The fault detection method according to claim 2, characterized in that: When the target data structure represents that the CPU virtual address of the kernel variable to be monitored is located in the direct address mapping area in the process address space, converting the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction includes: Based on the CPU virtual address and the preset offset of the kernel variable to be monitored, a CPU physical address is determined, and based on the CPU physical address and the base address of the target address space, a GPU access address is determined.

4. The fault detection method according to claim 2, characterized in that: When the target data structure represents that the CPU virtual address of the kernel variable to be monitored is located in the non-direct address mapping area in the process address space, converting the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction includes: The CPU physical address corresponding to the CPU virtual address of the kernel variable to be monitored is determined by traversing the kernel page table, and the GPU access address is determined based on the CPU physical address and the base address of the target address space.

5. The fault detection method according to claim 2, characterized in that: When the kernel symbol of the kernel variable to be monitored represented by the target data structure is located in the system mapping file, converting the CPU virtual address of the kernel variable to be monitored into a GPU access address based on the address conversion instruction includes: Acquire a CPU virtual address corresponding to the kernel symbol of the kernel variable to be monitored from the system mapping file; the system mapping file records the virtual addresses corresponding to each kernel symbol; Based on the CPU virtual address and the preset offset of the kernel variable to be monitored, a CPU physical address is determined, and based on the CPU physical address and the base address of the target address space, a GPU access address is determined.

6. The fault detection method according to claim 1, characterized in that: Also includes: Locking a reference count of each memory page in the main memory so as to keep the reference count of each memory page in the main memory unchanged when the main memory is mapped to the process address space using the virtual device; Correspondingly, when the mapping relationship between the main memory and the target address space is released, the reference count of each memory page in the main memory is kept unchanged.

7. The fault detection method according to any one of claims 1 to 6, characterized in that: Before mapping the mapped process address space to the target address space in the GPGPU according to the opencl model, the method further includes: intercepting system information sent by the CPU to the GPGPU to modify the actual capacity of the main memory contained in the system information; Sending the system information including the modified capacity to the GPGPU so that the GPGPU determines the target address space to be mapped from the local memory based on the modified capacity; The modified capacity is greater than the actual capacity of the main memory.

8. A fault detection device, characterized in that: Applied to a computer system, the computer system includes a CPU, a GPGPU and a compiler; the device includes: A main memory mapping module, configured to create a virtual device in the CPU to map a main memory storing kernel variables to be monitored to a process address space by using the virtual device, and map the mapped process address space to a target address space in the GPGPU according to an opencl model to establish a mapping relationship between the main memory and the target address space; the main memory and the process address space are both located in the CPU; a code compiling module, used for compiling the original detection code including the kernel variable to be monitored into an intermediate code by using the compiler, and converting the CPU virtual address of the kernel variable to be monitored in the intermediate code into a GPU access address, so as to convert the intermediate code into an executable code; A fault detection module is used to execute the executable code through a fault detector running on the GPGPU, so as to obtain variable data of the kernel variable to be monitored from the main memory by using the mapping relationship when accessing the target address space based on the GPU access address, and perform fault detection on the CPU according to the variable data.

9. An electronic device, characterized in that: include: Memory, used to store computer programs; A processor, configured to execute the computer program to implement the fault detection method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Used to store a computer program, which, when executed by a processor, implements the fault detection method according to any one of claims 1 to 7.

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