NAND FLASH programming voltage control method and device and storage medium

Abstract

The invention discloses an NAND FLASH programming voltage control method and device and a storage medium. The method comprises the steps of obtaining a preset rising voltage decoding according to an NAND FLASH programming instruction; receiving rising step voltage generated by the charge pump according to preset rising voltage decoding; and increasing the initial voltage step of the NAND FLASH to a preset programming voltage according to the rising step voltage. The application method of the programming voltage is optimized, the change speed of an internal electric field is reduced, damage of the electric field to crystal lattices in silicon dioxide is reduced, the service life of a product is prolonged, and the competitiveness of the product is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data storage, and in particular to a method and device for controlling a NAND FLASH programming voltage and a storage medium. Background Art

[0002] NAND FLASH (NAND FLASH, flash memory) is a common non-volatile memory. The storage unit of NAND FLASH is composed of substrate, medium and floating gate. When programming NAND FLASH, an instantaneous programming voltage is applied to NAND FLASH to extract electrons from the substrate to the floating gate, thereby changing the threshold voltage of the storage unit and realizing the data distinction between 0 and 1 in the storage unit.

[0003] However, the medium is set between the substrate and the floating gate, and electrons need to pass through the medium to be extracted from the substrate to the floating gate. When programming the NAND FLASH, the instantly changing programming voltage will produce a rapidly changing strong electric field, which will damage the medium. The silicon dioxide lattice in the medium will be damaged to a certain extent. As the number of programming times increases, the storage unit will be damaged faster, resulting in the problem of short service life of the NAND FLASH.

[0004] Therefore, there is still an urgent need for a method that can reduce the damage rate of storage cells and increase the service life of NAND FLASH. Summary of the invention

[0005] The main purpose of the present invention is to provide a method, device and storage medium for controlling the programming voltage of NAND FLASH, so as to solve the existing problem that as the number of programming times increases, the storage unit will be damaged faster and the service life of NAND FLASH will be shortened.

[0006] To achieve the above object, the present invention proposes a method for controlling a NAND FLASH programming voltage, the method comprising:

[0007] Obtain the preset rising voltage decoding according to the NAND FLASH programming instruction;

[0008] Receiving a rising step voltage generated by a charge pump according to decoding of the preset rising voltage;

[0009] The initial voltage of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage.

[0010] In some embodiments, after the initial voltage step of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage, the method further includes:

[0011] Obtain the preset drop voltage decoding according to the NAND FLASH programming end instruction;

[0012] Receiving a falling step voltage generated by the charge pump according to the preset falling voltage decoding;

[0013] The preset programming voltage is stepped down to the initial voltage according to the step-down voltage.

[0014] In some embodiments, the receiving charge pump generates a rising step voltage according to the decoding of the preset rising voltage, including:

[0015] Decoding the preset rising voltage and sending it to a state machine;

[0016] Receiving control logic generated by the state machine according to the decoding of the preset rising voltage;

[0017] sending the control logic to the charge pump;

[0018] The rising step voltage generated by the charge pump according to the control logic is received.

[0019] In some embodiments, the step of increasing the initial voltage of the NAND FLASH to a preset programming voltage according to the rising step voltage includes:

[0020] Get the initial voltage of NAND FLASH;

[0021] The initial voltage is stepped up to the preset programming voltage according to the rising step voltage.

[0022] In some embodiments, before obtaining the preset boost voltage decoding according to the NAND FLASH programming instruction, the method includes:

[0023] Receive programming data of NAND FLASH;

[0024] The NAND FLASH programming instruction is generated according to the programming data.

[0025] In some embodiments, after the initial voltage step of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage, the method further includes:

[0026] The programming data is written into the NAND FLASH.

[0027] In some embodiments, before receiving the programming data of the NAND FLASH, the method further includes:

[0028] Receiving a communication request from the NAND FLASH;

[0029] Establish communication with the NAND FLASH according to the communication request.

[0030] In some embodiments, after establishing communication with the NAND FLASH according to the communication request, the method further includes:

[0031] Acquire basic information of the NAND FLASH, wherein the basic information includes a minimum voltage and a maximum voltage when programming the NAND FLASH;

[0032] A preset programming voltage corresponding to the NAND FLASH is determined according to the basic information.

[0033] The present invention also provides a control device for NAND FLASH programming voltage, comprising:

[0034] at least one processor; and,

[0035] a memory communicatively connected to the at least one processor; wherein,

[0036] The memory stores instructions executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute any one of the above-mentioned methods for controlling the NAND FLASH programming voltage.

[0037] The present invention further provides a storage medium storing a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor executes any one of the above-mentioned methods for controlling the NAND FLASH programming voltage.

[0038] The present invention increases the programming voltage step by step when applying the programming voltage to the NAND FLASH, thereby slowing down the change of the electric field and reducing the damage of the electric field to the internal lattice of silicon dioxide; at the same time, when releasing the programming voltage, the programming voltage is also reduced step by step, thereby also slowing down the change of the electric field and reducing the damage of the electric field to the internal lattice of silicon dioxide; by optimizing the application method and the release method of the programming voltage, the change speed of the internal electric field is reduced, and the damage of the electric field to the internal lattice of silicon dioxide is reduced, thereby improving the product life and enhancing the product competitiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic flow chart of a method for controlling a NAND FLASH programming voltage according to the present invention;

[0040] Figure 2 Another schematic diagram of the process of controlling the NAND FLASH programming voltage of the present invention;

[0041] Figure 3 Another schematic diagram of the process of controlling the NAND FLASH programming voltage of the present invention;

[0042] Figure 4 Another schematic diagram of the process of controlling the NAND FLASH programming voltage of the present invention;

[0043] Figure 5 Another schematic diagram of the process of controlling the NAND FLASH programming voltage of the present invention;

[0044] Figure 6 Another schematic diagram of the process of controlling the NAND FLASH programming voltage of the present invention;

[0045] Figure 7 Another schematic diagram of the process of controlling the NAND FLASH programming voltage of the present invention;

[0046] Figure 8 This is a schematic diagram of programming voltage changes of the present invention;

[0047] Fig. 9 It is a schematic diagram of the structure of a control device for NAND FLASH programming voltage according to an embodiment of the present invention.

[0048] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0049] The scheme in the embodiment of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is only a part of the embodiment of the present invention, not all of the embodiments. Based on the embodiment of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0050] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0051] It should also be noted that when an element is referred to as being "fixed on" or "disposed on" another element, it may be directly on the other element or there may be an intermediate element at the same time. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time.

[0052] In addition, the descriptions of "first", "second", etc. in the present invention are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0053] To achieve the above object, the present invention proposes a method for controlling a NAND FLASH programming voltage, the method comprising:

[0054] Step S110, obtaining a preset rising voltage decoding according to a NAND FLASH programming instruction;

[0055] Step S120, receiving a rising step voltage generated by a charge pump according to a preset rising voltage decoding;

[0056] In step S130, the initial voltage of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage.

[0057] In this embodiment, refer to Figure 1 and Figure 8 , the control method of NAND FLASH programming voltage can be applied to the control device of NAND FLASH programming voltage; the control device of NAND FLASH programming voltage can be installed inside the host computer. Among them, the storage unit of NAND FLASH includes a substrate, a medium and a floating gate; the medium is arranged between the substrate and the floating gate. To realize the data distinction between 0 and 1 in the storage unit, a programming voltage is applied to NAND FLASH to extract electrons from the substrate to the floating gate, thereby changing the threshold voltage of the storage unit. In this embodiment, the programming voltage applied to NAND FLASH is increased step by step to the peak value; it is not increased to the peak value instantly. Among them, in Figure 8 When the preset programming voltage is 10V, it increases in 5 steps and decreases in 5 steps. When the preset programming voltage is 11V, it increases in 6 steps and decreases in 6 steps. When the preset programming voltage is 12V, it increases in 7 steps and decreases in 7 steps. Figure 8 The voltage values ​​and number of steps shown are for reference only and can be set according to actual needs in actual applications.

[0058] It is understandable that electrons need to pass through the medium when they are extracted from the substrate to the floating gate. When programming NAND FLASH, the instantly changing programming voltage will generate a rapidly changing strong electric field, which will damage the medium and the silicon dioxide lattice in the medium will be damaged to a certain extent. The electric field change generated by the step-by-step increasing programming voltage will also slow down, thereby reducing the damage to the silicon dioxide lattice in the medium caused by the electric field.

[0059] When NAND FLASH is connected to the host computer and exchanges data with the host computer, the host computer can program NAND FLASH. The host computer will obtain the preset rising voltage decoding according to the NAND FLASH programming instruction. The preset rising voltage decoding can be generated according to the parameters set by the user. The parameters set by the user can include the voltage step and how long each step lasts. For example, the voltage step can be set to one step for every 2V voltage, and the duration of each step is 0.01 seconds.

[0060] After the host computer obtains the preset rising voltage decoding, it will send the preset rising voltage decoding to the charge pump. The charge pump will generate a rising step voltage according to the preset rising voltage decoding; and then feed the rising step voltage back to the host computer. The host computer can receive the rising step voltage. For example: when the preset rising voltage decoding is generated by a voltage step of 2V voltage per step, and each step lasts for 0.01 seconds; then the rising step voltage generated by the charge pump is a step of 2V voltage every 0.01 seconds.

[0061] After the host computer receives the rising step voltage, it will increase the initial voltage of NAND FLASH to the preset programming voltage according to the rising step voltage. For example: when the initial voltage is 0V and the preset programming voltage is 10V; if the rising step voltage is a step of 2V voltage every 0.01 seconds; at this time, according to the step of 2V voltage every 0.01 seconds, the voltage will be increased from 0V to 10V within 0.05 seconds.

[0062] When the voltage applied to NAND FLASH reaches the preset programming voltage, the host computer can program the NAND FLASH.

[0063] Among them, electric field E = V / d, where V is the change in instantaneous programming voltage, and d is the distance from the floating gate to the substrate (the thickness of the medium). Assume that the preset programming voltage is 10V and the distance from the floating gate to the substrate is 0.1cm. If the programming voltage is directly increased to 10V instantly, then the change in the instantaneous programming voltage is 10V, and the instantaneous electric field change is 10000V / m. If the voltage is increased from 0V to 10V in steps of 2V every 0.01 seconds, then the change in the instantaneous programming voltage is 2V, and the instantaneous electric field change is 2000V / m.

[0064] Through this embodiment, when applying programming voltage to NAND FLASH, the programming voltage can be changed from instantaneous increase to gradual increase, so that the change of electric field is slowed down and the damage of electric field to the internal lattice of silicon dioxide is reduced; thereby, the product life is increased and the product competitiveness is improved.

[0065] In some embodiments, after the initial voltage step of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage, the method further includes:

[0066] Step S140, obtaining a preset drop voltage decoding according to the NAND FLASH programming end instruction;

[0067] Step S141, receiving a falling step voltage generated by a charge pump according to a preset falling voltage decoding;

[0068] Step S142 , stepping down the preset programming voltage to the initial voltage according to the step voltage.

[0069] In this embodiment, refer to Figure 2 and Figure 8 After executing step S130, the host computer will also release the programming voltage of NAND FLASH. After the host computer finishes programming NAND FLASH, the host computer needs to release the voltage applied to NAND FLASH. The host computer will first obtain the preset drop voltage decoding according to the NAND FLASH programming end instruction. The preset drop voltage decoding can be generated according to the parameters set by the user. The parameters set by the user may include the voltage steps and how long each step lasts. For example: the voltage step can be set to one step for every 2V (volts), and the duration of each step is 0.01 seconds.

[0070] After the host computer obtains the preset drop voltage decoding, it will send the preset drop voltage decoding to the charge pump. The charge pump will generate a drop step voltage according to the preset drop voltage decoding; and then feed the drop step voltage back to the host computer. The host computer can receive the drop step voltage. For example: when the preset drop voltage decoding is generated by a voltage step of 2V voltage per step, and each step lasts for 0.01 seconds; then the drop step voltage generated by the charge pump is a step that reduces the voltage by 2V every 0.01 seconds.

[0071] After the host computer receives the descending step voltage, it will step down the preset programming voltage of NAND FLASH to the initial voltage according to the descending step voltage. For example, when the preset programming voltage is 10V and the initial voltage is 0V; if the descending step voltage is a step of 2V voltage reduction every 0.01 seconds; at this time, the voltage will be stepped down from 10V to 0V within 0.05 seconds according to the step of 2V voltage reduction every 0.01 seconds.

[0072] When the voltage applied to NAND FLASH is reduced back to the initial voltage, the host computer will stop programming NAND FLASH.

[0073] Through this embodiment, when releasing the programming voltage to NAND FLASH, the programming voltage can be reduced from instantaneously to gradually, so that the change of the electric field is slowed down and the damage of the electric field to the internal lattice of silicon dioxide is reduced; thereby, the product life is increased and the product competitiveness is improved.

[0074] In some embodiments, the above-mentioned receiving the rising step voltage generated by the charge pump according to the preset rising voltage decoding includes:

[0075] Step S150, decoding the preset boost voltage and sending it to the state machine;

[0076] Step S151, receiving the control logic generated by the state machine according to the preset rising voltage decoding;

[0077] Step S152, sending the control logic to the charge pump;

[0078] Step S153, receiving the rising step voltage generated by the charge pump according to the control logic.

[0079] In this embodiment, refer to Figure 3After executing step S120, the host computer also needs to send the preset rising voltage decoding to the state machine. After the host computer obtains the preset rising voltage decoding, it will send the preset rising voltage decoding to the state machine. After the state machine receives the preset rising voltage decoding, it will generate control logic according to the preset rising voltage decoding; and then send the control logic to the host computer. After the host computer receives the control logic, it will send the control logic to the charge pump. After the charge pump receives the control logic, it will generate the rising step voltage according to the control logic. The control logic generated by the state machine can control the charge pump to generate the required voltage waveform.

[0080] In some embodiments, the aforementioned step of increasing the initial voltage of the NAND FLASH to a preset programming voltage according to the rising step voltage includes:

[0081] Step S160, obtaining the initial voltage of NAND FLASH;

[0082] In step S161, the initial voltage is stepped up to a preset programming voltage according to the rising step voltage.

[0083] In this embodiment, refer to Figure 4 When the host computer executes step S130, it needs to first obtain the initial voltage of NAND FLASH. In order to increase the voltage applied to NAND FLASH to the preset programming voltage, the host computer must first know the initial voltage of NAND FLASH. The host computer obtains the initial voltage of NAND FLASH; then, according to the rising step voltage, the initial voltage of NAND FLASH is stepped up to the preset programming voltage.

[0084] In some embodiments, before obtaining the preset boost voltage decoding according to the NAND FLASH programming instruction, the above steps include:

[0085] Step S170, receiving programming data of NAND FLASH;

[0086] Step S171, generating a NAND FLASH programming instruction according to the programming data.

[0087] In this embodiment, refer to Figure 5 , before executing step S110, the host computer needs to receive the programming data first. When the user wants to program the NAND FLASH, the host computer will input the programming data of the NAND FLASH. After the host computer receives the programming data of the NAND FLASH, it will generate the NAND FLASH programming instructions according to the programming data. At this time, the host computer will not directly write the programming data into the NAND FLASH; instead, it will first increase the initial voltage ladder of the NAND FLASH to the preset programming voltage.

[0088] In some embodiments, after the initial voltage step of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage, the method further includes:

[0089] Write programming data into NAND FLASH.

[0090] In this embodiment, after executing step S130, the host computer writes the programming data into the NAND FLASH. After the host computer increases the initial voltage of the NAND FLASH to the preset programming voltage, the NAND FLASH can be programmed, and the host computer can write the programming data into the NAND FLASH.

[0091] In some embodiments, before receiving the programming data of the NAND FLASH, the method further includes:

[0092] Step S180, receiving a communication request from NAND FLASH;

[0093] Step S181, establishing communication with NAND FLASH according to the communication request.

[0094] In this embodiment, refer to Figure 6 Before executing step S170, the host computer needs to establish communication with NAND FLASH. When the user wants to program NAND FLASH, NAND FLASH can be connected to the host computer. At this time, the host computer can receive the communication request of NAND FLASH, wherein the communication request may include the source address, the type of communication protocol and the port number, etc. Then the host computer adapts the communication request and establishes communication with NAND FLASH.

[0095] In some embodiments, after establishing communication with NAND FLASH according to the communication request, the foregoing further includes:

[0096] Step S190, obtaining basic information of the NAND FLASH, wherein the basic information includes a minimum voltage and a maximum voltage during programming of the NAND FLASH;

[0097] Step S191, determining a preset programming voltage corresponding to the NAND FLASH according to basic information.

[0098] In this embodiment, refer to Figure 7After executing step S181, the host computer will obtain the basic information of NAND FLASH. After the host computer establishes communication with NAND FLASH, it will obtain the basic information of NAND FLASH, and obtain the minimum voltage and maximum voltage when programming NAND FLASH through the basic information of NAND FLASH; thus, the preset programming voltage is determined according to the minimum voltage and maximum voltage when programming NAND FLASH. At the same time, the basic information can also include the name, model, batch, etc. of NAND FLASH. Through these basic information, a NAND FLASH can be uniquely identified, so that the host computer can trace the workflow of NAND FLASH through the basic information.

[0099] The present invention increases the programming voltage step by step when applying the programming voltage to the NAND FLASH, thereby slowing down the change of the electric field and reducing the damage of the electric field to the internal lattice of silicon dioxide; at the same time, when releasing the programming voltage, the programming voltage is also reduced step by step, thereby also slowing down the change of the electric field and reducing the damage of the electric field to the internal lattice of silicon dioxide; by optimizing the application method and the release method of the programming voltage, the change speed of the internal electric field is reduced, and the damage of the electric field to the internal lattice of silicon dioxide is reduced, thereby improving the product life and enhancing the product competitiveness.

[0100] The NAND FLASH programming voltage control device of the embodiment of the present invention may be a controller capable of executing the NAND FLASH programming voltage control method; the controller has at least one. Fig. 9 As shown, the control device for the NAND FLASH programming voltage may include: a controller 1001 (e.g., a CPU), a network interface 1004, a user interface 1003, a memory 1005, and a communication bus 1002. Among them, the communication bus 1002 is used to realize the connection and communication between these components. The user interface 1003 may include a display screen (Display), an input unit, such as a keyboard (Keyboard), and the user interface 1003 may also include a standard wired interface and a wireless interface. The network interface 1004 may optionally include a standard wired interface and a wireless interface (such as a WI-FI interface). The memory 1005 may be a high-speed RAM memory, or a stable memory (non-volatile memory), such as a disk memory. The memory 1005 may optionally be a storage device independent of the aforementioned controller 1001.

[0101] Those skilled in the art will understand that Fig. 9The structure of the NAND FLASH programming voltage control device shown in the figure does not constitute a limitation on the NAND FLASH programming voltage control device, and may include more or less components than those shown in the figure, or combine certain components, or arrange the components differently.

[0102] like Fig. 9 As shown, the memory 1005 as a computer storage medium may include an operating system, a network communication module, a user interface module and a computer program.

[0103] exist Fig. 9 In the control device for the NAND FLASH programming voltage shown, the network interface 1004 is mainly used to connect to the background server and communicate data with the background server; the user interface 1003 is mainly used to connect to the client (user end) and communicate data with the client; and the controller 1001 can be used to call the computer program stored in the memory 1005. When the computer program is called and executed by the controller 1001, the steps of the above-mentioned NAND FLASH programming voltage control method are implemented.

[0104] The present invention further provides a storage medium storing a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor executes any one of the above-mentioned methods for controlling the NAND FLASH programming voltage.

[0105] The above description is only a partial or preferred embodiment of the present invention. Neither the text nor the drawings can limit the scope of protection of the present invention. All equivalent structural changes made by using the contents of the present invention specification and drawings under the overall concept of the present invention, or direct / indirect application in other related technical fields are included in the scope of protection of the present invention.

Claims

1. A method for controlling a NAND FLASH programming voltage, characterized in that: The method for controlling the NAND FLASH programming voltage includes: Obtain the preset rising voltage decoding according to the NAND FLASH programming instruction; Receiving a rising step voltage generated by a charge pump according to decoding of the preset rising voltage; The initial voltage of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage.

2. The method for controlling the NAND FLASH programming voltage according to claim 1, characterized in that: After the initial voltage step of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage, the method further includes: Obtain the preset drop voltage decoding according to the NAND FLASH programming end instruction; Receiving a falling step voltage generated by the charge pump according to the preset falling voltage decoding; The preset programming voltage is stepped down to the initial voltage according to the step-down voltage.

3. The method for controlling the NAND FLASH programming voltage according to claim 1, wherein: The receiving charge pump generates a rising step voltage according to the decoding of the preset rising voltage, including: Decoding the preset rising voltage and sending it to a state machine; Receiving control logic generated by the state machine according to the decoding of the preset rising voltage; sending the control logic to the charge pump; The rising step voltage generated by the charge pump according to the control logic is received.

4. The method for controlling the NAND FLASH programming voltage according to claim 1, wherein: The step of increasing the initial voltage of the NAND FLASH to a preset programming voltage according to the rising step voltage includes: Get the initial voltage of NAND FLASH; The initial voltage is stepped up to the preset programming voltage according to the rising step voltage.

5. The method for controlling the NAND FLASH programming voltage according to claim 1, characterized in that: Before obtaining the preset rising voltage decoding according to the NANDFLASH programming instruction, the method includes: Receive programming data of NAND FLASH; The NAND FLASH programming instruction is generated according to the programming data.

6. The method for controlling the NAND FLASH programming voltage according to claim 5, characterized in that: After the initial voltage step of the NAND FLASH is increased to a preset programming voltage according to the rising step voltage, the method further includes: The programming data is written into the NAND FLASH.

7. The method for controlling the NAND FLASH programming voltage according to claim 5, characterized in that: Before receiving the programming data of NANDFLASH, the method further includes: Receiving a communication request from the NAND FLASH; Establish communication with the NAND FLASH according to the communication request.

8. The method for controlling the NAND FLASH programming voltage according to claim 7, characterized in that: After establishing communication with the NAND FLASH according to the communication request, the method further includes: Acquire basic information of the NAND FLASH, wherein the basic information includes a minimum voltage and a maximum voltage when programming the NAND FLASH; A preset programming voltage corresponding to the NAND FLASH is determined according to the basic information.

9. A control device for NAND FLASH programming voltage, characterized in that: include: at least one processor; as well as, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method for controlling the NAND FLASH programming voltage according to any one of claims 1 to 8.

10. A storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor executes the method for controlling a NAND FLASH programming voltage according to any one of claims 1 to 8.

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