HIL simulation platform-based odd harmonic signal injection method, device, equipment and medium
By injecting reliable fifth-order seventh harmonic signals on the HIL simulation platform, the problem of unreliable harmonic suppression algorithm verification in the motor controller in the prior art is solved, and efficient harmonic signal injection and verification are achieved.
Patent Information
- Application Number
- CN202510022878.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-07
- Publication Date
- 2025-04-18
AI Technical Summary
When verifying the harmonic suppression algorithm in the permanent magnet synchronous motor controller, the existing technology is limited by the low real-time nature of the current signal collected by the CAN channel and electromagnetic interference, resulting in the fifth and seventh harmonic signals of the three-phase current being unreliable.
An odd harmonic signal injection method based on the HIL simulation platform is used to output a reliable three-phase current signal, inject five and seventh harmonic signals, and compensate their phases to verify the harmonic suppression algorithm in the motor controller.
It realizes the output of high-reliability three-phase current signals through the HIL simulation platform, ensuring effective verification of the harmonic suppression algorithm and avoiding verification failures caused by unreliable acquisition signals.
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Figure CN119853564A_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to the field of motor drive technology, and in particular to an odd harmonic signal injection method, device, equipment and medium based on a HIL simulation platform. Background Art
[0002] Permanent magnet synchronous motors are widely used in electric vehicles, aerospace, robots, home appliances and other fields due to their high efficiency, high power density and good speed regulation performance. At present, the three-phase current of the permanent magnet synchronous motor output by the motor in the actual motor test bench has fifth and seventh harmonics. Since the actual motor test bench is susceptible to electromagnetic interference, the three-phase current waveform is collected through the CAN channel. The low current sampling rate of the CAN channel cannot meet the high real-time requirements; especially at high speeds, the current signal sampled by the CAN channel (the current signal usually includes the reference current and various odd harmonic signals) will be distorted; resulting in the fifth and seventh harmonic signals of the output three-phase current of the permanent magnet synchronous motor being unreliable. Therefore, when the collected current signal is input into the motor controller, the harmonic suppression algorithm in the motor controller cannot be verified. Summary of the invention
[0003] The present invention provides an odd harmonic signal injection method, device, equipment and medium based on a HIL simulation platform, so as to output a three-phase current with fifth and seventh harmonic signals with high reliability through the HIL simulation platform, so as to better verify the harmonic suppression algorithm.
[0004] To achieve the above objectives, in a first aspect, an embodiment of the present invention provides an odd harmonic signal injection method based on a HIL simulation platform, the method comprising:
[0005] Based on the HIL simulation platform, different three-phase reference currents are output according to different speed conditions and motor models;
[0006] Determine different phases of three-phase reference currents according to different three-phase reference currents to determine different odd 2N+1 harmonic signals; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥1, and 2N+1 is not 3N;
[0007] Compensating the phase of the odd 2N+1 harmonic signal to inject a modified odd 2N+1 harmonic signal into the three-phase reference current;
[0008] The three-phase reference current injected into the modified odd 2N+1 harmonic signal is output to a motor controller to verify the harmonic suppression algorithm in the motor controller.
[0009] Optionally, determining different phases of three-phase reference currents according to different three-phase reference currents includes:
[0010] Inputting any phase reference current signal of the three-phase reference current and the corresponding 90° phase-shifted reference current signal into a phase-locked loop to output the phase of the three-phase reference current and the frequency of the three-phase reference current;
[0011] Compensating the phase of the odd 2N+1 harmonic signal includes:
[0012] Determining a phase difference according to a phase-locked loop processing time and the frequency;
[0013] Determining a corrected phase of the three-phase reference current according to the phase of the three-phase reference current and the phase difference;
[0014] A modified odd 2N+1 harmonic signal is determined according to the modified phase of the three-phase reference current.
[0015] Optionally, the method further includes:
[0016] The performance of the three-phase reference current injected with the modified odd 2N+1 harmonic signal is verified using the Fourier transform method.
[0017] Optionally, the method further includes:
[0018] The three-phase reference current injected into the modified odd 2N+1 harmonic signal is displayed by an oscilloscope to verify the performance of the three-phase reference current injected into the modified odd 2N+1 harmonic signal.
[0019] Optionally, verifying a harmonic suppression algorithm within the motor controller includes:
[0020] When the harmonic suppression algorithm is not turned on, the first harmonic component is extracted from the verified three-phase reference current injected with the modified odd 2N+1 harmonic signal by Fourier transform;
[0021] When the harmonic suppression algorithm is turned on, the second harmonic component is extracted from the verified three-phase reference current injected with the modified odd 2N+1 harmonic signal by Fourier transform;
[0022] When the ratio of the second harmonic component to the first harmonic component is less than a preset ratio, the reliability of the harmonic suppression algorithm is satisfied.
[0023] Optionally, the operation coefficient of the phase-locked loop can be determined according to different motor parameters.
[0024] Optionally, the odd 2N+1 harmonic signal includes a superposition of different odd 2N+1 harmonic signals, or a single odd 2N+1 harmonic signal.
[0025] In a second aspect, an embodiment of the present invention further provides an odd harmonic signal injection device based on a HIL simulation platform, the device being used to execute the odd harmonic signal injection method based on a HIL simulation platform described in the first aspect above, the odd harmonic signal injection device based on a HIL simulation platform comprising:
[0026] The reference current output module is used to output different three-phase reference currents according to different speed conditions and motor models based on the HIL simulation platform;
[0027] A harmonic signal output module, used for determining different odd 2N+1 harmonic signals according to different three-phase reference currents; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥ 1, and 2N+1 is not 3N;
[0028] A compensation module is used to compensate the phase of the odd 2N+1 harmonic signal to inject the compensated odd 2N+1 harmonic signal into the three-phase reference current.
[0029] The output module is used to output the three-phase reference current injected into the modified odd 2N+1 harmonic signal to the motor controller to verify the harmonic suppression algorithm in the motor controller.
[0030] In a third aspect, an embodiment of the present invention further provides an electronic device, the electronic device comprising:
[0031] at least one processor; and
[0032] a memory communicatively connected to the at least one processor; wherein,
[0033] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the odd harmonic signal injection method based on the HIL simulation platform described in the first aspect.
[0034] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the odd harmonic signal injection method based on the HIL simulation platform described in the first aspect when executed.
[0035] In an embodiment of the present invention, different three-phase reference currents are output according to different speed conditions and motor models based on a HIL simulation platform; different odd 2N+1 harmonic signals are determined according to different three-phase reference currents; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥1, and 2N+1 is not 3N; the phase of the odd 2N+1 harmonic signal is compensated to inject a modified odd 2N+1 harmonic signal into the three-phase reference current; the three-phase reference current injected with the modified odd 2N+1 harmonic signal is output to a motor controller to verify the harmonic suppression algorithm in the motor controller, thereby achieving the output of a three-phase current injected with fifth and seventh harmonic signals with higher reliability through the HIL simulation platform, thereby better verifying the harmonic suppression algorithm.
[0036] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0038] Figure 1 It is a flow chart of an odd harmonic signal injection method based on a HIL simulation platform provided by an embodiment of the present invention;
[0039] Figure 2 is a flow chart of another odd harmonic signal injection method based on a HIL simulation platform provided by an embodiment of the present invention;
[0040] Figure 3 is a block diagram of a phase-locked loop operation provided by an embodiment of the present invention;
[0041] Figure 4 is a flow chart of another odd harmonic signal injection method based on a HIL simulation platform provided by an embodiment of the present invention;
[0042] Figure 5 It is a structural schematic diagram of an odd harmonic signal injection device based on a HIL simulation platform provided by an embodiment of the present invention;
[0043] Figure 6 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0044] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0045] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0046] Figure 1 is a flow chart of an odd harmonic signal injection method based on a HIL simulation platform provided by an embodiment of the present invention. This embodiment can be applied to a three-phase reference current situation of injecting an odd harmonic signal into a motor controller based on a HIL simulation platform. The method can be executed by an odd harmonic signal injection device based on a HIL simulation platform, such as Figure 1 As shown, the method specifically comprises the following steps:
[0047] S110, based on the HIL simulation platform, outputs different three-phase reference currents according to different speed conditions and motor models;
[0048] Among them, the HIL simulation platform is a hardware-in-the-loop simulation platform; in this embodiment, the hardware is a motor controller; the HIL simulation platform simulates the motor of the actual test bench; the HIL simulation platform can feedback the working status to the motor controller, and then the motor controller receives the status of the HIL simulation platform and issues instructions to the HIL simulation platform, and then issues control instructions again according to the feedback from the HIL simulation platform; in this way, the simulation test of the HIL simulation platform by the motor controller can be completed, and the test of the motor controller can also be completed.
[0049] This embodiment is based on the FPGA model in the HIL simulation platform, and can output different three-phase reference currents according to different speed conditions and motor models; different speed conditions are selected according to the actual speed conditions of the actual motor; the motor model is a basic model established in the HIL simulation platform according to the actual motor; the three-phase reference current is the three-phase reference current output by the simulated motor drive.
[0050] S120, determining different odd 2N+1 harmonic signals according to different three-phase reference currents; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥ 1, and 2N+1 is not 3N;
[0051] Among them, based on the FPGA model in the HIL simulation platform, different odd 2N+1 harmonic signals can be generated and determined according to different three-phase reference currents, and the phases of the generated and determined different odd 2N+1 harmonic signals are the same as the phases of the three-phase reference currents; for example; the current of one phase in the three-phase reference current is I A = sinwt; then the generated fifth harmonic signal is: I A =I1sinwt+I5sin5(wt); the generated seventh harmonic signal is: I A =I1sinwt+I7sin7(wt);
[0052] It should be noted that the odd 2N+1 harmonic signal includes the superposition of different odd 2N+1 harmonic signals, or a single odd 2N+1 harmonic signal; since the sum of the three-phase winding currents of the motor is 0, there is no odd harmonic signal that is a multiple of 3 in the different odd 2N+1 harmonic signals, that is, 2N+1 is not 3N, and N is a positive integer ≥1.
[0053] S130, compensating the phase of the odd 2N+1 harmonic signal to inject the modified odd 2N+1 harmonic signal into the three-phase reference current;
[0054] Among them, due to the time difference that is actually generated when the phase of the three-phase reference current is determined according to the three-phase reference current, this will cause a certain deviation in the phase of the three-phase reference current, thereby causing a certain deviation in the phase of the odd 2N+1 harmonic signal. The phase of the odd 2N+1 harmonic signal can be compensated, so that the reliability of correcting the odd 2N+1 harmonic signal is higher, and then the generated corrected odd 2N+1 harmonic signal is injected into the three-phase reference current.
[0055] S140 , outputting the three-phase reference current injected with the modified odd 2N+1 harmonic signal to the motor controller to verify the harmonic suppression algorithm in the motor controller.
[0056] Among them, since the three-phase reference current for correcting the odd 2N+1 harmonic signal in this embodiment has a high reliability, and the three-phase reference current injected with the corrected odd 2N+1 harmonic signal is directly output to the motor controller, this can better verify the harmonic suppression algorithm in the motor controller, and avoids the need to input the collected motor current signal into the motor controller through the CAN channel in the actual motor test bench in the prior art to verify the harmonic suppression algorithm in the motor controller. Since the actual motor test bench is susceptible to electromagnetic interference, the CAN channel current sampling rate is low and cannot meet the high real-time requirements, which results in the output of the fifth and seventh harmonic signals of the three-phase current of the permanent magnet synchronous motor being unreliable, which makes it impossible to verify the harmonic suppression algorithm in the motor controller.
[0057] Optionally, based on the above embodiment, step S120 and step S130 are further refined. Figure 2 FIG. 1 is a flow chart of another method for injecting odd harmonic signals based on a HIL simulation platform provided by an embodiment of the present invention. Figure 2 As shown, the odd harmonic signal injection method based on the HIL simulation platform includes the following steps:
[0058] S210, based on the HIL simulation platform, outputs different three-phase reference currents according to different speed conditions and motor models.
[0059] S220, inputting any phase reference current signal of the three-phase reference current and the corresponding 90° phase-shifted reference current signal into a phase-locked loop to output the frequency of the three-phase reference current and the phase of the three-phase reference current;
[0060] Among them, the phase-locked loop is a closed-loop operation method, and the operation coefficient of the phase-locked loop can be determined according to different motor parameters; in this embodiment, any phase reference current signal I1sinwt and the corresponding 90° phase-shifted reference current signal I1coswt in the three-phase reference current are input into the phase-locked loop to output the frequency w of the three-phase reference current and the phase wt of the three-phase reference current. Specifically, Figure 3 is a block diagram of a phase-locked loop operation provided by an embodiment of the present invention; Figure 3 As shown, K3, K2 and K1 are the operation parameters of the phase-locked loop; S is the integral operator in the phase-locked loop; mod is the remainder operator; any phase reference current signal I1sinwt in the three-phase reference current and the corresponding 90° phase-shifted reference current signal I1coswt are used as the input of the phase-locked loop, and after being processed by the phase-locked loop, the frequency w of any phase reference current signal in the three-phase reference current can be output, that is, the frequency w of the three-phase reference current, and the frequency w of the three-phase reference current is output after the integral operation 1 / S, and the phase wt of the three-phase reference current is output; after the phase wt of the three-phase reference current is modulo, the phase wt of the three-phase reference current is within the range of [0,2π].
[0061] S230, determining a phase difference according to a phase-locked loop processing time and frequency;
[0062] Among them, the phase-locked loop processing time is the time for determining the phase of the three-phase reference current based on the three-phase reference current. Since the phase of the three-phase reference current actually rotates during the time process of determining the phase of the three-phase reference current by the three-phase reference current, the phase of the three-phase reference current will have a certain deviation. This embodiment can determine the phase difference through the phase-locked loop processing time and frequency; in this way, the phase of the original three-phase reference current can be compensated, thereby making the phase of the three-phase reference current accurate.
[0063] S240, determining a correction phase of the three-phase reference current according to the phase and phase difference of the three-phase reference current;
[0064] Specifically, the corrected phase of the three-phase reference current can be determined according to the phase of the three-phase reference current and the sum of the phase difference; the corrected phase of the three-phase reference current is more reliable.
[0065] S250, determining a modified odd 2N+1 harmonic signal according to the modified phase of the three-phase reference current to inject the modified odd 2N+1 harmonic signal into the three-phase reference current. The phase of the odd 2N+1 harmonic signal is the same as the modified phase of the three-phase reference current; N is a positive integer ≥ 1, and 2N+1 is not 3N;
[0066] Among them, since the phase of the harmonic signal is the same as the phase of the three-phase reference current, the phase of the modified odd 2N+1 harmonic signal can be determined according to the modified phase of the three-phase reference current, thereby determining the modified odd 2N+1 harmonic signal.
[0067] S260 , outputting the three-phase reference current injected with the modified odd 2N+1 harmonic signal to the motor controller to verify the harmonic suppression algorithm in the motor controller.
[0068] Based on the above embodiments, this embodiment further refines how to determine the phase of the three-phase reference current according to the three-phase reference current, and how to compensate the harmonic signal to determine the corrected odd 2N+1 harmonic signal. In this way, the three-phase reference current of the corrected odd 2N+1 harmonic signal has higher reliability. In this way, the three-phase reference current injected with the corrected odd 2N+1 harmonic signal is directly output to the motor controller, which can better verify the harmonic suppression algorithm in the motor controller.
[0069] Optionally, based on the above embodiment, the method is further optimized. Figure 4 FIG. 1 is a flow chart of another method for injecting odd harmonic signals based on a HIL simulation platform provided by an embodiment of the present invention. Figure 4As shown, the odd harmonic signal injection method based on the HIL simulation platform includes the following steps:
[0070] S310, based on the HIL simulation platform, outputs different three-phase reference currents according to different speed conditions and motor models;
[0071] S320, inputting any phase reference current signal of the three-phase reference current and the corresponding 90° phase-shifted reference current signal into a phase-locked loop to output the frequency of the three-phase reference current and the phase of the three-phase reference current;
[0072] S330, determining a phase difference according to a phase-locked loop processing time and frequency;
[0073] S340, determining a correction phase of the three-phase reference current according to the phase and phase difference of the three-phase reference current;
[0074] S350, determining a modified odd 2N+1 harmonic signal according to the modified phase of the three-phase reference current to inject the modified odd 2N+1 harmonic signal into the three-phase reference current. The phase of the odd 2N+1 harmonic signal is the same as the modified phase of the three-phase reference current; N is a positive integer ≥ 1, and 2N+1 is not 3N;
[0075] S360. Use the Fourier transform method to verify the performance of the three-phase reference current injected with the corrected odd 2N+1 harmonic signal.
[0076] Among them, in order to verify the reliability of the three-phase reference current injected with the modified odd 2N+1 harmonic signal, the three-phase reference current of the modified odd 2N+1 harmonic signal can be Fourier transformed by the Fourier transform method to obtain each harmonic component, and compare it with the reference harmonic component size to verify the reliability of the three-phase reference current injected with the modified odd 2N+1 harmonic signal.
[0077] In some embodiments, the three-phase reference current of the injected corrected odd 2N+1 harmonic signal can also be displayed by an oscilloscope in the HIL simulation platform, and the reliability of the three-phase reference current of the injected corrected odd 2N+1 harmonic signal can be verified by comparing the displayed three-phase reference current of the injected corrected odd 2N+1 harmonic signal with the reference three-phase reference current of the injected corrected odd 2N+1 harmonic signal.
[0078] S350 , outputting the verified three-phase reference current injected with the modified odd 2N+1 harmonic signal to the motor controller to verify the harmonic suppression algorithm in the motor controller.
[0079] Specifically, verifying the harmonic suppression algorithm in the motor controller includes: when the harmonic suppression algorithm is not turned on, using Fourier transform to extract the first harmonic component of the three-phase reference current of the verified injected corrected odd 2N+1 harmonic signal; when the harmonic suppression algorithm is turned on, using Fourier transform to extract the second harmonic component of the three-phase reference current of the verified injected corrected odd 2N+1 harmonic signal; when the ratio of the second harmonic component to the first harmonic component is less than a preset ratio, the preset ratio can be 0-1, which satisfies the reliability of the harmonic suppression algorithm.
[0080] Based on the above embodiments, this embodiment further verifies the performance of the three-phase reference current injected with the modified odd 2N+1 harmonic signal. If the three-phase reference current injected with the modified odd 2N+1 harmonic signal meets the requirements, the verified three-phase reference current injected with the modified odd 2N+1 harmonic signal is output to the motor controller, thereby further and better verifying the harmonic suppression algorithm in the motor controller.
[0081] An embodiment of the present invention also provides an odd harmonic signal injection device based on a HIL simulation platform. The odd harmonic signal injection device based on a HIL simulation platform can execute an odd harmonic signal injection method based on a HIL simulation platform provided by any embodiment of the present invention, and has functional modules and beneficial effects corresponding to the execution method. Figure 5 is a structural schematic diagram of an odd harmonic signal injection device based on a HIL simulation platform provided by an embodiment of the present invention; Figure 5 As shown, the device comprises:
[0082] The reference current output module 10 is used to output different three-phase reference currents according to different speed conditions and motor models based on the HIL simulation platform;
[0083] A harmonic signal output module 20, configured to determine different phases of three-phase reference currents according to different three-phase reference currents to determine different odd 2N+1 harmonic signals; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥1, and 2N+1 is not 3N;
[0084] The compensation module 30 is used to compensate the phase of the odd 2N+1 harmonic signal to inject the compensated odd 2N+1 harmonic signal into the three-phase reference current.
[0085] The output module 40 is used to output the three-phase reference current injected with the modified odd 2N+1 harmonic signal to the motor controller to verify the harmonic suppression algorithm in the motor controller.
[0086] Optionally, the harmonic signal output module 20 includes:
[0087] A harmonic signal output unit, used for inputting any phase reference current signal of the three-phase reference current and the corresponding 90° phase-shifted reference current signal into a phase-locked loop to output the phase of the three-phase reference current and the frequency of the three-phase reference current;
[0088] The compensation module 30 comprises
[0089] A phase difference output unit, used to determine the phase difference according to the phase-locked loop processing time and frequency;
[0090] A corrected phase output unit, used for determining a corrected phase of the three-phase reference current according to the phase of the three-phase reference current and the phase difference;
[0091] A modified harmonic signal output unit is used to determine the modified harmonic signal according to the modified phase of the three-phase reference current. Optional, the device also includes:
[0092] The first verification module is used to verify the performance of the three-phase reference current injected with the modified odd 2N+1 harmonic signal by using the Fourier transform method.
[0093] Optionally, the device further comprises:
[0094] The three-phase reference current injected with the modified odd 2N+1 harmonic signal is displayed by an oscilloscope to verify the performance of the three-phase reference current injected with the modified odd 2N+1 harmonic signal.
[0095] Optionally, verify the harmonic mitigation algorithm in the motor controller, specifically:
[0096] When the harmonic suppression algorithm is not turned on, the first harmonic component of the three-phase reference current injected with the verified corrected odd 2N+1 harmonic signal is extracted using Fourier transform;
[0097] When the harmonic suppression algorithm is turned on, the second harmonic component of the three-phase reference current injected with the verified corrected odd 2N+1 harmonic signal is extracted using Fourier transform;
[0098] When the ratio of the second harmonic component to the first harmonic component is less than a preset ratio, the reliability of the harmonic suppression algorithm is met.
[0099] Optionally, the operation coefficient of the phase-locked loop can be determined according to different motor parameters.
[0100] Optionally, the odd 2N+1 harmonic signal includes a superposition of different odd 2N+1 harmonic signals, or a single odd 2N+1 harmonic signal.
[0101] An embodiment of the present invention further provides an electronic device, Figure 6It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as embedded computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.
[0102] like Figure 6 As shown, the electronic device 01 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 01 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.
[0103] A number of components in the electronic device 01 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 01 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0104] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as an odd harmonic signal injection method based on a HIL simulation platform.
[0105] In some embodiments, a method for injecting odd harmonic signals based on a HIL simulation platform may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 01 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the method for injecting odd harmonic signals based on a HIL simulation platform described above may be executed. Alternatively, in other embodiments, the processor 11 may be configured to execute a method for injecting odd harmonic signals based on a HIL simulation platform by any other appropriate means (e.g., by means of firmware).
[0106] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0107] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0108] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0109] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).
[0110] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.
[0111] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.
[0112] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.
[0113] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
[0114] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A method for injecting odd harmonic signals based on a HIL simulation platform, characterized in that: include: Based on the HIL simulation platform, different three-phase reference currents are output according to different speed conditions and motor models; Determine different phases of three-phase reference currents according to different three-phase reference currents to determine different odd 2N+1 harmonic signals; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥1, and 2N+1 is not 3N; Compensating the phase of the odd 2N+1 harmonic signal to inject a modified odd 2N+1 harmonic signal into the three-phase reference current; The three-phase reference current injected into the modified odd 2N+1 harmonic signal is output to a motor controller to verify the harmonic suppression algorithm in the motor controller.
2. The odd harmonic signal injection method based on the HIL simulation platform according to claim 1 is characterized in that: Determining different phases of three-phase reference currents according to different three-phase reference currents includes: Inputting any phase reference current signal of the three-phase reference current and the corresponding 90° phase-shifted reference current signal into a phase-locked loop to output the phase of the three-phase reference current and the frequency of the three-phase reference current; Compensating the phase of the odd 2N+1 harmonic signal includes: Determining a phase difference according to a phase-locked loop processing time and the frequency; Determining a corrected phase of the three-phase reference current according to the phase of the three-phase reference current and the phase difference; A modified odd 2N+1 harmonic signal is determined according to the modified phase of the three-phase reference current.
3. The odd harmonic signal injection method based on the HIL simulation platform according to claim 1 is characterized in that: Also includes: The performance of the three-phase reference current injected with the modified odd 2N+1 harmonic signal is verified using the Fourier transform method.
4. The odd harmonic signal injection method based on the HIL simulation platform according to claim 1 is characterized in that: Also includes: The three-phase reference current injected into the modified odd 2N+1 harmonic signal is displayed by an oscilloscope to verify the performance of the three-phase reference current injected into the modified odd 2N+1 harmonic signal.
5. The odd harmonic signal injection method based on the HIL simulation platform according to claim 1 is characterized in that: Verify the harmonic mitigation algorithm within the motor controller, including: When the harmonic suppression algorithm is not turned on, the first harmonic component is extracted from the verified three-phase reference current injected with the modified odd 2N+1 harmonic signal by Fourier transform; When the harmonic suppression algorithm is turned on, the second harmonic component is extracted from the verified three-phase reference current injected with the modified odd 2N+1 harmonic signal by Fourier transform; When the ratio of the second harmonic component to the first harmonic component is less than a preset ratio, the reliability of the harmonic suppression algorithm is satisfied.
6. The odd harmonic signal injection method based on the HIL simulation platform according to claim 2 is characterized in that: The operation coefficient of the phase-locked loop can be determined according to different motor parameters.
7. The odd harmonic signal injection method based on the HIL simulation platform according to claim 1 is characterized in that: The odd 2N+1 harmonic signal includes a superposition of different odd 2N+1 harmonic signals, or a single odd 2N+1 harmonic signal.
8. An odd harmonic signal injection device based on a HIL simulation platform, characterized in that: The method for injecting odd harmonic signals based on a HIL simulation platform according to any one of claims 1 to 7 above, wherein the device for injecting odd harmonic signals based on a HIL simulation platform comprises: Based on the HIL simulation platform, different three-phase reference currents are output according to different speed conditions and motor models; Determine different odd 2N+1 harmonic signals according to different three-phase reference currents; wherein the phase of the odd 2N+1 harmonic signal is the same as the phase of the three-phase reference current; N is a positive integer ≥ 1, and 2N+1 is not 3N; Compensating the phase of the odd 2N+1 harmonic signal to inject the compensated odd 2N+1 harmonic signal into the three-phase reference current; The three-phase reference current injected into the modified odd 2N+1 harmonic signal is output to a motor controller to verify the harmonic suppression algorithm in the motor controller.
9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the odd harmonic signal injection method based on the HIL simulation platform according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the odd harmonic signal injection method based on a HIL simulation platform according to any one of claims 1 to 7 when executed.