Printed wiring board

By using an adhesive layer formed by a smooth film and a protrusion in the printed wiring board, the conductor layer and the resin insulating layer are closely bonded, and the problem of peeling between the conductor layer and the resin insulating layer is solved, and the quality and heat resistance of the printed wiring board are improved.

CN119855041APending Publication Date: 2025-04-18IBIDEN CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202411313203.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-10-16
Filing Date
2024-09-20
Publication Date
2025-04-18

AI Technical Summary

Technical Problem

The existing printed wiring boards are prone to peel off under the stresses that act between the conductor circuit and the resin insulating layer between the layers, especially when the number of conductor layers in the accumulated layer is large or the length of the plate edges is large.

Method used

The adhesive layer formed by a smooth film and protrusion is used to sandwich the conductor layer and the resin insulating layer in the middle. The structure of the adhesive layer is filled with the resin insulating layer through a plurality of protrusions and spaces to ensure that the number of inorganic particles in each specified area is small, thereby reducing the difference in thermal expansion rate between the adhesive layer and the resin insulating layer.

Benefits of technology

It effectively reduces the risk of peeling between the conductor layer and the resin insulating layer, and improves the quality and heat resistance of the printed wiring board, especially in the case of long sides or multi-layer accumulation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119855041A_ABST
    Figure CN119855041A_ABST
Patent Text Reader

Abstract

The invention provides a printed wiring board having high quality. A printed wiring board according to an embodiment includes: an insulating layer; a conductor layer formed on the insulating layer; a resin insulating layer formed on the insulating layer and the conductor layer; and an adhesive layer which is sandwiched between the conductor layer and the resin insulating layer and is made of an organic material. The resin insulating layer has a resin and inorganic particles dispersed in the resin. The surface of the conductor layer is substantially smooth. The adhesive layer is formed of a smooth film and a protruding portion protruding from the smooth film. The protruding part is formed by a plurality of protrusions. The space between the plurality of protrusions is filled with the resin insulating layer. The number (B1) of the inorganic particles within the space per predetermined area is smaller than the number (B2) of the inorganic particles outside the space per predetermined area.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The technology disclosed in this specification relates to a printed wiring board. Background Art

[0002] Patent document 1 discloses a method for manufacturing a multilayer printed wiring board, the method comprising the steps of: laminating a conductor circuit and an interlayer resin insulating layer on a substrate in sequence; and forming a layer containing a triazine compound on at least a portion of the surface of the conductor circuit. The conductor circuit and the interlayer resin insulating layer are bonded to each other via the layer containing the triazine compound.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2001-203462

[0004] [Problem of Patent Document 1]

[0005] In a printed wiring board manufactured using the technology of Patent Document 1, when a large stress acts between a conductor circuit and an interlayer resin insulating layer, it is predicted that peeling occurs between the conductor circuit and the interlayer resin insulating layer. For example, when the number of conductor layers in a buildup is 5 or more, it is considered that the stress acting between the conductor circuit and the interlayer resin insulating layer increases. If the number of conductor layers in a buildup is 5 or more, it is predicted that peeling occurs between the conductor circuit and the interlayer resin insulating layer. For example, if the length of each side of the printed wiring board exceeds 50 mm, it is predicted that peeling occurs between the conductor circuit and the interlayer resin insulating layer. Summary of the invention

[0006] The printed wiring board of the present invention comprises: an insulating layer; a conductor layer formed on the insulating layer; a resin insulating layer formed on the insulating layer and the conductor layer; and an adhesive layer sandwiched between the conductor layer and the resin insulating layer and composed of an organic material. The resin insulating layer comprises a resin and inorganic particles dispersed in the resin. The surface of the conductor layer is substantially smooth. The adhesive layer is formed of a smooth film and a protrusion protruding from the smooth film. The protrusion is formed of a plurality of protrusions. The space between the plurality of protrusions is filled with the resin insulating layer. The number B1 of the inorganic particles in the space per a predetermined area is less than the number B2 of the inorganic particles outside the space per a predetermined area.

[0007] A printed wiring board according to an embodiment of the present invention has an adhesive layer sandwiched by a conductor layer and a resin insulating layer. The adhesive layer bonds the conductor layer and the resin insulating layer. The adhesive layer is formed by a substantially smooth smooth film and a protrusion protruding from the smooth film. The adhesive layer has a concave-convex shape formed by the protrusion and the smooth film. The protrusion has a concave-convex shape formed by a plurality of protrusions. Therefore, the conductor layer and the resin insulating layer are fully adhered to each other via the adhesive layer. The coefficient of thermal expansion (CTE) of the adhesive layer is different from the CTE of the resin insulating layer. When the printed wiring board is subjected to thermal shock, the deformation amount of the resin insulating layer filling the space between the protrusions of the adhesive layer is different from the deformation amount of the adhesive layer. In particular, when the resin insulating layer filling the space contains inorganic particles, the difference in deformation amount between the two is large. If the difference in deformation amount between the two is large, the protrusion is easily destroyed. In the printed wiring board according to the embodiment, the number of inorganic particles (B1) in the space per specified area is less than the number of inorganic particles (B2) outside the space per specified area. The difference in deformation amount between the resin insulating layer filling the space and the deformation amount of the adhesive layer is small. The protrusions are difficult to be broken. The resin insulating layer is difficult to be peeled off from the conductor layer. A high-quality printed wiring board is provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a cross-sectional view schematically showing a printed wiring board according to the embodiment.

[0009] Figure 2 It is an enlarged cross-sectional view schematically showing a part of a printed wiring board.

[0010] Figure 3A It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0011] Figure 3B It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0012] Figure 3C It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0013] Figure 3D It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0014] Figure 3E It is a cross-sectional view schematically showing a method for manufacturing a printed wiring board according to an embodiment.

[0015] Description of symbols

[0016] 2: printed wiring board; 4: insulating layer; 10: first conductor layer; 20: resin insulating layer; 30: second conductor layer; 40: via conductor; 90: inorganic particles; 100: adhesive layer; 110: smoothing film; 120: protrusion; 122: projection; 130: space; 131: first space; 132: second space; T: thickness; H1, H2: height. DETAILED DESCRIPTION

[0017] [Example of Implementation]

[0018] Figure 1 2 is a cross-sectional view showing a printed wiring board 2 according to an embodiment. Figure 1 As shown, the printed wiring board 2 includes an insulating layer 4, a first conductor layer 10, a resin insulating layer 20, a second conductor layer 30, and a via conductor 40. The first conductor layer 10 is an example of a conductor layer. The via conductor 40 is formed in an opening 26 formed in the resin insulating layer 20. The printed wiring board 2 includes an adhesive layer 100 on the first conductor layer 10. The adhesive layer 100 is sandwiched between the first conductor layer 10 and the resin insulating layer 20. The first conductor layer 10 is adjacent to the second conductor layer 30. There is no conductor layer between the first conductor layer 10 and the second conductor layer 30.

[0019] The insulating layer 4 is formed using a thermosetting resin. The insulating layer 4 may also be a photocurable resin. The insulating layer 4 may also contain inorganic particles such as silicon dioxide. The insulating layer 4 may also contain a reinforcing material such as glass cloth. The insulating layer 4 has a third surface 6 and a fourth surface 8 on the opposite side of the third surface 6.

[0020] The first conductor layer 10 is formed on the third surface 6 of the insulating layer 4. The first conductor layer 10 includes a signal wiring 12 and a pad 14. Although not shown in the figure, the first conductor layer 10 also includes a conductor circuit other than the signal wiring 12 and the pad 14. The first conductor layer 10 is mainly formed of copper. The first conductor layer 10 is formed by a seed layer 10a on the insulating layer 4 and a plating layer 10b on the seed layer 10a. The surface (upper surface and side surface) of the first conductor layer 10 is smooth. The surface roughness of the first conductor layer 10 is expressed as root mean square roughness (Rq). The Rq of the surface of the first conductor layer 10 is less than 0.23μm. The Rq of the surface of the first conductor layer 10 is preferably less than 0.18μm. The Rq of the surface of the first conductor layer 10 is more preferably less than 0.1μm.

[0021] The surface of the pad 14 is formed by a first surface 14a and a second surface 14b. The first surface 14a is exposed from an opening 26 formed in the resin insulating layer 20. The second surface 14b is a surface other than the first surface 14a. The root mean square roughness (Rq) of the second surface 14b is less than 0.23 μm. The first surface 14a is not covered by the adhesive layer 100. The second surface 14b is covered by the adhesive layer 100. The surface (upper surface and side surface) of the signal wiring 12 is covered by the adhesive layer 100. The side surface of the first conductor layer 10 is covered by the adhesive layer 100.

[0022] The adhesive layer 100 is formed of a resin. The adhesive layer 100 is formed of an organic material (organic resin). The adhesive layer 100 does not contain inorganic particles. Alternatively, the adhesive layer 100 contains inorganic particles such as silicon dioxide. In the case where the adhesive layer 100 contains inorganic particles, the diameter of the inorganic particles is several nm. The organic material is a nitrogen-based organic compound. The nitrogen-based organic compound is, for example, a tetrazole compound. Examples of nitrogen-based organic compounds are disclosed in Japanese Patent Publication No. 2015-54987. The adhesive layer 100 does not cover the third surface 6 exposed from the first conductor layer 10. The adhesive layer 100 is sandwiched between the first conductor layer 10 and the resin insulating layer 20. The adhesive layer 100 bonds the first conductor layer 10 and the resin insulating layer 20.

[0023] Figure 2 1 is an enlarged cross-sectional view showing a portion of the adhesive layer 100 formed on the second surface 14b of the pad 14. Figure 2 As shown in FIG. 1 , the adhesive layer 100 is formed of a substantially smooth smooth film 110 and a plurality of protrusions 120 protruding from the smooth film 110. The adhesive layer 100 formed on the side surface of the gasket 14 is formed of Figure 2 The adhesive layer 100 shown in the figure is formed of a smooth film 110 and a plurality of protrusions 120. The shape is also the same. The adhesive layer 100 formed on the upper surface and side surface of the signal wiring 12 is composed of Figure 2 The same smoothing film 110 and a plurality of protrusions 120 are formed. The shapes are also the same.

[0024] The smoothing film 110 has a substantially uniform thickness T. The thickness T of the smoothing film 110 is not less than 10 nm and not more than 120 nm. The ratio (S1 / S2) of the area (S1) of the smoothing film 110 exposed from the protrusion 120 to the area (S2) of the adhesive layer 100 is not less than 0.1 and not more than 0.5. The smoothing film 110 on the upper surface of the first conductor layer 10 is formed substantially along the shape of the upper surface of the first conductor layer 10. The smoothing film 110 on the second surface 14b of the first conductor layer 10 is formed substantially along the shape of the second surface 14b of the first conductor layer 10. The smoothing film 110 on the side surface of the first conductor layer 10 is formed substantially along the shape of the side surface of the first conductor layer 10. In the case where undulations are formed on the upper surface and the side surface of the first conductor layer 10, the smoothing film 110 follows the undulations.

[0025] The protrusion 120 is formed by a plurality of protrusions 122. The plurality of protrusions 122 form concavities and convexities on the upper surface of the protrusion 120. 2 The number of protrusions 122 is greater than or equal to 5 and less than or equal to 15. The protrusion 120 has heights H1 and H2 between the upper surface of the smooth film 110 and the top of the protrusion 120. The maximum value of the heights H1 and H2 is greater than or equal to 10 times and less than or equal to 30 times the thickness T of the smooth film 110. The heights H1 and H2 are greater than or equal to 200 nm and less than or equal to 450 nm.

[0026] The resin insulating layer 20 is formed on the first conductor layer 10 via the adhesive layer 100. The resin insulating layer 20 is bonded to the first conductor layer 10 via the adhesive layer 100. The resin insulating layer 20 has a first surface 22 and a second surface 24 on the opposite side of the first surface 22. The second surface 24 of the resin insulating layer 20 is opposite to the first conductor layer 10. The second surface 24 is in contact with the adhesive layer 100. The resin insulating layer 20 has an opening 26 that exposes the pad 14. The first surface 22 of the resin insulating layer 20 has no unevenness. The first surface 22 is not roughened. The first surface 22 is formed smoothly. The thickness of the resin insulating layer 20 is more than twice the thickness of the second conductor layer 30. The thickness of the resin insulating layer 20 is the distance between the first surface 22 and the upper surface of the first conductor layer 10.

[0027] The resin insulating layer 20 has a resin 80 and a plurality of inorganic particles 90 dispersed in the resin 80. The resin insulating layer 20 is formed of the resin 80 and the plurality of inorganic particles 90 dispersed in the resin 80. The resin 80 is an epoxy resin. Examples of the resin are thermosetting resins and photocurable resins. The inorganic particles 90 are, for example, silicon dioxide or aluminum oxide. The amount of the inorganic particles 90 in the resin insulating layer 20 is 70 wt % or more.

[0028] like Figure 2As shown, there are spaces 130 between the plurality of protrusions 122 forming the protrusion 120 of the adhesive layer 100. The number of spaces 130 is plural. Each space 130 is filled with the resin insulating layer 20. The resin insulating layer 20 in each space 130 must contain the resin 80 from the resin insulating layer 20. The resin insulating layer 20 in each space 130 may or may not contain the inorganic particles 90 from the resin insulating layer 20. The number (B1) of inorganic particles 90 in each predetermined area of ​​the space 130 is less than the number (B2) of inorganic particles 90 outside the space 130 per predetermined area. The ratio (number B1 / number B2) of the number B1 to the number B2 is less than 0.5. The ratio (number B1 / number B2) may be less than 0.1. The ratio (number B1 / number B2) may be 0. In the case where the ratio is 0, the ratio (number B1 / number B2) is recorded as 0. The resin insulating layer 20 in the space 130 corresponding to the ratio 0 does not contain the inorganic particles 90 in the space 130. The number B1 and the number B2 are measured using a cross section of the printed wiring board 2. The cross section used for measurement is obtained by cutting the printed wiring board 2 with a plane perpendicular to the first surface 22. An example of the specified area is 4 μm 2 Above and 25μm 2 The number of measurement sites is preferably plural. Each measurement site is different. An example of the number of measurement sites is 5 or more and 30 or less. The number B1 and the number B2 are average values ​​of the number of inorganic particles 90 at each measurement site.

[0029] When observing the resin insulating layer 20 in a plurality of spaces 130, each space 130 is classified into a first space 131 and a second space 132. The first space 131 is filled only with the resin 80. The second space 132 is filled with the inorganic particles 90 and the resin 80. The ratio (N1 / N2) of the number (N1) of the first spaces 131 to the total number (N2) of the spaces 130 is 0.5 or more. More than half of the spaces 130 do not contain the inorganic particles 90. The ratio (N1 / N2) is preferably 0.7 or more. The ratio (N1 / N2) is more preferably 0.85 or more. The ratio (N1 / N2) may be 1. The total number (N2) of the spaces 130 used for the calculation of the ratio (N1 / N2) is preferably 10 or more. The total number (N2) is the sum of the number of the first spaces 131 and the number of the second spaces 132. The total number (N2) may be represented by the number of measurement sites. For example, if the presence or absence of inorganic particles is evaluated in ten spaces 130 , the total number ( N2 ) is ten.

[0030] like Figure 1As shown in the figure, the second conductor layer 30 is formed on the first surface 22 of the resin insulation layer 20. The second conductor layer 30 includes a first signal wiring 32, a second signal wiring 34 and a pad 36. Although not shown in the figure, the second conductor layer 30 also includes a conductor circuit other than the first signal wiring 32, the second signal wiring 34 and the pad 36. The first signal wiring 32 and the second signal wiring 34 form a pair of wirings. The second conductor layer 30 is mainly formed of copper. The second conductor layer 30 is formed by a seed layer 30a on the first surface 22 and a plating layer 30b on the seed layer 30a.

[0031] The via conductor 40 is formed in the opening 26. The via conductor 40 connects the first conductor layer 10 and the second conductor layer 30. Figure 1 In the embodiment, the via conductor 40 connects the pad 14 and the land 36. The via conductor 40 is formed by the seed layer 30a and the plating layer 30b on the seed layer 30a.

[0032] The length of each side of the printed wiring board 2 of the embodiment is 50 mm or more. The length of each side is preferably 100 mm or more. The length of each side is 250 mm or less.

[0033] [Manufacturing method of printed wiring board according to embodiment]

[0034] Figure 3A to Figure 3E A method for manufacturing the printed wiring board 2 according to the embodiment will be described. Figure 3A to Figure 3E It is a cross-sectional view. Figure 3A The insulating layer 4 and the first conductor layer 10 formed on the third surface 6 of the insulating layer 4 are shown. The first conductor layer 10 is formed by a semi-additive method.

[0035] like Figure 3B As shown, the adhesive layer 100 is formed on the upper surface and the side surface of the first conductor layer 10. For example, the adhesive layer 100 is formed by Figure 3A The intermediate substrate shown is formed by immersing it in a chemical solution containing a nitrogen-based organic compound. The pH of the chemical solution is 7 or less. By immersing the intermediate substrate in the chemical solution, an adhesive layer 100 including a smooth film 110 and a protrusion 120 is formed on the upper surface and side surfaces of the first conductor layer 10. Before the intermediate substrate is immersed in the chemical solution, the oxide film on the upper surface and side surfaces of the first conductor layer 10 is removed. In a modified example, the adhesive layer 100 is formed by applying the chemical solution on the first conductor layer 10. When the adhesive layer 100 is formed, the intermediate substrate is taken out from the chemical solution. The adhesive layer 100 is dried. The upper surface of the adhesive layer 100 before drying may be smooth. In this case, a part of the adhesive layer 100 is condensed by drying. By condensation, the adhesive layer 100 including the smooth film 110 and the protrusion 120 is formed.

[0036] A resin insulating layer 20 is formed on the first conductor layer 10 covered by the adhesive layer 100. The second surface 24 of the resin insulating layer 20 is opposite to the third surface 6 of the insulating layer 4. The second surface 24 is in contact with the adhesive layer 100. There are spaces 130 between adjacent protrusions 122. The spaces 130 between the plurality of protrusions 122 are filled with the resin insulating layer 20. Each space 130 is filled with the resin insulating layer 20. The size of the space 130 is small. The size of the space 130 varies. Complex concavoconvexities are formed by the protrusions 122. Therefore, the space 132 filled by the resin insulating layer 20 containing the inorganic particles 90 and the space 131 filled by the resin insulating layer 20 not containing the inorganic particles 90 are mixed. Alternatively, all the spaces are filled with the resin insulating layer 20 not containing the inorganic particles 90.

[0037] like Figure 3C As shown, laser light L is irradiated from above the resin insulating layer 20. Laser light L penetrates the resin insulating layer 20. Laser light L penetrates the adhesive layer 100 covering the pad 14 and reaches the pad 14. Alternatively, the adhesive layer 100 is not completely removed by the laser light L. The bottom of the opening 26 is formed by the adhesive layer 100. An opening 26 for a via conductor reaching the pad 14 is formed. Alternatively, an opening 26 for a via conductor reaching the adhesive layer 100 is formed. The adhesive layer 100 covering the pad 14 is exposed through the opening 26. The laser light L is, for example, a UV laser or a CO2 laser. In Figure 3C In the example shown in FIG. 1 , the bottom of the opening 26 is formed by the adhesive layer 100 .

[0038] like Figure 3D As shown, the inside of the opening 26 is cleaned. In the case where the adhesive layer 100 is not completely removed by the laser L, the adhesive layer 100 exposed from the opening 26 is removed by cleaning the inside of the opening 26. The first surface 14a of the pad 14 is exposed from the opening 26. The resin residue generated when the opening 26 is formed is removed. The cleaning inside the opening 26 is performed by plasma. That is, the cleaning is performed by a dry process. The embodiment can use a liquid containing an oxidant for cleaning. An example of an oxidant is potassium permanganate. The cleaning includes a desmear treatment. The adhesive layer 100 formed between the second surface 24 of the resin insulating layer 20 and the pad 14 is not removed. Therefore, no gap is formed between the second surface 24 of the resin insulating layer 20 and the pad 14.

[0039] like Figure 3E As shown, a seed layer 30a is formed on the first surface 22 of the resin insulating layer 20. The seed layer 30a is formed by chemical plating. Alternatively, the seed layer 30a may be formed by sputtering.

[0040] A plating resist is formed on the seed layer 30 a and has openings for forming the first signal wiring 32 , the second signal wiring 34 , and the pad 36 .

[0041] The electroplating layer 30b is formed on the seed layer 30a exposed from the plating resist. The electroplating layer 30b is formed of copper. The electroplating layer 30b fills the opening 26. The first signal wiring 32, the second signal wiring 34 and the pad 36 are formed by the seed layer 30a and the electroplating layer 30b on the first surface 22. The second conductor layer 30 is formed. The via conductor 40 is formed by using the seed layer 30a and the electroplating layer 30b in the opening 26. The via conductor 40 connects the pad 14 to the pad 36. The first signal wiring 32 and the second signal wiring 34 form a pair of wirings.

[0042] The plating resist is removed. The seed layer 30a exposed from the plating layer 30b is removed. The second conductor layer 30 and the via conductor 40 are formed at the same time. The printed wiring board 2 of the embodiment is obtained.

[0043] The printed wiring board 2 of the embodiment has an adhesive layer 100 sandwiched between the first conductor layer 10 and the resin insulating layer 20. The adhesive layer 100 bonds the first conductor layer 10 and the resin insulating layer 20. The adhesive layer 100 is formed of a substantially smooth smooth film 110 and a protrusion 120 protruding from the smooth film 110. The adhesive layer 100 has concavities and convexities formed by the protrusion 120 and the smooth film 110. The protrusion 120 has concavities and convexities formed by a plurality of protrusions 122. Therefore, the first conductor layer 10 and the resin insulating layer 20 are sufficiently adhered to each other via the adhesive layer 100. For example, even if the length of each side of the printed wiring board 2 is 50 mm or more, the resin insulating layer 20 is difficult to be peeled off from the first conductor layer 10. Even if the length of each side of the printed wiring board 2 is 100 mm or more, it is difficult for cracks caused by the adhesive layer 100 to occur in the resin insulating layer 20.

[0044] The coefficient of thermal expansion (CTE) of the adhesive layer 100 is different from the CTE of the resin insulating layer 20. For example, the amount of inorganic particles in the two is different. Alternatively, the resin insulating layer 20 contains inorganic particles 90, and the adhesive layer 100 does not contain inorganic particles. Alternatively, the CTE of the resin forming the adhesive layer 100 is different from the CTE of the resin forming the resin insulating layer 20. When the printed wiring board 2 is subjected to thermal shock, the deformation amount of the adhesive layer 100 is different from the deformation amount of the resin insulating layer 20. Alternatively, the deformation amount of the resin insulating layer 20 filling the space 130 is different from the deformation amount of the adhesive layer 100. In particular, when the resin insulating layer 20 filling the space 130 contains inorganic particles 90, the difference in deformation amount between the two is large. If the difference in deformation amount between the two is large, the protrusion 122 is easily destroyed. In the printed wiring board 2 of the embodiment, the number (B1) of inorganic particles 90 in the space 130 per a specified area is less than the number (B2) of inorganic particles 90 outside the space 130 per a specified area. The difference between the deformation amount of the resin insulating layer 20 filling the space 130 and the deformation amount of the adhesive layer 100 is small. Alternatively, the CTE of the adhesive layer 100 is greater than the CTE of the resin insulating layer 20 filling the space 130, and the CTE of the resin insulating layer 20 filling the space 130 is greater than the CTE of the resin insulating layer 20 outside the space. These CTEs gradually increase. Each CTE gradually changes. Therefore, the protrusion 122 is not easily damaged. The resin insulating layer 20 is difficult to peel off from the first conductor layer 10. A printed wiring board 2 with high quality is provided.

[0045] In the printed wiring board 2 of the embodiment, the Rq of the surface (upper surface and side surface) of the first conductor layer 10 is less than 0.23 μm. Therefore, when data is transmitted using the conductor circuit included in the first conductor layer 10, the transmission loss is small. When transmitting high-speed signals, noise is not easily generated. The printed wiring board 2 of the embodiment can transmit high-speed signals with low loss and suppress the peeling between the conductor layer and the resin insulation layer. Provided is a printed wiring board 2 with high quality.

[0046] [Another Example 1 of Implementation]

[0047] The printed wiring board 2 of another example 1 of the embodiment has a plurality of conductor layers, a plurality of interlayer resin insulation layers, and a plurality of via conductors. The conductor layers and the interlayer resin insulation layers are alternately stacked. Adjacent conductor layers are connected by via conductors. In another example 1, the number of conductor layers is 5 or more and 20 or less. The thickness of each interlayer resin insulation layer is substantially equal. The printed wiring board 2 can bond the conductor layer to the interlayer resin insulation layer using an adhesive layer 100. In the embodiment and another example 1, the structure and shape of the adhesive layer 100 are the same. The adhesive layer 100 is formed on the upper surface and the side surface of the conductor layer in the same manner as in the embodiment. The adhesive layer 100 is sandwiched between the conductor layer and the interlayer resin insulation layer. Even if the number of conductor layers is 5 or more, the interlayer resin insulation layer is difficult to peel off from the conductor layer. Since the number of conductor layers is 20 or less, it is difficult to generate cracks caused by the adhesive layer 100 in the interlayer resin insulation layer. The number of conductor layers is preferably 10 or more. The number of conductor layers is more preferably 15 or more. The adhesive layer 100 functions effectively.

[0048] Figure 1 The printed wiring board 2 of Example 1 has two conductor layers (a first conductor layer 10 and a second conductor layer 30). The number of the first conductor layer 10 is 1. The number of the second conductor layer 30 is 1. The first conductor layer 10 and the second conductor layer 30 are included in the conductor layer of Example 1. Figure 1 The resin insulating layer 20 is included in the interlayer resin insulating layer of another example 1. In another example 1, the conductor layer other than the first conductor layer 10 and the second conductor layer 30 is a third conductor layer. In another example 1, one of the plurality of interlayer resin insulating layers is formed directly above the resin insulating layer 20 and the second conductor layer 30. The interlayer resin insulating layer formed directly above the resin insulating layer 20 and the second conductor layer 30 is the first interlayer resin insulating layer. In another example 1, an adhesive layer 100 is formed between the first interlayer resin insulating layer and the second conductor layer 30. Alternatively, the adhesive layer 100 is not formed between the first interlayer resin insulating layer and the second conductor layer 30. The conductor layer of another example 1 is the same as the first conductor layer 10 of the embodiment. Both have the same Rq.

[0049] [Another Example 2 of Implementation Method]

[0050] In another example 2, Figure 1 A conductor layer is formed under the insulating layer 4 of the printed wiring board 2. Figure 1 The conductor layer and the first conductor layer 10 are connected by a via conductor that penetrates the resin insulation layer sandwiched by the conductor layer and the first conductor layer 10. Another example 2 is the same as the embodiment except that the conductor layer is formed under the insulation layer 4, the insulation layer 4 is formed by the resin insulation layer 20, and the via conductor is formed in the resin insulation layer sandwiched by the conductor layer and the first conductor layer 10. The conductor layer of another example 2 is the same as the first conductor layer 10 of the embodiment. Rq of both is the same.

Claims

1. A printed wiring board comprising: Insulation layer; a conductor layer formed on the insulating layer; a resin insulating layer formed on the insulating layer and the conductor layer; as well as an adhesive layer, which is sandwiched between the conductor layer and the resin insulating layer and is made of an organic material, in, The resin insulating layer comprises a resin and inorganic particles dispersed in the resin. The surface of the conductor layer is substantially smooth, The adhesive layer is formed of a smooth film and a protrusion protruding from the smooth film, The protrusion is formed by a plurality of protrusions, The spaces between the plurality of protrusions are filled with the resin insulating layer, and the number B1 of the inorganic particles in the spaces per a predetermined area is smaller than the number B2 of the inorganic particles outside the spaces per a predetermined area.

2. The printed wiring board according to claim 1, wherein The conductor layer has a surface root mean square roughness (Rq) of 0.23 μm or less.

3. The printed wiring board according to claim 1, wherein The ratio of the number B1 to the number B2 (the number B1 / the number B2) is less than 0.

5.

4. The printed wiring board according to claim 3, wherein The ratio (the amount B1 / the amount B2) is zero.

5. The printed wiring board according to claim 1, wherein The number of the spaces is multiple, The plurality of spaces are classified into a first space and a second space, The first space is filled only with the resin, The second space is filled with the inorganic particles and the resin, A ratio (N1 / N2) of the number N1 of the first spaces to the total number N2 of the spaces is greater than or equal to 0.

5.

6. The printed wiring board according to claim 5, wherein The ratio (N1 / N2) is 1.

7. The printed wiring board according to claim 1, wherein The smooth film has a substantially uniform thickness, The protrusion has a height between the upper surface of the smooth film and the top of the protrusion, The maximum value of the height is not less than 10 times and not more than 30 times the thickness.

8. The printed wiring board according to claim 1, wherein The smooth film has a substantially uniform thickness, The thickness is greater than or equal to 10 nm and less than or equal to 120 nm. The protrusion has a height between the upper surface of the smooth film and the top of the protrusion, The height is greater than or equal to 200 nm and less than or equal to 450 nm.

9. The printed wiring board according to claim 1, wherein A ratio of an area of ​​the smooth film exposed from the protruding portion to an area of ​​the adhesive layer is 0.1 or more and 0.5 or less.

10. The printed wiring board according to claim 1, wherein The adhesive layer does not cover the insulating layer exposed from the conductive layer.

11. The printed wiring board according to claim 1, wherein Every 1mm 2 The number of the protrusions is greater than or equal to 5 and less than or equal to 15.

Citation Information

Patent Citations

  • Manufacturing method for printed wiring board and multilayer printed wiring board

    JP2001203462A

  • Surface preparation agent for copper and copper alloy, and use thereof

    JP2015054987A