Groove type power device and manufacturing method thereof

Abstract

The invention provides a trench-type power device and a manufacturing method thereof. The power device comprises a semiconductor layer, and a cellular functional region, a shielding structure and a grounding structure which are located in the semiconductor layer. The cellular functional region includes a plurality of trench gates. The shielding structure comprises at least one shielding area, and the shielding area extends below the plurality of trench gates. The grounding structure comprises at least one grounding area which is grounded. At least one grounding area is electrically connected with the same shielding area to form a shielding grounding unit. The conductive type of the shielding grounding unit is different from that of the semiconductor layer. According to the power device, the electric field concentration degree of the bottoms of the trench gates is weakened through the shielding grounding unit, and the reliability of the power device is improved. Through the structure arrangement of the shielding grounding unit, the channel density of the power device can be ensured while a good shielding protection effect is ensured, the conduction capability of the power device is improved, and the overall structure is simple. The manufacturing method is simple in process steps.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor devices and manufacturing technology, and relates to a trench-type power device and a manufacturing method thereof. Background Art

[0002] Power semiconductor devices operate in high-voltage and high-current environments and are typically used in applications requiring high-power switching, such as power conversion, power converters, and inverters. Currently, power semiconductor devices include insulated-gate bipolar transistors (IGBTs) and power metal-oxide-semiconductor field-effect transistors (MOSFETs). Based on the performance requirements of their application, power semiconductor devices must fundamentally withstand high voltages and achieve high switching speeds.

[0003] Silicon carbide is a wide-bandgap semiconductor material with a higher bandgap than silicon. Compared to silicon, it maintains stability even at high temperatures, significantly outperforming silicon devices in withstand voltage. To increase the channel density of silicon carbide power semiconductor devices, trench-type silicon carbide MOSFETs with a vertical channel structure have been widely used. However, trench-gate MOSFETs are prone to electric field concentration in the gate dielectric layer at the bottom of the trench, making it difficult to ensure device reliability.

[0004] Therefore, how to provide a trench power device and a manufacturing method thereof to improve the reliability of the trench power device has become an important technical problem that needs to be solved urgently by those skilled in the art.

[0005] It should be noted that the above introduction to the technical background is merely intended to provide a clear and complete description of the technical solutions of this application and facilitate understanding by those skilled in the art. Simply because these solutions are described in the background technology section of this application, it should not be assumed that the above technical solutions are well known to those skilled in the art. Summary of the Invention

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide a trench power device and a manufacturing method thereof, so as to solve the problem that the reliability of the trench power device in the prior art needs to be improved.

[0007] To achieve the above objectives and other related objectives, in a first aspect, the present application provides a trench power device, comprising:

[0008] semiconductor layer;

[0009] A cellular functional region is located in the semiconductor layer, wherein the cellular functional region includes a plurality of trench gates extending along a first direction;

[0010] a shielding structure located in the semiconductor layer, the shielding structure comprising at least one shielding region, the shielding region passing under the plurality of trench gates and extending along a second direction, the second direction intersecting the first direction;

[0011] A grounding structure is located in the semiconductor layer, and the grounding structure includes at least one grounding area, which is grounded; wherein, at least one of the grounding areas is electrically connected to the same shielding area to form a shielding grounding unit, and the conductivity type of the shielding grounding unit is different from the conductivity type of the semiconductor layer.

[0012] Optionally, the shielding region includes a plurality of first shielding areas and a plurality of second shielding areas, and in the second direction, the plurality of first shielding areas are alternately connected with the plurality of second shielding areas, and the width of the first shielding area is greater than that of the second shielding area.

[0013] Optionally, the trench-type power device includes a plurality of the shielding grounding units, and the plurality of the shielding grounding units are arranged in sequence in the first direction; wherein any two adjacent shielding areas are aligned, or any two adjacent shielding areas are staggered.

[0014] Optionally, the trench gate includes a trench, and the width of the first shielding region is greater than the width of the trench; wherein,

[0015] When any two adjacent shielding regions are aligned, any first shielding region is located below one of the trench gates, and any second shielding region is located between two adjacent trench gates;

[0016] When any two adjacent shielding regions are staggered, a portion of the first shielding region in the shielding region is located below the trench gate, and another portion of the first shielding region in the shielding region extends from between the two adjacent trenches to below the bottom corners of the two adjacent trenches facing each other.

[0017] Optionally, each of the shielding areas is electrically connected to a plurality of the grounding areas;

[0018] In the same shielding grounding unit: a plurality of the grounding areas are arranged in the second direction, and a preset distance exists between any two adjacent grounding areas;

[0019] The grounding area is electrically connected to the first shielding area, and / or the grounding area is electrically connected to the second shielding area.

[0020] Optionally, the doping concentration range of the first shielding region is 1e16 cm -3 ~1e20cm -3 The doping concentration range of the second shielding region is 1e16 cm -3 ~1e20cm -3 ; The doping depth range of the first shielding region is 0.1μm to 1μm, and the doping depth range of the second shielding region is 0.1μm to 1μm.

[0021] Optionally, the shielding region further covers a portion of the bottoms of the plurality of trench gates, and a bottom corner of at least one trench gate is covered by the first shielding region.

[0022] Optionally, the trench power device further includes a source metal, the source metal is located above the semiconductor layer, and the grounding region is electrically connected to the source metal, so that the grounding region is grounded.

[0023] Optionally, the cell functional area further includes multiple well regions, any two adjacent well regions are separated by the trench gate, the conductivity type of the well region is different from the conductivity type of the semiconductor layer, and the grounding area is electrically connected to the source metal based on the well region.

[0024] In a second aspect, the present application further provides a method for manufacturing a trench power device, comprising the following steps:

[0025] forming a semiconductor layer;

[0026] forming a shielding structure in the semiconductor layer, the shielding structure comprising at least one shielding region;

[0027] forming a grounding structure in the semiconductor layer, the grounding structure comprising at least one grounding region, the grounding region being grounded, wherein at least one of the grounding regions is electrically connected to the same shielding region to form a shielding grounding unit, and the shielding grounding unit has a conductivity type different from that of the semiconductor layer;

[0028] A cellular functional region is formed in the semiconductor layer, the cellular functional region includes a plurality of trench gates extending along a first direction, the shielding region passes under the plurality of trench gates and extends along a second direction intersecting the first direction.

[0029] As described above, the trench-type power device of the present application comprises a semiconductor layer, a cellular functional region, a shielding structure, and a grounding structure. The shielding structure includes at least one shielding region, and the grounding structure includes at least one grounding region. The shielding region extends beneath multiple trench gates, and the grounding region is grounded. At least one grounding region is electrically connected to the same shielding region to form a shielded grounding unit. For each shielded grounding unit, since the shielding region extends beneath multiple trench gates in the cellular functional region, the electric field concentration at the bottom of the multiple trench gates can be reduced, thereby improving the reliability of the power device. Furthermore, each shielding region is electrically connected to at least one grounding region, enabling grounding of the shielding region and further enhancing the shielding protection effect. Furthermore, when the shielded grounding unit includes multiple grounding regions, a predetermined distance is maintained between two adjacent grounding regions in the same shielded grounding unit. While ensuring a good grounding effect of the shielding region, the excessive number of grounding regions is avoided, which may affect the trench density of the power device and improve the conduction capability of the power device. In addition, the shielding region is structured so that it includes multiple alternating first and second shielding regions, with the width (or length) of the first shielding region being greater than the width (or length) of the second shielding region. The first shielding region at least covers the bottom corners of the trench gate. Through the above-mentioned structural and dimensional design, the area of ​​the shielding region primarily used to provide electric field shielding for the trench gate (i.e., the first shielding region) accounts for a larger proportion, while the area of ​​the second shielding region primarily used to connect the multiple first shielding regions accounts for a smaller proportion, further improving the device's conductive performance. Furthermore, the overall structure is simple, flexible, and diverse, making it suitable for practical applications.

[0030] The manufacturing method of the trench power device of the present application can produce trench power devices with improved reliability, improved conduction performance and flexible and diversified structures. The process steps are simple and high-quality, large-scale production is easy to achieve. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A schematic diagram of the first structure of a trench power device provided in an embodiment of the present application;

[0032] Figure 2 A schematic diagram of a second structure of a trench power device provided in an embodiment of the present application;

[0033] Figure 3 for Figure 1 and Figure 2 A schematic cross-sectional view of the A-A' portion;

[0034] Figure 4 for Figure 1 and Figure 2 A schematic cross-sectional view of the B-B' portion;

[0035] Figure 5 for Figure 1 Schematic cross-sectional view of the C-C' portion;

[0036] Figure 6 for Figure 2 A schematic cross-sectional view of the D-D' portion;

[0037] Figure 7 for Figure 1 and Figure 2 Schematic diagram of the structure of the shield grounding unit;

[0038] Figure 8 A third structural schematic diagram of a trench power device provided in an embodiment of the present application;

[0039] Figure 9 A fourth structural schematic diagram of a trench power device provided in an embodiment of the present application;

[0040] Figure 10 A fifth structural schematic diagram of a trench power device provided in an embodiment of the present application;

[0041] Figure 11 A sixth structural schematic diagram of a trench power device provided in an embodiment of the present application;

[0042] Figure 12 A seventh structural schematic diagram of a trench power device provided in an embodiment of the present application;

[0043] Figure 13 This is a schematic diagram of an eighth structure of a trench power device provided in an embodiment of the present application;

[0044] Figure 14 A flowchart of the steps of a method for manufacturing a trench power device provided in an embodiment of the present application;

[0045] Figure 15 A schematic cross-sectional view of the structure obtained after forming the first epitaxial layer in the method for manufacturing a trench power device provided in an embodiment of the present application at the AA' / BB' portion;

[0046] Figure 16 A schematic cross-sectional view of a structure obtained after forming a shielding region in a method for manufacturing a trench power device provided in an embodiment of the present application at a position AA';

[0047] Figure 17 A schematic cross-sectional view of the structure obtained after forming the second epitaxial layer in the method for manufacturing a trench power device provided in an embodiment of the present application at the AA' portion;

[0048] Figure 18A schematic cross-sectional view of the structure obtained after forming the second epitaxial layer in the method for manufacturing a trench power device provided in an embodiment of the present application at the BB' portion;

[0049] Figure 19 A schematic cross-sectional view of a structure obtained after forming an initial well region in a method for manufacturing a trench power device provided in an embodiment of the present application at a position AA';

[0050] Figure 20 A schematic cross-sectional view of a structure obtained after forming an initial well region in a method for manufacturing a trench power device provided in an embodiment of the present application at a position BB';

[0051] Figure 21 A schematic cross-sectional view of a structure obtained after forming a contact region in a method for manufacturing a trench power device provided in an embodiment of the present application at a position AA';

[0052] Figure 22 A schematic cross-sectional view of the structure obtained after forming the contact region in the method for manufacturing the trench power device provided in an embodiment of the present application at the BB' portion;

[0053] Figure 23 A schematic cross-sectional view of a structure obtained after forming a trench gate in a method for manufacturing a trench power device provided in an embodiment of the present application at a position AA';

[0054] Figure 24 A schematic cross-sectional view of a structure obtained after forming a trench gate in a method for manufacturing a trench power device provided in an embodiment of the present application at a position BB';

[0055] Figure 25 A schematic cross-sectional view of a structure obtained after forming an interlayer dielectric in the method for manufacturing a trench power device provided in an embodiment of the present application at a position AA';

[0056] Figure 26 This is a schematic cross-sectional view of the structure obtained after forming an interlayer dielectric in the manufacturing method of the trench power device provided in an embodiment of the present application at the BB' portion.

[0057] Description of reference numerals:

[0058] 10-semiconductor layer, 11-substrate, 12-buffer layer, 13-first epitaxial layer, 14-second epitaxial layer; 20-shielding grounding unit, 21-shielding area, 211-first shielding area, 212-second shielding area, 22-grounding area; 30-cellular functional area, 31-trench gate, 311-trench, 312-gate dielectric, 313-gate electrode, 32-well region, 32a-initial well region, 32b-intermediate well region, 33-source region, 34-contact region; 40-interlayer dielectric; 50-source metal; 60-drain metal; X-second direction, Y-first direction; S1~S3-steps. DETAILED DESCRIPTION

[0059] The following describes the embodiments of the present application through specific examples. Those skilled in the art will readily understand the other advantages and benefits of the present application from the disclosure herein. The present application may also be implemented or applied through various other specific embodiments, and the details in this specification may be modified or altered based on different viewpoints and applications without departing from the spirit of the present application.

[0060] See also Figures 1 to 26 It should be noted that the diagrams provided in this embodiment are only for schematically illustrating the basic concept of the present application. Therefore, the diagrams only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed at will, and the component layout may also be more complex.

[0061] In response to the problem mentioned in the background technology that the bottom gate dielectric layer of the trench gate is prone to electric field concentration, making it difficult to ensure the reliability of the device. In the related art, an electric field shielding region is formed in the epitaxial layer below the trench gate, and the conductivity type of the electric field shielding region is different from the conductivity type of the epitaxial layer. The electric field strength in the bottom gate dielectric layer of the trench gate is reduced by the electric field shielding region to improve the reliability of the power device. For example, a floating electric field shielding region is formed only in the area below the trench gate, and because the floating electric field shielding region is not grounded, the electric field shielding effect on the bottom of the trench gate is relatively poor. Alternatively, in order to achieve the grounding of the electric field shielding region, after the electric field shielding region is formed in the area below the trench gate, a groove is etched to form, and an electrode is set at the bottom of the groove to achieve the grounding connection of the electric field shielding region. This method has a high process complexity and is not conducive to practical application. Alternatively, after forming an electric field shielding region in the area below the trench gate, the electric field shielding region is connected to the well region above to achieve the purpose of grounding. However, since the electric field shielding region covers the bottom of the trench gate, the local area of ​​the well region above the electric field shielding region cannot form an electron channel, resulting in the inability to open the channel, which significantly reduces the channel density of the device.

[0062] The present invention provides a trench power device (hereinafter referred to as "power device"), see Figures 1 to 6 ,in, Figure 1 shows a first structural schematic diagram of the power device, Figure 2 shows a second structural schematic diagram of the power device, Figures 3 to 6 Shown Figure 1 and Figure 2 The power device includes a semiconductor layer 10, a cell functional area 30, a shielding structure (not labeled) and a grounding structure (not labeled).

[0063] Specifically, if Figures 3 to 6 As shown, the cellular functional region 30 is located in the semiconductor layer 10, and the cellular functional region 30 includes a plurality of trench gates 31. The trench gates 31 extend along a first direction Y (i.e., the length direction of the trench gates 31 is the first direction Y). The shielding structure is located in the semiconductor layer 10, and the shielding structure includes at least one shielding region 21. The shielding region 21 extends below the plurality of trench gates 31 and extends along a second direction X. The second direction X intersects the first direction Y, for example, the second direction X intersects the first direction Y at right angles. The grounding structure is located in the semiconductor layer 10, and the grounding structure includes at least one grounding area 22, and the grounding area 22 is grounded; wherein, the shielding area 21 is electrically connected to at least one of the grounding areas 22 to form a shielding grounding unit 20 (that is, each of the shielding grounding units 20 may include one or more grounding areas 22), and the conductive type of the shielding grounding unit 20 is different from the conductive type of the semiconductor layer 10, that is, the shielding area 21 is different from the conductive type of the semiconductor layer 10, and the grounding area 22 is different from the conductive type of the semiconductor layer 10.

[0064] It should be noted that, in terms of positional relationship, the shielding region 21 extending beneath the plurality of trench gates 31 includes the following two situations: the shielding region 21 directly contacts (can be in direct contact with, or cover) the bottoms of the plurality of trench gates 31, and the shielding region 21 does not directly contact the bottoms of the plurality of trench gates 31. In terms of quantity, the shielding region 21 extending beneath the plurality of trench gates 31 includes the following two situations: the shielding region 21 extends beneath a portion of the trench gates 31 included in the cellular functional area 30, and the shielding region 21 extends beneath all of the trench gates 31 included in the cellular functional area 30. Furthermore, in the embodiment of the present application, the first direction X and the second direction Y are perpendicularly intersected for illustration. In actual application, the first direction X and the second direction Y may be non-perpendicular, for example, forming an angle of 30° or 45° between the first direction X and the second direction Y.

[0065] In an embodiment of the present application, a shielding structure and a grounding structure are provided in the semiconductor layer 10. The shielding structure includes at least one shielding region 21, and the grounding structure includes at least one grounding region 31. The shielding region 21 extends below multiple trench gates 31, and the shielding region 21 is electrically connected to the at least one grounding region 31 to form a shielded grounding unit. Because the conductivity type of the shielded grounding unit 20 is different from that of the semiconductor layer 10, during the reverse blocking period of the power device, the electric field at the bottom of the trench gate 31 is reduced by expanding the electric field of the PN junction formed between the shielded grounding unit 20 and the semiconductor layer 10, thereby avoiding the problem of electric field concentration at the bottom of the trench gate 31 and causing device reliability issues, thereby improving the long-term reliability of the power device. In addition, in order to ensure that the shielded grounding unit 20 provides good electric field protection for the trench gate 31, the shielded grounding unit 20 needs to be grounded. However, a channel cannot be formed at the corresponding position of the shielded grounding unit 20 in the area corresponding to the shielding connection. Therefore, in the embodiment of the present application, the shielding region 21 is electrically connected to at least one grounding region 22 based on the grounding structure to form a shielding grounding unit. The shielding region 21 provides shielding protection for the trench gate 31, and the grounding region 22 provides grounding for the shielding region 21. While improving the shielding protection effect of the shielding region 21 on the trench gate 31, the shielding grounding unit 20 can avoid the area used for grounding connection being too large and causing excessive channel loss, thereby improving the reliability of the power device while ensuring the channel density of the power device.

[0066] For optional embodiments, see Figure 7 , Figure 7 Shown Figure 1 and Figure 2Schematic diagram of the structure of the shielding grounding unit, the shielding area 21 includes multiple first shielding areas 211 and multiple second shielding areas 212. In the second direction Y, multiple first shielding areas 211 are alternately connected with multiple second shielding areas 212, and the width a of the first shielding area 211 is greater than the width b of the second shielding area 212.

[0067] In an optional embodiment, as Figures 3 to 6 As shown, the shielding region 21 covers a portion of the bottom of the plurality of trench gates 31, and the bottom corner of at least one trench gate 31 is covered by the first shielding region 211. Compared to a structure in which the shielding region 21 is only located below the trench gate 31, or the shielding region 21 just contacts the bottom of the trench gate 31, the shielding region 21 covers a portion of the bottom of the trench gate 31, thereby providing more effective protection for the bottom of the trench gate 31, and in particular, better improving the electric field concentration effect at the bottom corner of the trench gate 31.

[0068] For optional embodiments, see Figures 8 to 13 , respectively showing the third to eighth structural schematic diagrams of the power device, the shape of the first shielding area 211 includes a square (such as Figure 1 and Figure 2 As shown), polygons (e.g., Figure 8 and Figure 9 The hexagon shown, Figure 10 and Figure 11 Octagon as shown), circle (as Figure 12 and Figure 13 The second shielding area 212 may be shaped as a rectangle (e.g., a narrow strip). Of course, without regard to manufacturing difficulty and yield, in other embodiments, the shape of the first shielding area 211 may also be irregular. In the embodiment of the present application, the first shielding area 211 is designed to have a regular morphology to facilitate ensuring the consistency of the power device structure.

[0069] In an optional embodiment, as Figure 1 、 Figure 2 、 Figures 8 to 13 As shown, the trench power device includes a plurality of shielding grounding units 20, which are sequentially arranged in a first direction X. When the first direction X and the second direction Y intersect perpendicularly, the arrangement direction of the plurality of shielding grounding units 20 is parallel to the (extended) length direction of the trench gate 31, and the extension direction of the shielding region 21 is parallel to the width direction of the trench gate 31.

[0070] In an optional embodiment, the arrangement of the plurality of shielding areas 21 includes the following two ways:

[0071] Method 1: In the first direction X, any two adjacent shielding areas 21 are aligned. Alignment means that the multiple first shielding areas 211 in the two shielding areas 21 correspond to each other, and the multiple second shielding areas 212 in the two shielding areas 21 correspond to each other. Figure 1 、 Figure 8 、 Figure 10 and Figure 11 When the grounding areas 22 in any two adjacent shielding grounding units 20 are also aligned, any two shielding grounding units 20 are also aligned.

[0072] Mode 2: In the first direction X, any two adjacent shielding areas 21 are staggered. Staggered arrangement means that the first shielding areas 211 and the second shielding areas 212 in the two shielding areas 21 correspond to each other one by one, such as Figure 2 、 Figure 9 、 Figure 11 and Figure 13 shown.

[0073] In the embodiment of the present application, when the cell pitch is small, the distance between any two adjacent shielding regions 21 is also small, and the two arrangements described above provide similar shielding protection effects on the bottom of the trench gate 31. Furthermore, since the current path in the semiconductor layer 10 is wider when multiple shielding regions 21 are arranged using the first arrangement than in the second arrangement, the forward conduction performance of the power device is better when multiple shielding regions 21 are arranged using the first arrangement.

[0074] In an optional embodiment, when the first direction X and the second direction Y intersect perpendicularly, the length d of the first shielding area 211 is greater than the length e of the second shielding area 212, such as Figure 7 That is, on the plane where the second direction Y and the first direction X lie, the area of ​​the second shielding region 212 is smaller than the area of ​​the first shielding region 211, so that the area of ​​the shielding region 21 that provides shielding protection for the trench gate 31 (i.e., the first shielding region 211) accounts for a larger proportion, thereby ensuring the shielding effect while helping to improve the conduction performance of the power device.

[0075] In an optional embodiment, the trench gate 31 includes a trench 311, and the width a of the first shielding region 211 is greater than the width of the trench 311, and / or the width a of the first shielding region 211 is greater than the distance between two adjacent trenches 311. When the width of the first shielding region 211 is greater than the width of the trench 311, the first shielding region 211 can provide good shielding protection for the bottom of the trench 311 (especially the bottom corner).

[0076] In an optional embodiment, the difference between the width of the first shielding region 211 and the width of the trench 311 ranges from 0.1 μm to 0.5 μm (inclusive). For example, the width of the first shielding region 211 is 0.2 μm or 0.4 μm greater than the width of the trench 311. When this difference range is met, the electric field shielding effect of the first shielding region 211 on the trench gate 31 can be ensured, while preventing the first shielding region 211 from occupying excessive current channel area, thereby maintaining good operating performance of the power device.

[0077] Further, if Figure 1 、 Figure 8 、 Figure 10 and Figure 11 As shown, when any two adjacent shielding regions 21 are aligned, any first shielding region 211 is located below a trench gate 31, and any second shielding region 212 is located between two adjacent trench gates 31. In this case, the electric field shielding protection for the bottom of the trench gate 31 is mainly provided by the first shielding region 211, and the second shielding region 212 mainly serves to connect the two adjacent first shielding regions 211.

[0078] Further, if Figure 2 、 Figure 9 、 Figure 11 and Figure 13 As shown, when any two adjacent shielding regions 21 are staggered, a portion of the first shielding region 211 in the shielding region 21 is located below a trench gate 31, and another portion of the first shielding region 211 in the shielding region 21 extends from between two adjacent trenches 311 to below the bottom corners of the two adjacent trenches 311 facing each other. In this case, the electric field shielding protection of the bottom corners of a portion of the trench gates 31 in the cellular functional area is mainly provided by the first shielding region 211, and the electric field shielding protection of the bottom areas of these trench gates 31 other than the corners is mainly provided by the second shielding region 212.

[0079] In the embodiment of the present application, since the width and length of the first shielding region 211 are both greater than those of the second shielding region 212, and the electric field concentration at the corners of the bottom region of the trench gate 31 is higher than in other regions, the use of the larger first shielding region 211 to provide electric field shielding protection for the corner regions helps to ensure the overall effectiveness of electric field shielding protection and guarantee the reliability of the power device. Based on this perspective, the width of the first shielding region 211 also needs to be greater than the distance between two adjacent trenches 311.

[0080] In an optional embodiment, each shielding area 21 is electrically connected to multiple grounding areas 31. In the same shielding grounding unit 20, multiple grounding areas 22 of the grounding structure are arranged in the second direction Y, and a predetermined distance exists between any two adjacent grounding areas 22. The grounding areas 22 are electrically connected to the first shielding area 211, and / or the grounding areas 22 are electrically connected to the second shielding area 212.

[0081] It should be noted that, although the drawings provided in the embodiments of the present application illustrate that the grounding region 22 is electrically connected only to the first shielding region 211, in actual application, the grounding region 22 may also be electrically connected only to the second shielding region 212, or electrically connected to both the first shielding region 211 and the second shielding region 212. In addition, in the case where the grounding region 22 is electrically connected only to the first shielding region 211, and each of the first shielding regions 211 is located below one of the trench gates 31, as shown in FIG. Figure 7 As shown, the width c of the grounding area 22 is greater than the width a of the first shielding area 211, thereby avoiding the loss of most of the structure of the grounding area 22 during the etching process to form the groove 311, which affects the effective electrical connection area and effect between the grounding area 22 and the first shielding area 211.

[0082] In an optional embodiment, as Figure 1 As shown, the ratio of the distance f between any two adjacent grounding regions 22 to the cell width g of the power device ranges from 2 to 6 (inclusive), for example, 3, 4, and 5. The cell width g of the power device is the distance between the same sides of any two adjacent trenches 311 (i.e., the cell pitch). In other words, a grounding region 22 is provided every predetermined number of cells to achieve grounding of the shielding region 21.

[0083] In the embodiment of the present application, the relative number of grounding regions 22 is limited by the ratio range between the distance f between any two adjacent grounding regions 22 and the cell width g of the power device. On the one hand, this prevents the same shielding grounding unit 20 (or even the power device) from including too many grounding regions 22, which would reduce the channel density of the power device and affect the operating performance of the power device. On the other hand, it also avoids the number of grounding regions 22 being too small, which would affect the grounding effect of the shielding region 21 farther from the grounding region 22 due to the inherent material resistance, thereby affecting the overall shielding effect of the shielding grounding unit 20.

[0084] In an optional embodiment, the doping concentration range of the first shielding region 211 is 1e16 cm -3 ~1e20cm-3 (including the endpoint value), the doping concentration range of the second shielding area 212 is 1e16 cm -3 ~1e20cm -3 (including endpoint values). For example, the doping concentration of the first shielding region 211 can be 1e17 cm -3 、1e18cm -3 or 1e19 cm -3 The doping concentration of the second shielding region 212 may be 5e16 cm -3 、5e17cm -3 or 5e18cm -3 .

[0085] In an optional embodiment, the doping depth range of the first shielding area 211 is 0.1μm to 1μm (including endpoint values), and the doping depth range of the second shielding area 212 is 0.1μm to 1μm (including endpoint values). For example, the doping depth of the first shielding area 211 can be 0.3μm, 0.5μm or 0.8μm, and the doping depth of the second shielding area 212 can be 0.2μm, 0.4μm or 0.6μm. The doping concentration of the first shielding area 211 can be the same as or different from the doping concentration of the second shielding area 212, and the doping depth of the first shielding area 211 can be the same as or different from the doping depth of the second shielding area 212. For example, the doping concentration and doping depth of the two are the same and can be formed based on the same step, which is conducive to saving process steps and reducing costs.

[0086] In an optional embodiment, the power device further includes a source metal 50, the source metal 50 being located above the semiconductor layer 10, and the grounding region 22 being electrically connected to the source metal 50 to ground the shielding region 21. Of course, in other embodiments, other methods may be selected to achieve the grounding connection of the grounding region 22.

[0087] In an optional embodiment, the cell functional region 30 further includes a plurality of well regions 32, any two adjacent well regions 32 are separated by the trench gate 31, the conductivity type of the well regions 32 is different from the conductivity type of the semiconductor layer 10, and the ground region 22 is electrically connected to the source metal 50 based on the well regions 32. Of course, in other embodiments, other suitable methods can also be used to achieve the electrical connection between the ground region 22 and the source metal 50.

[0088] In an optional embodiment, the cell functional region 30 further includes a plurality of source regions 33, wherein the source regions 33 are located in the well region 32 and are adjacent to the trench gate 31, so as to form a conductive channel in the region where the well region 32 is located below the source regions 33. The conductivity type of the source regions 33 is the same as that of the semiconductor layer 10.

[0089] In an optional embodiment, the cellular functional region 30 further includes a plurality of contact regions 34, the contact regions 34 being located in the source region 33. The contact regions 34 are used to improve source contact resistance, and the conductivity type of the source region 33 is the same as the conductivity type of the well region 32. When the cellular functional region 30 includes the contact regions 34, the grounding region 22, the well region 32, the contact regions 34, and the source metal 50 are electrically connected in sequence to implement a grounding configuration for the shielding grounding unit 20.

[0090] In an optional embodiment, the semiconductor layer 10 includes a stacked first epitaxial layer 13 and a second epitaxial layer 14, the shielding area 21 is located in the first epitaxial layer 13, the grounding area 22 and the second conductive type well area 32 are both located in the second epitaxial layer 14, and the doping concentration of the second epitaxial layer 14 is greater than or equal to the doping concentration of the first epitaxial layer 13.

[0091] In the embodiment of the present application, since the distance between any two adjacent shielding areas 21 is small, it will affect the current conduction capability of the power device to a certain extent. Setting the doping concentration of the second epitaxial layer 14 to be higher than the doping concentration of the first epitaxial layer 13 can improve the current conduction capability to compensate for the negative impact of the setting and structure of the shielding area 21 on the performance of the power device, thereby ensuring the comprehensive current conduction capability of the power device.

[0092] In an optional embodiment, the thickness of the second epitaxial layer 14 is in the range of 1 μm to 3 μm (including the end values). For example, the thickness of the second epitaxial layer 14 can be 1.5 μm, 2 μm or 2.5 μm.

[0093] In an optional embodiment, the trench gate 31 further includes a gate dielectric 312 and a gate electrode 313. The gate dielectric 312 at least covers the inner wall of the trench 311, and the gate electrode 313 fills the interior of the trench 311 and is located above the gate dielectric 312. The material of the gate dielectric 312 includes silicon oxide, and the material of the gate electrode 313 includes polysilicon.

[0094] In an optional embodiment, the etching depth of the groove 311 ranges from 1 μm to 3 μm (including endpoint values). For example, the thickness of the second epitaxial layer 14 may be 1.5 μm, 2 μm or 2.5 μm. The etching width of the groove 311 ranges from 0.1 μm to 5 μm (including endpoint values). For example, the etching width of the groove 311 may be 1 μm, 2 μm or 4 μm. In the case where the shielding region 21 covers a portion of the bottom of the trench gate 311, the etching depth of the trench 311 is set based on the thickness of the second epitaxial layer 14 to ensure that after the gate dielectric 312 is formed based on the oxidation of the inner wall of the trench 311, the bottom of the gate dielectric 312 is embedded in the shielding region 21 so as to be covered by the shielding region 21.

[0095] In an optional embodiment, the semiconductor layer 10 further includes a substrate 11 and a buffer layer 12, wherein the buffer layer 12 is located between the substrate 11 and the first epitaxial layer 13, and the doping concentration of the buffer layer 12 is lower than that of the substrate 11 (i.e., the substrate 11 is a medium-doped substrate, and the buffer layer 12 is a lightly doped buffer layer). The material of the substrate 11 and the buffer layer 12 includes silicon carbide, that is, the power device provided in the embodiment of the present application is a trench-type silicon carbide power device. The embodiment of the present application uses the semiconductor layer 10 including the buffer layer 12 as an example for illustration. When applied, whether to set the buffer layer 12 is selected based on actual needs.

[0096] In an optional embodiment, the power device further includes a drain metal 60 , and the drain metal 60 is located below the semiconductor layer 10 .

[0097] In an optional embodiment, the conductivity types of the semiconductor layer 10 and the source region 33 are both N-type, and the conductivity types of the shielding grounding unit 20, the well region 32 and the contact region 34 are all P-type; or, the conductivity types of the semiconductor layer 10 and the source region 33 are both P-type, and the conductivity types of the shielding grounding unit 20, the well region 32 and the contact region 34 are all N-type.

[0098] The trench power device provided in an embodiment of the present application comprises a semiconductor layer, a cellular functional region, a shielding structure, and a grounding structure. The shielding structure includes at least one shielding region, and the grounding structure includes at least one grounding region. The shielding region extends below multiple trench gates, the grounding region is grounded, and the shielding region is electrically connected to at least one grounding region to form a shielded grounding unit. For each shielded grounding unit, since the shielding region extends below multiple trench gates in the cellular functional region, the electric field concentration at the bottom of the multiple trench gates can be reduced, thereby improving the reliability of the power device. Furthermore, each shielding region is electrically connected to at least one grounding region, enabling grounding of the shielding region and further enhancing the shielding protection effect. Furthermore, when the shielded grounding unit includes multiple grounding regions, a predetermined distance is maintained between two adjacent grounding regions in the same shielded grounding unit. While ensuring a good grounding effect of the shielding region, the excessive provision of grounding regions can be avoided, thereby preventing the trench density of the power device from being affected, thereby improving the conduction capability of the power device. In addition, the shielding region is structured so that it includes multiple alternating first and second shielding regions, with the width (or length) of the first shielding region being greater than the width (or length) of the second shielding region. The first shielding region at least covers the bottom corners of the trench gate. Through the above-mentioned structural and dimensional design, the area of ​​the shielding region primarily used to provide electric field shielding for the trench gate (i.e., the first shielding region) accounts for a larger proportion, while the area of ​​the second shielding region primarily used to connect the multiple first shielding regions accounts for a smaller proportion, further improving the device's conductive performance. Furthermore, the overall structure is simple, flexible, and diverse, making it suitable for practical applications.

[0099] The present application also provides a method for manufacturing a trench power device, which can be used to manufacture the above-mentioned trench power device and other suitable semiconductor devices. Figure 14 , Figure 14 The manufacturing method comprises the following steps:

[0100] S1: forming a semiconductor layer;

[0101] S2: forming a shielding structure in the semiconductor layer, wherein the shielding structure includes at least one shielding region;

[0102] S3: forming a grounding structure in the semiconductor layer, the grounding structure comprising at least one grounding region, the grounding region being grounded, wherein at least one grounding region is electrically connected to the same shielding region to form a shielding grounding unit, and the shielding grounding unit has a conductivity type different from that of the semiconductor layer;

[0103] S4: forming a cellular functional region in the semiconductor layer, the cellular functional region including a plurality of trench gates, the trench gates extending along a first direction, the shielding region passing under the plurality of trench gates and extending along a second direction, the second direction intersecting the first direction.

[0104] First, see Figures 15 to 19 , performing steps S1 to S3 to form a semiconductor layer 10. A shielding structure and a grounding structure are formed in the semiconductor layer 10, wherein the shielding structure includes at least one shielding region 21, and the grounding structure includes at least one grounding region 22. The grounding region 22 is grounded, wherein at least one grounding region 22 is electrically connected to the same shielding region 21 to form a shielding grounding unit 20, and the shielding grounding unit 20 has a conductivity type different from that of the semiconductor layer 10.

[0105] In an optional embodiment, forming the semiconductor layer 10 and forming a shielding structure and a grounding structure in the semiconductor layer 10 includes the following steps:

[0106] like Figure 15 As shown, a substrate 11 is provided, and a buffer layer 12 and a first epitaxial layer 13 are sequentially formed on the substrate 11 .

[0107] like Figure 16 As shown, a shielding structure is formed in the first epitaxial layer 13, the shielding structure includes at least one shielding region 21, and the conductivity type of the shielding structure (the shielding region 21) is different from the conductivity type of the first epitaxial layer 13;

[0108] like Figure 17 and Figure 18 As shown, a second epitaxial layer 14 is formed on the first epitaxial layer 13 after the shielding structure is formed, and the substrate 11 to the second epitaxial layer 14 constitute the semiconductor layer 10;

[0109] like Figure 19 As shown, a grounding structure is formed in the second epitaxial layer 14, and the grounding structure includes at least one grounding area 22, and the grounding area 22 is grounded. The conductivity type of the grounding structure (the grounding area 22) is different from the conductivity type of the second epitaxial layer 13, and at least one of the grounding areas 22 is electrically connected to the same shielding area 21 to form a shielding grounding unit 20, and the conductivity type of the shielding grounding unit 20 is different from the conductivity type of the semiconductor layer 10.

[0110] In an optional embodiment, the shielding region 21 includes a plurality of first shielding regions 211 and a plurality of second shielding regions 212. In the first direction X, the plurality of first shielding regions 211 and the plurality of second shielding regions 212 are alternately connected. The first shielding regions 211 and the second shielding regions 212 can be manufactured simultaneously or in steps. The shielding structure (the shielding region 21) is formed by ion implantation.

[0111] Next, see Figures 19 to 26 , perform step S4 to form a cellular functional region 30 in the semiconductor layer 10, wherein the cellular functional region 30 includes a plurality of trench gates 31, and the shielding region 21 extends under the plurality of trench gates 31 (that is, the plurality of trench gates 31 are located above one shielding region 21).

[0112] In an optional embodiment, the cellular functional region further includes a well region 32, a source region 33, and a contact region 34. Forming the cellular functional region 30 in the semiconductor layer 10 includes the following steps:

[0113] like Figure 19 and Figure 20 As shown, an initial well region 32 is formed in the semiconductor layer 10 , and the initial well region 32 is electrically connected to the ground region 22 ;

[0114] like Figure 21 and Figure 22 As shown, a plurality of initial source regions 33 and a plurality of contact regions 34 are formed in the initial well region 32 , and the portion of the initial well region 32 that remains after the initial source regions 33 and the contact regions 34 are formed constitutes an intermediate well region 32 ;

[0115] like Figure 23 and Figure 24 As shown, multiple trench gates 31 are formed in the semiconductor layer 10. Each of the trench gates 31 at least penetrates the structural layer where the initial source region 33 and the intermediate well region 32 are located. When the shielding region 21 also includes a portion of the bottom of the multiple trench gates 31, the trench gates 31 also extend into the shielding region 21, so that at least a portion of the bottom of the multiple trench gates 31 is located in the shielding region 21. Any trench gate 31 separates one of the initial source regions 33 into the source region 33 and separates the intermediate well region 32 into the well region 32. The well region 32, the source region 33, the trench gate 31, and the contact region 34 constitute a cell functional region 30. After forming the trench 311 of the trench gate 31, a sacrificial oxidation step is also included to improve the thermal oxidation quality of the inner wall of the trench 311. This prevents the roughness of the inner wall of the trench and the residual etching ions after the trench etching from affecting the quality of the gate dielectric layer 312 formed by the thermal oxidation.

[0116] In an optional embodiment, the manufacturing method further includes the steps of forming an interlayer dielectric 40, a source metal 50 and a drain metal 60, such as Figures 3 to 6 As shown, a dielectric layer is formed above the semiconductor layer 10; the dielectric layer is etched to form an interlayer dielectric 40 and a source contact hole located in the interlayer dielectric 40. The interlayer dielectric 40 at least covers the trench gate 31, and the source contact hole at least exposes a portion of the source region 33 and the contact region 34. A source metal 50 is formed on the interlayer dielectric 40 and is filled into the source contact hole to electrically connect to the source region 33 and the contact region 34. The grounding region 22 is electrically connected to the source metal 50 via the well region 32 and the contact region 34 to achieve grounding.

[0117] The method for manufacturing a trench power device provided in the embodiment of the present application can produce a trench power device with improved reliability, improved conduction performance, and flexible and diverse structures. The process steps are simple and high-quality, large-scale production can be easily achieved.

[0118] In summary, the trench-type power device of the present application comprises a semiconductor layer, a cellular functional region, a shielding structure, and a grounding structure. The shielding structure includes at least one shielding region, and the grounding structure includes at least one grounding region. The shielding region extends beneath multiple trench gates, the grounding region is grounded, and the shielding region is electrically connected to at least one grounding region to form a shielded grounding unit. For each shielded grounding unit, since the shielding region extends beneath multiple trench gates in the cellular functional region, the electric field concentration at the bottom of the multiple trench gates can be reduced, thereby improving the reliability of the power device. Furthermore, each shielding region is electrically connected to at least one grounding region, enabling grounding of the shielding region and further enhancing the shielding protection effect. Furthermore, when the shielded grounding unit includes multiple grounding regions, a predetermined distance is maintained between two adjacent grounding regions in the same shielded grounding unit. While ensuring a good grounding effect for the shielding region, the excessive number of grounding regions is avoided, which may affect the trench density of the power device and improve the conduction capability of the power device. In addition, the structure of the shielding area is set, that is, the shielding area includes a plurality of first shielding areas and second shielding areas that are alternately connected, and the width (or length) of the first shielding area is greater than the width (or length) of the second shielding area, and the first shielding area at least covers the bottom corner of the trench gate. Through the above-mentioned structure and size design, the area of ​​the area in the shielding area mainly used to provide an electric field shielding effect for the trench gate (i.e., the first shielding area) accounts for a larger proportion, while the area of ​​the second shielding area mainly used to connect multiple first shielding areas accounts for a smaller proportion, thereby further improving the conduction performance of the device. Moreover, the overall structure is simple, flexible and diversified, and suitable for practical applications. The method for manufacturing a trench-type power device of the present application can produce a trench-type power device with improved reliability, improved conduction performance, and flexible and diversified structure. The process steps are simple and easy to achieve high-quality, large-scale production. Therefore, the present application effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0119] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Anyone skilled in the art may modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by one of ordinary skill in the art without departing from the spirit and technical concepts disclosed in this application shall be covered by the claims of this application.

Claims

1. A trench power device, characterized in that: include: Semiconductor layer; A cellular functional region is located in the semiconductor layer, wherein the cellular functional region includes a plurality of trench gates extending along a first direction; A shielding structure, located in the semiconductor layer, the shielding structure comprising at least one shielding region, the shielding region passes under the plurality of trench gates and extends along a second direction, the second direction intersecting the first direction; A grounding structure is located in the semiconductor layer, and the grounding structure includes at least one grounding area, and the grounding area is grounded; wherein at least one of the grounding areas is electrically connected to the same shielding area to form a shielding grounding unit, and the conductivity type of the shielding grounding unit is different from the conductivity type of the semiconductor layer.

2. The trench power device according to claim 1, characterized in that: The shielding region includes a plurality of first shielding areas and a plurality of second shielding areas, and in the second direction, the plurality of first shielding areas are alternately connected with the plurality of second shielding areas, and the width of the first shielding area is greater than the width of the second shielding area.

3. The trench power device according to claim 2, characterized in that: The trench power device comprises a plurality of the shielding grounding units, and the plurality of the shielding grounding units are arranged in sequence in the first direction; wherein any two adjacent shielding areas are aligned, or any two adjacent shielding areas are staggered.

4. The trench power device according to claim 3, characterized in that: The trench gate comprises a trench, and the width of the first shielding region is greater than the width of the trench; wherein, When any two adjacent shielding regions are aligned, any first shielding region is located below one of the trench gates, and any second shielding region is located between two adjacent trench gates; When any two adjacent shielding regions are staggered, a portion of the first shielding regions in the shielding regions is located below the trench gate, and another portion of the first shielding regions in the shielding regions extends from between two adjacent trenches to below the bottom corners of the two adjacent trenches facing each other.

5. The trench power device according to claim 2, characterized in that: Each of the shielding areas is electrically connected to a plurality of the grounding areas; In the same shielding grounding unit: a plurality of the grounding areas are arranged in the second direction, and there is a preset distance between any two adjacent grounding areas; The grounding area is electrically connected to the first shielding area, and / or the grounding area is electrically connected to the second shielding area.

6. The trench power device according to claim 2, characterized in that: The doping concentration range of the first shielding region is 1e16 cm -3 ~1e20cm -3 , the doping concentration range of the second shielding region is 1e16 cm -3 ~1e20cm -3 ; The doping depth range of the first shielding region is 0.1μm to 1μm, and the doping depth range of the second shielding region is 0.1μm to 1μm.

7. The trench power device according to claim 2, characterized in that: The shielding region also covers a portion of the bottoms of the plurality of trench gates, and a bottom corner of at least one trench gate is covered by the first shielding region.

8. The trench power device according to claim 1, characterized in that: The trench power device further includes a source metal, the source metal is located above the semiconductor layer, and the grounding region is electrically connected to the source metal so that the grounding region is grounded.

9. The trench power device according to claim 8, characterized in that: The cell functional area also includes a plurality of well regions, any two adjacent well regions are separated by the trench gate, the conductivity type of the well region is different from the conductivity type of the semiconductor layer, and the grounding region is electrically connected to the source metal based on the well region.

10. A method for manufacturing a trench power device, characterized in that: The following steps are involved: forming a semiconductor layer; forming a shielding structure in the semiconductor layer, the shielding structure comprising at least one shielding region; forming a grounding structure in the semiconductor layer, the grounding structure comprising at least one grounding region, the grounding region being grounded, wherein at least one of the grounding regions is electrically connected to the same shielding region to form a shielding grounding unit, and the conductivity type of the shielding grounding unit is different from the conductivity type of the semiconductor layer; A cellular functional area is formed in the semiconductor layer, the cellular functional area includes a plurality of trench gates, the trench gates extend along a first direction, the shielding area passes under the plurality of trench gates and extends along a second direction, and the second direction intersects with the first direction.

Images