A method and device for detecting flatness of a silicon polished wafer

Abstract

A kind of detection method and detection device for the flatness of silicon polished wafer, the detection method is as follows: point light source is expanded after passing through beam expander mirror and generates reflected light and transmitted light after passing through the spectroscope G1 with half-transmission half-reflection film on one side, the reflected light is vertically incident to plane total reflection mirror M1, the transmitted light is vertically incident to plane total reflection mirror M2 after passing through the compensating mirror G2 parallel to the spectroscope G1, M1 and M2 are arranged perpendicularly, the incident light is reflected and returned to the half-transmission half-reflection film of the spectroscope G1 again, after transmission and reflection, the reference interference fringe image is presented at the imaging area F through focusing lens L2;Plane total reflection mirror M2 is replaced by the silicon wafer to be measured, the position of plane total reflection mirror M1 is adjusted, and the interference fringe image of the silicon wafer to be measured is presented at the imaging area F;The flatness parameters of the silicon polished wafer to be measured are obtained by computer processing and calculation of the above image.The method has the characteristics of non-contact and good automation degree, and has very considerable development prospect.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of micro displacement measurement, in particular to a detection method and device for measuring the flatness of silicon polished wafer based on the principle of Moire fringe. BACKGROUND

[0002] It is known that in the field of semiconductor, silicon wafer as the basic component of various components plays a vital role. And for the processed silicon polished wafer, the flatness of the surface directly affects the yield and energy efficiency of the components. In the past silicon polishing process, most people use high-power microscope for local detection, and use strong light to check the scratches and pitting on the surface of the silicon wafer, but such operation is not only slow and low in accuracy, but also difficult to realize automation, therefore, in the large-scale development of integrated circuits today, a better detection technology with high detection accuracy is needed to be designed for the detection process of the flatness of silicon polished wafer. SUMMARY

[0003] The present application aims to provide a detection method and device for the flatness of silicon polished wafer.

[0004] The technical scheme adopted by the present application is as follows: a detection method for the flatness of silicon polished wafer, the steps are as follows:

[0005] S1, the light beam emitted by the point light source S is expanded by the beam expander L1, then the reflected light and the transmitted light are generated by the light splitter G1 with half-transmission and half-reflection film on one side, the reflected light is perpendicular to the plane total reflection mirror M1, the transmitted light is perpendicular to the plane total reflection mirror M2 after passing through the compensation mirror G2 parallel to the light splitter G1, the mutually perpendicular M1 and M2 reflect the incident light and return to the half-transmission and half-reflection film of the light splitter G1 again, then the reference interference fringe image is presented at the imaging area F through the focusing lens L2 after transmission and reflection, and the image is stored for standby;

[0006] S2, the plane total reflection mirror M2 is replaced by the silicon polished wafer to be measured, then the position of the plane total reflection mirror M1 is adjusted by the displacement adjusting mechanism, so that the interference fringe image of the silicon wafer to be measured is presented at the imaging area F, and the image is stored for standby;

[0007] S3, the reference interference fringe image and the interference fringe image of the silicon wafer to be measured obtained in the above steps are input into the computer, the computer performs gray scale processing on the two images respectively, and forms Moire fringe after superposition and rotation operation, then the gray scale matrix of the gray scale image is formed by gray scale calculation, and the flatness parameter of the silicon polished wafer to be measured is obtained by computer processing.

[0008] As a preferred solution, in step S1, the two beams of light participating in interference are made to pass through the beam splitter the same number of times by setting the compensating mirror G2, so that no additional optical path difference is caused by the glass material when reaching the imaging area.

[0009] As a preferred solution, in step S1, the position of the planar total reflection mirror M2 is fixed.

[0010] As a preferred solution, in step S3, the specific process of computer processing is as follows:

[0011] S3.1, the reference interference fringe image and the to-be-measured silicon wafer interference fringe image are acquired by a CCD camera respectively and input to a computer, and a software is used to perform uniform processing of brightness saturation to increase the distinguishability of the picture, and the unit cell value of the dark area in the generated gray scale matrix is within 10 and has a very obvious fault boundary with the bright area;

[0012] S3.2, the obtained gray scale image is identified for the center and width of the bright fringe, the picture uses vertical fringes as detection samples, and a horizontal gray scale value retrieval method is used to retrieve the position of the fringes, a bright-dark separation value w1 is first introduced, the separation value w1 is about 20-45, the gray scale cells are retrieved one by one according to the row, when the gray scale value is greater than the set separation value, the length is recorded by 1, until the brightness is lower than the separation value, the length is recorded, and the position of half of the length is taken as the center point of the fringe and the data is recorded at the same time, then the length variable is cleared and the detection is continued, and so on, until the whole row is retrieved, and the next row is retrieved and the results are recorded in another matrix;

[0013] S3.3, the spacing is collected and unreasonable spacing is filtered out, and a reasonable Moiré fringe gray scale image is obtained;

[0014] S3.4, the fringe spacing generated in the previous step is sorted, the median is selected as the standard spacing, all reasonable spacings are compared with the standard spacing to obtain the difference in level between each other, then the corresponding recessed and protruding depths are calculated, and the maximum value of these depths is taken to obtain the maximum recessed and protruding depth of the plane, and the maximum recessed and protruding depth value is the flatness parameter of the to-be-measured silicon polishing wafer.

[0015] The scheme also comprises a detection device for a detection method for flatness of a silicon polished wafer, which is composed of a point light source S, an expander mirror L1, a compensator G2, a plane total reflection mirror M1, a plane total reflection mirror M2, a focusing lens L2 and a silicon polished wafer to be detected, wherein the plane total reflection mirror M1 is installed on a displacement adjusting mechanism and its position is adjustable, the light beam emitted by the point light source S is expanded by the expander mirror L1 and then produces reflected light and transmitted light after passing through a spectroscope G1 with a half-transmission half-reflection film on one side, the reflected light is perpendicularly incident on the plane total reflection mirror M1, the transmitted light is perpendicularly incident on the plane total reflection mirror M2 after passing through the compensator G2 parallel to the spectroscope G1, the M1 and the M2 are perpendicularly arranged and the incident light is reflected by the M1 and the M2 and then returns to the half-transmission half-reflection film of the spectroscope G1, and after being transmitted and reflected respectively, the light beam passes through the focusing lens L2 and presents a reference interference fringe image at an imaging area F, and during detection, the plane total reflection mirror M2 is replaced by the silicon polished wafer to be detected, and finally an interference fringe image of the silicon wafer to be detected is displayed at the imaging area F.

[0016] As a preferred scheme, the compensators G2 of the spectroscope G1 are of the same shape, and have the same material and the same thickness.

[0017] As a preferred scheme, the spectroscope G1 is coated with a half-transmission half-reflection film on the side close to the plane total reflection mirror M2.

[0018] As a preferred scheme, the displacement adjusting mechanism comprises an outer housing containing the plane total reflection mirror M1, a precision screw and a drum, one end of the precision screw is connected with the plane total reflection mirror M1, the other end passes through the outer housing and is connected with the drum, and the plane total reflection mirror M1 is moved up and down by rotating the drum.

[0019] As a preferred scheme, the detection device further comprises a computer for processing the obtained reference interference fringe image and the interference fringe image of the silicon wafer to be detected and calculating data, and the flatness parameter of the silicon polished wafer to be detected is obtained by processing the computer.

[0020] The present application has the following beneficial effects:

[0021] Based on the defects existing in the prior art, the application provides a detection method for flatness of silicon polishing wafer, which utilizes a simple light path combined with a moire fringe forming principle and assists computer gray scale recognition to detect the flatness of the silicon wafer surface, and the computer gray scale recognition technology is used to read the profile and center position of the bright fringe according to the gray scale, and then the spacing of the normal fringe is divided into 10 equal parts and 100 equal parts which cannot be detected by the naked eye, so that the abnormal point and the surrounding normal point fringe can be compared to 0.1 and 0.01 energy levels, so that the detection accuracy is improved by 10 times or even 100 times compared with the prior art. This method has the characteristics of non-contact, good automation, etc., and has a very promising development prospect in the fields of precision instrument surface flatness detection and nanometer material flatness detection.

[0022] Meanwhile, the detection device has the advantages of simple structure, high detection accuracy, small space occupation, low cost, fast measurement speed and easy automation. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description only some embodiments of the application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0024] Figure 1 The structural schematic diagram of the detection device described in the application;

[0025] Figure 2 The principle schematic diagram of the moire fringe measurement technology in the application;

[0026] Figure 3 The principle schematic diagram of the detection device described in the application;

[0027] Figure 4 The distortion schematic diagram of the interference fringe obtained after replacing the silicon wafer to be detected;

[0028] Figure 5 The interference fringe images obtained by detecting the No. 1 silicon wafer and the No. 2 silicon wafer. DETAILED DESCRIPTION

[0029] In the following, the application will be specifically described through exemplary embodiments. However, it should be understood that the elements, structures and features in one embodiment can also be beneficially combined into other embodiments without further description.

[0030] It should be noted that: unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by persons having ordinary skills in the field to which the invention belongs. The words "one", "an" or "the" and the like used in the patent application specification and claims of the present invention do not express a quantitative limitation, but rather indicate the presence of at least one. Words such as "include" or "comprise" indicate that the elements or objects appearing before "include" or "comprises" include the elements or objects listed after "include" or "comprises" and their equivalents, but do not exclude other elements or objects with the same function.

[0031] In order to more clearly describe the specific detection process of a method for detecting the flatness of a silicon polished wafer and the structural composition of the detection device, the following Figures 1-5 The detailed description is as follows:

[0032] As shown in the figure, a device for detecting the flatness of a silicon polished wafer is shown. Figure 1 As shown, the detection device consists of a point light source S, a beam expander L1, a compensation mirror G2, a plane total reflection mirror M1, a plane total reflection mirror M2, a focusing lens L2 and a silicon polished wafer to be tested, wherein the plane total reflection mirror M1 is installed on a displacement adjustment mechanism and its position is adjustable. The light beam emitted by the point light source S is expanded by the beam expander L1 and passes through a beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light. The reflected light is vertically incident on the plane total reflection mirror M1, and the transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and is vertically incident on the plane total reflection mirror M2. M1 and M2 are arranged perpendicular to each other to reflect the incident light and then return it to the semi-transparent and semi-reflective film of the beam splitter G1. After transmission and reflection, the reference interference fringe image is presented at the imaging area F through the focusing lens L2. During detection, the plane total reflection mirror M2 is replaced with the silicon polished wafer to be tested, and finally the interference fringe image of the silicon wafer to be tested is displayed at the imaging area F.

[0033] In the device, the beam splitter G1 and the compensating mirror G2 have the same shape, the same material and the same thickness.

[0034] In the device, a side of the beam splitter G1 close to the plane total reflection mirror M2 is coated with a semi-transparent and semi-reflective film.

[0035] It should be noted that the displacement adjustment mechanism H in the device is an existing mature technology, and its purpose is to achieve the adjustment of the displacement of the plane total reflection mirror M1. Technicians in this field can select appropriate mechanical components to achieve the above purpose. In this embodiment, the displacement adjustment mechanism H is implemented using the following structure: it includes an outer shell that accommodates the plane total reflection mirror M1, a precision screw and a drum wheel. One end of the precision screw is connected to the plane total reflection mirror M1, and the other end passes through the outer shell and is connected to the drum wheel. The plane total reflection mirror M1 is driven up and down by rotating the drum wheel.

[0036] The detection device also includes a computer for processing the obtained fringe image and calculating data, the fringe image is processed by means of computer gray scale recognition technology, and finally the flatness parameters of the silicon wafer to be measured are obtained, so that the detection of the surface defects of the silicon wafer is realized, and the defects at the position are amplified.

[0037] The principle of the above-mentioned moire fringe measurement technology is as follows:

[0038] The moire fringe is formed by overlapping two groups of line clusters at the intersection position. Since the moire fringe reflects the difference (i.e. beat frequency) between the spatial frequencies of the two groups of line clusters, it has synchronization and amplification effect, and therefore can be used to measure some small changes in angle, phase, etc. With the improvement of optoelectronic technology, the moire fringe measurement technology has developed rapidly and has been widely used in displacement measurement, digital control, etc.

[0039] Two frequency similar fringe cards are shown in Figure 2 (a), one of the fringes is inclined, and then the two cards are slowly overlapped, and smaller fringes are shown in Figure 2 (b);

[0040] According to the principle of right triangle, the grid distance d is equal to the sine value of half of the distance B of the two moire fringes, as shown in Figure 2 (c), when the angle is small, sin(a / 2)≈a / 2. Thus, based on the formula , the distance B between adjacent moire fringes can be obtained.

[0041] According to the above content, it can be known that the moire fringe has the following two properties: first, synchronization: in the case of keeping the intersection angle of the two gratings constant, the other grating is moved along the vertical direction of the grating, and the moire fringe moves one fringe pitch B every time the grating moves one grid distance d; second, amplification: according to the formula, when the intersection angle a of the two gratings is very small, the grid distance is amplified by 1 / a times, and the moire fringe can amplify the small grating displacement synchronously.

[0042] Based on the principle of moire fringe, the reference interference fringe image and the interference fringe image of the silicon wafer to be measured are input into the computer, the computer performs gray scale processing on the two images respectively, and forms a moire fringe gray scale image after superposition and rotation operation, a gray scale matrix of the gray scale image is formed by gray scale calculation, and the detection of the fringe pitch is carried out according to the gray scale value, the specific method is as follows: in order to simplify the workload of the computer, we uniformly use approximate numerical fringes as processing pictures.

[0043] The first step, picture and processing, in the experiment, a CCD camera is used to acquire the reference interference fringe image and the interference fringe image of the silicon wafer to be measured and input to a computer, and the brightness saturation is uniformly processed by using Photoshop software, so as to increase the distinguishability of the picture. The cell value of the dark area in the generated gray matrix is within 10, and the bright area has a very obvious fault line.

[0044] The second step, the obtained gray image is identified for the center and width of the bright fringe. Since the picture uses vertical fringes as the detection sample, the horizontal gray value retrieval method is used to retrieve the position of the fringe. First, a light-dark separation value w1 (i.e. the fault point of the light-dark fringe in the gray scale) is introduced. The selected separation value is about 20 to 45. The core idea of the algorithm for retrieving the center position and the width of the bright fringe is that the gray scale cells are retrieved one by one in the row. When the gray value is greater than the separation value, the length is recorded by 1, until the brightness is lower than the separation value. The length is recorded, and the position of half of the length is taken as the center point of the fringe. The length variable is cleared and the detection is continued. The above process is repeated until the whole row is retrieved. Then the next row is retrieved, and the results are recorded in another matrix.

[0045] The third step, the spacing is collected and the unreasonable spacing is filtered out. The way is still to traverse the row by row, and the position of the center point of the fringe in the same row is subtracted. The obtained should be the spacing of each row of fringes. The average value of all spacings is taken, and a third parameter w3 is set as the range of the reasonable spacing that should exist in theory. (1-w3)*average value<reasonable spacing<(1+w3)*average value is used as the reasonable range of the spacing in theory. The points exceeding the range are identified as abnormal points and filtered out, and the reasonable Moiré fringe gray image is obtained.

[0046] The fourth step, the spacing of the fringe generated in the above step is sorted, the median is selected as the standard spacing, and the difference between all reasonable spacings and the standard spacing is obtained by comparison. Then the corresponding concave and convex depths are calculated, and the maximum value of the depths is taken, so as to obtain the maximum concave and convex depth of the plane. The maximum concave and convex depth value is the flatness parameter of the silicon polishing wafer to be measured.

[0047] Based on the above content, a non-contact, large-scale and high-precision silicon polishing wafer flatness detection method based on the Moiré fringe principle is designed, and the steps are as follows:

[0048] Step one, as Figure 3As shown, the point light source S becomes an extended light source through the beam expander L1, the extended light source generates reflected light and transmitted light through the beam splitter G1 coated with a half-transmission half-reflection film on one side, the reflected light is perpendicularly incident to the plane total reflection mirror M1, the transmitted light is perpendicularly incident to the plane total reflection mirror M2 after passing through the compensating mirror G2 parallel to the beam splitter G1, the mutually perpendicular M1 and M2 reflect the incident light and then return to the half-transmission half-reflection film of the beam splitter G1, and then the images of the reference interference fringes are presented at the imaging area F through the focusing lens L2 after transmission and reflection respectively;

[0049] Step two, replace the plane total reflection mirror M2 with the silicon polishing wafer to be measured, and then adjust the position of the plane total reflection mirror M1 through the displacement adjustment mechanism, so that the interference fringe image of the silicon wafer to be measured is presented at the imaging area F;

[0050] Step three, input the reference interference fringe image and the interference fringe image of the silicon wafer to be measured into the computer, the computer performs gray processing on the two images respectively, and then forms the Moiré fringe through superposition and rotation operation, forms the gray matrix of the gray image through gray calculation, and then obtains the flatness parameter of the silicon polishing wafer to be measured through computer processing.

[0051] In step one of the method, the position of the plane total reflection mirror M2 is fixed.

[0052] In step one of the method, the compensating mirror G2 is arranged to make the two beams of light participating in the interference pass through the beam splitter the same number of times, so that there is no additional optical path difference caused by the glass material when reaching the imaging area; at the same time, when G1 and G2 are strictly parallel, equal inclination interference corresponding to the circular ring fringe is generated.

[0053] In step two of the method, since the surface of the silicon wafer is not flat but has depressions or protrusions, the thickness of the air film formed is no longer uniform, which will cause the interference fringe image to be distorted, as shown in Figure 4 .

[0054] Test example 1:

[0055] Select No. 1 silicon wafer from a batch of processed silicon polishing wafers, calibrate the detection device, place the plane total reflection mirrors M1 and M2 according to the device diagram and adjust them until the reference interference fringes can be observed at the imaging area; then replace the M2 mirror surface with No. 1 silicon wafer, keep the M1 mirror surface unchanged, test and obtain the interference fringe image of the silicon wafer to be measured, as shown in Figure 5 , input the reference interference fringe image and the interference fringe image of the silicon wafer to be measured into the computer, form the Moiré fringe through superposition and rotation operation after gray processing of the reference interference fringe image and the interference fringe image of the silicon wafer to be measured through the computer, and process the data with the aid of the computer, the available data amount is 28782, and the maximum deformation depth is 22.168 nm.

[0056] Test Example 2

[0057] In a batch of processed silicon polishing wafer, No. 2 silicon wafer was selected, the detection device was calibrated, the plane total reflection mirrors Ml, M2 were placed and adjusted according to the device diagram until the reference interference fringes could be observed in the imaging area; the M2 mirror surface was replaced by No. 2 silicon wafer, the test was carried out and the interference fringe image of the silicon wafer to be tested was obtained, as shown in FIG. 2, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested were input into the computer, the reference interference fringe image and the interference fringe image of the silicon wafer to be tested after the gray scale processing by the computer were superimposed and rotated to form the Moire fringes, and the computer was used for auxiliary processing, the available data obtained was 25370, and the maximum deformation depth was 28.957 nm. Figure 5

[0058] The part of the embodiment not described in detail is the prior art.

[0059] It should be noted that although the present application has been described through the above embodiments, the present application can also have other various embodiments. Those skilled in the art can obviously make various corresponding changes and modifications to the present application without departing from the spirit and scope of the present application, but these changes and modifications should all belong to the scope protected by the appended claims and their equivalents of the present application.​

Claims

1. A method for detecting the flatness of a silicon polished wafer, characterized in that: Here are the steps: The light beam emitted by S1 and the point light source S is expanded by the beam expander L1 and then passes through the beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light. The reflected light is vertically incident on the plane total reflection mirror M1. The transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and is vertically incident on the plane total reflection mirror M2. M1 and M2 are arranged perpendicular to each other and reflect the incident light and then return to the semi-transparent and semi-reflective film of the beam splitter G1. After transmission and reflection respectively, it passes through the focusing lens L2 to present a reference interference fringe image at the imaging area F, and the image is stored for future use; S2, replace the plane total reflection mirror M2 with the polished silicon wafer to be tested, and then adjust the position of the plane total reflection mirror M1 through the displacement adjustment mechanism so that an interference fringe image of the silicon wafer to be tested is presented at the imaging area F, and store the image for later use; S3, inputting the reference interference fringe image and the interference fringe image of the silicon wafer to be tested obtained in the above step into a computer, the computer performs grayscale processing on the two images respectively, superimposes and rotates them to form a moiré fringe image, forms a grayscale matrix of the grayscale image by grayscale calculation, and then obtains the flatness parameter of the silicon polished wafer to be tested by computer processing; In step S3, the specific process of computer processing is as follows: S3.

1. Use a CCD camera to capture a baseline interference fringe image and an interference fringe image of the silicon wafer to be tested. These images are then input into a computer. Software is used to uniformly process the brightness and saturation to increase image resolution. The resulting grayscale matrix should have cell values ​​within 10 in the dark areas, clearly distinguishable from the bright areas. S3.

2. Obtain the grayscale image and identify the center and width of the bright stripes. The image uses vertical stripes as test samples, and the position of the stripes is retrieved by horizontal grayscale value retrieval. First, a light and dark separation value w1 is introduced. The separation value w1 is around 20-45. Grayscale cells are searched row by row. When the grayscale value is greater than the set separation value, the length is increased by 1 and recorded. After the brightness is lower than the separation value, the length is recorded, and the position at half the length is used as the center point of the stripe and the data is recorded at the same time. Then the length variable is cleared and the detection is continued. This process is repeated until the entire row is searched. Then the next row is searched and the results are recorded in another matrix. S3.

3. Collect the spacing and filter out unreasonable spacing to obtain a reasonable moiré fringe grayscale image; S3.

4. Sort the stripe spacings generated in the previous step, select the median as the standard spacing, and compare all reasonable spacings with the standard spacing in turn to obtain the difference in order between them. Then calculate the corresponding concave and convex depths, and take the maximum value of these depths to obtain the maximum concave and convex depth of the plane. The maximum concave and convex depth value is the flatness parameter of the silicon polished wafer to be tested.

2. A method for detecting the flatness of a silicon polished wafer according to claim 1, characterized in that: In step S1, the compensation mirror G2 is set to ensure that the two beams of light participating in the interference pass through the beam splitter the same number of times, and no additional optical path difference is caused by the glass material when they reach the imaging area.

3. A method for detecting the flatness of a silicon polished wafer according to claim 1, characterized in that: In step S1 , the position of the plane total reflection mirror M2 is fixed.

4. A detection device for use in a method for detecting the flatness of a silicon polished wafer according to any one of claims 1 to 3, characterized in that: The detection device consists of a point light source S, a beam expander L1, a compensation mirror G2, a plane total reflection mirror M1, a plane total reflection mirror M2, a focusing lens L2 and a polished silicon wafer to be tested, wherein the plane total reflection mirror M1 is installed on a displacement adjustment mechanism and its position is adjustable. The light beam emitted by the point light source S is expanded by the beam expander L1 and then passes through a beam splitter G1 coated with a semi-transparent and semi-reflective film on one side to generate reflected light and transmitted light. The reflected light is vertically incident on the plane total reflection mirror M1, and the transmitted light passes through the compensation mirror G2 parallel to the beam splitter G1 and then is vertically incident on the plane total reflection mirror M2. M1 and M2 are arranged perpendicular to each other to reflect the incident light and then return it to the semi-transparent and semi-reflective film of the beam splitter G1. After transmission and reflection, the reference interference fringe image is presented at the imaging area F through the focusing lens L2. During detection, the plane total reflection mirror M2 is replaced with the polished silicon wafer to be tested, and finally the interference fringe image of the silicon wafer to be tested is displayed at the imaging area F.

5. The detection device according to claim 4, characterized in that: The beam splitter G1 and the compensating mirror G2 have the same shape, the same material and the same thickness.

6. The detection device according to claim 4, characterized in that: The side of the beam splitter G1 close to the plane total reflection mirror M2 is coated with a semi-transparent and semi-reflective film.

7. The detection device according to claim 4, characterized in that: The displacement adjustment mechanism includes an outer shell accommodating the plane total reflection mirror M1, a precision screw and a drum wheel. One end of the precision screw is connected to the plane total reflection mirror M1, and the other end passes through the outer shell and is connected to the drum wheel. The plane total reflection mirror M1 is driven up and down by rotating the drum wheel.

8. The detection device according to claim 4, characterized in that: The detection device also includes a computer for processing the obtained reference interference fringe image and the interference fringe image of the silicon wafer to be tested and calculating data, and the flatness parameters of the silicon polished wafer to be tested are obtained through computer processing.

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