Extensible distributed multichannel signal acquisition system

Abstract

The invention provides an extensible distributed multichannel signal acquisition system, and belongs to the field of airborne avionics. According to the technical scheme, cables are adopted for connecting avionics devices, output states and output parameter data of the avionics devices are collected in real time through analog quantity interfaces, RS422 signal interfaces and ARINC429 signal interfaces, then the collected data are gathered to a main control computer through the Ethernet, and the main control computer monitors and processes the parameters in real time. According to the invention, high modularization and integration of the signal acquisition system are realized through a plurality of signal acquisition driving units; the flexibility and the expandability of the signal acquisition system are realized by flexibly increasing and decreasing the number of the signal acquisition driving units; the ARM-based microcontroller controls the plurality of circuit interface modules to synchronously perform signal acquisition, so that real-time and reliable multi-data interaction can be performed among avionics system equipment. According to the invention, the real-time requirements of high density and low time delay of an avionics system can be met.

Description

Technical Field

[0001] The invention belongs to the field of airborne avionics, and in particular relates to a multi-channel signal acquisition system. Background Art

[0002] With the development of digital communication technology and sensor technology, distributed signal acquisition systems have begun to emerge and are widely used in aircraft and other vehicle data recording, aviation safety monitoring, engine diagnosis, etc. However, due to the increasing types of front-end signals, the sampling frequency is also increasing, and traditional data acquisition systems cannot meet their "high density-low latency" real-time requirements. Moreover, in the field of drones, due to their limited energy or working time, data acquisition must be used to allocate resources and optimize drone tracks in long-distance missions. Therefore, the development of various technologies requires better signal transmission capabilities to support it.

[0003] The traditional data acquisition system has the following three main deficiencies:

[0004] First, the real-time performance is not enough. Traditional data collection systems often cannot record data in real time and comprehensively, resulting in incomplete data records. Many key data may not be collected at the same time, or the collection timeliness is insufficient, which affects the integrity and effectiveness of the data.

[0005] The second is data omission. As the types of front-end signals input to the acquisition system continue to increase and the sampling frequency increases, some important data may be omitted, especially those that require high-frequency acquisition.

[0006] The third is to adopt centralized control. Centralized control faces the disadvantages of reduced reliability, insufficient scalability, communication bottlenecks, difficult maintenance and debugging, and high costs.

[0007] Regarding the real-time requirements of "high density-low latency", high density usually refers to the large amount of data that needs to be processed or transmitted per unit time or per unit space. Low latency means that the time required for data to be transmitted from the sender to the receiver is very short, which can meet the real-time requirements. Traditional data acquisition systems cannot meet these two requirements very well. When designing a data acquisition system, the design of the bus interface is the key. Aerospace systems have extremely high requirements for the reliability of the bus interface, and any communication interruption or error may lead to serious consequences. The bus interface needs to be able to adapt to extreme environmental conditions such as temperature, humidity, and vibration, and must have strong anti-interference capabilities to ensure the accuracy of data transmission. It is also necessary to ensure real-time transmission of flight data and control instructions, and have error detection and correction capabilities. Summary of the invention

[0008] In order to meet the requirements of multi-data interaction between avionics system equipment, the present invention provides an expandable distributed multi-channel signal acquisition system, which uses cables to connect avionics equipment, and collects the output status and output parameter data of each avionics equipment in real time through analog interfaces, RS422 signal interfaces and ARINC429 signal interfaces, and then summarizes the collected data to the main control computer through Ethernet, and the main control computer completes the real-time monitoring and processing of each parameter. The present invention realizes the high modularization and integration of the signal acquisition system through multiple signal acquisition drive units; realizes the flexibility and scalability of the signal acquisition system by flexibly increasing or decreasing the number of signal acquisition drive units; and controls multiple circuit interface modules based on ARM to synchronously perform signal acquisition, so that real-time and reliable multi-data interaction can be performed between avionics system equipment. The present invention can meet the real-time requirements of "high density-low latency" of avionics systems.

[0009] The specific technical scheme of the present invention is:

[0010] An expandable distributed multi-channel signal acquisition system comprises a front-end wiring module, a signal acquisition drive unit, a system main control board, an Ethernet interface circuit module and a power supply module; the front-end wiring module is connected to the signal acquisition drive unit via a DB connector, and the DB connector classifies the connected signals according to different signal types and outputs them to the signal acquisition drive unit; the signal acquisition drive unit adopts modular equipment and can simultaneously acquire analog signals, RS422 serial port signals and ARINC429 bus signals, and the signal acquisition drive unit is connected to the system main control board via the Ethernet interface circuit module to realize communication; the system main control board is a high-performance embedded mainboard, and a microcontroller is selected to synchronously acquire multiple signal acquisition drive units to realize control of the multiple signal acquisition drive units; the power supply module provides power for the signal acquisition drive unit and the system main control board.

[0011] The signal acquisition system includes 3 to 5 signal acquisition drive units.

[0012] The signal acquisition drive unit is the core of the signal acquisition system, and is mainly used to acquire and drive different signals; the signal acquisition drive unit includes an analog interface module, an RS422 interface module, an ARINC429 interface module and an ARM processor; wherein the analog interface module, the RS422 interface module and the ARINC429 interface module are three independent modules, which are respectively connected to the front-end wiring module through a DB connector to achieve signal access, and are respectively connected to the ARM processor through a control bus, a data bus and an address bus to achieve signal acquisition drive; the ARM processor is a microcontroller of the signal acquisition drive unit to achieve the sending and receiving control of analog signals, RS422 serial port signals and ARINC429 bus signal acquisition.

[0013] The microcontroller adopts the ARM Cortex-M7 core with a main frequency of up to 480MHz, has large-capacity storage and high-speed cache functions, can provide powerful computing capabilities, and greatly improves the data processing speed of the signal acquisition system.

[0014] The analog quantity interface module realizes the front-end processing of the analog quantity signal. Since the analog-to-digital converter ADC has a limited acquisition range of the analog signal voltage, after the analog quantity signal is acquired through the four-channel AD, the analog quantity interface module needs to perform front-end processing on the analog quantity signal before inputting it into the ADC. The analog quantity interface module realizes the front-end processing of the analog quantity signal by adding an LM358 voltage follower between the voltage divider resistor network composed of high-precision resistors and the input and output pins multiplexed by the ADC.

[0015] The analog signal acquisition is performed by using a four-channel AD acquisition. The acquired analog signal is first processed by the front end and then converted to digital by an analog-to-digital converter ADC on-chip peripheral in the microcontroller.

[0016] The RS422 interface module realizes data interaction with the SC16C654 chip through the variable memory controller FMC on-chip peripheral of the STM32H743 microcontroller; in order to improve the flexibility and scalability of the signal acquisition system, the SC16C654 chip expands the RS422 serial port into four channels, so that the signal acquisition drive unit can have four RS422 serial port channels for signal communication; the SC16C654 chip, as a serial port expansion chip, can realize the four communication channel expansion of the RS422 serial port;

[0017] Since the signal transmitted by the RS422 interface is in RS422 level format, and the signal transmitted by the SC16C654 chip and the STM32H743 microcontroller is in TTL level format, it is necessary to convert the TTL level and RS422 level to achieve signal differentiation so that the signal transmission complies with the RS422 standard; connect the SC16C654 chip with the SN65HVD30MDREP driver chip to achieve the format conversion between TTL level and RS422 level;

[0018] The SC16C654 chip uses a four-channel universal asynchronous receiver and transmitter for serial data communication to achieve serial-to-parallel conversion of data.

[0019] The ARINC429 interface module controls the DEI1016 chip to receive and send ARINC429 data words through the STM32H743 microcontroller. The STM32H743 microcontroller and the DEI1016 chip are cross-linked through a 16-bit data bus. The DEI1016 chip provides standard aviation serial data and a 16-bit data bus interface. The transmitter circuit inside the DEI1016 chip includes a transmission buffer and control logic. The transmission buffer is an 8×32-bit first-in-first-out data storage and buffer. The STM32H743 microcontroller performs logic control on the DEI1016 chip through control signals, wherein the control signals include reset, control word loading, and data transmission and reception logic.

[0020] Before the DEI1016 chip sends data, it first checks whether the TXR pin of the DEI1016 chip is at a high level. If it is at a high level, it indicates that the send data in the send buffer is empty. At this time, the ENTX pin of the chip is at a low level, and the data transmission is stopped. Then it checks whether the TXR pin is at a low level. If it is at a low level, it indicates that the send data has been loaded into the send memory. At this time, the ENTX pin is at a high level to send data.

[0021] The ARINC429 interface module performs ARINC429 signal differential driving through the BD429 driver chip. When the DEI1016 chip sends data, it is necessary to first convert the TTL level format of the DEI1016 chip into the ARINC429 level format through the level converter in the BD429 driver chip before sending it; at the same time, ARINC429 signal differential driving is realized, and finally one ARINC429 signal sending channel and two signal receiving channels are realized.

[0022] The Ethernet interface circuit module includes two parts: a MAC controller and a physical layer interface PHY. The MAC controller and the physical layer interface PHY realize data interaction through the RMII interface. The MAC controller is integrated in the STM32H743 microcontroller, and the physical layer interface PHY integrates a large amount of analog hardware. The physical layer interface PHY specifically includes a physical layer PHY chip, a transformer and an RJ45 socket.

[0023] The beneficial effects of the present invention are as follows:

[0024] 1. The present invention adopts a distributed control mode, with the system main control board as the main control end, and multiple signal acquisition drive units perform simultaneous acquisition. The signal acquisition system has higher parallel processing efficiency and higher reliability. When a signal acquisition drive unit fails, it only needs to be replaced, and the system can still maintain integrity and stability. At the same time, the number of signal acquisition drive units can be increased or decreased according to different needs, which improves the flexibility and scalability of the signal acquisition system.

[0025] 2. The present invention integrates the interface modules of analog signals, RS422 serial port signals and ARINC429 signals for development. Each interface module constitutes a signal acquisition drive unit with a modular structure and flexible configuration. The signal acquisition drive unit of the entire signal acquisition system is designed in an integrated manner to achieve integration in structure and function. The main purpose of functional integration is to integrate and analyze various acquisition drive signals, and to develop the system structure of the acquisition unit from a non-integrated structure and a partially integrated structure to an integrated structure of hardware resource sharing, thereby making it a truly distributed acquisition platform. This functional integrated structure can coordinate the functions and system states of each module, greatly improve the reliability and maintainability of the signal acquisition system, and meet the requirements of flexible expansion of the system.

[0026] 3. The present invention uses an ARM-based microcontroller to control multiple circuit interface modules to synchronously collect signals, so that real-time and reliable multi-data interaction can be performed between avionics system devices; it can meet the real-time requirements of "high density-low latency" of avionics systems;

[0027] 4. The present invention realizes the multi-path transmission of each signal through multiple channels, improves the communication efficiency, and greatly increases the amount of collected data; at the same time, multiple channels allow users to freely choose to send and receive data, greatly increasing the flexibility and configurability of system communication.

[0028] 5. The STM32H743 microcontroller of the signal acquisition drive unit of the present invention adopts the ARM Cortex-M7 core, with a main frequency of up to 480MHz, has large-capacity storage and high-speed cache, provides powerful computing power, and improves the data processing speed of the signal acquisition system;

[0029] 6. The present invention realizes the communication between the system main control board and the host computer through the Ethernet interface. The Ethernet adopts the UDP protocol, which can quickly send a large number of data packets to realize the information interaction between the acquisition system and the host computer;

[0030] 7. The present invention takes into account the universality of system equipment and standardizes system design. The design of modular integrated structure provides a way to standardize distributed multi-signal acquisition system, and achieves the purpose of universalization of each acquisition drive module through the principle of differential drive. In the design process of equipment, modules that can achieve the same function are reused to the maximum extent to achieve the purpose of improving the system's maintenance capability and reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is the overall structure of the information collection system;

[0032] Figure 2 This is the circuit structure diagram of the analog interface module;

[0033] Figure 3 This is the circuit diagram of the RS422 interface module;

[0034] Figure 4 This is the circuit diagram of the ARINC429 interface module;

[0035] Figure 5 It is the overall flow chart of the analog interface program;

[0036] Figure 6 This is the overall flow chart of the RS422 interface function program;

[0037] Figure 7 It is the ARINC429 interface data receiving interrupt logic;

[0038] Figure 8 It is the UDP data packet format;

[0039] Fig. 9 This is the circuit structure diagram of the Ethernet interface.

[0040] The bidirectional arrows in each figure represent bidirectional transmission of signals. DETAILED DESCRIPTION

[0041] In order to better illustrate the present invention, the expandable distributed multi-channel signal acquisition system is described below with reference to the accompanying drawings.

[0042] A scalable distributed multi-channel signal acquisition system. The overall structure of the signal acquisition system can be found in Figure 1 , including front-end wiring module, signal acquisition drive unit, system main control board, Ethernet interface circuit module and power supply module. The DB37 connector is used to connect the external multi-channel signals to the board to collect analog signals, RS422 serial port signals and ARINC429 signals. After the analog signals pass through the front-end circuit, they are converted by the ADC of the signal acquisition drive unit ARM, and the voltage sampling data is transmitted by directly accessing the memory DMA and stored in the SRAM memory; the ARINC429 signal is converted from serial to parallel through the DEI1016 chip, converted into 16-bit parallel data and stored in the memory of the STM32H743 microcontroller through the data bus, and the BD429 driver chip is used to realize the differential drive of the ARINC429 signal; the RS422 serial port signal uses the SN65HVD30MDREP driver chip to convert the RS422 level into the TTL level to realize differential signal conversion, and the FMC peripheral of the STM32H743 microcontroller is used to control and program the SC16C654 register, and the four-channel serial port data is stored in the memory of the STM32H743 microcontroller through the data bus to realize serial port expansion.

[0043] The analog interface module mainly realizes the front-end processing of analog signals. The circuit structure of the analog interface module can be found in Figure 2 The analog interface module realizes the front-end processing of analog signals by adding LM358 voltage followers between the voltage divider network composed of high-precision resistors and the input and output pins multiplexed by ADC; the analog signal acquisition is based on four-channel AD acquisition, and the four-channel AD acquisition uses the ADC on-chip peripherals in the STM32H743 microcontroller for analog-to-digital conversion.

[0044] The analog quantity acquisition function is mainly based on the ADC voltage sampling of the STM32H743 microcontroller, including the main program and the interrupt service program. The main program completes the initialization of the clock, ADC, DMA and the main loop processing. The interrupt service program mainly implements the voltage conversion end interrupt and DMA request, and stores the converted data in the specified memory area. For the overall flow chart of the analog quantity interface program, please refer to Figure 5 The program flow of analog quantity acquisition is carried out in the following order: first, turn on the GPIO clock, ADC clock and DMA clock; initialize and configure the ADC target pins PA0_C, PA1_C, PC2_C, PC3_C to analog input mode; define the structure variable DMA_HandleTypeDef, set the peripheral base address to the regular data register address of ADC; the memory address is the specified data storage area space, which is implemented by defining a 16-bit unsigned global array ADC_ConvertedValue, setting the data size to half-word size, and setting DMA to circular transfer mode; call the HAL_DMA_Init() function to initialize DMA; define the structure variables ADC_HandleTypeDef and ADC_ChannelConf TypeDef, configure ADC1 to 12-bit resolution, enable scan mode, start continuous conversion, use external IO trigger, use right-aligned data format, and convert 4 channels; call HAL_ADC_Init() function to initialize ADC; bind four ADC channel pins respectively and set the corresponding conversion order to control whether to enable ADC DMA request; call ADC_ChannelConfTypeDef() to set ADC conversion channel order, sampling time is 3 clock cycles; enable DMA request, DMA automatically transfers data to the specified storage area after AD conversion; start ADC conversion; external analog signal input, trigger ADC conversion; read array ADC_ConvertedValue elements respectively to obtain 12-bit sampling values ​​of four-channel ADC.

[0045] The RS422 interface module mainly realizes data interaction with the SC16C654 chip through the variable memory controller FMC on-chip peripheral of the STM32H743 microcontroller. The circuit structure of the RS422 interface module can be found in Figure 3 . The SC16C654 chip is used to expand the RS422 serial port into four channels so that the signal acquisition drive unit can have four RS422 serial port channels for communication. As a serial port expansion chip, the SC16C654 chip can realize the four-channel expansion of the RS422 serial port; in order to convert the TTL level and the RS422 level and realize signal differentiation, the SN65HVD30MDREP driver chip is connected to the SC16C654 chip; the SC16C654 chip uses a four-channel universal asynchronous receiver and transmitter for serial data communication, mainly realizing the serial-to-parallel conversion of data. The four pins FMC_NE1 to FMC_NE4 of the STM32H743 microcontroller are respectively connected to the four channel selection pins CSA-CSD of the SC16C654 to select the channel to be used. The STM32H743 microcontroller uses the ARM Cortex-M7 core. The four pins FMC_NE1 to FMC_NE4 map the four core address areas of the STM32H743 microcontroller respectively. Therefore, the base addresses of the four transceiver channels are 0x60000000, 0x64000000, 0x68000000, and 0x6C000000. The addresses of each register inside the expansion port can be determined according to the address lines A0-A2 and the base address. In asynchronous serial communication, the arrival time and interval time of data cannot be predicted. If the query method is used, each query of LSR will waste a lot of CPU time. In order to improve the system acquisition performance, the interrupt method is used in the design to realize serial port data transmission and reception to improve the efficiency of the system; the connection method is to connect the interrupt pins INTA-INTD of the SC16C654 chip with the four external interrupt pins EXIT0-EXIT3 of the STM32H743 microcontroller. A 1.8432MHz high-frequency crystal oscillator is used as the clock source of the chip, and a higher baud rate is achieved by programming the DLL and DLM registers. In addition, there are cross-linking of control signal lines, mainly including the reset RESET controlled by the GPIO pin of the STM32H743, and the register read strobe IOR and register write strobe IOW respectively with the FMC_NOE and FMC_NWE of the STM32H743.

[0046] The function of RS422 interface is mainly realized by STM32H743 microcontroller operating the registers in SC16C654 chip, including main program and interrupt service program. The main program completes the initialization of SC16C654 registers and main loop processing, and the interrupt service program realizes the data receiving and sending logic of RS422 interface. For the overall flow of RS422 function program, please refer to Figure 6In the figure, Y means YES, which means that the signal meets the software flow requirements; N means NO, which means that the signal does not meet the software flow requirements. The initialization of the SC16C654 chip includes reset, RS422 communication parameter setting, communication channel selection, and register initialization; RS422 communication parameters include baud rate, number of data bits, number of stop bits, and check mode. The initialization of the SC16C654 chip is mainly achieved by initializing registers to configure functions. Taking the CSA channel of the SC16C654 chip as an example, write the following function to implement it:

[0047] SetChannelRegister(ChannelA_LCR,0xbf), that is, enable enhanced function mode;

[0048] SetChannelRegister (ChannelA_DLL, 0x01), that is, set the baud rate lower 8 bits, the baud rate is 115200bps;

[0049] SetChannelRegister(ChannelA_DLM,0x00), that is, set the baud rate high 8 bits;

[0050] SetChannelRegister (ChannelA_EFR, 0x80), which allows the use of enhanced functions, automatic CTS, RTS;

[0051] SetChannelRegister(ChannelA_LCR,0x1B), that is, 8 data bits, 1 stop bit, odd parity;

[0052] SetChannelRegister (ChannelA_MCR, 0x08), even if INTA-INTD is enabled;

[0053] SetChannelRegister (ChannelA_IER, 0x03), even if it can receive and send interrupts;

[0054] SetChannelRegister(ChannelA_FCR,0xB7), even if the FIFO can be received and sent, the receive trigger depth and the send trigger depth are both 56 bytes.

[0055] After the initialization program, the interrupt signal pins INTA-INTD of the SC16C654 chip are set to the level trigger mode, INT is valid at a high level, and when the data in the receive buffer can be obtained or the send buffer is empty, the interrupt pin INT sends a high level. The interrupt service program mainly includes the interrupt service function and its internal interrupt processing callback function. The interrupt service function responds to the interrupt from the SC16C654 chip, and the callback function completes the data receiving and sending processing. When the interrupt of the send buffer being empty is received, the data is written to the THR register; when the interrupt of the receive buffer data being available is received, the data is written to the RHR register; each time the interrupt service is executed, it is necessary to write 1 to the corresponding bit of the interrupt flag register of the GPIO to clear the interrupt flag.

[0056] The circuit structure of ARINC429 interface module is shown in Figure 4 The ARINC429 interface module uses the BD429 driver chip to perform differential driving of the ARINC429 signal. When the DEI1016 chip sends data, it needs to first convert the TTL level format of the DEI1016 chip to the ARINC429 level format through the level converter in the BD429 driver chip before sending it. At the same time, the ARINC429 signal differential driving is realized, and finally one channel of the ARINC429 signal is sent and two channels are received. The STM32H743 controls the DEI1016 chip through control signals, including reset, control word loading, and data transmission and reception logic. The data of the STM32H743 and DEI1016 are interconnected through a 16-bit data bus. The DEI1016 chip returns two status information, whether the transmitter is empty and whether the receiver has received data, to the STM32H743 microprocessor.

[0057] The timing of the DEI1016 chip sending ARINC429 signal data. When sending data, first check whether the TXR pin of the chip is high. If it is high, it means that the sending memory is empty. At this time, set the ENTX pin of the chip to low to stop sending data and write the data to be sent to the 16-bit data bus. After that, if you want to load data word 1, set the LD1 of the chip to low and the LD2 of the DEI1016 chip to high; if you load data word 2, set LD1 to high and LD2 to low. At this time, check whether the TXR pin is low. If it is low, it means that the sending data has been loaded into the memory. At this time, set the ENTX pin to high to send data. The sending memory of the DEI1016 chip can load up to 8 32-bit word lengths of data, and adopts a first-in-first-out sending order.

[0058] The timing sequence of the DEI1016 chip receiving ARINC429 signal data, ARINC429 data reception interrupt logic, refer to Figure 7In the figure, Y means YES, which means that the signal meets the software flow requirements; N means NO, which means that the signal does not meet the software flow requirements. When the chip's receiver 1 receives the data, the DEI1016 chip will set the DR1 pin to a low level; when the chip's receiver 2 receives the data, the chip will set the DR2 pin to a low level. To make the receiver 1 send word 1 of the received data to the 16-bit data bus, the chip's SEL pin should be set to a low level first, then the chip's OE1 pin should be set to a low level and the chip's OE2 pin should be set to a high level. Then set SEL to a high level, and word 2 can be sent to the 16-bit data bus. To send the data of receiver 2 to the 16-bit data bus, set OE2 to a low level and OE1 to a high level.

[0059] The function of the ARINC429 interface is mainly realized by the STM32H743 microcontroller controlling the control pins of the DEI1016 chip to complete the data receiving and sending logic. The initialization of the DEI1016 chip is that the main program fills the control word in the control register of the DEI1016 chip after power-on reset; the receiving logic of the ARINC429 interface data word is mainly processed by external interrupts, and the sending function of the ARINC429 interface data word is mainly defined by the user program when to send.

[0060] The circuit structure of the Ethernet interface is shown in Fig. 9 . In the circuit of Ethernet physical layer, LAN8720A is selected as PHY chip. The host PC is connected to RJ45 socket through RJ45 crystal plug of network cable, and RJ45 socket contains transformer. RJ45 socket is connected to PHY chip LAN8720A. Considering that STM32H743 microcontroller integrates MAC controller and has pins that can be used as RMII interface, LAN8720A can be directly connected to the corresponding pins of STM32H743 microcontroller. Finally, the ARM core processes the data and packages each data into UDP data packet format, see Figure 8 , data is transmitted with the host PC through the RMII interface.

[0061] According to the above steps, the scalable distributed multi-channel signal acquisition system realizes the acquisition of analog signals, ARINC429 signals and RS422 serial port signals, and achieves fast communication with the host computer.

[0062] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of the present invention, and all these changes or substitutions should fall within the protection scope of the claims attached to the present invention.

Claims

1. An expandable distributed multi-channel signal acquisition system, comprising a front-end wiring module, a signal acquisition drive unit, a system main control board, an Ethernet interface circuit module and a power supply module; the front-end wiring module is connected to the signal acquisition drive unit through a DB connector, and the DB connector classifies the input signals according to different signal types and outputs them to the signal acquisition drive unit; the signal acquisition drive unit adopts a modular device, which can simultaneously acquire analog signals, RS422 serial port signals and ARINC429 bus signals, and the signal acquisition drive unit is connected to the system main control board through an Ethernet interface circuit module to realize communication; The system main control board is a high-performance embedded mainboard, and a microcontroller is selected to synchronously collect multiple signal acquisition drive units to realize the control of multiple signal acquisition drive units; The power module provides power to the signal acquisition drive unit and the system main control board.

2. The scalable distributed multi-channel signal acquisition system according to claim 1, characterized in that: The signal acquisition system includes 3 to 5 signal acquisition drive units.

3. The scalable distributed multi-channel signal acquisition system according to claim 1, characterized in that: The signal acquisition drive unit comprises an analog interface module, an RS422 interface module, an ARINC429 interface module and an ARM processor; the analog interface module, the RS422 interface module and the ARINC429 interface module are three independent modules, which are respectively connected to the front-end wiring module through a DB connector to realize signal access, and are respectively connected to the ARM processor through a control bus, a data bus and an address bus to realize signal acquisition drive; the ARM processor is a microcontroller of the signal acquisition drive unit.

4. The scalable distributed multi-channel signal acquisition system according to claim 1, characterized in that: The analog interface module realizes front-end processing of analog signals by adding an LM358 voltage follower between a voltage-dividing resistor network composed of high-precision resistors and the input and output pins multiplexed by the ADC; after the analog signal is collected through the four-channel AD, the analog signal is processed through the analog interface module before being input into the ADC.

5. The scalable distributed multi-channel signal acquisition system according to claim 1, characterized in that: The RS422 interface module realizes data interaction with the SC16C654 chip through the variable memory controller FMC on-chip peripheral of the STM32H743 microcontroller; the SC16C654 chip is connected to the SN65HVD30MDREP driver chip to realize the format conversion between the TTL level and the RS422 level; The SC16C654 chip uses a four-channel universal asynchronous receiver and transmitter for serial data communication to achieve serial-to-parallel conversion of data.

6. The scalable distributed multi-channel signal acquisition system according to claim 3, characterized in that: The ARINC429 interface module controls the DEI1016 chip to send and receive ARINC429 data words through the STM32H743 microcontroller, and the STM32H743 microcontroller and the DEI1016 chip are cross-linked through the data bus; the transmitter circuit inside the DEI1016 chip includes a sending buffer and a control logic, and the sending buffer is a first-in-first-out data storage and buffer; the STM32H743 microcontroller performs logical control on the DEI1016 chip through a control signal, wherein the control signal includes reset, control word loading, and data sending and receiving logic; Before the DEI1016 chip sends data, it first queries whether the TXR pin of the DEI1016 chip is at a high level. If it is at a high level, it indicates that the send data of the send buffer is empty. At this time, the ENTX pin of the chip is at a low level, and the sending of data is stopped. Then, it queries whether the TXR pin is at a low level. If it is at a low level, it indicates that the send data has been loaded into the send memory. At this time, the ENTX pin is at a high level to send data, so as to achieve the purpose of returning the two status information of whether the transmitter is empty and whether the receiver has received data to the STM32H743 microcontroller by the DEI1016 chip; The ARINC429 interface module performs ARINC429 signal differential driving through the BD429 driver chip. When the DEI1016 chip sends data, it is necessary to first convert the TTL level format of the DEI1016 chip into the ARINC429 level format through the level converter in the BD429 driver chip before sending it; at the same time, ARINC429 signal differential driving is realized, and finally one ARINC429 signal sending channel and two signal receiving channels are realized.

7. The scalable distributed multi-channel signal acquisition system according to claim 1, characterized in that: The Ethernet interface circuit module includes two parts: a MAC controller and a physical layer interface PHY. The MAC controller and the physical layer interface PHY realize data interaction through the RMII interface. The MAC controller is integrated in the STM32H743 microcontroller, and the physical layer interface PHY integrates a large amount of analog hardware. The physical layer interface PHY specifically includes a physical layer PHY chip, a transformer and an RJ45 socket.

8. An electronic device comprising one or more processors; and a memory; and one or more programs, characterized in that: The one or more programs are stored in the memory and configured to be executed by the one or more processors, and the one or more programs are configured to execute the signal acquisition system according to any one of claims 1 to 7.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores program codes, and the program codes can be called by a processor to execute the signal acquisition system according to any one of claims 1 to 7.

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