Method and device for reading and writing host memory by solid state disk

Abstract

The invention provides a method and device for reading and writing a host memory through a solid state disk, and belongs to the technical field of computers. In the method, a first instruction from a host to a solid state disk is effective for a long time, namely, after the solid state disk receives the first instruction, a completion response of the first instruction does not need to be returned to the host; and the solid state disk sends a response message of the first instruction to the host based on the first instruction so as to indicate the host to execute a read-write operation indicated by the response message on a host memory. In the method, the first instruction is effective for a long time, and the response message of the first instruction is sent to the host whenever the solid state disk has the requirement of reading and writing the host memory, so that the solid state disk can read and write the host memory for multiple times based on the first instruction, and the reading and writing process does not depend on the instruction issued by the host; and the host does not need to construct a read-write instruction for the solid-state disk every time, so that the efficiency of reading and writing the host memory by the solid-state disk can be improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method and device for a solid state hard disk to read and write host memory. Background Art

[0002] In the master-slave access architecture of the host and the solid state disk (SSD), the host is used as the master device and the solid state disk is used as the slave device. The solid state disk includes a solid state disk controller and a storage medium. The solid state disk controller includes a random access memory (RAM) for storing operation data, flash translation layer (FTL) table entries, and read / write (I / O) cache and other data generated during the operation of the solid state disk controller. Since the RAM resources inside the solid state disk controller are limited and the capacity is small, the host memory can be used as a supplement to the RAM resources when the RAM resources are insufficient.

[0003] In the related art, when the RAM resources of the solid-state drive are insufficient, the solid-state drive can read and write the host memory. Among them, if the solid-state drive has received any instruction issued by the host, when the solid-state drive sends a response message of the instruction to the host, the solid-state drive carries the read and write request for the host memory in the response message, thereby sending the read and write request to the host; based on the read and write request, the host sends the read and write instruction corresponding to the read and write request to the solid-state drive, and the solid-state drive sends a response message of the read and write instruction to the host, and the host performs read and write operations on the host memory according to the instructions of the response message.

[0004] However, in the above method, the SSD needs to rely on the instructions already issued by the host to send a read or write request to the host each time. If the host does not send any instructions to the SSD for a period of time, the SSD cannot send a read or write request to the host in time. Moreover, each time the host receives a read or write request, it needs to resend a new instruction to the SSD to complete the related read or write operations, resulting in low read and write efficiency of the SSD to the host memory. Summary of the invention

[0005] The embodiment of the present application provides a method and device for a solid state drive to read and write a host memory, which can improve the efficiency of the solid state drive to read and write the host memory. The technical solution is as follows.

[0006] In a first aspect, a method for a solid state drive to read and write a host memory is provided, the method comprising:

[0007] The host sends a first instruction to the solid-state drive, and the host does not receive a completion response to the first instruction; after receiving the first instruction, the solid-state drive sends a response message of the first instruction to the host based on the first instruction to instruct the host to perform the read and write operations indicated by the response message on the host memory.

[0008] In the above method, the solid-state hard disk does not complete the response to the first instruction, that is, the first instruction is valid for a long time. Whenever the solid-state hard disk needs to read and write the host memory, it only needs to send a response message of the first instruction to the host. Therefore, the solid-state hard disk can read and write the host memory multiple times based on the first instruction. The reading and writing process does not need to rely on the instructions issued by the host, nor does it require the host to construct read and write instructions for the solid-state hard disk every time, which can improve the efficiency of the solid-state hard disk in reading and writing the host memory.

[0009] Optionally, the host sends a first instruction to the solid state drive, including:

[0010] The host sends the first instruction to the solid state drive during the initialization phase.

[0011] Optionally, the first field in the first instruction indicates that the solid state drive does not complete the response to the first instruction; or, the instruction type of the first instruction indicates that the solid state drive does not complete the response to the first instruction.

[0012] Among them, one way to generate the first instruction is: the host generates an instruction with the first field set to a target value, and the first field is set to the target value to indicate that the solid-state drive does not complete the response to the instruction. The first field is a free field reserved in the instruction. In some embodiments, the first field of the instruction has a value indicating that the solid-state drive does not complete the response to the instruction; the first field of the instruction is empty to indicate that the solid-state drive completes the response to the instruction. In other embodiments, different values ​​of the first field are used to indicate whether the solid-state drive completes the response to the instruction. For example, the value of the first field is 1, indicating that the solid-state drive does not complete the response to the instruction, and the value of the first field is 0, indicating that the solid-state drive completes the response to the instruction.

[0013] Another way to generate the first instruction is: the host generates an instruction of a target type, the target type indicating that the solid state drive does not complete the response to the instruction. The target type is different from the instruction type in the original protocol.

[0014] Optionally, the first instruction carries a readable and writable memory address of the solid state drive in the host memory.

[0015] Optionally, the method further comprises:

[0016] The solid state drive sends an initialization response to the first instruction to the host, and the data length carried by the initialization response is 0.

[0017] The initialization response is used to notify the host that the solid state drive has received the read instruction and has completed the initialization work related to the read instruction. The initialization response is different from the completion response, and the host receiving the initialization response is not equivalent to receiving the completion response.

[0018] In the above method, the solid-state drive sends an initialization response to the host to notify the host that the solid-state drive has received the first instruction. When the first instruction fails to be sent or the initialization response fails to be received due to network failure or other reasons, the host can resend the first instruction to the solid-state drive, thereby ensuring that the solid-state drive can read and write the host memory normally.

[0019] Optionally, the method further comprises:

[0020] The solid state drive associates the first instruction with a target tag, and the target tag indicates that the solid state drive does not complete the first instruction.

[0021] In the above method, since the solid-state hard disk associates the first instruction with the target tag, when the solid-state hard disk needs to perform read and write operations on the host memory, the solid-state hard disk detects the target tag, and when it detects that there is an instruction associated with the target tag, it generates a response message based on the instruction. This allows the solid-state hard disk to quickly determine the target instruction and then generate a response message for the target instruction when the instructions received are complex and complicated, without detecting the instruction itself, thereby improving the efficiency of generating the response message and further improving the read and write efficiency of the solid-state hard disk on the host memory.

[0022] Optionally, the first instruction is a read instruction, and the sending a response message of the first instruction to the host based on the first instruction includes:

[0023] Based on the read instruction, a response message of the read instruction is sent to the host, the response message of the read instruction carries the data in the solid state drive and the first memory address in the host memory, and the response message of the read instruction instructs the host to write the data in the solid state drive to the first memory address.

[0024] Optionally, the first instruction is a write instruction, and the sending a response message of the first instruction to the host based on the first instruction includes:

[0025] Based on the write instruction, a response message of the write instruction is sent to the host, the response message of the write instruction carries a second memory address in the host memory, and the response message of the write instruction instructs the host to send the data in the second memory address to the solid state drive.

[0026] In a second aspect, a solid-state hard disk is provided, which includes an interface, a processor and a storage medium, the interface is used to communicate with a host, the storage medium is used to store data, and the processor is used to execute the steps performed by the solid-state hard disk in the method provided by the above-mentioned first aspect or any possible implementation of the first aspect.

[0027] In a third aspect, a host is provided, which includes an interface, a processor and a memory, wherein the interface is used to communicate with a solid-state drive, the memory is used to store data, and the processor is used to execute the steps performed by the host in the method provided by the first aspect or any possible implementation of the first aspect.

[0028] In a fourth aspect, a storage system is provided, which includes a solid-state hard disk provided in the second aspect and a host provided in the third aspect, so that the storage system executes the method of reading and writing host memory of the solid-state hard disk provided in the first aspect or any possible implementation of the first aspect.

[0029] Based on the implementations provided in the above aspects, this application can also be further combined to provide more implementations. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a structural diagram of a storage system provided in an embodiment of the present application;

[0031] Figure 2 It is a flow chart of a method for a solid state drive to write to a host memory provided by an embodiment of the present application;

[0032] Figure 3 It is a flowchart of initializing a read instruction in a method for writing a host memory to a solid-state drive provided in an embodiment of the present application;

[0033] Figure 4 It is a schematic diagram of a process of a solid state drive writing to a host memory based on a read instruction provided by an embodiment of the present application;

[0034] Figure 5 It is a flow chart of a method for a solid state drive to read a host memory provided by an embodiment of the present application;

[0035] Figure 6 It is a schematic diagram of a flow chart of initializing a write instruction in a method for a solid state drive to read a host memory provided by an embodiment of the present application;

[0036] Figure 7 It is a schematic diagram of a process of a solid state drive reading a host memory based on a write instruction provided in an embodiment of the present application;

[0037] Figure 8It is a structural schematic diagram of a device for a solid state hard disk to read and write host memory provided by an embodiment of the present application;

[0038] Fig. 9 It is a structural diagram of a device for a solid state hard disk to read and write host memory provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0040] First, the implementation environment of the embodiments of the present application is introduced.

[0041] Figure 1 Schematic diagram of a storage system provided by an embodiment of the present application. Figure 1 As shown, the storage system includes a host 101 and a solid-state drive 102. The storage system can be a single computing device or server, the host 101 is a host of a single computing device or server, and the solid-state drive 102 is a pluggable solid-state drive on the computing device or server; the storage system can also be a large storage system composed of a storage array and a server or a storage array and a storage array controller, the host 101 is a server or storage array controller in the storage system, and the solid-state drive 102 is a solid-state drive in the storage array. The host 101 includes a central processing unit (CPU), a memory, a host interface, and a bus; the solid-state drive 102 includes a solid-state drive controller and a storage medium, and the solid-state drive controller includes a CPU, a RAM, a host interface, a storage medium interface, and a bus. The host 101 and the solid-state drive 102 communicate with each other through the bus via the host interface.

[0042] The memory of the host 101 may be a double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), a static random access memory (static random access memory, SRAM), a dynamic random access memory (dynamic random access memory, DRAM), etc., which is not limited in the embodiments of the present application. Exemplarily, the memory of the host 101 can be used as a supplement to the RAM resources in the solid state drive controller of the solid state drive 102, that is, the memory of the host 101 can be used as a cache of the solid state drive 101 and as a storage space for the backup data of the solid state drive 101. For example, in a scenario where the memory of the host 101 is used as a cache of the solid-state drive 102, when the local RAM resources of the solid-state drive controller are insufficient, the solid-state drive 102 writes the operation data, FTL table entries, or IO cache data generated during the operation of the solid-state drive controller into the memory of the host 101. When the solid-state drive 102 needs to use the above data, the solid-state drive 102 performs a read operation on the memory of the host 101 to obtain the above data; when the solid-state drive 102 needs to write or update the above data, the solid-state drive 102 performs a write operation on the memory of the host 101. For another example, in a scenario where the host 101 is used as a backup data storage space of the memory solid-state drive 101, the solid-state drive 102 writes the backup data of the data in the local RAM into the memory of the host 101. When the local data is wrong, the solid-state drive 102 performs a read operation on the memory of the host 101 to obtain the backup data; when the solid-state drive 102 needs to write or update the backup data, the solid-state drive 102 performs a write operation on the memory of the host 101. It should be noted that the above description of the scenario in which the solid state drive 102 reads and writes the host 102 memory is merely exemplary and does not limit the scope of application of the present application.

[0043] Among them, the solid state drive 102 can be an embedded multi-media card (embedded multi-media card, eMMC), universal flash storage (universal flash storage, UFS), serial attached SCSI solid state drives (serial attached SCSI solid state drives, SAS SSD), serial advanced technology attachment solid state drives (serial advanced technology attachment solid state drives, SATA SSD), non-volatile memory bus (non-volatile memory express, NVMe), SRAM, DRAM, NAND flash (NAND flash), Nor flash (Nor flash), mechanical hard disk (hard disk drive, HDD) or disk, etc., and the embodiment of the present application does not limit this. The number of the solid state drive 102 can be one or more, and the embodiment of the present application does not limit the number of solid state drives. Among them, the bus between the solid state drive controller and the storage medium in the solid state drive 102 can be a flash interface (openNAND flash interface, ONFI), a switch (toggle), a common flash interface (common flash interface, CFI), a serial peripheral interface (serial peripheral interface, SPI) or a DDR bus, etc., and the embodiment of the present application does not limit this. Exemplarily, the solid-state drive 102 can use the memory of the host 101 as a supplement to the RAM resources in the solid-state drive controller, that is, the solid-state drive 102 can use the memory of the host 101 as a cache and use the memory of the host 101 as a storage space for backup data in the solid-state drive 101.

[0044] The bus between the host 101 and the solid-state drive 102 may be a high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIe), UFS, eMMC, NVMe, SAS or SATA, etc., which is not limited in the present embodiment. For ease of representation, Figure 1 Only one line is used to represent a bus, but this does not mean that there is only one bus or only one type of bus.

[0045] The embodiment of the present application provides a method for a solid-state hard disk to read and write host memory. In this method, the first instruction from the host to the solid-state hard disk is valid for a long time, that is, after the solid-state hard disk receives the first instruction, it does not need to return a completion response of the first instruction to the host; based on the first instruction, the solid-state hard disk sends a response message of the first instruction to the host to instruct the host to perform the read and write operations indicated by the response message on the host memory. In the above method, the first instruction is valid for a long time. Whenever the solid-state hard disk has a need to read and write the host memory, it only needs to send a response message of the first instruction to the host. Therefore, the solid-state hard disk can read and write the host memory multiple times based on the first instruction. The read and write process does not need to rely on the instructions issued by the host, nor does it need the host to construct read and write instructions for the solid-state hard disk every time, which can improve the efficiency of the solid-state hard disk in reading and writing the host memory.

[0046] In the above method, the first instruction may be a read instruction or a write instruction. The above method is introduced below by taking the first instruction being a read instruction and a write instruction as examples.

[0047] The following first instruction is a read instruction as an example for introduction. The host sends a read instruction to the SSD, reads data from the SSD, and writes the read data into the host memory. This process is also the process of the SSD writing the host memory. Figure 2 is a flow chart of a method for a solid state drive to write to a host memory provided by an embodiment of the present application, such as Figure 2 As shown, the method is interactively executed by the host and the solid state drive, and includes the following steps 201 to 206.

[0048] 201. The host sends a read command to the solid state drive, and the host does not receive a completion response to the read command.

[0049] The read instruction is used by the solid-state drive to write to the host memory, and the solid-state drive does not need to complete the response to the read instruction, that is, the read instruction continues to maintain a non-timeout state (long-term validity). The read instruction can be generated by the host during the host initialization phase and sent to the solid-state drive. For example, the read instruction is generated by the host after the host is turned on or restarted. The embodiment of the present application does not limit the generation time of the read instruction.

[0050] In some embodiments, the process of the host generating the read instruction includes: the host generates a read instruction with the first field set to a target value, and the first field is set to the target value to indicate that the solid-state drive does not complete the response to the read instruction. The first field is a free field reserved in the instruction. In some embodiments, the first field of the instruction has a value indicating that the solid-state drive does not complete the response to the instruction; the first field of the instruction is empty to indicate that the solid-state drive completes the response to the instruction. In other embodiments, different values ​​of the first field are used to indicate whether the solid-state drive completes the response to the instruction. For example, the value of the first field is 1 to indicate that the solid-state drive does not complete the response to the instruction, and the value of the first field is 0 to indicate that the solid-state drive completes the response to the instruction. Taking the solid-state drive as a UFS solid-state drive as an example, the instruction type of the read instruction is an instruction type defined in the UFSSCSI instruction set (UFS SCSI Command Set), and the host generates the read instruction based on the instruction type. The read instruction includes an operation code, the first field, and an address field. The operation code is used to indicate the instruction type and the operation corresponding to the instruction, and the address field is used to indicate the memory address corresponding to the read instruction. The operation code corresponding to the instruction type of the read instruction is, for example, "READ (6): 08h", "READ (10): 28h" or "READ (16): 88h".

[0051] In other embodiments, the process of the host generating the read instruction includes: the host generates a read instruction whose instruction type is a target type, and the target type indicates that the solid-state drive does not complete the response to the read instruction. The target type is different from the instruction type in the original protocol. Taking the solid-state drive as a UFS solid-state drive as an example, the target type is an instruction type that is not defined in the UFS SCSI Command Set, and the UFS SCSI Command Set includes reserved instructions of undefined instruction types (for example, instructions with an instruction code of "F0h"). The instruction type of the reserved instruction can be defined as the target type, and then the host generates the read instruction based on the target type. Among them, the instruction code is used to indicate the instruction in the instruction set.

[0052] In some embodiments, the read instruction carries the memory address of the solid-state drive that can be read and written on the host memory. The memory address indicates a section of memory on the host, and the memory address includes the starting address of the section of memory and the data length corresponding to the section of memory, and the data length is the maximum memory length reserved by the host for reading and writing the solid-state drive. The starting address can be indicated by the memory address field in the read instruction, and the data length can be indicated by the data length field in the read instruction, which is not limited in the embodiment of the present application. It should be noted that the memory address can be allocated by the host according to the memory allocation strategy according to actual needs, and the embodiment of the present application does not limit the allocation method of the memory address.

[0053] 202. The solid state drive receives the read instruction and associates the read instruction with a target tag, where the target tag indicates that the solid state drive does not complete the read instruction.

[0054] Among them, if the first field in the read instruction is used to indicate whether the solid-state drive has completed the response to the read instruction, then after the solid-state drive receives the read instruction, it detects that the first field of the read instruction is the target value, and the solid-state drive associates the read instruction with the target tag. If the instruction type of the read instruction is used to indicate whether the solid-state drive has completed the response to the read instruction, then after the solid-state drive receives the read instruction, it detects that the instruction type of the read instruction is the target type, and the solid-state drive associates the read instruction with the target tag.

[0055] In the above method, since the solid-state hard disk associates the read instruction with the target tag, when the solid-state hard disk needs to perform a write operation on the host memory, the solid-state hard disk detects the target tag, and when it detects that there is a read instruction associated with the target tag, it generates a response message based on the read instruction. This allows the solid-state hard disk to quickly determine the target instruction when the instructions it receives are complex, and then generate a response message for the target instruction without detecting the instruction itself, thereby improving the efficiency of generating the response message and thereby improving the efficiency of the solid-state hard disk writing to the host memory.

[0056] In some embodiments, the read instruction carries a memory address of the solid-state drive that is readable and writable on the host memory. After receiving the read instruction, the solid-state drive also stores the memory address carried by the read instruction to facilitate reading and writing the memory address. It should be noted that the embodiments of the present application do not limit the execution order of the steps of associating the read instruction and the target tag of the solid-state drive and the step of storing the memory address of the solid-state drive.

[0057] It should be noted that the step of associating the read instruction and the target mark in step 202 is an optional step. In some embodiments, this step is not performed. For example, after the solid-state hard disk receives the read instruction, it performs the following step 203 (sending the initialization response of the read instruction to the host). For another example, after the solid-state hard disk receives the read instruction, it stores the memory address carried by the read instruction and performs the following step 203 (sending the initialization response of the read instruction to the host). The embodiment of the present application does not limit this. Wherein, in the case where this step is not performed, when the solid-state hard disk needs to write to the host memory, if the first field in the read instruction is used to indicate whether the solid-state hard disk has completed the response to the read instruction, the solid-state hard disk detects the first field of the instruction, and when it is detected that the first field of the read instruction is the target value, the solid-state hard disk generates a response message based on the read instruction; if the instruction type of the read instruction is used to indicate whether the solid-state hard disk has completed the response to the read instruction, the solid-state hard disk detects the instruction type, and when it is detected that the instruction type is a read instruction of the target type, a response message is generated based on the read instruction.

[0058] 203. The solid state drive sends an initialization response of the read instruction to the host, and the data length carried by the initialization response of the read instruction is 0.

[0059] The initialization response is used to notify the host solid state drive that the read instruction has been received and the initialization work related to the read instruction has been completed. The initialization response is different from the completion response, and the host receiving the initialization response is not equivalent to receiving the completion response. The initialization work includes associating the read instruction with the target tag. In some embodiments, the initialization work also includes storing the memory address carried by the read instruction.

[0060] 204. The host receives an initialization response to the read instruction sent by the solid state drive.

[0061] Among them, in some embodiments, if the host does not receive an initialization response sent by the solid-state drive within a preset time after sending the read instruction, the host re-sends the read instruction to the solid-state drive to avoid failure to send the read instruction or failure to receive the initialization response due to network failure, etc., thereby ensuring that the solid-state drive can read and write the host memory normally.

[0062] It should be noted that the above steps 203 and 204 are optional steps. In some embodiments, the above steps 203 and 204 may not be performed, and the embodiments of the present application do not limit this.

[0063] The above steps 201 to 204 show the process of initializing the read instruction. After the read instruction is initialized, whenever the solid state drive has a need to write to the host memory, the solid state drive sends a response message of the read instruction to the host, and the host completes the write operation to the host memory according to the instruction of the response message, without repeating the above steps 201 to 204 each time. The process of writing to the host memory based on the read instruction is introduced below, and the process includes the following steps 205 to 206.

[0064] 205. Based on the read instruction, the solid state drive sends a response message of the read instruction to the host. The response message of the read instruction carries the data in the solid state drive and the first memory address in the host memory. The response message of the read instruction instructs the host to write the data in the solid state drive to the first memory address.

[0065] The data may be data in the solid state drive that needs to be written into the host memory; the first memory address is the host memory address corresponding to this write operation, and the first memory address belongs to the memory address carried by the read instruction. The first memory address includes the offset address corresponding to this write operation and the data length corresponding to this write operation, and the offset address is the offset address relative to the starting address in the memory address carried by the read instruction.

[0066] Among them, when the solid-state hard disk has a need to write to the host memory, the solid-state hard disk detects the target tag, determines that the read instruction is associated with the target tag, and then generates a response message for the read instruction, and sends the response message for the read instruction to the host. The process of the solid-state hard disk sending the response message for the read instruction to the host based on the read instruction includes: the solid-state hard disk generates a response message for the read instruction based on the read instruction, and the response message includes the memory address corresponding to the current write operation (that is, the first memory address) and the data in the solid-state hard disk to be written into the host memory; the solid-state hard disk sends the response message for the read instruction to the host.

[0067] 206. The host receives a response message to the read instruction sent by the solid state drive, and writes the data in the solid state drive carried by the response message into the first memory address.

[0068] The host obtains the data in the solid state drive carried by the response message, and determines that the memory address corresponding to the current write operation is the first memory address according to the response message; the host writes the data into the first memory address.

[0069] It should be noted that the above steps 205 and 206 are only a process of performing a write operation on the host memory based on the read instruction, and the solid state drive can perform multiple write operations on the host memory in the same manner as the above steps 205 and 206, without having to perform the above steps 201 to 204 each time. The execution process of multiple write operations will not be repeated.

[0070] Below through Figure 3 and Figure 4 For the above Figure 2 The process shown is described by way of example. Figure 3 1 is a flow chart of initializing a read instruction in a method for writing a host memory to a solid state drive provided in an embodiment of the present application, such as Figure 3As shown, taking the solid state drive as a UFS solid state drive as an example, the host allocates a host memory address that the solid state drive can read and write; the host creates a read instruction A, sets the first field of the read instruction A to the target value, associates the starting address of the memory address that the solid state drive can read and write to the read instruction A, and sets the value of the data length field in the read instruction A to the length of the memory address that the solid state drive can read and write; the host sends the read instruction A to the solid state drive. The solid state drive receives the read instruction A. If the first field of the read instruction A is not the target value, the solid state drive processes the read instruction A according to the UFS protocol standard IO process; if the first field of the read instruction A is the target value, the solid state drive obtains and stores the memory address carried by the read instruction A, associates the read instruction A with the target mark, and marks the target of the read instruction A as a read instruction that the solid state drive does not complete the response. The solid state drive sends an initialization response (DATA IN UPIU) of the read instruction A to the host, and the data length carried by the initialization response of the read instruction is 0. The host receives the initialization response of the read instruction, and the read instruction initialization process ends.

[0071] Figure 4 is a schematic diagram of a process of a solid state drive writing to a host memory based on a read instruction provided by an embodiment of the present application, such as Figure 4 As shown, taking the solid-state drive as a UFS solid-state drive as an example, when the solid-state drive has a need to write to the host memory, the solid-state drive detects the target tag, detects the read instruction A associated with the target tag, and then generates a response message (DATA INUPIU) of the read instruction A. The solid-state drive configures the offset address, data length and data to be written into the host memory corresponding to this write operation in the response message, and the solid-state drive sends the response message of the read instruction A to the host. The host receives the response message of the read instruction A, obtains the data to be written from the response message, and determines the offset address and data length corresponding to this write operation according to the response message, and the host writes the data according to the offset address and data length.

[0072] In the above method, the SSD does not complete the response to the read instruction, that is, the read instruction is valid for a long time. Whenever the SSD needs to write to the host memory, it only needs to send a response message of the read instruction to the host. Therefore, the SSD can perform multiple write operations on the host memory based on the read instruction. The read and write process does not need to rely on the instructions issued by the host, nor does it need the host to construct read and write instructions for the SSD every time, which can improve the efficiency of the SSD writing to the host memory. At the same time, there is no need to modify the framework of the original protocol between the host and the SSD, and the SSD can actively read and write to the host memory. Furthermore, since the SSD associates the read instruction with the target tag, when the SSD needs to write to the host memory, the SSD checks The target tag is detected, and when a read instruction is detected to be associated with the target tag, the solid-state drive generates a response message based on the read instruction, so that when the solid-state drive receives complex instructions, it can quickly determine the target instruction and then generate a response message for the target instruction without detecting the instruction itself, thereby improving the efficiency of generating response messages and thus improving the efficiency of writing the solid-state drive to the host memory; in addition, the solid-state drive sends an initialization response to the host to notify the host that the solid-state drive has received the read instruction. When the read instruction fails to be sent or the initialization response fails to be received due to network failure or other reasons, the host can resend the read instruction to the solid-state drive, thereby ensuring that the solid-state drive can read and write the host memory normally.

[0073] The following takes the first instruction as a write instruction as an example for description, wherein the host sends a write instruction to the SSD, reads data from the host memory, and writes the read data to the SSD, which is also the process of the SSD reading the host memory. Figure 5 is a flow chart of a method for a solid state drive to read a host memory provided by an embodiment of the present application, such as Figure 5 As shown, the method is interactively executed by the host and the solid state drive, and includes the following steps 501 to 507.

[0074] 501. The host sends a write instruction to the solid state drive, and the host does not receive a completion response to the write instruction.

[0075] The write instruction is used by the solid-state drive to read the host memory, and the solid-state drive does not need to complete the response to the write instruction, that is, the write instruction continues to maintain a non-timeout state (long-term validity). The write instruction can be generated by the host in the initial stage of the host and sent to the solid-state drive. For example, the write instruction is generated by the host after the host is turned on or restarted. The embodiment of the present application does not limit the generation time of the write instruction.

[0076] In some embodiments, the process of the host generating the write instruction includes: the host generates a write instruction with the first field set to a target value, and the first field is set to the target value to indicate that the solid state drive does not complete the response to the write instruction. The first field is a free field reserved in the instruction. In some embodiments, the first field of the instruction has a value indicating that the solid state drive does not complete the response to the instruction; the first field of the instruction is empty to indicate that the solid state drive completes the response to the instruction. In other embodiments, different values ​​of the first field are used to indicate whether the solid state drive completes the response to the instruction. For example, the value of the first field is 1 to indicate that the solid state drive does not complete the response to the instruction, and the value of the first field is 0 to indicate that the solid state drive completes the response to the instruction. Taking the solid state drive as a UFS solid state drive as an example, the instruction type of the write instruction is an instruction type defined in the UFSSCSI instruction set (UFS SCSI Command Set), and the host generates the write instruction based on the instruction type. The write instruction includes an operation code, the first field and an address field, the operation code is used to indicate the instruction type and the operation corresponding to the instruction, and the address field is used to indicate the memory address corresponding to the read instruction. The operation code corresponding to the instruction type of the write instruction is, for example, "WRITE(6):0Ah", "WRITE(10):2Ah" or "WRITE(16):8Ah".

[0077] In other embodiments, the process of the host generating the write instruction includes: the host generates a write instruction whose instruction type is a target type, and the target type indicates that the solid-state drive does not complete the response to the write instruction. The target type is different from the instruction type in the original protocol. Taking the solid-state drive as a UFS solid-state drive as an example, the target type is an undefined instruction type in the UFS SCSI Command Set, and the UFS SCSI Command Set includes reserved instructions of undefined instruction types (for example, instructions with an instruction code of "F1h"). The instruction type of the reserved instruction can be defined as the target type, and then the host generates the write instruction based on the target type.

[0078] In some embodiments, the write instruction carries the memory address of the solid-state drive that can be read and written on the host memory. The memory address indicates a section of memory on the host, and the memory address includes the starting address of the section of memory and the data length corresponding to the section of memory, and the data length is the maximum memory length reserved by the host for reading and writing the solid-state drive. The starting address can be indicated by the memory address field in the write instruction, and the data length can be indicated by the data length field in the write instruction, which is not limited in the embodiment of the present application. It should be noted that the memory address can be allocated by the host according to the memory allocation strategy according to actual needs, and the embodiment of the present application does not limit the allocation method of the memory address.

[0079] 502. The solid state drive receives the write instruction, and associates the write instruction with a target tag, where the target tag indicates that the solid state drive does not complete the write instruction.

[0080] 503. The solid state drive sends an initialization response of the write command to the host, and the data length carried by the initialization response of the write command is 0.

[0081] 504. The host receives an initialization response to the write instruction sent by the solid state drive.

[0082] The above steps 502 to 504 are the same as the above steps 202 to 204 and are not described in detail.

[0083] The above steps 501 to 504 show the process of initializing the write instruction. After the write instruction is initialized, whenever the solid state drive has a need to read the host memory, the solid state drive sends a response message of the write instruction to the host, and the host completes the read operation of the host memory according to the instruction of the response message, without repeating the above steps 501 to 504 each time. The process of performing a read operation on the host memory based on the write instruction is introduced below, and the process includes the following steps 505 to 507.

[0084] 505. Based on the write instruction, the solid state drive sends a response message of the write instruction to the host, where the response message of the write instruction carries a second memory address in the host memory, and the response message of the write instruction instructs the host to send the data in the second memory address to the solid state drive.

[0085] The second memory address is the host memory address corresponding to the current read operation, and the second memory address belongs to the memory address carried by the write instruction. The second memory address includes the offset address corresponding to the current read operation and the data length corresponding to the current read operation, and the offset address is the offset address relative to the starting address in the memory address carried by the write instruction.

[0086] Among them, when the solid-state hard disk has a need to read the host memory, the solid-state hard disk detects the target tag, determines that the write instruction is associated with the target tag, and then generates a response message for the write instruction, and sends the response message to the host. The process of the solid-state hard disk sending the response message of the write instruction to the host based on the write instruction includes: the solid-state hard disk generates a response message of the write instruction based on the write instruction, and the response message includes the memory address corresponding to the current read operation (that is, the second memory address); the solid-state hard disk sends the response message of the write instruction to the host.

[0087] 506. The host receives a response message of the write instruction sent by the solid state drive, and reads the data in the second memory address.

[0088] The host determines, based on the response message, that the memory address corresponding to the current read operation is the second memory address, and the host reads the data in the second memory address.

[0089] 507. The host sends the data in the second memory address to the solid state drive.

[0090] It should be noted that the above steps 505 to 507 are only a process of performing a read operation on the host memory based on the write instruction, and the solid state drive can perform multiple read operations on the host memory in the same manner as the above steps 505 to 507, without having to perform the above steps 201 to 204 each time. The execution process of multiple read operations will not be repeated.

[0091] Below through Figure 6 and Figure 7 For the above Figure 5 The process shown is described by way of example. Figure 6 1 is a flow chart of initializing a write instruction in a method for reading a host memory of a solid state drive provided in an embodiment of the present application, such as Figure 6 As shown, taking the solid state drive as a UFS solid state drive as an example, the host allocates a host memory address that the solid state drive can read and write; the host creates a write instruction B, sets the first field of the write instruction B to the target value, associates the starting address of the memory address that the solid state drive can read and write to the write instruction B, and sets the value of the data length field in the write instruction B to the length of the memory address that the solid state drive can read and write; the host sends the write instruction B to the solid state drive. The solid state drive receives the write instruction B. If the first field of the write instruction B is not the target value, the solid state drive processes the write instruction B according to the UFS protocol standard IO process; if the first field of the write instruction B is the target value, the solid state drive obtains and stores the memory address carried by the write instruction B, associates the write instruction B with the target mark, and marks the target of the write instruction B as a write instruction that the solid state drive does not complete the response. The solid state drive sends an initialization response (RTT UPIU) of the write instruction B to the host, and the data length carried by the initialization response of the write instruction is 0. The host receives the initialization response of the write instruction B, and the write instruction initialization process ends.

[0092] Figure 7 is a schematic diagram of a process of a solid state drive reading a host memory based on a write instruction provided in an embodiment of the present application, such as Figure 7As shown, taking the solid state drive as a UFS solid state drive as an example, when the solid state drive has a need to read the host memory, the solid state drive detects the target tag, determines that the write instruction B is associated with the target tag, and then generates a response message (RTTUPIU) of the write instruction B. The solid state drive configures the offset address and data length corresponding to this read operation in the response message, and the solid state drive sends the response message of the write instruction B to the host. The host receives the response message of the write instruction B, determines the offset address and data length corresponding to this read operation according to the response message, and reads data from the host memory according to the offset address and data length, and sends a return message (DATA OUT UPIU) of the write instruction B to the solid state drive based on the read data, the offset address and the data length. The solid state drive receives the return message of the write instruction B and obtains data from the return message.

[0093] In the above method, the SSD does not complete the response to the write instruction, that is, the write instruction is valid for a long time. Whenever the SSD needs to read the host memory, it only needs to send a response message of the write instruction to the host. Therefore, the SSD can perform multiple read operations on the host memory based on the write instruction. The read and write process does not need to rely on the instructions issued by the host, nor does it need the host to construct read and write instructions for the SSD every time. This can improve the efficiency of the SSD in reading the host memory. At the same time, there is no need to modify the framework of the original protocol between the host and the SSD, and the SSD can actively read and write the host memory. Furthermore, since the SSD associates the write instruction with the target tag, when the SSD needs to read the host memory, the SSD The disk detects the target mark, and when a write instruction associated with the target mark is detected, a response message is generated based on the write instruction. This allows the solid-state drive to quickly determine the target instruction when receiving complex instructions, and then generate a response message for the target instruction without detecting the instruction itself, thereby improving the efficiency of generating response messages, and then improving the efficiency of reading the host memory by the solid-state drive; in addition, the solid-state drive sends an initialization response to the host to notify the host that the solid-state drive has received the write instruction. When the write instruction fails to be sent or the initialization response fails to be received due to network failure or other reasons, the host can resend the write instruction to the solid-state drive, thereby ensuring that the solid-state drive can read and write the host memory normally.

[0094] It should be noted that the above Figure 2 and Figure 5 The embodiments shown are introduced by taking the first instruction as a read instruction and a write instruction as examples, but it does not mean that the first instruction can only be a read instruction or only be a write instruction. In addition, in some embodiments, the above two embodiments can be combined according to the read and write requirements of the solid state drive for the host memory, and the embodiments of the present application are not limited to this.

[0095] Figure 8It is a structural diagram of a device for reading and writing host memory of a solid-state hard disk provided in an embodiment of the present application. The device is applied to a solid-state hard disk and includes a receiving module 801 and a sending module 802.

[0096] The receiving module 801 is used to receive a first instruction sent by a host, and the host will not receive a completion response of the first instruction;

[0097] The sending module 802 is used to send a response message of the first instruction to the host based on the first instruction, and the response message instructs the host to perform a read and write operation on the host memory.

[0098] Optionally, the first instruction is sent by the host during an initialization phase.

[0099] Optionally, the first field in the first instruction indicates that the solid state drive does not complete the response to the first instruction; or, the instruction type of the first instruction indicates that the solid state drive does not complete the response to the first instruction.

[0100] Optionally, the first instruction carries a readable and writable memory address of the solid state drive in the host memory.

[0101] Optionally, the sending module 802 is further used for:

[0102] An initialization response of the first instruction is sent to the host, where the data length carried by the initialization response is 0.

[0103] Optionally, the device further comprises:

[0104] The associating module is used to associate the first instruction with a target mark, where the target mark indicates that the solid state drive does not complete the response to the first instruction.

[0105] Optionally, the first instruction is a read instruction, and the sending module 802 is configured to:

[0106] Based on the read instruction, a response message of the read instruction is sent to the host, the response message of the read instruction carries the data in the solid state drive and the first memory address in the host memory, and the response message of the read instruction instructs the host to write the data in the solid state drive to the first memory address.

[0107] Optionally, the first instruction is a write instruction, and the sending module 802 is used to:

[0108] Based on the write instruction, a response message of the write instruction is sent to the host, the response message of the write instruction carries a second memory address in the host memory, and the response message of the write instruction instructs the host to send the data in the second memory address to the solid state drive.

[0109] It should be noted that, in other embodiments, the steps that the above modules are responsible for implementing can be specified as needed, and the above modules can be used to implement different steps in the method of the solid-state hard disk reading and writing the host memory to achieve all the functions of the above device. That is, the device for reading and writing the host memory of the solid-state hard disk provided in the above embodiment only uses the division of the above functional modules as an example when implementing the method of reading and writing the host memory of the solid-state hard disk. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiment belongs to the same concept as the corresponding method embodiment, and its specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0110] Fig. 9 It is a structural diagram of a device for reading and writing host memory of a solid-state hard disk provided in an embodiment of the present application. The device is applied to a host and includes a sending module 901, a receiving module 902 and an execution module 903.

[0111] The sending module 901 is used to send a first instruction to the solid state drive, and the host will not receive a completion response of the first instruction;

[0112] The receiving module 902 is used to receive a response message to the first instruction sent by the solid state drive, where the response message instructs the host to perform a read and write operation on the host memory;

[0113] The execution module 903 is used to execute the read and write operations indicated by the response message.

[0114] Optionally, the sending module 901 is used to:

[0115] The first instruction is sent to the solid state drive during the initialization phase.

[0116] Optionally, the first field in the first instruction indicates that the solid state drive does not complete the response to the first instruction; or, the instruction type of the first instruction indicates that the solid state drive does not complete the response to the first instruction.

[0117] Optionally, the first instruction carries a readable and writable memory address of the solid state drive in the host memory.

[0118] Optionally, the receiving module 902 is further configured to:

[0119] An initialization response to the first instruction sent by the solid state drive is received, where the data length carried by the initialization response is 0.

[0120] Optionally, the first instruction is a read instruction, and the receiving module 902 is configured to:

[0121] receiving a response message to the read instruction sent by the solid state drive, the response message to the read instruction carrying the data in the solid state drive and the first memory address in the host memory, and the response message to the read instruction instructing the host to write the data in the solid state drive into the first memory address;

[0122] The execution module 903 is used to:

[0123] The data in the solid state drive is written into the first memory address.

[0124] Optionally, the first instruction is a write instruction, and the receiving module 902 is used to:

[0125] receiving a response message to the write instruction sent by the solid state drive, the response message to the write instruction carrying a second memory address in the host memory, and the response message to the write instruction instructing the host to send data in the second memory address to the solid state drive;

[0126] The execution module 903 is used to:

[0127] The data in the second memory address is read, and the data in the second memory address is sent to the solid state drive.

[0128] It should be noted that, in other embodiments, the steps that the above modules are responsible for implementing can be specified as needed, and the above modules can be used to implement different steps in the method of the solid-state hard disk reading and writing the host memory to achieve all the functions of the above device. That is, the device for reading and writing the host memory of the solid-state hard disk provided in the above embodiment only uses the division of the above functional modules as an example when implementing the method of reading and writing the host memory of the solid-state hard disk. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiment belongs to the same concept as the corresponding method embodiment, and its specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0129] Among them, the receiving module 801, the sending module 802, the sending module 901, the receiving module 902 and the execution module 903 can all be implemented by software, or can be implemented by hardware. Exemplarily, the implementation of the receiving module 801 is introduced below by taking the receiving module 801 as an example. Similarly, the implementation of the sending module 802, the sending module 901, the receiving module 902 and the execution module 903 can refer to the implementation of the receiving module 801.

[0130] As an example of a software functional unit, the receiving module 801 may include code running on a computing instance. Among them, the computing instance may include at least one of a physical host (computing device), a virtual machine, and a container. Further, the above-mentioned computing instance may be one or more. For example, the receiving module 801 may include code running on multiple hosts / virtual machines / containers. It should be noted that the multiple hosts / virtual machines / containers used to run the code may be distributed in the same region (region) or in different regions. Furthermore, the multiple hosts / virtual machines / containers used to run the code may be distributed in the same availability zone (AZ) or in different AZs, each AZ including a data center or multiple data centers with similar geographical locations. Among them, usually a region may include multiple AZs.

[0131] Similarly, multiple hosts / virtual machines / containers used to run the code can be distributed in the same virtual private cloud (VPC) or in multiple VPCs. Usually, a VPC is set up in a region. For cross-region communication between two VPCs in the same region and between VPCs in different regions, a communication gateway needs to be set up in each VPC to achieve interconnection between VPCs through the communication gateway.

[0132] As an example of a hardware functional unit, the receiving module 801 may include at least one computing device, such as a server, etc. Alternatively, the receiving module 801 may also be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL) or any combination thereof.

[0133] The multiple computing devices included in the receiving module 801 can be distributed in the same region or in different regions. The multiple computing devices included in the receiving module 801 can be distributed in the same AZ or in different AZs. Similarly, the multiple computing devices included in the receiving module 801 can be distributed in the same VPC or in multiple VPCs. The multiple computing devices can be any combination of computing devices such as servers, ASICs, PLDs, CPLDs, FPGAs, and GALs.

[0134] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, stored data, displayed data, etc.) and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant laws, regulations and standards of relevant countries and regions. For example, the data involved in this application are all obtained with full authorization.

[0135] Those of ordinary skill in the art will appreciate that the various method steps and units described in the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the steps and components of each embodiment have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those of ordinary skill in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0136] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0137] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the unit is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or it can be an electrical, mechanical or other form of connection.

[0138] The unit described as a separate component may or may not be physically separated, and the component displayed as a unit may or may not be a physical unit, that is, it may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment of the present application.

[0139] In addition, each unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or software unit.

[0140] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computing device (which can be a personal computer, a server, or a computing device, etc.) to execute all or part of the steps of the method in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), RAM, disk or optical disk and other media that can store program codes.

[0141] In this application, the terms "first", "second", etc. are used to distinguish between identical or similar items with substantially the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor is there a limitation on the quantity and execution order. It should also be understood that although the following description uses the terms first, second, etc. to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another element.

[0142] The term "at least one" in this application means one or more, and the term "plurality" in this application means two or more. The terms "system" and "network" are often used interchangeably herein.

[0143] It should also be understood that the term "if" may be interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting." Similarly, the phrase "if it is determined that ..." or "if [a stated condition or event] is detected" may be interpreted to mean "upon determining that ..." or "in response to determining that ..." or "upon detecting [a stated condition or event]" or "in response to detecting [a stated condition or event]," depending on the context.

[0144] The above description is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

[0145] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer program instructions. When the computer program instructions are loaded and executed on a computer, the process or function according to the embodiment of the application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.

[0146] The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wired or wireless means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a digital video disc (DVD), or a semiconductor medium (e.g., a solid-state drive)), etc.

[0147] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0148] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for reading and writing host memory of a solid state hard disk, characterized in that: The method comprises: The host sends a first instruction to the solid state drive, and the host does not receive a completion response of the first instruction; The solid state drive receives the first instruction, and based on the first instruction, sends a response message of the first instruction to the host, wherein the response message instructs the host to perform a read and write operation on the host memory; The host receives the response message and executes the read and write operations indicated by the response message.

2. The method according to claim 1, characterized in that The host sends a first instruction to the solid state drive, including: The host sends the first instruction to the solid state drive during an initialization phase.

3. The method according to claim 1, characterized in that: The first field in the first instruction indicates that the solid state drive does not complete the first instruction in response; or, the instruction type of the first instruction indicates that the solid state drive does not complete the first instruction in response.

4. The method according to claim 1, characterized in that The first instruction carries a readable and writable memory address of the solid state drive in the host memory.

5. The method according to any one of claims 1 to 4, characterized in that The method further comprises: The solid state drive sends an initialization response of the first instruction to the host, and the data length carried by the initialization response is 0.

6. The method according to any one of claims 1 to 5, characterized in that The method further comprises: The solid state drive associates the first instruction with a target tag, and the target tag indicates that the solid state drive does not complete the first instruction.

7. The method according to any one of claims 1 to 6, characterized in that The first instruction is a read instruction, and the sending a response message of the first instruction to the host based on the first instruction includes: Based on the read instruction, a response message of the read instruction is sent to the host, the response message of the read instruction carries the data in the solid-state drive and the first memory address in the host memory, and the response message of the read instruction instructs the host to write the data in the solid-state drive to the first memory address.

8. The method according to any one of claims 1 to 6, characterized in that The first instruction is a write instruction, and the sending a response message of the first instruction to the host based on the first instruction includes: Based on the write instruction, a response message of the write instruction is sent to the host, the response message of the write instruction carries a second memory address in the host memory, and the response message of the write instruction instructs the host to send the data in the second memory address to the solid state drive.

9. A solid state hard disk, characterized in that: It includes an interface, a processor and a storage medium, wherein the interface is used to communicate with a host, the storage medium is used to store data, and the processor is used to execute the steps performed by the solid state drive in any one of the methods of claim 1 to claim 8.

10. A host, characterized in that: It comprises an interface, a processor and a memory, wherein the interface is used to communicate with a solid state drive, the memory is used to store data, and the processor is used to execute the steps performed by the host in any one of the methods of claims 1 to 8.

11. A storage system, characterized in that: The storage system includes the solid-state hard disk as described in claim 9 and the host as described in claim 10, so that the storage system executes the method of reading and writing host memory by the solid-state hard disk as described in any one of claims 1 to 8.

Images