Heterogeneous many-core chip task scheduling method for realizing core group prejudgment frequency modulation

Abstract

The invention discloses a heterogeneous many-core chip task scheduling method for realizing core group prejudgment frequency modulation, and relates to the field of heterogeneous many-core chips.In the heterogeneous many-core chip task scheduling method, when a main core issues to-be-executed tasks to a task storage space, task description information is added to each to-be-executed task; when a task scheduler schedules and allocates any target to-be-executed task, the task frequency can be pre-determined according to the task description information of the target to-be-executed task and whether a predetermined instruction is included or not; and initiating frequency modulation request interruption to trigger a frequency modulation management module to adjust a working clock of the target slave core group under the condition that the execution performance of the target slave core group on the target to-be-executed task is not ideal, so that the target slave core group can execute the target to-be-executed task according to the working frequency matched with the task frequency of the target to-be-executed task. Therefore, the execution performance of the target to-be-executed task is optimized, and the risk that instant large current is generated in the task execution period is also avoided.

Description

Technical Field

[0001] The present application relates to the field of heterogeneous many-core chips, and in particular to a heterogeneous many-core chip task scheduling method for implementing core group pre-judgment frequency modulation. Background Art

[0002] Heterogeneous many-core chips use a combination of master cores and slave cores to process various computing tasks. Usually, the master core issues tasks and the slave cores execute them. The combined use of master cores and slave cores can provide higher computing power, computing density, and performance-to-power ratio, and are therefore widely used in various high-performance computing systems.

[0003] As the operating frequency and integration of chips continue to increase, chip power consumption gradually increases. Therefore, various frequency modulation and temperature control technologies are applied to chips. By adjusting the operating frequency of the chip, the chip power consumption can be effectively reduced, thereby meeting the low power consumption requirements. Frequency modulation and temperature control technology is also introduced in existing heterogeneous multi-core chips. The scheduling subsystem is used in heterogeneous multi-core chips to be responsible for task scheduling, so as to assign the tasks issued by the master core to the appropriate slave core for execution. In addition, the scheduling subsystem also uses dynamic voltage and frequency scaling (DVFS) technology to adjust the working frequency of the slave core according to the task load of the slave core, that is, the scheduling subsystem monitors the task load on the slave core in real time. When the task load on the slave core is low, the working frequency of the slave core is lowered. When the task load running on the slave core is high, the working frequency of the slave core is increased, so that the slave core works at different frequencies according to the actual task load requirements. However, since the tasks performed by the slave core are complex and diverse, the operating frequency of the slave core will affect its performance when executing different tasks. Therefore, adjusting the operating frequency only according to the task load running on the slave core will affect the execution performance of the slave core on the task, and may even cause the slave core to generate an instantaneous large current overshoot when executing the task, causing an instantaneous voltage drop, resulting in power failure and card drop. At this time, a restart is required, affecting the normal operation of the chip and the entire system. Summary of the invention

[0004] In view of the above problems and technical requirements, this application proposes a heterogeneous multi-core chip task scheduling method that realizes core group pre-judgment frequency modulation. The technical solution of this application is as follows:

[0005] A method for scheduling tasks of a heterogeneous many-core chip for realizing core group pre-judgment frequency modulation, wherein the heterogeneous many-core chip includes a master core and multiple slave cores, each slave core group includes multiple slave cores forming an array, and the heterogeneous many-core chip also includes a task scheduler, a frequency modulation management module, and a task storage space. The method for scheduling tasks of the heterogeneous many-core chip includes:

[0006] After the main core adds corresponding task description information for each task to be executed, the task to be executed is sent to the task storage space; the task description information corresponding to each task to be executed carries the task frequency and interrupt validity identifier of the task to be executed, and the main core sets the interrupt validity identifier to a valid value when detecting that the task to be executed contains a predetermined instruction; wherein the predetermined instruction is an instruction with a risk of instantaneous current overshoot;

[0007] The task scheduler reads the target task to be executed from the task storage space and parses the corresponding task description information to determine the task frequency and interrupt validity identifier of the target task to be executed; when the task scheduler determines that the task frequency of the target task to be executed does not match the clock frequency of the current working clock of the target slave core group and determines that the interrupt validity identifier of the target task to be executed is a valid value, it initiates a frequency modulation interrupt request to the frequency modulation management module; the target slave core group is a slave core group used to execute the target task to be executed;

[0008] The frequency modulation management module reads the task frequency of the target task to be executed from the task scheduler in response to the received frequency modulation interrupt request, and controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency;

[0009] The target slave core group executes the target to-be-executed tasks assigned by the task scheduler according to the working clock provided by the clock module.

[0010] Its further technical solution is that the task description information corresponding to each task to be executed also carries a synchronization identifier, and the main core configures the synchronization identifier according to the instruction execution order of the predetermined instructions in the task to be executed; the task scheduler parses the task description information corresponding to the target task to be executed to obtain the synchronization identifier, and allocates the target task to be executed to the target slave core group according to the working mode matched by the synchronization identifier.

[0011] A further technical solution is that the main core configures the synchronization identifier according to the instruction execution order of the predetermined instructions in the task to be executed, including:

[0012] estimating the estimated execution time for the slave core to complete program initialization and execute the predetermined instructions in the instruction execution order of the task to be executed, and estimating the estimated frequency modulation time for the frequency modulation management module to control the clock module to adjust the clock frequency provided to the working clock of the slave core to match the task frequency;

[0013] When the estimated execution time is greater than the estimated frequency modulation time, the synchronization identifier is set to a valid value; otherwise, the synchronization identifier is set to an invalid value.

[0014] A further technical solution is that the task scheduler allocates the target to-be-executed task to the target slave core group according to the working mode matched by the synchronization identifier, including:

[0015] When the synchronization identifier parsed by the task scheduler is a valid value, the task scheduler synchronously allocates the target to-be-executed task to the target slave core group when initiating a frequency modulation interrupt request to the frequency modulation management module;

[0016] In the process of the frequency modulation management module controlling the clock module to adjust the clock frequency of the working clock provided to the target slave core group, the target slave core group performs program initialization and after completing the program initialization, executes each instruction in the target task to be executed in sequence according to the instruction execution order of the target task to be executed; and before the target slave core group executes the predetermined instruction in the target task to be executed, the frequency modulation management module completes the clock frequency adjustment of the working clock of the target slave core group.

[0017] A further technical solution is that the task scheduler allocates the target to-be-executed task to the target slave core group according to the working mode matched by the synchronization identifier, including:

[0018] When the synchronization identifier parsed by the task scheduler is an invalid value, the task scheduler initiates a frequency modulation interrupt request to the frequency modulation management module, and waits until it is determined that the frequency modulation management module has completed the clock frequency adjustment of the working clock of the target slave core group, and then assigns the target task to be executed to the target slave core group.

[0019] A further technical solution is that the heterogeneous multi-core chip task scheduling method further includes:

[0020] The frequency modulation management module clears the frequency modulation interrupt request initiated by the task scheduler after the control clock module adjusts the clock frequency of the working clock provided to the target slave core group to match the task frequency;

[0021] After detecting that the frequency modulation interrupt request is cleared, the task scheduler determines that the frequency modulation management module has completed the adjustment of the clock frequency of the working clock of the target slave core group.

[0022] A further technical solution is that the main core adds an interrupt valid identifier to each task to be executed, and further includes:

[0023] The main core sets the interrupt validity identifier to a valid value when detecting that the task to be executed does not include the predetermined instruction and the frequency modulation management module is in a normal frequency modulation state;

[0024] When the main core detects that the task to be executed does not include the predetermined instruction and the frequency modulation management module is in the frequency modulation shielding state, the interrupt validity identifier is set to an invalid value.

[0025] A further technical solution is that each slave core group is connected to multiple clock sources in the clock module, and the frequency modulation management module controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency, including:

[0026] The frequency modulation management module detects the clock frequency of the real-time working clock provided by the clock source currently connected to the target slave core group to the target slave core group;

[0027] When the clock frequency of the real-time working clock of the target slave core group matches the task frequency of the target task to be executed, the frequency modulation management module keeps the real-time working clock of the target slave core group unchanged and determines that the clock frequency adjustment of the working clock of the target slave core group is completed;

[0028] When the clock frequency of the real-time working clock of the target slave core group does not match the task frequency of the target task to be executed, but there is a working clock provided by other clock sources among the clock sources connected to the target slave core group whose clock frequency matches the task frequency of the target task to be executed, the frequency modulation management module controls the switching to the working clock provided by other clock sources to the target slave core group that matches the task frequency of the target task to be executed, and determines that the clock frequency adjustment of the working clock of the target slave core group is completed;

[0029] When the clock frequency of the real-time working clock of the target slave core group does not match the task frequency of the target task to be executed, and the clock frequencies of the working clocks provided by all clock sources connected to the target slave core group do not match the task frequency of the target task to be executed, the frequency modulation management module controls the clock source currently connected to the target slave core group to adjust the clock frequency of the working clock of the target slave core group to match the task frequency.

[0030] A further technical solution is that the task scheduler detects whether the task frequency of the target task to be executed matches the clock frequency of the current working clock of the target slave core group, including:

[0031] When the task scheduler detects that the task frequency of the target task to be executed matches the task frequency of the previous task to be executed assigned to the target slave core group, it is determined that the task frequency of the target task to be executed detected by the task scheduler matches the clock frequency of the current working clock of the target slave core group; otherwise, it is determined that the task frequency of the target task to be executed detected by the task scheduler does not match the clock frequency of the current working clock of the target slave core group.

[0032] A further technical solution is that the heterogeneous multi-core chip task scheduling method further includes:

[0033] When the task scheduler determines that the task frequency of the target task to be executed matches the clock frequency of the current working clock of the target slave core group, or detects that the interrupt validity identifier of the target task to be executed is an invalid value, it directly assigns the target task to be executed to the corresponding target slave core group.

[0034] The beneficial technical effects of this application are:

[0035] The present application discloses a heterogeneous many-core chip task scheduling method for realizing core group pre-judgment frequency modulation. In the heterogeneous many-core chip task scheduling method, when the master core sends the task to be executed to the task storage space, it also adds task description information to each task to be executed to carry the task frequency and an interrupt validity identifier indicating whether a predetermined instruction is included, so that when the task scheduler schedules and allocates any target task to be executed, it can pre-determine the task frequency and whether the task status of the predetermined instruction is included according to the task description information of the target task to be executed, and when it is predicted that the execution performance of the target slave core group for the target task to be executed is not ideal, a frequency modulation request interrupt is initiated to trigger the frequency modulation management module to adjust the working clock of the target slave core group, so that the target slave core group can execute the target task to be executed at a working frequency that matches the task frequency of the target task to be executed, thereby optimizing the execution performance of the target task to be executed and avoiding the risk of instantaneous large current during task execution.

[0036] The task description information added by the main core to each task to be executed also includes a synchronization identifier related to the instruction execution order of the predetermined instructions therein. The task scheduler can issue the target task to be executed while initiating a frequency modulation request interrupt, or initiate a frequency modulation request interrupt first and then issue the target task to be executed after waiting for the frequency modulation to be completed, depending on the value of the synchronization identifier. In this way, different working modes can be adopted according to the different predetermined instructions contained in the target task to be executed. Under the premise of avoiding risks such as instantaneous large current during task execution, the task execution efficiency can be improved and the waiting time caused by frequency modulation can be reduced.

[0037] The method is performed by the task scheduler to parse the task description information and implement the scheduling, and the frequency modulation management module performs the frequency modulation operation. The frequency modulation management module performs the frequency modulation under the interrupt trigger of the task scheduler, and there is no need to monitor the operation of the slave core in real time, thereby reducing the occupation of the frequency modulation management module. The frequency modulation operation of the slave core is completed by the frequency modulation management module, and the slave core itself does not participate in the frequency modulation. Therefore, the slave core will not be disturbed during the frequency modulation process and can execute the program normally, thereby reducing the impact of the frequency modulation process on the slave core task execution process. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a system architecture block diagram in one embodiment of the present application.

[0039] Figure 2 It is a flow chart of the execution method of the task scheduler in one embodiment of the present application.

[0040] Figure 3 It is a flow chart of a heterogeneous multi-core chip task scheduling method in one embodiment of the present application.

[0041] Figure 4 This is a flow chart of an execution method of a task scheduler in another embodiment of the present application.

[0042] Figure 5 This is a flow chart of a method for scheduling heterogeneous multi-core chips in another embodiment of the present application. DETAILED DESCRIPTION

[0043] The specific implementation of the present application is further described below in conjunction with the accompanying drawings.

[0044] The present application discloses a heterogeneous multi-core chip task scheduling method for realizing core group pre-judgment frequency modulation, wherein the heterogeneous multi-core chip includes a master core and multiple slave core groups, each slave core group includes multiple slave cores constituting an array. All slave cores in the same slave core group use the same working clock and are used to jointly complete a task.

[0045] The heterogeneous multi-core chip of this application also includes a task scheduler, a frequency modulation management module and a task storage space. Please refer to Figure 1 As shown in the system structure diagram, the master core can read and write the task storage space, and the task scheduler can read and write the task storage space. The task scheduler communicates with the frequency modulation management module, and the task scheduler also communicates with the slave core. The frequency modulation management module connects and controls the clock module in the heterogeneous multi-core chip that is used to provide the working clock to the slave core.

[0046] based on Figure 1 As shown in the system structure diagram, the heterogeneous multi-core chip task scheduling method includes the following processes:

[0047] 1. After the main core adds corresponding task description information for each task to be executed, it sends the task to be executed carrying the task description information to the task storage space.

[0048] The task description information corresponding to each task to be executed carries the task frequency and the interrupt validity identifier of the task to be executed. When the main core detects that the task to be executed includes a predetermined instruction, the interrupt validity identifier is set to a valid value.

[0049] The main core can directly determine the task frequency of each task to be executed when generating it. In actual implementation, the task frequency of each task to be executed is usually a frequency range. Therefore, one embodiment uses a frequency gear value to represent the task frequency of the task to be executed. Different frequency gear values ​​represent different frequency ranges. The frequency gear value can be customized. Then the task description information corresponding to each task to be executed includes the frequency gear value of its task frequency.

[0050] In addition, the master core will analyze the instructions in the task to be executed to add an interrupt valid identifier to it. When it is detected that the task to be executed contains a predetermined instruction, its interrupt valid identifier is set to a valid value. The predetermined instruction is an instruction with a risk of instantaneous current overshoot, that is, an instruction that is prone to generate a large instantaneous current. If multiple slave cores in the same slave core group execute predetermined instructions, it is easy to cause voltage drop and instantaneous high current risk. Therefore, when the task to be executed contains a predetermined instruction, it means that the slave core group is more likely to generate a risk of instantaneous current overshoot when executing the task to be executed. Which instructions belong to the predetermined instruction is pre-configured.

[0051] When it is detected that the task to be executed does not contain the predetermined instruction, it means that the risk of instantaneous current overshoot generated by the slave core group when executing the task to be executed is low. One approach is to directly set the interrupt validity identifier to an invalid value. In another embodiment, considering that when the operating frequency of the slave core group does not match the task frequency of the task to be executed, even if the risk of instantaneous current overshoot generated by the slave core group when executing the task to be executed is low, due to the frequency mismatch problem, the performance of the slave core group when executing the task to be executed will not be ideal, so the interrupt validity identifier can also be set to a valid value.

[0052] Or in another embodiment, since the present application needs to use the frequency modulation management module to control and adjust the operating frequency of the slave core group, the master core detects the working state of the frequency modulation management module and determines whether to set the interrupt validity identifier to a valid value or an invalid value according to the working state of the frequency modulation management module, including:

[0053] When the master core detects that the task to be executed does not contain the predetermined instructions and the frequency modulation management module is in the normal frequency modulation state, the interrupt valid identifier is set to a valid value. The normal frequency modulation state of the frequency modulation management module is a state in which the working frequency of the slave core group can be adjusted normally. At this time, although the risk of instantaneous current overshoot generated when the slave core group executes the task to be executed is relatively small, the performance of the slave core group when executing the task to be executed is given priority, so the valid identifier is set to a valid value.

[0054] When the master core detects that the task to be executed does not contain the scheduled instruction and the frequency modulation management module is in the shielded frequency modulation state, the interrupt valid identifier is set to an invalid value. The shielded frequency modulation state of the frequency modulation management module is the state when the frequency modulation management module is busy or executing other tasks. At this time, since the risk of instantaneous current overshoot is small when the slave core group executes the task to be executed, it is allowed to temporarily reduce the execution performance of the task to be executed under the condition of meeting safety, so the valid identifier is set to an invalid value.

[0055] 2. The various tasks to be executed that are sent by the main core to the task storage space are read and scheduled by the task scheduler. For the convenience of description, the tasks to be executed that are currently read by the task scheduler are defined as the target tasks to be executed. The task scheduler will first determine the target slave core group. The target slave core group is one of the slave core groups used to execute the target tasks to be executed. This part is similar to the existing practice. The task load of each slave core group can be used to determine which slave core group to use as the target slave core group. This application will not go into details. During actual operation, the task scheduler will manage and schedule multiple slave core groups. Different target tasks to be executed may be assigned to different target slave core groups, but the task scheduling process is the same.

[0056] Since the tasks to be executed sent from the main core to the task scheduler in this application all carry task description information, the target tasks to be executed read by the task scheduler from the task storage space also carry task description information. The task scheduler does not directly send the target tasks to be executed to the target slave core group, but first parses the task description information of the target tasks to be executed to determine the task frequency and interrupt validity identifier of the target tasks to be executed.

[0057] 3. When the task scheduler determines that the task frequency of the target task to be executed does not match the clock frequency of the current working clock of the target slave core group and determines that the interrupt valid identifier of the target task to be executed is a valid value, the task scheduler can predict that the execution performance of the target slave core group when executing the target task to be executed according to the current working clock is not ideal, and thus initiates a frequency modulation interrupt request to the frequency modulation management module. Figure 2 The execution flow diagram of the task scheduler shown in Figure 3 The task scheduling process in this case is shown in FIG.

[0058] In this step, when the difference between the task frequency of the target task to be executed and the clock frequency of the current working clock of the target slave core group reaches the frequency difference threshold, it is determined that the task frequency of the target task to be executed does not match the clock frequency of the current working clock of the target slave core group; otherwise, it is determined that the task frequency of the target task to be executed matches the clock frequency of the current working clock of the target slave core group.

[0059] When the interrupt valid identifier of the target task to be executed is a valid value, it means that the target task to be executed contains a predetermined instruction with a risk of instantaneous current overshoot. At this time, if the task frequency of the target task to be executed does not match the clock frequency of the current working clock of the target slave core group, the target slave core group is at a great risk of abnormal conditions such as instantaneous current overshoot when executing the target task to be executed. The clock frequency of the working clock of the target slave core group must be adjusted to ensure that the target task to be executed is within the required task frequency during the execution interval, thereby avoiding abnormal conditions such as instantaneous current overshoot, and also enabling the target slave core group to have better execution performance on the target task to be executed.

[0060] Since the task scheduler cannot directly detect and perceive the clock frequency of the actual working clock of the target slave core group, the task scheduler infers the clock frequency of the current working clock of the target slave core group through the task frequencies of the tasks that have been assigned to the target slave core group. In one embodiment: the task scheduler registers the task frequency of the most recent task assigned to each slave core group, and then the task scheduler reads the registered task frequency of the last task to be executed assigned to the target slave core group. When it is detected that the task frequency of the target task to be executed matches the task frequency of the last task to be executed assigned to the target slave core group, it is determined that the task frequency of the target task to be executed detected by the task scheduler matches the clock frequency of the current working clock of the target slave core group. Otherwise, it is determined that the task frequency of the target task to be executed detected by the task scheduler does not match the clock frequency of the current working clock of the target slave core group. As described above, the task frequency of each task to be executed is usually represented by a corresponding frequency gear value. When the frequency gear value of the target task to be executed is consistent with the frequency gear value of the last task to be executed assigned to the target slave core group, it indicates that the two clock frequencies match.

[0061] When the task scheduler determines that the task frequency of the target task to be executed matches the clock frequency of the current working clock of the target slave core group, or detects that the interrupt validity identifier of the target task to be executed is an invalid value, the task scheduler can predict that the target slave core group will have better execution performance when directly executing the target task to be executed according to the current working clock, and directly assigns the target task to be executed to the corresponding target slave core group.

[0062] 4. The frequency modulation management module reads the task frequency of the target task to be executed from the task scheduler in response to the received frequency modulation interrupt request, and controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency.

[0063] In this application, the task scheduler actively reports the frequency modulation interrupt request to trigger the frequency modulation operation of the frequency modulation management module. The frequency modulation management module does not need to monitor the task scheduling process in real time, thereby reducing the time occupied by the frequency modulation management module.

[0064] When the frequency modulation management module controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency, it first detects the clock frequency of the real-time working clock provided to the target slave core group by the clock source currently connected to the target slave core group. As mentioned above, when the task scheduler compares the task frequency of the target task to be executed with the clock frequency of the current working clock of the target slave core group, it uses the task frequency of the previous task assigned to the target slave core group as the clock frequency of the current working clock of the target slave core group. However, the clock frequency of the target slave core group determined in this way is only a theoretical value, and the clock frequency of the real-time working clock actually used by the target slave core group may not be equal to the theoretical value. For example, the target slave core group may automatically reduce the clock frequency due to chip overheating during the execution of the previous task, which will cause the real-time working clock of the target slave core group to be lower than the theoretical clock frequency determined by the task scheduler.

[0065] Therefore, after receiving the frequency modulation interrupt request, the frequency modulation management module does not directly perform the frequency modulation operation, but further detects the clock frequency of the real-time working clock of the target slave core group, and determines whether the clock frequency of the real-time working clock matches the task frequency of the target task to be executed.

[0066] When the clock frequency of the real-time working clock of the target slave core group exactly matches the task frequency of the target task to be executed, the frequency modulation management module directly keeps the real-time working clock of the target slave core group unchanged and determines that the clock frequency adjustment of the working clock of the target slave core group is completed.

[0067] When the clock frequency of the real-time working clock of the target slave core group does not match the task frequency of the target task to be executed, the frequency modulation management module first detects whether there is a working clock provided by other clock sources in the clock source connected to the target slave core group whose clock frequency matches the task frequency of the target task to be executed. This is because in a heterogeneous multi-core chip, the clock module generally uses multiple clock sources to provide the same slave core group, so each slave core group will be connected to multiple clock sources in the clock module, and different clock sources output different working clocks. When the clock source connected to the target slave core group has a working clock provided by other clock sources whose clock frequency matches the task frequency of the target task to be executed, it is not necessary to adjust the working clock output by the clock source at this time. The frequency modulation management module only needs to control the switch to provide the target slave core group with a working clock that matches the task frequency of the target task to be executed by other clock sources. It is not necessary to actually adjust the clock source. After the adjustment, it can be determined that the clock frequency adjustment of the working clock of the target slave core group is completed.

[0068] When the clock frequency of the real-time working clock of the target slave core group does not match the task frequency of the target task to be executed, and the frequency modulation management module detects that the clock frequencies of the working clocks provided by all clock sources connected to the target slave core group do not match the task frequency of the target task to be executed, switching the clock source is no longer feasible. At this time, the frequency modulation management module controls the clock source currently connected to the target slave core group to adjust the clock frequency of the working clock of the target slave core group to match the task frequency.

[0069] After the frequency modulation management module controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency, the frequency modulation interrupt request initiated by the task scheduler is cleared.

[0070] 5. The target slave core group executes the target pending task assigned by the task scheduler according to the working clock provided by the clock module. When the target slave core group completes the target pending task, the task scheduler will also write the task execution result of the target pending task into the task storage space and receive the write feedback returned by the task storage space.

[0071] In one embodiment, after the task scheduler initiates a frequency modulation interrupt request to the frequency modulation management module, it waits until it is determined that the frequency modulation management module has completed the adjustment of the clock frequency of the target slave core group's working clock, and then assigns the target to-be-executed task to the target slave core group, thereby ensuring that the target slave core group can execute the target to-be-executed task according to the adjusted clock frequency, avoiding instantaneous current overshoot and improving task execution. Among them, when the task scheduler detects that the frequency modulation interrupt request is cleared, it is determined that the frequency modulation management module has completed the adjustment of the clock frequency of the target slave core group's working clock, Figure 2 and Figure 3 The flowchart of this is taken as an example.

[0072] However, in order to improve the efficiency of task execution, considering that the risk of instantaneous high current is often caused by the target slave core group executing the predetermined instructions according to the mismatched working frequency, the risk of instantaneous high current can be avoided as long as the target slave core group can execute the predetermined instructions according to the working frequency that matches the task frequency. Therefore, in another embodiment, the task description information added by the main core for each task to be executed also carries a synchronization identifier, and the main core configures the synchronization identifier according to the instruction execution order of the predetermined instructions in the task to be executed. As a result, the task scheduler can also obtain the synchronization identifier when parsing the task description information corresponding to the target task to be executed, and assign the target task to be executed to the target slave core group according to the working mode matched by the synchronization identifier. In this embodiment, the task scheduler can adopt two different working modes according to different values ​​of the synchronization identifier: synchronously sending the target task to be executed with the frequency modulation interrupt request, or waiting for the frequency modulation management module to complete the adjustment of the clock frequency of the working clock of the target slave core group before sending the target task to be executed.

[0073] When the slave core group executes a task, it will first initialize the program, and after completing the program initialization, it will execute each instruction in the task in sequence. In one embodiment, the master core estimates the estimated execution time for the slave core group to complete the program initialization and execute the predetermined instructions in the order of the instruction execution of the task to be executed, and estimates the estimated frequency modulation management module to control the clock module to adjust the clock frequency of the working clock provided to the slave core group to match the task frequency. When the estimated execution time is greater than the estimated frequency modulation time, the synchronization identifier is set to a valid value, otherwise the synchronization identifier is set to an invalid value.

[0074] Then in this embodiment, when the synchronization identifier parsed by the task scheduler is a valid value, it means that the estimated execution time of the target slave core group to execute the target task to be executed is greater than the estimated frequency modulation time. At this time, even if the target slave core group and the frequency modulation management module start working synchronously, when the target slave core group completes the program initialization and executes the predetermined instruction of the target task to be executed, the frequency modulation management module has also completed the frequency modulation action, thereby ensuring that the target slave core group has adopted a working clock that matches the task frequency of the target task to be executed when executing the predetermined instruction. Then, when the task scheduler initiates a frequency modulation interrupt request to the frequency modulation management module, it synchronously assigns the target task to be executed to the target slave core group. Since the target slave core group passively adjusts the working clock and does not participate in the frequency modulation process, the target slave core group can execute the program normally during the frequency modulation process of the frequency modulation management module. In the process of the frequency modulation management module controlling the clock module to adjust the clock frequency of the working clock provided to the target slave core group, the target slave core group performs program initialization and after completing the program initialization, executes each instruction in the target task to be executed in sequence according to the instruction execution order of the target task to be executed. Before the target slave core group executes the predetermined instruction in the target task to be executed, the frequency modulation management module has completed the adjustment of the clock frequency of the working clock of the target slave core group. This approach can improve the task execution efficiency and avoid excessive waiting time on the basis of ensuring the task execution performance. Figure 4 The execution flow chart of the task scheduler shown in Figure 5 The task scheduling flowchart shown takes this situation as an example.

[0075] When the synchronization identifier parsed by the task scheduler is an invalid value, it means that the estimated execution time of the target slave core group to execute the target task to be executed is not greater than the estimated frequency modulation time. At this time, if the target slave core group and the frequency modulation management module start working synchronously, when the target slave core group completes the program initialization and executes the scheduled instructions of the target task to be executed, the frequency modulation management module has not yet completed the clock frequency adjustment of the working clock of the target slave core group. The target slave core group will generate a risk of instantaneous high current when executing the scheduled instructions according to the mismatched working clock. Therefore, after the task scheduler initiates a frequency modulation interrupt request to the frequency modulation management module, it waits until it is determined that the frequency modulation management module has completed the clock frequency adjustment of the working clock of the target slave core group, and then assigns the target task to be executed to the target slave core group to ensure safety and task execution performance.

[0076] The above are only preferred embodiments of the present application, and the present application is not limited to the above embodiments. It is understood that other improvements and changes directly derived or associated by those skilled in the art without departing from the spirit and concept of the present application should be considered to be included in the protection scope of the present application.

Claims

1. A method for scheduling tasks on a heterogeneous many-core chip that implements core group pre-determination frequency modulation, wherein the heterogeneous many-core chip includes a master core and multiple slave core groups, each slave core group includes multiple slave cores forming an array, characterized in that: The heterogeneous many-core chip further includes a task scheduler, a frequency modulation management module and a task storage space. The heterogeneous many-core chip task scheduling method includes: After the main core adds corresponding task description information for each task to be executed, the main core sends the task to be executed to the task storage space; the task description information corresponding to each task to be executed carries the task frequency and interrupt validity identifier of the task to be executed, and the main core sets the interrupt validity identifier to a valid value when detecting that the task to be executed contains a predetermined instruction; wherein the predetermined instruction is an instruction with a risk of instantaneous current overshoot; The task scheduler reads the target task to be executed from the task storage space and parses the corresponding task description information to determine the task frequency and interrupt validity identifier of the target task to be executed; when the task scheduler determines that the task frequency of the target task to be executed does not match the clock frequency of the current working clock of the target slave core group and determines that the interrupt validity identifier of the target task to be executed is a valid value, the task scheduler initiates a frequency modulation interrupt request to the frequency modulation management module; the target slave core group is a slave core group used to execute the target task to be executed; The frequency modulation management module reads the task frequency of the target to-be-executed task from the task scheduler in response to the received frequency modulation interrupt request, and controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency; The target slave core group executes the target to-be-executed task assigned by the task scheduler according to the working clock provided by the clock module.

2. The heterogeneous multi-core chip task scheduling method according to claim 1, characterized in that: The task description information corresponding to each task to be executed also carries a synchronization identifier, and the master core configures the synchronization identifier according to the instruction execution order of the predetermined instructions in the task to be executed; the task scheduler parses the task description information corresponding to the target task to be executed to obtain the synchronization identifier, and allocates the target task to be executed to the target slave core group according to the working mode matched by the synchronization identifier.

3. The heterogeneous multi-core chip task scheduling method according to claim 2, characterized in that: The main core configures the synchronization identifier according to the instruction execution order of the predetermined instructions in the task to be executed, including: estimating the estimated execution time for the slave core group to complete program initialization and execute the predetermined instruction in the instruction execution order of the task to be executed, and estimating the estimated frequency modulation time for the frequency modulation management module to control the clock module to adjust the clock frequency provided to the working clock of the slave core group to match the task frequency; In a case where the estimated execution time is greater than the estimated frequency modulation time, the synchronization identifier is set to a valid value; otherwise, the synchronization identifier is set to an invalid value.

4. The heterogeneous multi-core chip task scheduling method according to claim 3, characterized in that: The task scheduler assigns the target to-be-executed task to the target slave core group according to the working mode matched by the synchronization identifier, including: When the synchronization identifier parsed by the task scheduler is a valid value, the task scheduler synchronously allocates the target to-be-executed task to the target slave core group when initiating a frequency modulation interrupt request to the frequency modulation management module; In the process of the frequency modulation management module controlling the clock module to adjust the clock frequency of the working clock provided to the target slave core group, the target slave core group performs program initialization and after completing the program initialization, executes each instruction in the target task to be executed in sequence according to the instruction execution order of the target task to be executed; and before the target slave core group executes the predetermined instruction in the target task to be executed, the frequency modulation management module completes the adjustment of the clock frequency of the working clock of the target slave core group.

5. The heterogeneous multi-core chip task scheduling method according to claim 3, characterized in that: The task scheduler assigns the target to-be-executed task to the target slave core group according to the working mode matched by the synchronization identifier, including: When the synchronization identifier parsed by the task scheduler is an invalid value, the task scheduler initiates a frequency modulation interrupt request to the frequency modulation management module, and waits until it is determined that the frequency modulation management module has completed the clock frequency adjustment of the working clock of the target slave core group, and then assigns the target task to be executed to the target slave core group.

6. The heterogeneous multi-core chip task scheduling method according to claim 5, characterized in that: The heterogeneous many-core chip task scheduling method further includes: The frequency modulation management module clears the frequency modulation interrupt request initiated by the task scheduler after the control clock module adjusts the clock frequency of the working clock provided to the target slave core group to match the task frequency; After detecting that the frequency modulation interrupt request is cleared, the task scheduler determines that the frequency modulation management module has completed the adjustment of the clock frequency of the working clock of the target slave core group.

7. The heterogeneous many-core chip task scheduling method according to claim 1, characterized in that: The main core adds an interrupt validity identifier to each task to be executed, and further includes: The main core sets the interrupt validity identifier to a valid value when detecting that the task to be executed does not include a predetermined instruction and the frequency modulation management module is in a normal frequency modulation state; The main core sets the interrupt validity identifier to an invalid value when detecting that the task to be executed does not include a predetermined instruction and the frequency modulation management module is in a frequency modulation shielding state.

8. The heterogeneous many-core chip task scheduling method according to claim 1, characterized in that: Each slave core group is connected to a plurality of clock sources in the clock module, and the frequency modulation management module controls the clock module to adjust the clock frequency of the working clock provided to the target slave core group to match the task frequency, including: The frequency modulation management module detects the clock frequency of the real-time working clock provided to the target slave core group by the clock source currently connected to the target slave core group; When the clock frequency of the real-time working clock of the target slave core group matches the task frequency of the target task to be executed, the frequency modulation management module keeps the real-time working clock of the target slave core group unchanged and determines that the clock frequency adjustment of the working clock of the target slave core group is completed; When the clock frequency of the real-time working clock of the target slave core group does not match the task frequency of the target task to be executed, but there is a working clock provided by other clock sources among the clock sources connected to the target slave core group, and the clock frequency matches the task frequency of the target task to be executed, the frequency modulation management module controls switching to the working clock provided by other clock sources to the target slave core group, which matches the task frequency of the target task to be executed, and determines that the clock frequency adjustment of the working clock of the target slave core group is completed; When the clock frequency of the real-time working clock of the target slave core group does not match the task frequency of the target task to be executed, and the clock frequencies of the working clocks provided by all clock sources connected to the target slave core group do not match the task frequency of the target task to be executed, the frequency modulation management module controls the clock source currently connected to the target slave core group to adjust the clock frequency of the working clock of the target slave core group to match the task frequency.

9. The heterogeneous many-core chip task scheduling method according to claim 1, characterized in that: The task scheduler detects whether the task frequency of the target task to be executed matches the clock frequency of the current working clock of the target slave core group, including: When the task scheduler detects that the task frequency of the target task to be executed matches the task frequency of the previous task to be executed assigned to the target slave core group, it determines that the task frequency of the target task to be executed detected by the task scheduler matches the clock frequency of the current working clock of the target slave core group; otherwise, it determines that the task frequency of the target task to be executed detected by the task scheduler does not match the clock frequency of the current working clock of the target slave core group.

10. The heterogeneous many-core chip task scheduling method according to claim 7, characterized in that: The heterogeneous many-core chip task scheduling method further includes: When the task scheduler determines that the task frequency of the target task to be executed matches the clock frequency of the current working clock of the target slave core group, or detects that the interrupt validity identifier of the target task to be executed is an invalid value, it directly assigns the target task to be executed to the corresponding target slave core group.

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