Interface verification method, electronic equipment, storage medium and program product

Abstract

The invention discloses an interface verification method, electronic equipment, a storage medium and a program product, and relates to the technical field of servers, and the method comprises the following steps: after a firmware interface of a server is started, importing an interface verification program into the firmware interface, and setting a command line interface of the firmware interface to have an access permission of the interface verification program, and running an interface verification program on a command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface to obtain a reliability verification result of the target keyboard controller style interface. According to the method, an operation system does not need to be guided, reliability verification of the keyboard controller style interface can be achieved on the command line interface of the firmware interface after the firmware interface is started, the technical problems that in the prior art, the requirement for the hardware environment is strict, and verification waiting time is long are solved, and the purposes of reducing hardware environment dependency and improving verification efficiency are achieved. And the verification waiting time is shortened.

Description

Technical Field

[0001] The present application relates to the field of server technology, and in particular to an interface verification method, an electronic device, a storage medium, and a program product. Background Art

[0002] The Keyboard Controller Style (KCS) interface in the server is a key component to ensure system stability. The server host and the baseboard management controller (BMC) transmit important information through the KCS interface. Therefore, the reliability of the KCS interface is crucial. The reliability verification of the KCS interface in related technologies mainly relies on the Intelligent Platform Management Interface (IPMI) tool under the server host operating system.

[0003] However, this KCS interface reliability verification method needs to be performed after the host operating system is fully started, which has strict requirements on the hardware environment and a long verification waiting time. Summary of the invention

[0004] The present application provides an interface verification method, an electronic device, a storage medium and a program product, so as to at least solve the problem that the reliability verification method of the KCS interface in the related technology needs to be performed after the host operating system is fully started, has strict requirements on the hardware environment, and has a long verification waiting time.

[0005] This application provides an interface verification method, including: Start the server's firmware interface; Import the interface verification program into the firmware interface, and set the command line interface of the firmware interface to have access rights to the interface verification program; An interface verification program is run in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain a reliability verification result of the target keyboard controller style interface.

[0006] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned interface verification methods when executing the computer program.

[0007] The present application also provides a computer-readable storage medium, in which a computer program is stored, wherein when the computer program is executed by a processor, the steps of any of the above-mentioned interface verification methods are implemented.

[0008] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned interface verification methods when executed by a processor.

[0009] Through this application, after starting the firmware interface of the server, the interface verification program is imported into the firmware interface, and the command line interface of the firmware interface is set to have access rights to the interface verification program. The interface verification program is run in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain the reliability verification result of the target keyboard controller style interface. There is no need to boot the operating system. After the firmware interface is started, the reliability verification of the keyboard controller style interface can be implemented in the command line interface of the firmware interface, which solves the technical problems of strict hardware environment requirements and long verification waiting time in related technologies, and achieves the technical effect of reducing hardware environment dependence and shortening verification waiting time. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0011] Figure 1 A schematic diagram of the operating environment of the KCS interface verification tool in the related art; Figure 2 A schematic diagram of the operating environment of the KCS interface verification tool of an embodiment of the present application; Figure 3 A schematic diagram of the structure of the interface verification system provided in the embodiment of the present application; Figure 4 A flowchart of an interface verification method provided in an embodiment of the present application; Figure 5 A flowchart of another interface verification method provided in an embodiment of the present application; Figure 6 A flowchart of another interface verification method provided in an embodiment of the present application; Figure 7 A flowchart of the operation of the interface verification program provided in the embodiment of the present application; Figure 8 A flowchart of the host KCS write process provided in an embodiment of the present application; Fig. 9 A flowchart of a host KCS read process provided in an embodiment of the present application; Fig.10 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0012] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0013] It should be noted that, in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0014] As a high-performance computing device that provides shared resources for clients, the server is controlled by the operating system, including the server host and BMC. Among them, the server host and BMC realize important information transmission through the KCS interface, such as configuration management information, fault diagnosis information, etc. Therefore, the reliability of the KCS interface is crucial to ensure the system stability of the server.

[0015] In related technologies, the verification of the KCS interface needs to be carried out with the cooperation of the server host and the BMC. Generally, the KCS interface verification tool is used to verify the reliability of the KCS interface. The verification of the KCS interface on the server host side usually relies on the IPMI tool under the server host operating system. Figure 1 Schematic diagram of the operating environment of the KCS interface verification tool in the related art, such as Figure 1 As shown, the KCS interface verification tool, namely the IPMI tool, runs under the operating system of the server host, and the IPMI tool under the operating system of the server host is used to verify the KCS interface.

[0016] However, the startup of the server host's operating system is highly dependent on the board environment and requires the Unified Extensible Firmware Interface (UEFI) for booting. This results in the KCS interface verification having strict requirements on the hardware environment, making it impossible to quickly carry out verification work in the early stages of the project, and the verification waiting time is long.

[0017] In addition, the server generally includes multiple groups of KCS interfaces. For full coverage verification of multiple groups of KCS interfaces, the server host operating system needs to install and adapt the corresponding IPMI tools for each group of KCS interfaces before the corresponding KCS interfaces can be verified, resulting in low verification efficiency.

[0018] In response to the above problems, the embodiments of the present application provide an interface verification method, an electronic device, a storage medium, and a program product. The method is applied to a server host, and includes: starting the server's firmware interface; importing an interface verification program into the firmware interface, and setting the command line interface of the firmware interface to have access rights to the interface verification program; running the interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain the reliability verification result of the target keyboard controller style interface. The method provided by the above scheme verifies the reliability of the target keyboard controller style interface by running the interface verification program in the command line interface of the firmware interface when the server's firmware interface is started. There is no need to boot the operating system, and there is no need to install and adapt the IPMI tool under the operating system. The reliability of the target keyboard control style interface can be verified by running the interface verification program in the command line interface of the firmware interface. Figure 2 Schematic diagram of the operating environment of the KCS interface verification tool of the embodiment of the present application. Figure 2 As shown, the operation of the KCS interface verification tool of the embodiment of the present application depends on the startup of UEFI, and is run in the command line interface of UEFI to realize the reliability verification of the KCS interface. Among them, the KCS interface verification tool of the embodiment of the present application realizes the verification of the KCS interface based on the interface verification program of the embodiment of the present application, UEFI is the firmware interface of the embodiment of the present application, and the command line interface of UEFI can be UEFIshell. It should be noted that under the UEFI shell, binary files ending with the .efi file extension can be executed, that is, the interface verification program is a binary file ending with the .efi file extension.

[0019] It can be seen that the interface verification method, electronic device, storage medium and program product provided in the embodiments of the present application solve the technical problems in the related technologies of strict requirements on the hardware environment and long verification waiting time, and achieve the technical effect of reducing dependence on the hardware environment and shortening the verification waiting time.

[0020] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0021] In conjunction with the specific application environment architecture or the specific hardware architecture on which the execution of the interface verification method depends, the specific application environment architecture or the specific hardware architecture is described herein.

[0022] The interface verification method, electronic device, storage medium, and program product provided in the embodiments of the present application are suitable for verifying the reliability of the KCS interface in the server. Figure 3 As shown, it is a schematic diagram of the structure of the interface verification system based on this application, and the interface verification system includes a server host and a BMC, and the server host and the BMC are connected through a bus. In this embodiment, the bus is taken as an Enhanced Serial Peripheral Interface (eSPI) bus as an example for explanation, and the bus can also be a Low Pin Count (LPC) bus, which is not specifically limited here. In this embodiment, the server host is taken as an example of a server host based on the X86 architecture, and it can also be other types of server hosts, which are not specifically limited here.

[0023] Among them, the KCS interface is a serial communication interface on the eSPI bus, and is a physical interface in the server for sending IPMI commands. The server host and BMC communicate through the KCS interface. Exemplarily, there are four groups of KCS interfaces on the eSPI bus, namely KCS interface 0, KCS interface 1, KCS interface 2 and KCS interface 3. It can be understood that the KCS interface is also a serial communication interface on the LPC bus.

[0024] The server host includes UEFI, and the operation of the KCS interface verification tool, i.e., the KCS verification tool, depends on UEFI. After UEFI is started, the KCS interface verification tool is run under the UEFI shell to implement reliability verification of each group of KCS interfaces. Among them, the reliability verification of any group of KCS interfaces includes: the KCS verification tool of the server host sends and receives KCS data through the KCS interface, and determines the reliability verification result of the KCS interface by comparing the received KCS data with the sent KCS data.

[0025] Specifically, the KCS verification tool of the server host sends KCS data to the BMC through the KCS interface. The BMC firmware in the BMC receives the KCS data through the KCS interface and writes the KCS data into the cache. The BMC firmware in the BMC sends the KCS data in the cache to the server host through the KCS interface. The KCS verification tool of the server host receives the KCS data sent by the BMC through the KCS interface and compares the received KCS data with the sent KCS data. If they are consistent, it is determined that the reliability verification of the KCS interface has passed. Among them, when performing reliability verification on any group of KCS interfaces, the BMC firmware sends and receives KCS data through the group of KCS interfaces. It should be noted that, Figure 3The reliability verification of KCS interface 0 is taken as an example.

[0026] The embodiment of the present application provides an interface verification method, which is applied to a server host. It should be noted that the host mentioned below is a server host. Figure 4 A flowchart of the interface verification method provided in the embodiment of the present application, such as Figure 4 As shown, the process includes the following steps: Step S401, starting the firmware interface of the server.

[0027] The firmware interface is the aforementioned UEFI. UEFI firmware is the first program run by the server host. UEFI is a new generation of firmware interface standard used to replace the traditional Basic Input Output System (BIOS).

[0028] Step S402: import the interface verification program into the firmware interface, and set the command line interface of the firmware interface to have access rights to the interface verification program.

[0029] Figure 5 This is a flow chart of the interface verification method provided in the embodiment of the present application. Figure 5 As shown in the figure, after the UEFI boot is completed, the KCS interface verification tool is imported into the UEFI so that the KCS interface verification tool is visible under the UEFI shell.

[0030] As mentioned above, the KCS interface verification tool implements verification of the KCS interface based on the interface verification program. The KCS interface verification tool is imported into UEFI, that is, the interface verification program is imported into UEFI. The interface verification program is an executable program in the efi format.

[0031] Make the KCS interface verification tool visible in the UEFI shell, that is, set the command line interface of the firmware interface to have access rights to the interface verification program. In other words, the command line interface of the firmware interface is the UEFI shell.

[0032] Step S403: running an interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain a reliability verification result of the target keyboard controller style interface.

[0033] Among them, Figure 5 As shown, the KCS interface verification tool is executed to verify the KCS interface and the verification result is returned. That is, the interface verification program is run under the UEFI shell to verify the reliability of the target KCS interface and obtain the reliability verification result of the target KCS interface.

[0034] As mentioned above, under the UEFI shell, the interface verification program is a binary file ending with the .efi file extension, and running the KCS interface verification tool under the UEFI shell can be exemplarily represented as "KCSTestTool.efi [KCS base address] [data to be sent] [number of verifications]". Among them, the input parameters of the interface verification program include the KCS base address, the data to be sent, and the number of verifications, which are input by the user or set in advance.

[0035] The interface verification method provided by the embodiment of the present application is to import the interface verification program into the firmware interface after starting the firmware interface of the server, and set the command line interface of the firmware interface to have the access rights of the interface verification program, and run the interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface, and obtain the reliability verification result of the target keyboard controller style interface. There is no need to boot the operating system, and the reliability verification of the keyboard controller style interface can be realized in the command line interface of the firmware interface after the firmware interface is started. Since the UEFI firmware is the first program run by the server host, and the UEFI shell is the inherent interactive command interface of the UEFI firmware, the method of verifying the KCS interface under the UEFI shell eliminates the need to first boot the operating system by the UEFI firmware when verifying the target KCS interface in the related technology, and then install and adapt the IPMI tool under the operating system. It can be performed only under the UEFI shell inherent in the UEFI firmware, which solves the technical problems of strict requirements on the hardware environment and long verification waiting time in the related technology, and achieves the technical effect of reducing the dependence on the hardware environment and shortening the verification waiting time.

[0036] Moreover, the interface verification method provided in the embodiment of the present application can flexibly use any data to verify the KCS interface, is independent of a specific hardware platform and a specific version of the UEFI firmware, can be copied to the UEFI shell and used directly, and is universal. The method directly outputs the reliability verification result of the target KCS interface, rather than the original data, and the result is more intuitive. Different KCS interfaces can be verified by inputting different base addresses of the KCS interfaces, which is flexible and eliminates the steps of booting the operating system with the UEFI firmware and installing and adapting the IPMI tool under the operating system, greatly reducing the workload of KCS interface verification, being simple and easy to use, and improving verification efficiency.

[0037] The embodiment of the present application provides an interface verification method, which is applied to a server host. Figure 6 A flowchart of the interface verification method provided in the embodiment of the present application, such as Figure 6 As shown, the process includes the following steps: Step S601: Start the server firmware interface. Figure 4 Step S401 of the illustrated embodiment will not be described in detail here.

[0038] Step S602: Import the interface verification program into the firmware interface, and set the command line interface of the firmware interface to have access rights to the interface verification program. Figure 4 Step S402 of the illustrated embodiment will not be described in detail here.

[0039] Step S603: running an interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain a reliability verification result of the target keyboard controller style interface.

[0040] Specifically, the above step S603 includes: Step S6031, obtain and parse the input parameters of the interface verification program, obtain the base address of the target keyboard controller style interface, the data to be sent and the verification times threshold.

[0041] in, Figure 7 This is a flowchart of the operation of the interface verification program provided in the embodiment of the present application. Figure 7 As shown, the interface verification program is run, the input parameters of the interface verification program are obtained and parsed, and the KCS base address, data to be sent, and verification times in the input parameters are obtained.

[0042] The KCS base address in this input parameter is the base address of the target KCS interface, that is, a group of KCS interfaces to be verified. Different KCS base addresses represent different KCS interfaces. For example, 0xCA0 represents KCS interface 0.

[0043] The data to be sent in the input parameter is the data to be sent, and the number of verifications in the input parameter is the verification number threshold.

[0044] It should be noted that the base address and verification times threshold of the target KCS interface are stored in variables, and the data to be sent is stored in the opened address space.

[0045] Step S6032, setting the bus decoding enable register to map the register addresses of multiple groups of keyboard controller style interfaces to the bus.

[0046] Among them, Figure 7As shown, the KCS address is decoded to the eSPI bus. That is, the eSPI bus decoding enable register on the host side is set to decode the input / output address (Input / Output, referred to as: I / O) 0xCA0-0xCAF to the eSPI bus. The bus decoding enable register in the embodiment of the present application can be an eSPI bus decoding enable register. 0xCA0-0xCAF is a common address of the KCS interface.

[0047] It should be noted that in the UEFI shell, the reading and writing of the register address of the KCS interface is the reading and writing of the IO address space, which corresponds to the input (IN) and output (OUT) instructions in the X86 server architecture.

[0048] Step S6033, enable the bus decoding enable register, generate the address pulse of the target keyboard controller style interface on the bus based on the base address of the target keyboard controller style interface to activate the target keyboard controller style interface, and communicate with the controller based on the target keyboard controller style interface.

[0049] Among them, after enabling the bus decoding enable register, the server host reads and writes the I / O address in the range of 0xCA0-0xCAF, which will generate read and write pulses of the corresponding address on the eSPI bus.

[0050] When the server host communicates with any group of KCS interfaces, it is necessary to generate corresponding address pulses on the eSPI bus. In this embodiment, according to the base address of the target KCS interface in the input parameters, it can be known that the target KCS interface is currently to be verified, and the server host needs to communicate with the target KCS interface. Based on the base address of the target KCS interface, an address pulse of the target KCS interface is generated on the eSPI bus to activate the target KCS interface, and communicate with the controller based on the target KCS interface. Among them, the controller can be the above-mentioned BMC.

[0051] It can be understood that by modifying the KCS base address in the input parameters, the address pulse of the KCS interface corresponding to the KCS base address can be generated on the eSPI bus, so that the corresponding KCS interface can be used for communication to achieve reliability verification of different KCS interfaces.

[0052] Step S6034: Based on the data to be sent and the verification times threshold, the reliability of the target keyboard controller style interface is verified to obtain a reliability verification result of the target keyboard controller style interface.

[0053] Among them, after activating the target KCS interface, the reliability of the target KCS interface is verified based on the data to be sent and the verification number threshold, and the reliability verification result of the target KCS interface is obtained.

[0054] It should be noted that the KCS interface is a standard interface defined in the IPMI specification, which defines the standard command format of IPMI commands between the BMC and the server host. Each group of KCS interfaces has 4 registers. That is, for any group of keyboard controller style interfaces, the group of keyboard controller style interfaces includes input data registers, output data registers, status registers, and command registers. Among them, each register is single-byte wide, and the four registers occupy a total of 2 bytes of address space, and the low address of the address space is the base address of the KCS interface. The address of the input data register is the same as the address of the output data register, and the address of the status register is the same as the address of the command register.

[0055] For any group of keyboard controller style interfaces, the address of its input data register and the address of its output data register are the base address of the group of keyboard controller style interfaces, and the address of its status register and the address of its command register are preset addresses, which are the base address of the group of keyboard controller style interfaces plus a preset value. The preset value can be 1, that is, the address of the status register and the address of the command register are the base address of the group of KCS interfaces plus 1.

[0056] Exemplarily, the KCS base address is 0xCA0, corresponding to KCS interface 0, the addresses of the input data register and output data register of the KCS interface 0 are 0xCA0, and the addresses of the command register and status register of the KCS interface 0 are 0xCA1, wherein the definition of the register bits in each register can be seen in the IPMI specification.

[0057] Among them, bit 0 (bit0) of the status register is the output buffer full flag (Output Buffer Full, referred to as: OBF). When the BMC side writes a value to address 0xCA0, OBF will be automatically set to 1, indicating that there is data in the output buffer; when the value of address 0xCA0 is read by the host, OBF will be automatically cleared to 0, indicating that the data in the output buffer has been taken away.

[0058] Bit 1 of the status register is the input buffer full flag (IBF). When the host writes a value to address 0xCA1, IBF is automatically set to 1, indicating that there is data in the input buffer. When the value of address 0xCA1 is read by the BMC, IBF is automatically cleared to 0, indicating that the data in the input buffer has been taken away.

[0059] Bit 6 and bit 7 of the status register are status bits, which can indicate four states: IDLE_STATE, READ_STATE, WRITE_STATE, and ERROR_STATE. This status bit can be set and detected during the interaction between the host and BMC.

[0060] It should be noted that the base address of each group of KCS interfaces can be changed through the registers on the BMC side.

[0061] The interface verification method provided in the embodiment of the present application obtains and parses the input parameters of the interface verification program, uses the bus decoding enable register to map the register addresses of multiple groups of keyboard controller style interfaces to the bus, enables the bus decoding enable register, activates the target keyboard controller style interface based on the base address of the target keyboard controller style interface, verifies the reliability of the target keyboard controller style interface based on the data to be sent and the verification number threshold, thereby improving the automation and efficiency of the verification process of the target KCS interface.

[0062] In some optional implementations, the above step S6034 includes: Step a1, based on the target keyboard controller style interface, write the data to be sent into the buffer area of ​​the controller.

[0063] like Figure 7 As shown, after the KCS address is decoded to the eSPI bus, that is, after the target KCS interface is activated, the reliability verification of the target KCS interface begins. It is understandable that the reliability verification of the target KCS interface may need to be performed multiple times until the verification number threshold is reached to obtain the reliability verification result of the target KCS interface.

[0064] Each reliability verification of the target KCS interface includes a host KCS write process and a host KCS read process. The host KCS write process is to write the data to be sent into the controller's buffer area based on the target keyboard controller style interface.

[0065] It should be noted that the host KCS write process is the KCS interface sending process. The host KCS write process and the host KCS read process require the host and BMC to work together, and the workflow follows the IPMI specification.

[0066] Step a2, based on the target keyboard controller style interface, read the target data in the controller's cache area.

[0067] After completing the host KCS write process, the host KCS read process is performed, that is, based on the target keyboard controller style interface, the target data in the controller's cache area is read.

[0068] Step a3, based on the data to be sent and the target data, determine the reliability verification result of the target keyboard controller style interface.

[0069] Among them, for any reliability verification of the target KCS interface, it is determined whether the read data is consistent with the expected result, that is, whether the data to be sent is consistent with the target data, and the reliability verification result of the target KCS interface is determined based on the judgment result.

[0070] Step a4: if the reliability verification result is that the reliability verification has passed, it is determined whether the current number of verification times reaches the verification times threshold.

[0071] The verification times threshold is preset by the technical staff and is not specifically limited here.

[0072] Step a5, if the current number of verifications does not reach the verification times threshold, return to execute the step of writing the data to be sent into the controller's cache area based on the target keyboard controller style interface until the current number of verifications reaches the verification times threshold, and obtain the reliability verification result of the target keyboard controller style interface.

[0073] If the reliability verification result is passed and the current number of verifications does not reach the verification number threshold, the number of verifications will be increased by 1, and the next reliability verification will be performed until the current number of verifications reaches the verification number threshold, and the reliability verification result of the target KCS interface will be obtained.

[0074] The interface verification method provided in the embodiment of the present application can directly verify the reliability of the target KCS interface by writing the data to be sent into the controller buffer area, reading the target data in the controller buffer area, and comparing the data to be sent with the target data. The credibility of the reliability verification result of the target KCS interface is improved through multiple cycles of verification.

[0075] In some optional implementations, the above interface verification method further includes: Step b1: if the reliability verification result is that the reliability verification fails, then determine that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

[0076] That is to say, if any reliability verification of the target KCS interface fails, the reliability verification result of the target KCS interface is determined as reliability verification failure, and there is no need to perform the remaining reliability verifications of the target KCS interface, and the reliability verification result of the target KCS interface can be directly obtained.

[0077] The interface verification method provided in the embodiment of the present application directly determines that the reliability verification of the target KCS interface has failed when any reliability verification of the target KCS interface has failed, thereby avoiding the execution of subsequent meaningless verification steps and improving the efficiency of interface reliability verification.

[0078] In some optional implementations, the above interface verification method further includes: Step c1: if the current verification times reaches the verification times threshold, then determining the reliability verification result of the target keyboard controller style interface is reliability verification passed.

[0079] It is understandable that only when the reliability verification results are all passed each time can the current verification times reach the verification times threshold. In this case, it is directly determined that the reliability verification of the target KCS interface has passed.

[0080] In some optional implementations, the above step a1 includes: Step a11, waiting for the input buffer full flag of the target status register of the target keyboard controller style interface to be cleared.

[0081] Figure 8 The flowchart of the host KCS write process provided in the embodiment of the present application is as follows. Figure 8 As shown, the host waits for IBF to be 0 and clears OBF. That is, the host waits for IBF of the target status register of the target KCS interface to be cleared to 0.

[0082] Among them, clearing IBF to 0 is an operation on the BMC side. The BMC initializes the target KCS interface on the BMC side and clears IBF.

[0083] Step a12: if the waiting time does not exceed the preset waiting time threshold, the output buffer full flag of the target status register is cleared to 0.

[0084] If the waiting time does not exceed the preset waiting time threshold, and the IBF of the target status register of the target KCS interface is cleared to 0, the OBF of the target status register is cleared to 0. The preset waiting time may be 5 seconds, which is not specifically limited here.

[0085] It should be noted that the purpose of clearing OBF is to prepare for the subsequent data transmission. The purpose of waiting for IBF to be cleared is to ensure that the BMC input buffer is empty so that the BMC can receive new data.

[0086] Step a13, write the write start command into the target command register of the target keyboard controller style interface, and wait for the input buffer full flag to be cleared again.

[0087] The host writes the write start command WR_START to the target command register of the target KCS interface and waits for IBF to be cleared to 0 again. That is, the host writes WR_START to the command register and waits for IBF=0. Among them, the host writes the write start command to the target command register and sets IBF to 1, indicating that new data has arrived in the BMC input buffer. After detecting that IBF has changed to 1, the BMC will trigger the IBF interrupt. The BMC's IBF interrupt service program will process this interrupt and recognize that it is an interrupt generated by a write command. Then, the BMC will perform a series of operations: set the status bit of the target status register to WRITE_STATE, indicating that it has entered the write data state; write data to the target output data register of the target KCS interface, set OBF to 1, and inform the host that the BMC is ready to respond; read the target command register, clear IBF to 0, and prepare to receive the next data; according to the read WR_START command, set the variable phase to KCS_PHASE_WRITE_START, and the subsequent BMC's IBF interrupt program will process the data sent by the host based on the value of this variable.

[0088] Step a14, read the target status register to determine whether the status bit of the target status register is in the write state.

[0089] When IBF is cleared to 0 again, the host reads the status register to determine whether the status is WRITE_STATE. In other words, the host reads the target status register to determine whether the status bit of the target status register is in the write state.

[0090] Step a15: if the status bit of the target status register is in the write state, the output buffer full flag is cleared to 0.

[0091] If the status bit of the target status register is in the write state, the host clears OBF, that is, clears OBF to 0.

[0092] If the status bit of the target status register is not in the write state, the system will exit with an error, i.e., it is determined that the reliability verification result of the target KCS interface is that the reliability verification has failed.

[0093] Step a16, write the data to be sent into the target output data register of the target keyboard controller style interface in a single-byte writing manner, so that the controller reads the target input data register of the target keyboard controller style interface, obtains the written data to be sent, and saves the data to be sent into the cache.

[0094] Specifically, Figure 8 As shown, the host writes the data to be sent into the data register of KCS in a single byte at a time, that is, the host writes the data to be sent into the target output data register in a single byte writing manner.

[0095] Each time the host writes to the target output data register, it will set IBF to 1, which will trigger the BMC to generate an IBF interrupt. The BMC's IBF interrupt service routine will process this interrupt, identify it as an interrupt caused by writing data, and then enter the data processing flow. At this time, the BMC will perform different processing according to the value of the variable phase: If the phase is KCS_PHASE_WRITE_START, the BMC sets the phase to KCS_PHASE_WRITE_DATA and continues to process subsequent data according to this state.

[0096] If the phase is KCS_PHASE_WRITE_DATA, the BMC will set the status bit of the target status register to WRITE_STATE, write the status information of the successful reception of the data sent by the host to the target output data register to set OBF to 1, read the target input data register to clear IBF to 0, and save the KCS data received from the host, that is, the single-byte data, into the cache.

[0097] It should be noted that since the KCS interface adopts an address multiplexing design, the same physical address represents different register functions under different operating subjects (host and BMC) and different operating directions (read and write).

[0098] From the host's perspective, when the host performs a write operation to the base address of the KCS interface, it corresponds to the host's output data register, and the host writes the data it wants to send to the BMC into this register.

[0099] From the BMC's perspective, the host's write operation is for the BMC. The base address of the KCS interface corresponds to the BMC's input data register. The BMC can read the data sent by the host from this register.

[0100] Each time the host writes to the target output data register, it waits for IBF to be cleared. After IBF is cleared, the host reads the status register, i.e., the target status register of the target KCS interface, to determine whether the status is WRITE_STATE. If it is not WRITE_STATE, the host exits with an error.

[0101] If it is WRITE_STATE, the host clears OBF and prepares to write the next byte.

[0102] It is determined whether the data currently to be written into the target output data register is the last byte of the KCS data, that is, it is determined whether the data currently to be written into the target output data register is the last byte of the data to be sent.

[0103] If not, continue to transmit the data to be sent in a single-byte writing mode to the target output data register, that is, return to the step of writing the data to be sent into the target output data register in a single-byte writing mode each time, and write the data into the target output data register byte by byte.

[0104] If so, the host writes the write end command, i.e., WR_END, to the command register, i.e., the target command register of the target KCS interface, and waits for IBF to be cleared. The host writes WR_END to the target command register. This operation sets IBF to 1, triggering the BMC to generate an IBF interrupt. The BMC's IBF interrupt service routine handles this interrupt and recognizes that it is an interrupt generated by a write command. Then, the BMC performs a series of operations: sets the status of the target status register to WRITE_STATE; writes data to the target output data register to set OBF to 1; reads the target command register and clears IBF to 0; according to the read WR_END command, sets the variable phase to KCS_PHASE_WRITE_END_CMD. The subsequent BMC's IBF interrupt routine will process the last byte of data sent by the host based on the value of this variable.

[0105] When IBF is cleared to 0, the host reads the status register to determine whether the status is WRITE_STATE. If it is not WRITE_STATE, the host exits with an error.

[0106] If it is WRITE_STATE, the host clears OBF and prepares to write the last byte.

[0107] The host writes the last byte of KCS data, that is, the host writes the last byte of the data to be sent to the target output data register, which triggers the BMC to generate an IBF interrupt. The BMC's IBF interrupt service program will handle this interrupt and recognize that this is an interrupt generated by writing data. If the variable phase is KCS_PHASE_WRITE_END_CMD at this time, the BMC will set the status of the target status register to READ_STATE, read the target input data register to clear IBF to 0, save the last byte of KCS data read to the cache, and set the value of the variable phase to KCS_PHASE_WRITE_DONE. At the same time, the BMC will notify the upper-layer application to read all the received KCS data, that is, the target data, from the cache. At this point, the entire host KCS write process ends and enters the host KCS read process.

[0108] The interface verification method provided in the embodiment of the present application introduces a preset waiting time threshold to limit the waiting time, thereby avoiding the occurrence of infinite waiting and improving the response speed of the system. It can also exit the waiting state in time under abnormal circumstances and enter the subsequent processing flow, thereby improving the overall verification efficiency.

[0109] In some optional implementations, the above interface verification method further includes: Step d1: if the waiting time exceeds a preset waiting time threshold, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

[0110] Among them, if the waiting time exceeds the preset waiting time threshold and the IBF of the target status register of the target KCS interface is not cleared to 0, then the reliability verification result of the target KCS interface is determined to be the reliability verification failed, and it can be known that the reliability verification result of the target KCS interface is the reliability verification failed.

[0111] In some optional implementations, the above step a2 includes: Step a21, waiting for the input buffer full flag of the target status register of the target keyboard controller style interface to be cleared.

[0112] in, Fig. 9 The following is a flow chart of the host KCS read process provided in the embodiment of the present application. Fig. 9 As shown, the host KCS read process starts, and the host waits for IBF to be cleared, that is, waits for IBF of the target status register of the target KCS interface to be cleared.

[0113] It should be noted that when the host waits for the first time, IBF is cleared by the BMC at the end of the host KCS write process, and subsequently IBF is cleared in the BMC's IBF interrupt program.

[0114] Step a22, read the target status register, and determine whether the status bit of the target status register is in a read state or an idle state. After writing the last byte of the data to be sent into the cache area of ​​the controller, the controller sets the status bit of the target status register to a read state. After sending all the target data in the cache area to the server host, the controller sets the status bit of the target status register to an idle state.

[0115] The host reads the status register and determines whether the status is READ_STATE, that is, whether the status bit of the target status register is in the read state. The BMC sets the status to READ_STATE at the end of the host KCS write process, and then the BMC initializes the KCS data and length information sent to the host, and uses the system call of the KCS interface to write the first byte of the target data in the cache to the KCS output data register, that is, the target output data register.

[0116] If status is not READ_STATE, it is determined whether status is IDLE_STATE. After the BMC writes the last byte of the target data into the target output data register, it sets status to IDLE_STATE. In other words, after the BMC sends all the target data in the buffer to the server host, it sets the status position of the target status register to the idle state.

[0117] Step a23, if the status bit of the target status register is in the read state, then when the output buffer full flag of the target status register is 1, read the target input data register of the target keyboard controller style interface, obtain the single-byte target data sent by the controller, write the read command to the target output data register of the target keyboard controller style interface, and return to execute the step of waiting for the input buffer full flag of the target status register of the target keyboard controller style interface to be cleared to 0.

[0118] If status is READ_STATE, the host waits for OBF to be set to 1, and the host reads the KCS data register one byte at a time, that is, the host reads the target input data register of the target KCS interface one byte at a time. It can be understood that the controller writes the target data to the target output data register one byte at a time.

[0119] It should be noted that when the host waits for OBF to be set to 1 for the first time, the BMC writes the first byte of the target data in the cache to the target output data register through the system call of the target KCS interface, and sets OBF to 1. When the host waits for OBF to be set to 1 subsequently, the BMC writes the single-byte target data to the target output data register in the IBF interrupt service routine, and sets OBF to 1, so that the host ends the wait.

[0120] Wherein, after each time the host reads a single-byte target data in the target input data register, the host adds 1 to the read data length to determine the data length of the target data that has been read.

[0121] After reading the single-byte target data in the target input data register each time, the host needs to write a read command, i.e., READ, to the KCS data register, i.e., the target output data register of the target KCS interface, and then jump to the step of waiting for the input buffer full flag of the target status register of the target keyboard controller style interface to be cleared to 0 to continue the next cycle reading. It can be understood that the host KCS read process is implemented through a loop, and the host stores the read data in the host cache and records the length of the read data.

[0122] After the host writes a read command to the target output data register of the target KCS interface, the BMC will generate an IBF interrupt. In the IBF interrupt service routine, the BMC clears IBF to 0 by reading the KCS input data register, i.e., the target input data register. If the BMC wants to continue to send data, the BMC keeps the status of the target status register of the target KCS interface as READ_STATE, and writes the data to be sent to the target output data register of the target KCS interface in sequence, one byte at a time, and sets OBF to 1. If the data transmission is completed, the BMC writes redundant bytes to the target output data register of the target KCS interface, sets OBF to 1, and sets the status of the target status register to IDLE_STATE.

[0123] Step a24, if the status bit of the target status register is in the idle state, then when the output buffer full flag of the target status register is 1, read the target input data register to obtain redundant bytes, discard the redundant bytes, and determine the target data based on the single-byte target data sent by the controller.

[0124] Among them, if status is IDLE_STATE, the host waits for OBF to be set to 1. When OBF is set to 1, the host reads redundant bytes from the KCS data register, that is, reads the target input data register, obtains redundant bytes, discards the redundant bytes, and determines the target data based on the single-byte target data sent by the controller.

[0125] At this point, the host KCS read process ends.

[0126] In some optional implementations, the above interface verification method further includes: Step e1: if the status bit of the target status register is not in the read state and is not in the idle state, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification has failed.

[0127] Among them, Fig. 9As shown, if status is neither READ_STATE nor IDLE_STATE, the process exits with error, i.e., it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

[0128] The interface verification method provided in the embodiment of the present application directly determines that the reliability verification result of the target KCS interface is a reliability verification failure when the status bit of the target status register is neither a read state nor an idle state, thereby determining that the reliability verification of the target KCS interface has failed, thereby avoiding the subsequent meaningless verification steps and improving the efficiency of the interface reliability verification.

[0129] In some optional implementations, the above step a3 includes: Step a31, comparing the data length of the data to be sent with the data length of the target data.

[0130] The host reads the target data returned by the BMC from the host's cache and compares it with the expected result. Figure 7 As shown, it is determined whether the read data is consistent with the expected result. The read data is the target data, and the expected result is the data to be sent by the host.

[0131] Specifically, firstly, the data length of the data to be sent is compared with the data length of the target data.

[0132] Step a32: If the data length of the data to be sent is different from the data length of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification has failed.

[0133] Among them, the data length of the data to be sent is different from the data length of the target data, which means that the read data is inconsistent with the expected result, and the reliability verification result of the target KCS interface is determined to be reliability verification failure.

[0134] In some optional implementations, the above interface verification method further includes: Step f1: If the data length of the data to be sent is the same as the data length of the target data, the data content of the data to be sent is compared with the data content of the target data.

[0135] Step f2: If the data content of the data to be sent is the same as the data content of the target data, then the reliability verification result of the target keyboard controller style interface is determined to be reliability verification passed.

[0136] The interface verification method provided in the embodiment of the present application can further verify the specific content of the data on the basis of the same data length by comparing the content of the data to be sent and the target data. Only when the data content is completely consistent, the reliability verification is judged to have passed, thereby improving the credibility of the reliability verification result of the target KCS interface.

[0137] In some optional implementations, the above interface verification method further includes: Step g1: if the data content of the data to be sent is different from the data content of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

[0138] In some optional implementations, the above step S6034 includes: Step h1, based on the target keyboard controller style interface, write the data to be sent into the controller's buffer area.

[0139] Step h2, based on the target keyboard controller style interface, read the target data in the controller's cache area.

[0140] Step h3, based on the data to be sent and the target data, determine the reliability verification result of the target keyboard controller style interface.

[0141] Step h4, save the reliability verification result of this time, and determine whether the current number of verifications reaches the verification number threshold.

[0142] Step h5, if the current number of verifications does not reach the verification times threshold, return to execute the step of writing the data to be sent into the controller's cache area based on the target keyboard controller style interface until the current number of verifications reaches the verification times threshold, and obtain the reliability verification result of the target keyboard controller style interface.

[0143] Specifically, the reliability verification results of the target keyboard controller style interface are obtained, including: According to the saved multiple reliability verification results of the target KCS interface, it is determined whether the number of reliability verification results that pass the reliability verification among the multiple reliability verification results exceeds a preset number threshold.

[0144] If the number of reliability verification results that pass the reliability verification among the multiple reliability verification results exceeds a preset number threshold, it is determined that the reliability verification result of the target keyboard controller style interface passes the reliability verification.

[0145] If the number of reliability verification results that pass the reliability verification among the multiple reliability verification results does not exceed the preset number threshold, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

[0146] The preset number threshold is determined by technical personnel and is generally greater than half of the verification number threshold.

[0147] During data transmission, a single reliability verification may fail due to various random factors, but this does not necessarily mean that there is a reliability problem with the interface itself. The interface verification method provided in the embodiment of the present application can eliminate the interference of these random errors to a certain extent and more accurately reflect the true reliability of the interface by performing multiple reliability verifications and counting the number of reliability verifications that pass.

[0148] It should be noted that the interface verification method provided in the embodiment of the present application is applicable to all platforms that support UEFI.

[0149] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method.

[0150] The embodiment of the present application also provides an electronic device, such as Fig.10 As shown, it includes a processor 1001 and a memory 1002, in which a computer program is stored. The processor 1001 is configured to run the computer program to execute the steps in any of the above-mentioned interface verification method embodiments.

[0151] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned interface verification method embodiments when running.

[0152] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0153] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above-mentioned interface verification method embodiments are implemented.

[0154] An embodiment of the present application also provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned interface verification method embodiments are implemented.

[0155] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0156] The above is a detailed introduction to an interface verification method, electronic device, storage medium and program product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application, and the description of the above embodiments is only used to help understand the method and core idea of ​​the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. An interface verification method, characterized in that: include: Start the server's firmware interface; Importing the interface verification program into the firmware interface, and setting the command line interface of the firmware interface to have access rights to the interface verification program; The interface verification program is run in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtain a reliability verification result of the target keyboard controller style interface.

2. The interface verification method according to claim 1, characterized in that: The step of running the interface verification program in the command line interface of the firmware interface to verify the reliability of the target keyboard controller style interface and obtaining the reliability verification result of the target keyboard controller style interface includes: Obtaining and parsing the input parameters of the interface verification program to obtain the base address of the target keyboard controller style interface, the data to be sent, and the verification times threshold; Set the bus decoding enable register to map multiple groups of keyboard controller style interface register addresses to the bus; Enable the bus decoding enable register, generate an address pulse of the target keyboard controller style interface on the bus based on the base address of the target keyboard controller style interface to activate the target keyboard controller style interface, and communicate with the controller based on the target keyboard controller style interface; Based on the data to be sent and the verification times threshold, verify the reliability of the target keyboard controller style interface to obtain a reliability verification result of the target keyboard controller style interface; Among them, for any group of keyboard controller style interfaces, the group of keyboard controller style interfaces includes an input data register, an output data register, a status register and a command register, the address of the input data register and the address of the output data register are the base address of the group of keyboard controller style interfaces, the address of the status register and the address of the command register are preset addresses, and the preset address is the base address of the group of keyboard controller style interfaces plus a preset value.

3. The interface verification method according to claim 2, characterized in that: The verifying the reliability of the target keyboard controller style interface based on the data to be sent and the verification times threshold, and obtaining the reliability verification result of the target keyboard controller style interface, includes: Based on the target keyboard controller style interface, writing the data to be sent into a buffer area of ​​the controller; Based on the target keyboard controller style interface, reading target data from a buffer area of ​​the controller; Based on the data to be sent and the target data, determining the reliability verification result of the target keyboard controller style interface; If the reliability verification result of this time is that the reliability verification has passed, then determining whether the current number of verifications has reached the verification number threshold; If the current number of verifications does not reach the verification times threshold, return to execute the step of writing the data to be sent into the cache area of ​​the controller based on the target keyboard controller style interface until the current number of verifications reaches the verification times threshold, and obtain the reliability verification result of the target keyboard controller style interface.

4. The interface verification method according to claim 3, characterized in that: The method further comprises: If the reliability verification result of this time is that the reliability verification fails, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

5. The interface verification method according to claim 3, characterized in that: The method further comprises: If the current verification times reaches the verification times threshold, it is determined that the reliability verification result of the target keyboard controller style interface is reliability verification passed.

6. The interface verification method according to claim 3, characterized in that: The step of writing the data to be sent into a buffer area of ​​the controller based on the target keyboard controller style interface includes: Waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0; If the waiting time does not exceed the preset waiting time threshold, clearing the output buffer full flag bit of the target status register to 0; Writing a write start command into the target command register of the target keyboard controller style interface, and waiting for the input buffer full flag to be cleared to 0 again; Read the target status register to determine whether the status bit of the target status register is in a write state; If the status bit of the target status register is in the write state, clearing the output buffer full flag bit to 0; The data to be sent is written into the target output data register of the target keyboard controller style interface in a single-byte writing manner, so that the controller reads the target input data register of the target keyboard controller style interface, obtains the written data to be sent, and saves the data to be sent into the cache.

7. The interface verification method according to claim 6, characterized in that: The method further comprises: If the waiting time exceeds the preset waiting time threshold, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

8. The interface verification method according to claim 3, characterized in that: The step of reading target data from a buffer area of ​​the controller based on the target keyboard controller style interface includes: Waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0; Read the target status register to determine whether the status bit of the target status register is in a read state or an idle state, wherein after writing the last byte of the data to be sent into the buffer area of ​​the controller, the controller sets the status bit of the target status register to a read state, and after sending all the target data in the buffer area to the server host, the controller sets the status bit of the target status register to an idle state; If the status bit of the target status register is in a read state, then when the output buffer full flag bit of the target status register is 1, read the target input data register of the target keyboard controller style interface, obtain the single-byte target data sent by the controller, write a read command to the target output data register of the target keyboard controller style interface, and return to execute the step of waiting for the input buffer full flag bit of the target status register of the target keyboard controller style interface to be cleared to 0; If the status bit of the target status register is in an idle state, then when the output buffer full flag bit of the target status register is 1, the target input data register is read to obtain redundant bytes, the redundant bytes are discarded, and the target data is determined based on the single-byte target data sent by the controller.

9. The interface verification method according to claim 8, characterized in that: The method further comprises: If the status bit of the target status register is not in the read state and is not in the idle state, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

10. The interface verification method according to claim 3, characterized in that: The determining the reliability verification result of the target keyboard controller style interface based on the data to be sent and the target data includes: Comparing the data length of the data to be sent with the data length of the target data; If the data length of the data to be sent is different from the data length of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification has failed.

11. The interface verification method according to claim 10, characterized in that: The method further comprises: If the data length of the data to be sent is the same as the data length of the target data, comparing the data content of the data to be sent with the data content of the target data; If the data content of the data to be sent is the same as the data content of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is reliability verification passed.

12. The interface verification method according to claim 11, characterized in that: The method further comprises: If the data content of the data to be sent is different from the data content of the target data, it is determined that the reliability verification result of the target keyboard controller style interface is that the reliability verification fails.

13. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the interface verification method according to any one of claims 1 to 12 when executing the computer program.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the interface verification method according to any one of claims 1 to 12.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the interface verification method according to any one of claims 1 to 12 are implemented.

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