H-tree layout optimization method and device, equipment and medium
By obtaining the initial centroid in H-tree layout optimization and iteratively optimizing, combining preset optimization models and scoring rules, the problem of global layout poor caused by local optimization in traditional methods is solved, and more efficient H-tree layout optimization is achieved.
Patent Information
- Application Number
- CN202411734101.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-29
- Publication Date
- 2025-04-22
- Estimated Expiration
- 2044-11-29
AI Technical Summary
The traditional H tree layout optimization method is mainly based on local information, which leads to the globally not optimal H tree layout, which in turn causes problems such as increasing clock signal delay, increasing deviation and increasing power consumption.
By obtaining the initial centroid of the H tree and determining the optimized centroid according to the preset optimization model, the optimized H tree layout is determined. Use preset scoring rules to evaluate the layout, and iterative optimization is performed while meeting the scoring threshold condition until the terminating iteration condition is reached.
A more comprehensive assessment of the impact of different centroid selection on the overall layout of the H tree is achieved, and a more reasonable optimization of the centroid is determined, which avoids the problem of poor global layout caused by local optimization, and approaches the global optimal solution through iterative optimization.
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Figure CN119862848A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of H-tree layout, and in particular to an H-tree layout optimization method, device, equipment and medium. Background Art
[0002] In the field of integrated circuit design, the design of clock distribution networks is crucial to ensure chip performance. Among them, the H-tree structure has become the preferred structure in clock distribution networks due to its unique branching characteristics and efficient clock signal distribution capabilities. However, despite the many advantages of the H-tree, the optimization of its layout, especially the selection of the centroid, has always been a major problem in the design.
[0003] Traditional centroid selection methods, such as the geometric center method and the weighted center method, can guide the selection of centroids to a certain extent, but these methods are mainly based on local information, such as the location of nodes, the length of connecting lines, etc., and fail to fully consider the needs of global layout. This local consideration often leads to the generated H-tree layout being not optimal globally, which in turn causes a series of problems. For example, the delay of the clock signal may increase, the deviation may increase, and the power consumption may also increase, all of which will seriously affect the overall performance of the chip.
[0004] Therefore, there is an urgent need for a method that can accurately evaluate the impact of different centroid selections on H-tree layout and clock signal distribution performance. This method needs to be able to comprehensively consider global information, including but not limited to the distribution of nodes, the direction of connecting lines, and the transmission speed of signals, so as to effectively optimize the centroid selection of the H-tree. Summary of the invention
[0005] In view of the above problems, embodiments of the present invention are proposed to provide an H-tree layout optimization method, apparatus, device and medium that overcome the above problems or at least partially solve the above problems.
[0006] In order to solve the above problem, an embodiment of the present invention discloses an H-tree layout optimization method, which includes:
[0007] Get the initial centroid of the H tree;
[0008] Determine an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;
[0009] Determining an optimized H-tree layout according to the optimized centroid;
[0010] Determine an optimized H-tree layout score according to the optimized H-tree layout and preset scoring rules;
[0011] Under the condition that the score of the optimized H-tree layout meets a preset score threshold, determining a candidate H-tree layout according to the optimized H-tree layout;
[0012] Determine whether a preset termination iteration condition is met according to the candidate H-tree layout;
[0013] In the case where the candidate H-tree layout meets a preset termination iteration condition, a target H-tree layout is determined according to the candidate H-tree layout.
[0014] Optionally, determining whether a preset termination iteration condition is satisfied according to the candidate H-tree layout includes:
[0015] Determine a candidate layout score according to the candidate H-tree layout and a preset scoring rule;
[0016] Determining a score difference according to the candidate layout score and the preset score threshold;
[0017] When the score difference is less than a preset difference threshold, it is determined that the candidate H-tree layout meets a preset termination iteration condition.
[0018] Optionally, the method further comprises:
[0019] When the score difference is greater than or equal to the preset difference threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model.
[0020] Optionally, when the score difference is greater than or equal to a preset difference threshold, returning to the step of determining an optimized centroid based on the initial centroid of the H-tree and a preset optimization model comprises:
[0021] Obtaining the number of processing times and the processing number threshold of the H tree;
[0022] When the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing times threshold, returning to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, and updating the number of processing times of the H-tree;
[0023] The method further comprises:
[0024] When the score difference is greater than or equal to a preset difference threshold and the number of processing times is equal to the preset number of processing times threshold, a target H-tree layout is determined according to the candidate H-tree layouts.
[0025] Optionally, when the score difference is greater than or equal to a preset difference threshold and the number of processing times is less than the processing times threshold, returning to the step of determining the optimized centroid according to the initial centroid of the H tree and a preset optimization model, and updating the number of processing times of the H tree, includes:
[0026] Determining a termination iteration parameter according to the number of processing times of the H tree and a preset adjustment factor;
[0027] When the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing number threshold and the termination iteration parameter does not meet the preset termination iteration parameter condition, return to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and update the number of processing times and the termination iteration parameter of the H tree;
[0028] The method further comprises:
[0029] When the score difference is greater than or equal to a preset difference threshold, the number of processing times is less than the preset number of processing times threshold, and the termination iteration parameter meets the preset termination iteration parameter condition, a target H-tree layout is determined according to the candidate H-tree layout.
[0030] Optionally, the method further comprises:
[0031] Get the duration and preset update time threshold of the H-tree centroid optimization;
[0032] The termination iteration parameter is updated according to the preset adjustment factor, the duration of the current optimization of the H-tree centroid and the preset update time threshold.
[0033] Optionally, under the condition that the score of the optimized H-tree layout meets a preset score threshold, determining a candidate H-tree layout according to the optimized H-tree layout includes:
[0034] In a case where the layout score is greater than or equal to a score threshold, determining a candidate H-tree layout according to the optimized H-tree layout;
[0035] The method further comprises:
[0036] Under the condition that the layout score is less than a score threshold, obtaining a preset acceptance condition;
[0037] In the case that the optimized H-tree layout satisfies a preset acceptance condition, a candidate H-tree layout is determined according to the optimized H-tree layout.
[0038] Optionally, obtaining the initial centroid of the H-tree includes:
[0039] Acquire the information of logic units that need clock signals in the design area of the H tree; the logic units include: information of logic units of components that need clock signals on the root node, clock access point and child nodes of the H tree;
[0040] An initial centroid of the H-tree is generated according to the logic unit information.
[0041] Optionally, obtaining the initial centroid of the H-tree includes:
[0042] Obtaining the structure of the H-tree;
[0043] Determining a root node of the H tree according to the structure of the H tree;
[0044] Determining the distribution of clock access points according to the root node of the H tree;
[0045] An initial centroid of the H tree is determined according to the distribution of the clock access points.
[0046] On the other hand, an embodiment of the present invention further discloses an H-tree layout optimization device, the device comprising:
[0047] Initial centroid generation module, used to obtain the initial centroid of the H-tree;
[0048] An optimized centroid generation module, used to determine an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;
[0049] An H-tree layout generation module, used to determine an optimized H-tree layout according to the optimized centroid;
[0050] A layout score determination module, used to determine the optimized H-tree layout score according to the optimized H-tree layout and preset scoring rules;
[0051] A candidate layout determination module, configured to determine a candidate H-tree layout according to the optimized H-tree layout under the condition that the optimized H-tree layout score meets a preset score threshold;
[0052] An iteration termination determination module, used to determine whether a preset iteration termination condition is met according to the candidate H-tree layout;
[0053] The target layout determination module is used to determine the target H-tree layout according to the candidate H-tree layout when the candidate H-tree layout meets the preset termination iteration condition.
[0054] Optionally, the iteration termination determination module includes:
[0055] A candidate score determination submodule, used to determine the candidate layout score according to the candidate H-tree layout and preset scoring rules;
[0056] A score difference determination submodule, used to determine the score difference according to the candidate layout score and the preset score threshold;
[0057] The determination termination submodule is used to determine whether the candidate H-tree layout meets a preset termination iteration condition when the score difference is less than a preset difference threshold.
[0058] Optionally, the device further comprises:
[0059] The iteration start submodule is used to return to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to the preset difference threshold.
[0060] Optionally, the iteration start submodule includes:
[0061] A processing times acquisition unit, used to acquire the processing times and processing times threshold of the H tree;
[0062] Confirm the iteration unit, when the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing times threshold, return to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and update the number of processing times of the H tree;
[0063] The device also includes:
[0064] The target layout determination submodule is used to determine the target H-tree layout according to the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold and the number of processing times is equal to the preset number of processing times threshold.
[0065] Optionally, the confirmation iteration unit further includes:
[0066] A termination iteration parameter determination subunit, used to determine a termination iteration parameter according to the number of processing times of the H tree and a preset adjustment factor;
[0067] A first confirmation iteration subunit is used for returning to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and updating the number of processing times and the termination iteration parameter of the H tree when the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing number threshold and the termination iteration parameter does not meet the preset termination iteration parameter condition;
[0068] The device also includes:
[0069] The first termination iteration submodule is used to determine the target H-tree layout according to the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold, the number of processing times is less than the preset processing number threshold, and the termination iteration parameter meets the preset termination iteration parameter condition.
[0070] Optionally, the device further comprises:
[0071] The duration determination submodule is used to obtain the duration of the H-tree centroid optimization and the preset update time threshold;
[0072] The termination iteration parameter updating submodule is used to update the termination iteration parameter according to the preset adjustment factor, the duration of the current optimization of the H-tree centroid and the preset update time threshold.
[0073] Optionally, the candidate layout determination module includes:
[0074] A first candidate layout determination submodule, configured to determine a candidate H-tree layout according to the optimized H-tree layout when the layout score is greater than or equal to a score threshold;
[0075] The device also includes:
[0076] An acceptance condition determination submodule, used for obtaining a preset acceptance condition under the condition that the layout score is less than a score threshold;
[0077] The second candidate layout determination submodule is used to determine a candidate H-tree layout according to the optimized H-tree layout when the optimized H-tree layout meets a preset acceptance condition.
[0078] Optionally, the initial centroid generation module includes:
[0079] An H-tree design information acquisition submodule is used to acquire information about logic units that require clock signals in a design area of the H-tree; the logic units include information about logic units of components that require clock signals on the root node, clock access points, and child nodes of the H-tree;
[0080] The first initial centroid generation submodule is used to generate the initial centroid of the H tree according to the logic unit information.
[0081] Optionally, the initial centroid generation module includes:
[0082] An H-tree structure acquisition submodule, used to acquire the structure of the H-tree;
[0083] An H-tree root node acquisition submodule, used to determine the root node of the H-tree according to the structure of the H-tree;
[0084] A clock access point determination submodule, used to determine the distribution of clock access points according to the root node of the H tree;
[0085] The second initial centroid generating submodule is used to determine the initial centroid of the H tree according to the distribution of the clock access points.
[0086] Accordingly, an embodiment of the present invention discloses an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein the computer program implements the various steps of the above-mentioned H-tree layout optimization method embodiment when executed by the processor.
[0087] Accordingly, an embodiment of the present invention discloses a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the various steps of the above-mentioned H-tree layout optimization method embodiment are implemented.
[0088] The embodiment of the present invention includes the following advantages: by determining the process of optimizing the H-tree layout score according to the initial centroid of the H-tree and the preset optimization model and according to the optimized H-tree layout and the preset scoring rules, the influence of different centroid selections on the overall layout of the H-tree can be more comprehensively evaluated. This consideration from a global perspective helps to determine a more reasonable optimized centroid, thereby avoiding the problem of poor global layout caused by local optimization, and combined with the iterative conditions, the embodiment can continuously adjust the layout according to the scoring results through the iterative optimization process, and further approach the global optimal solution. Through the preset optimization model and scoring rules, the embodiment of the present invention can comprehensively consider global layout factors, such as the distribution of nodes, the direction of connecting lines, etc., to ensure that the generated H-tree layout is globally optimal. This global consideration is incomparable to traditional local optimization methods. BRIEF DESCRIPTION OF THE DRAWINGS
[0089] Figure 1 is a flow chart of steps of an embodiment of an H-tree layout optimization method of the present invention;
[0090] Figure 2 is a flowchart of another H-tree layout optimization method embodiment 2 of the present invention;
[0091] Figure 3 It is a model concept diagram of a clock tree layout optimization method using a simulated annealing algorithm as an optimization model of the present invention;
[0092] Figure 4 It is a flow chart of an H-tree layout optimization method using a simulated annealing algorithm as an optimization model of the present invention;
[0093] Figure 5 It is a structural block diagram of an embodiment of an H-tree layout optimization device of the present invention. DETAILED DESCRIPTION
[0094] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0095] The clock tree refers to the network of various clock signals derived from the clock source. In digital integrated circuits, clock signals are used to synchronize the operation of various components and ensure that data is transmitted and processed at the correct time. The clock tree ensures that each component can obtain the required clock frequency at the correct time, thereby achieving synchronous operation. As part of the clock tree, the clock distribution network is responsible for transmitting the clock signal from the clock source to the various components on the chip. A well-designed clock distribution network can ensure that the delay and deviation of the clock signal on all paths are as small as possible, thereby improving the stability and performance of the system.
[0096] A clock signal is a periodic digital signal used to synchronize operations in digital circuits. It is usually generated by a stable clock source such as a crystal oscillator or resonator, and transmitted to various components on the chip through a clock tree and a clock distribution network. The main function of the clock signal is to ensure that each component works at the correct timing and avoid data conflicts and synchronization problems. In digital circuits, clock signals are usually used to control the read and write operations of registers, the flip of triggers, etc.
[0097] H tree is a computer science and technology term announced by the National Committee for the Examination of Scientific and Technological Terms in 2018. It is a special form of tree structure, stretching from the center to all directions, presenting an H-like shape. H tree is often used in clock distribution networks. In the design of clock tree, H tree structure can effectively transmit clock signals from the root node to each child node while maintaining the synchronization and stability of the signal. The H tree structure is hierarchical and symmetrical, which gives it unique advantages in the distribution and transmission of clock signals. For example, it can reduce the skew and delay of clock signals and improve the performance and reliability of clock trees.
[0098] The tap point is usually located at the end of each branch of the H-tree. It is the access point for the clock signal to be distributed from the H-tree trunk to each leaf node, that is, the register or other timing element. The main function of the tap point is to ensure that the clock signal can be evenly distributed to all leaf nodes, thereby reducing clock deviation and delay. By reasonably setting the location and number of tap points, efficient transmission and synchronization of clock signals can be achieved.
[0099] One of the core concepts of the embodiment of the present invention is to use a global optimization algorithm to continuously optimize and iterate the H-tree centroid selection until the optimal H-tree centroid position within a given H-tree range is selected.
[0100] Reference Figure 1 , shows a flow chart of steps of an H-tree layout optimization method embodiment of the present invention, which may specifically include the following steps:
[0101] Step 101, obtaining the initial centroid of the H tree;
[0102] In the H-tree, the centroid is a logical concept that has special significance for the distribution and transmission of clock signals. For example, it may be the node with the smallest signal delay or the node with the best signal synchronization. Therefore, in the design and optimization process of the H-tree, it is important to find the centroid of the H-tree within a given range and further design the tap points based on the centroid of the H-tree.
[0103] Step 102, determining an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;
[0104] In the selection of the optimized centroid, the preset global optimization module and the generated initial centroid are used to generate the optimized centroid.
[0105] The global optimization algorithm is a heuristic algorithm based on simulating the behavior of natural organisms, aiming to find the global optimal solution or approximate global optimal solution of the optimization problem.
[0106] In one example, the preset optimization module can be a simulated annealing algorithm model. The simulated annealing algorithm was first proposed by Metropolis (Nicholas Metropolis) et al. in 1953. It is a stochastic method for solving large-scale combinatorial optimization problems. It is based on the similarity between solving optimization problems and the annealing process of physical systems, and finds the global optimal solution by simulating the behavior of a substance reaching the lowest energy state during the solid annealing process.
[0107] The method for determining the optimized centroid may be: randomly generating a point within the range of the current centroid as the optimized centroid, where the neighborhood range is generally determined by experience or based on business requirements; the range here is a circle with a radius of 10 microns.
[0108] Step 103, determining an optimized H-tree layout according to the optimized centroid;
[0109] The steps of generating a layout based on the centroid can be briefly summarized as follows: clarify the location of the centroid of the H-tree, and divide the layout space into several sub-areas based on the location of the centroid. These sub-areas will be used to place the nodes and connecting lines of the H-tree. In the divided sub-areas, the nodes are placed one by one according to the structure and hierarchical relationship of the H-tree. Usually, the root node is placed at or near the centroid, and then other nodes are placed outward layer by layer. Use connecting lines to connect the nodes of the H-tree to form a complete tree structure. The length and direction of the connecting lines should be optimized as much as possible to reduce delays and interference in signal transmission. Adjust and optimize the initially generated H-tree layout as needed. This may include adjusting the location of nodes, the direction and length of connecting lines, etc. to meet specific performance requirements or constraints.
[0110] Step 104, determining an optimized H-tree layout score according to the optimized H-tree layout and preset scoring rules;
[0111] After determining the layout of the H-tree, we need to further judge whether the generated layout meets the requirements;
[0112] In one example, the scoring rule may be: E=w1·Delay+w2·Power+w3·Aesthetics, w1+w2+w3=1, where Delay is the sum of the signal delays from the centroid to each child node, using the RC delay model: Where R i is the connected resistance, C i Power is the power consumption, taking into account the resistance and current of each connection: Aesthetics: The aesthetics of the layout can be quantified by calculating the distance and intersection between mass points.
[0113] The aesthetics of the H-tree layout can be evaluated by the distance between nodes, path intersection, symmetry and balance. The uniformity of the distance between nodes can be measured by calculating the distance between all nodes and the standard deviation of these distances. The smaller the standard deviation, the more uniform the nodes. The path intersection can be measured by calculating the number of intersections between all paths. The smaller the number, the clearer the layout. Symmetry and balance can be measured by calculating the difference in node distribution on both sides of the symmetry of the H-tree. The better the symmetry, the more beautiful the layout. The aesthetics of the layout can be selectively adjusted according to the needs of the project. The layout aesthetics here is 0.5×(standard deviation between nodes)+0.3×(number of intersections)+0.2×(number of differences in node distribution on both sides). The smaller the value, the more beautiful it is.
[0114] The RC delay model is based on a circuit composed of resistors (R) and capacitors (C) and is used to simulate and analyze signal delay phenomena in circuits. In this model, resistors limit the flow of current, while capacitors store charge. When voltage passes through these two components, the charge is accumulated and released, causing changes in the current and voltage in the circuit, resulting in a delay effect.
[0115] Step 105, under the condition that the score of the optimized H-tree layout meets a preset score threshold, determining a candidate H-tree layout according to the optimized H-tree layout;
[0116] The calculated layout score is compared with the preset score threshold to determine whether the layout meets the requirements. The score threshold is generally designed according to business needs and can be adjusted accordingly, such as dynamically adjusting the threshold value.
[0117] Step 106, determining whether a preset termination iteration condition is satisfied according to the candidate H-tree layout;
[0118] The termination condition may be an iteration number condition or a scoring threshold condition, etc., and may be designed according to business needs.
[0119] Step 107: When the candidate H-tree layout satisfies a preset termination condition for iteration, a target H-tree layout is determined according to the candidate H-tree layout.
[0120] Furthermore, if the candidate layout satisfies the requirements and the requirements for terminating the iteration, the iteration is stopped and the layout is output as the target H-tree layout.
[0121] The embodiment of the present invention can more comprehensively evaluate the impact of different centroid selections on the overall layout of the H tree by determining the process of optimizing the H tree layout score according to the initial centroid of the H tree and the preset optimization model, as well as according to the optimized H tree layout and the preset scoring rules. This global perspective is helpful to determine a more reasonable optimized centroid, thereby avoiding the problem of poor global layout caused by local optimization. In combination with the iterative conditions, this embodiment can continuously adjust the layout according to the scoring results through the iterative optimization process, and further approach the global optimal solution. Through the preset optimization model and scoring rules, the embodiment of the present invention can comprehensively consider global layout factors, such as the distribution of nodes, the direction of connecting lines, etc., to ensure that the generated H tree layout is globally optimal. This global consideration is incomparable to traditional local optimization methods.
[0122] Reference Figure 2 , shows a flowchart of another H-tree layout optimization method embodiment of the present invention, which may specifically include the following steps:
[0123] Step 201, obtaining information of logic units that require clock signals in the design area of the H tree; the logic units include: information of logic units of components that require clock signals on the root node, clock access point and child nodes of the H tree;
[0124] When designing the H-tree structure, it is necessary to collect and understand the information of all logic units that require clock signals in the design area, which covers the root node of the H-tree, the clock access point, and all related logic units on the child nodes. This is done to ensure that the clock signal can be correctly and efficiently delivered to each logic unit, thereby meeting the design requirements of the entire circuit.
[0125] The design region refers to a specific area allocated to the H-tree structure in the integrated circuit design. The logic unit is the basic component of the integrated circuit, which is used to perform logical operations (such as AND, OR, NOT, etc.).
[0126] The root node of the H-tree is the starting point of the H-tree, usually the input point of the clock signal; the clock access point refers to the points on the branches of the H-tree where the clock signal is accessed and then further distributed to the child nodes; the component logic units on the child nodes that require clock signals are the logic units at the end or middle level of the H-tree, which directly receive clock signals to perform their functions. The information of component logic units refers to the specific information about each logic unit that requires a clock signal, including but not limited to: the location, type, function, required clock frequency, phase requirements of the clock signal, etc. of the logic unit.
[0127] Step 202: Generate an initial centroid of the H-tree according to the logic unit information.
[0128] Based on business needs, preset algorithms, and logical unit information, an initial centroid of the H number is generated.
[0129] In one embodiment, step 201 and step 202 may also be the following steps:
[0130] Obtaining the structure of the H-tree;
[0131] In order to understand the overall layout and branching of the existing H-tree, it can be obtained with the help of EDA (Electronic Design Automation) tools or ICC2 (IC Compiler II) tools or manual analysis. The structure of the H-tree describes how the clock signal is distributed from the root node to each child node.
[0132] Determining a root node of the H tree according to the structure of the H tree;
[0133] In the H-tree structure, the root node is usually the only node without a parent node, or is the node directly connected to the clock source.
[0134] Determining the distribution of clock access points according to the root node of the H tree;
[0135] Starting from the root node, along the branches of the H tree, determine the location of the clock access point according to the design requirements and the distribution strategy of the clock signal.
[0136] An initial centroid of the H tree is determined according to the distribution of the clock access points.
[0137] In one example, when an H-tree is given, the structure of the H-tree can be obtained first, and the distribution of taps and the location of the root node can be further determined. Then, based on the tap point information obtained by analyzing the H-tree structure, a preset clustering algorithm and an automated tool such as the ICC2 tool, an initial centroid of an optimized H-tree is generated.
[0138] In this way, the embodiment of the present invention can not only generate a target layout, but also obtain an optimized H-tree layout by analyzing the layout of an existing H-tree.
[0139] Step 203, determining an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;
[0140] In the selection of the optimized centroid, the preset global optimization module and the generated initial centroid are used to generate the optimized centroid.
[0141] The global optimization algorithm is a heuristic algorithm based on simulating the behavior of natural organisms, aiming to find the global optimal solution or approximate global optimal solution of the optimization problem.
[0142] In one example, the preset optimization module can be a simulated annealing algorithm model. The simulated annealing algorithm was first proposed by Metropolis (Nicholas Metropolis) et al. in 1953. It is a stochastic method for solving large-scale combinatorial optimization problems. It is based on the similarity between solving optimization problems and the annealing process of physical systems, and finds the global optimal solution by simulating the behavior of a substance reaching the lowest energy state during the solid annealing process.
[0143] The method for determining the optimized centroid may be: randomly generating a point within the range of the current centroid as the optimized centroid, where the neighborhood range is generally determined by experience or based on business requirements; the range here is a circle with a radius of 10 microns.
[0144] Step 204, determining an optimized H-tree layout according to the optimized centroid;
[0145] After determining the layout of the H-tree, we need to further judge whether the generated layout meets the requirements;
[0146] In one example, the scoring rule may be: E=w1·Delay+w2·Power+w3·Aesthetics, w1+w2+w3=1, where Delay is the sum of signal delays from the centroid to each child node, using the RC delay model: Where R i is the connected resistance, C i Power is the power consumption, taking into account the resistance and current of each connection: Aesthetics: The aesthetics of the layout can be quantified by calculating the distance and intersection between mass points.
[0147] The aesthetics of the H-tree layout can be evaluated by the distance between nodes, path intersection, symmetry and balance. The uniformity of the distance between nodes can be measured by calculating the distance between all nodes and the standard deviation of these distances. The smaller the standard deviation, the more uniform the nodes. The path intersection can be measured by calculating the number of intersections between all paths. The smaller the number, the clearer the layout. Symmetry and balance can be measured by calculating the difference in node distribution on both sides of the symmetry of the H-tree. The better the symmetry, the more beautiful the layout. The aesthetics of the layout can be selectively adjusted according to the needs of the project. The layout aesthetics here is 0.5×(standard deviation between nodes)+0.3×(number of intersections)+0.2×(number of differences in node distribution on both sides). The smaller the value, the more beautiful it is.
[0148] The RC delay model is based on a circuit composed of resistors (R) and capacitors (C) and is used to simulate and analyze signal delay phenomena in circuits. In this model, resistors limit the flow of current, while capacitors store charge. When voltage passes through these two components, the charge is accumulated and released, causing changes in the current and voltage in the circuit, resulting in a delay effect.
[0149] Step 205, determining an optimized H-tree layout score according to the optimized H-tree layout and preset scoring rules;
[0150] The calculated layout score is compared with the preset score threshold to determine whether the layout meets the requirements. The score threshold is generally designed according to business needs and can be adjusted accordingly, such as dynamically adjusting the threshold value.
[0151] In one example, the scoring threshold may be preset according to business requirements, or may be dynamically adjusted according to the score of the layout result of this optimization.
[0152] Step 206, under the condition that the score of the optimized H-tree layout meets a preset score threshold, determine a candidate H-tree layout according to the optimized H-tree layout;
[0153] The termination condition may be an iteration number condition or a scoring threshold condition, etc., and may be designed according to business needs.
[0154] In one embodiment, the step 206 includes the following sub-steps:
[0155] Sub-step S11, determining a candidate H-tree layout according to the optimized H-tree layout when the layout score is greater than or equal to a score threshold;
[0156] The method further comprises:
[0157] Under the condition that the layout score is less than the score threshold, obtaining a preset acceptance condition;
[0158] The general non-global optimization model falls into the problem of local minimum, which can be circumvented by setting preset acceptance conditions;
[0159] In one example, the acceptance criterion may be the Metropolis criterion, the core idea of which is to accept a new state with a certain probability, rather than accepting or rejecting it with complete certainty. By presetting the acceptance condition, the optimization model is prevented from falling into the problem of a local optimal solution, thus ensuring the robustness of the model.
[0160] In the case that the optimized H-tree layout satisfies a preset acceptance condition, a candidate H-tree layout is determined according to the optimized H-tree layout.
[0161] Step 207, determining whether a preset termination iteration condition is satisfied according to the candidate H-tree layout;
[0162] In one embodiment, step 207 includes the following sub-steps:
[0163] Sub-step S21, determining a candidate layout score according to the candidate H-tree layout and a preset scoring rule;
[0164] Sub-step S22, determining a score difference according to the candidate layout score and the preset score threshold;
[0165] When the score meets the preliminary acceptance threshold, the optimization degree of the optimization result is determined. In the embodiment of the present invention, the layout optimization degree is determined based on the difference between the layout score and the preset score.
[0166] In an example, the degree of layout optimization may be determined based on the difference between the layout score and a score threshold updated according to the last optimization result.
[0167] Sub-step S23, when the score difference is less than a preset difference threshold, determining that the candidate H-tree layout meets a preset termination iteration condition.
[0168] When the difference is less than a certain value, it can be considered that the current candidate H number layout has met the termination iteration condition. By using the scoring difference to determine whether the current layout meets the requirements, the result of this optimization can be intuitively determined, making the optimization process clearer.
[0169] In one embodiment, the method further comprises:
[0170] When the score difference is greater than or equal to the preset difference threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model.
[0171] If the optimization result does not meet the difference value for terminating the iteration, it will return to the previous step to continue iterating to obtain a better result.
[0172] In one embodiment, when the score difference is greater than or equal to a preset difference threshold, returning to the initial centroid of the H-tree and the preset optimization model to determine the optimized centroid includes the following sub-steps:
[0173] Sub-step S31, obtaining the processing times and processing times threshold of the H tree;
[0174] In addition to determining whether to terminate the iteration based on the score difference, a limit on the number of iterations is also set to prevent endless iterations caused by some unknown errors; and in practical applications, the running time of the model is usually an important consideration. By setting the processing number threshold, the maximum running time of the algorithm can be roughly controlled to meet the time requirements in practical applications.
[0175] Sub-step S32, when the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing times threshold, return to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, and update the number of processing times of the H-tree;
[0176] During the model iteration process, if the difference between the current layout score and the preset layout score is still relatively large, and the number of iterations has not reached the upper limit, the model will try to find a better solution based on the initial centroid of the H tree and the preset optimization model, and update the number of iterations.
[0177] The method further comprises:
[0178] When the score difference is greater than or equal to a preset difference threshold and the number of processing times is equal to the preset number of processing times threshold, a target H-tree layout is determined according to the candidate H-tree layouts.
[0179] When the number of model iterations reaches the preset maximum number, even if the current layout score is still a certain distance away from the preset layout score, the iteration will be terminated. This execution process ensures that the model has enough search space to find the optimal solution, and prevents the model from falling into an infinite loop by limiting the number of iterations.
[0180] In one embodiment, the sub-step S32 further includes the following sub-steps:
[0181] Sub-step S321, determining a termination iteration parameter according to the number of processing times of the H tree and a preset adjustment factor;
[0182] In addition to the number of processing times, additional parameters can be set to control the progress of the algorithm;
[0183] In one example, when applying the simulated annealing algorithm to the optimization model of H-tree optimization, the termination iteration parameter is temperature; temperature is a key control parameter of the simulated annealing algorithm, which determines the degree of exploration of the algorithm in the solution space. At high temperatures, the algorithm is more inclined to accept new, possibly inferior solutions, thereby enhancing exploration capabilities; at low temperatures, the algorithm is more inclined to retain the current better solution, thereby enhancing convergence. In this example, the initial temperature can be 1000 degrees, and the cooling strategy is to reduce the temperature by 10% after a preset time or to perform exponential cooling according to a preset cooling index after a preset time. The preset cooling index can be adjusted according to the needs of the optimization problem, which is 0.95 here;
[0184] Sub-step S322, when the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing number threshold and the termination iteration parameter does not meet the preset termination iteration parameter condition, return to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and update the number of processing times and the termination iteration parameter of the H tree;
[0185] When the number of processing times and the termination iteration parameter have not reached the preset maximum value, the model will continue to iterate and update the termination iteration parameter;
[0186] The method further includes: determining a target H-tree layout according to the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold, the number of processing times is less than the preset number of processing times threshold, and the termination iteration parameter satisfies a preset termination iteration parameter condition.
[0187] The optimization iteration will also be terminated if the processing times threshold is not reached but the termination iteration parameters are met;
[0188] In one example, the iteration is stopped when the temperature drops to 1. By additionally setting the termination iteration parameter, the optimization process of the model can be further optimized.
[0189] In one embodiment, the method further comprises:
[0190] Get the duration and preset update time threshold of the H-tree centroid optimization;
[0191] The termination iteration parameter is updated according to the preset adjustment factor, the duration of the current optimization of the H-tree centroid and the preset update time threshold.
[0192] The optimization of the termination iteration parameters can be updated by data from multiple dimensions to meet the comprehensiveness of the model;
[0193] Step 208: When the candidate H-tree layout satisfies a preset termination condition for iteration, a target H-tree layout is determined according to the candidate H-tree layout.
[0194] Reference Figure 3 , showing a model concept diagram of a clock tree layout optimization method using a simulated annealing algorithm as an optimization model of the present invention;
[0195] First, the coverage of the H tree is determined based on the structure of the clock tree and the location distribution of the logic units. Then, based on this information, an initial temperature and a cooling strategy corresponding to the threshold are designed.
[0196] Then, a perturbation mechanism of the mass point is defined according to the optimization business needs. The perturbation mechanism is used to generate a new centroid in each iteration. The new centroid is selected after making slight adjustments around the previous centroid.
[0197] Then, according to the needs of the project, such as delay requirements, power consumption requirements, and layout range, an evaluation function is designed to evaluate the quality of the generated layout; finally, based on multi-dimensional information such as initial temperature and project information, an acceptance criterion is set to enable the optimization model to jump out of the local optimal solution; after completing the above preparations, a termination condition is determined based on all the above design indicators. The termination condition may include indicators such as the maximum number of iterations and the lowest temperature.
[0198] The embodiment of the present invention can more comprehensively evaluate the impact of different centroid selections on the overall layout of the H tree by determining the process of optimizing the H tree layout score according to the initial centroid of the H tree and the preset optimization model, as well as according to the optimized H tree layout and the preset scoring rules. This global perspective is helpful to determine a more reasonable optimized centroid, thereby avoiding the problem of poor global layout caused by local optimization. In combination with the iterative conditions, this embodiment can continuously adjust the layout according to the scoring results through the iterative optimization process, and further approach the global optimal solution. Through the preset optimization model and scoring rules, the embodiment of the present invention can comprehensively consider global layout factors, such as the distribution of nodes, the direction of connecting lines, etc., to ensure that the generated H tree layout is globally optimal. This global consideration is incomparable to traditional local optimization methods.
[0199] Reference Figure 4 , showing a flow chart of an H-tree layout optimization method using a simulated annealing algorithm as an optimization model of the present invention:
[0200] First, we need to determine the number and distribution of tap points of a given H-tree, and determine the current mass point based on the distribution of tap points;
[0201] Then, according to the predefined perturbation mechanism, a new centroid is generated according to the current centroid, and a new layout is generated according to the new centroid;
[0202] According to the pre-designed evaluation function, the score of the new layout is calculated, and the score is compared with the preset threshold to determine whether the new layout is the current optimal solution. If so, the new layout is accepted as the new comparison standard; if not, the layout is probabilistically accepted according to the pre-designed acceptance criteria;
[0203] After the layout acceptance work is completed, it is determined whether the current number of iterations reaches a preset iteration number threshold. If not, the iteration continues, and a new centroid is generated according to the current centroid according to a predefined perturbation mechanism, and a new layout is generated according to the new centroid.
[0204] If the number of iterations is reached, it is determined whether the new layout meets the preset output standard. If it does, the new layout is output; if it does not, the process continues to return to the step of generating a new centroid based on the current centroid according to the pre-defined perturbation mechanism and generating a new layout based on the new centroid to continue the iteration.
[0205] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.
[0206] Reference Figure 5 , shows a structural block diagram of an embodiment of an H-tree layout optimization device of the present invention, which may specifically include the following modules:
[0207] An initial centroid generation module 301 is used to obtain the initial centroid of the H-tree;
[0208] In the H-tree, the centroid is a logical concept that has special significance for the distribution and transmission of clock signals. For example, it may be the node with the smallest signal delay or the node with the best signal synchronization. Therefore, in the design and optimization process of the H-tree, it is important to find the centroid of the H-tree within a given range and further design the tap points based on the centroid of the H-tree.
[0209] An optimized centroid generation module 302 is used to determine an optimized centroid according to the initial centroid of the H-tree and a preset optimization model;
[0210] In the selection of the optimized centroid, the preset global optimization module and the generated initial centroid are used to generate the optimized centroid.
[0211] The global optimization algorithm is a heuristic algorithm based on simulating the behavior of natural organisms, aiming to find the global optimal solution or approximate global optimal solution of the optimization problem.
[0212] In one example, the preset optimization module can be a simulated annealing algorithm model. The simulated annealing algorithm was first proposed by Metropolis (Nicholas Metropolis) et al. in 1953. It is a stochastic method for solving large-scale combinatorial optimization problems. It is based on the similarity between solving optimization problems and the annealing process of physical systems, and finds the global optimal solution by simulating the behavior of a substance reaching the lowest energy state during the solid annealing process.
[0213] The method for determining the optimized centroid may be: randomly generating a point within the range of the current centroid as the optimized centroid, where the neighborhood range is generally determined by experience or based on business requirements; the range here is a circle with a radius of 10 microns.
[0214] An H-tree layout generating module 303 is used to determine an optimized H-tree layout according to the optimized centroid;
[0215] The steps of generating a layout based on the centroid can be briefly summarized as follows: clarify the location of the centroid of the H-tree, and divide the layout space into several sub-areas based on the location of the centroid. These sub-areas will be used to place the nodes and connecting lines of the H-tree. In the divided sub-areas, the nodes are placed one by one according to the structure and hierarchical relationship of the H-tree. Usually, the root node is placed at or near the centroid, and then other nodes are placed outward layer by layer. Use connecting lines to connect the nodes of the H-tree to form a complete tree structure. The length and direction of the connecting lines should be optimized as much as possible to reduce delays and interference in signal transmission. Adjust and optimize the initially generated H-tree layout as needed. This may include adjusting the location of nodes, the direction and length of connecting lines, etc. to meet specific performance requirements or constraints.
[0216] A layout score determination module 304, configured to determine an optimized H-tree layout score according to the optimized H-tree layout and preset scoring rules;
[0217] After determining the layout of the H-tree, we need to further judge whether the generated layout meets the requirements;
[0218] In one example, the scoring rule may be: E=w1·Delay+w2·Power+w3·Aesthetics, w1+w2+w3=1, where Delay is the sum of signal delays from the centroid to each child node, using the RC delay model: Where R i is the connected resistance, C i Power is the power consumption, taking into account the resistance and current of each connection: Aesthetics: The aesthetics of the layout can be quantified by calculating the distance and intersection between mass points.
[0219] The aesthetics of the H-tree layout can be evaluated by the distance between nodes, path intersection, symmetry and balance. The uniformity of the distance between nodes can be measured by calculating the distance between all nodes and the standard deviation of these distances. The smaller the standard deviation, the more uniform the nodes. The path intersection can be measured by calculating the number of intersections between all paths. The smaller the number, the clearer the layout. Symmetry and balance can be measured by calculating the difference in node distribution on both sides of the symmetry of the H-tree. The better the symmetry, the more beautiful the layout. The aesthetics of the layout can be selectively adjusted according to the needs of the project. The layout aesthetics here is 0.5×(standard deviation between nodes)+0.3×(number of intersections)+0.2×(number of differences in node distribution on both sides). The smaller the value, the more beautiful it is.
[0220] The RC delay model is based on a circuit composed of resistors (R) and capacitors (C) and is used to simulate and analyze signal delay phenomena in circuits. In this model, resistors limit the flow of current, while capacitors store charge. When voltage passes through these two components, the charge is accumulated and released, causing changes in the current and voltage in the circuit, resulting in a delay effect.
[0221] A candidate layout determination module 305 is used to determine a candidate H-tree layout according to the optimized H-tree layout under the condition that the optimized H-tree layout score meets a preset score threshold;
[0222] The calculated layout score is compared with the preset score threshold to determine whether the layout meets the requirements. The score threshold is generally designed according to business needs and can be adjusted accordingly, such as dynamically adjusting the threshold value.
[0223] An iteration termination determination module 306, configured to determine whether a preset iteration termination condition is satisfied according to the candidate H-tree layout;
[0224] The termination condition may be an iteration number condition or a scoring threshold condition, etc., and may be designed according to business needs.
[0225] The target layout determination module 307 is used to determine a target H-tree layout according to the candidate H-tree layout when the candidate H-tree layout meets a preset termination iteration condition.
[0226] Furthermore, if the candidate layout satisfies the requirements and the requirements for terminating the iteration, the iteration is stopped and the layout is output as the target H-tree layout.
[0227] In one embodiment, the iteration termination determination module includes:
[0228] A candidate score determination submodule, used to determine the candidate layout score according to the candidate H-tree layout and preset scoring rules;
[0229] A score difference determination submodule, used to determine the score difference according to the candidate layout score and the preset score threshold;
[0230] When the score meets the preliminary acceptance threshold, the optimization degree of the optimization result is determined. In the embodiment of the present invention, the layout optimization degree is determined based on the difference between the layout score and the preset score.
[0231] In an example, the degree of layout optimization may be determined based on the difference between the layout score and a score threshold updated according to the last optimization result.
[0232] The determination termination submodule is used to determine whether the candidate H-tree layout meets a preset termination iteration condition when the score difference is less than a preset difference threshold.
[0233] When the difference is less than a certain value, it can be considered that the current candidate H number layout has met the termination iteration condition. By using the scoring difference to determine whether the current layout meets the requirements, the result of this optimization can be intuitively determined, making the optimization process clearer.
[0234] In one embodiment, the device further comprises:
[0235] The iteration start submodule is used to return to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model when the score difference is greater than or equal to the preset difference threshold.
[0236] If the optimization result does not meet the difference value for terminating the iteration, it will return to the previous step to continue iterating to obtain a better result.
[0237] In one embodiment, the iteration start submodule includes:
[0238] A processing times acquisition unit, used to acquire the processing times and processing times threshold of the H tree;
[0239] In addition to determining whether to terminate the iteration based on the score difference, a limit on the number of iterations is also set to prevent endless iterations caused by some unknown errors; and in practical applications, the running time of the model is usually an important consideration. By setting the processing number threshold, the maximum running time of the algorithm can be roughly controlled to meet the time requirements in practical applications.
[0240] Confirm the iteration unit, when the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing times threshold, return to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and update the number of processing times of the H tree;
[0241] During the model iteration process, if the difference between the current layout score and the preset layout score is still relatively large, and the number of iterations has not reached the upper limit, the model will try to find a better solution based on the initial centroid of the H tree and the preset optimization model, and update the number of iterations.
[0242] The device also includes:
[0243] The target layout determination submodule is used to determine the target H-tree layout according to the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold and the number of processing times is equal to the preset number of processing times threshold.
[0244] When the number of model iterations reaches the preset maximum number, even if the current layout score is still a certain distance away from the preset layout score, the iteration will be terminated. This execution process ensures that the model has enough search space to find the optimal solution, and prevents the model from falling into an infinite loop by limiting the number of iterations.
[0245] In one embodiment, the confirmation iteration unit further includes:
[0246] A termination iteration parameter determination subunit, used to determine a termination iteration parameter according to the number of processing times of the H tree and a preset adjustment factor;
[0247] In addition to the number of processing times, additional parameters can be set to control the progress of the algorithm;
[0248] In one example, when applying the simulated annealing algorithm to the optimization model of H-tree optimization, the termination iteration parameter is temperature; temperature is a key control parameter of the simulated annealing algorithm, which determines the degree of exploration of the algorithm in the solution space. At high temperatures, the algorithm is more inclined to accept new, possibly inferior solutions, thereby enhancing exploration capabilities; at low temperatures, the algorithm is more inclined to retain the current better solution, thereby enhancing convergence. In this example, the initial temperature can be 1000 degrees, and the cooling strategy is to reduce the temperature by 10% after a preset time or to perform exponential cooling according to a preset cooling index after a preset time. The preset cooling index can be adjusted according to the needs of the optimization problem, which is 0.95 here;
[0249] A first confirmation iteration subunit is used for returning to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and updating the number of processing times and the termination iteration parameter of the H tree when the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing number threshold and the termination iteration parameter does not meet the preset termination iteration parameter condition;
[0250] When the number of processing times and the termination iteration parameter have not reached the preset maximum value, the model will continue to iterate and update the termination iteration parameter;
[0251] The device also includes:
[0252] The first termination iteration submodule is used to determine the target H-tree layout according to the candidate H-tree layout when the score difference is greater than or equal to a preset difference threshold, the number of processing times is less than the preset processing number threshold, and the termination iteration parameter meets the preset termination iteration parameter condition.
[0253] The optimization iteration will also be terminated if the processing times threshold is not reached but the termination iteration parameters are met;
[0254] In one example, the iteration is stopped when the temperature drops to 1. By additionally setting the termination iteration parameter, the optimization process of the model can be further optimized.
[0255] In one embodiment, the device further comprises:
[0256] The duration determination submodule is used to obtain the duration of the H-tree centroid optimization and the preset update time threshold;
[0257] The termination iteration parameter updating submodule is used to update the termination iteration parameter according to the preset adjustment factor, the duration of the current optimization of the H-tree centroid and the preset update time threshold.
[0258] The optimization of the termination iteration parameters can be updated by data from multiple dimensions to improve the robustness of the model;
[0259] In one embodiment, the candidate layout determination module includes:
[0260] A first candidate layout determination submodule, configured to determine a candidate H-tree layout according to the optimized H-tree layout when the layout score is greater than or equal to a score threshold;
[0261] The device also includes:
[0262] An acceptance condition determination submodule, used for obtaining a preset acceptance condition under the condition that the layout score is less than a score threshold;
[0263] The second candidate layout determination submodule is used to determine a candidate H-tree layout according to the optimized H-tree layout when the optimized H-tree layout meets a preset acceptance condition.
[0264] The general non-global optimization model falls into the problem of local minimum, which can be circumvented by setting preset acceptance conditions;
[0265] In one example, the acceptance criterion may be the Metropolis criterion, the core idea of which is to accept a new state with a certain probability, rather than accepting or rejecting it with complete certainty. By presetting the acceptance condition, the optimization model is prevented from falling into the problem of a local optimal solution, thus ensuring the robustness of the model.
[0266] In one embodiment, the initial centroid generation module includes:
[0267] An H-tree design information acquisition submodule is used to acquire information about logic units that require clock signals in a design area of the H-tree; the logic units include information about logic units of components that require clock signals on the root node, clock access points, and child nodes of the H-tree;
[0268] When designing the H-tree structure, it is necessary to collect and understand the information of all logic units that require clock signals in the design area, which covers the root node of the H-tree, the clock access point, and all related logic units on the child nodes. This is done to ensure that the clock signal can be correctly and efficiently delivered to each logic unit, thereby meeting the design requirements of the entire circuit.
[0269] The design region refers to a specific area allocated to the H-tree structure in the integrated circuit design. The logic unit is the basic component of the integrated circuit, which is used to perform logical operations (such as AND, OR, NOT, etc.).
[0270] The root node of the H-tree is the starting point of the H-tree, usually the input point of the clock signal; the clock access point refers to the points on the branches of the H-tree where the clock signal is accessed and then further distributed to the child nodes; the component logic units on the child nodes that require clock signals are the logic units at the end or middle level of the H-tree, which directly receive clock signals to perform their functions. The information of component logic units refers to the specific information about each logic unit that requires a clock signal, including but not limited to: the location, type, function, required clock frequency, phase requirements of the clock signal, etc. of the logic unit.
[0271] The first initial centroid generation submodule is used to generate the initial centroid of the H tree according to the logic unit information.
[0272] Based on business needs, preset algorithms, and logical unit information, an initial centroid of the H number is generated.
[0273] In one embodiment, the initial centroid generation module includes:
[0274] An H-tree structure acquisition submodule, used to acquire the structure of the H-tree;
[0275] In order to understand the overall layout and branching of the existing H-tree, it can be obtained with the help of EDA (Electronic Design Automation) tools or ICC2 (IC Compiler II) tools or manual analysis. The structure of the H-tree describes how the clock signal is distributed from the root node to each child node.
[0276] An H-tree root node acquisition submodule, used to determine the root node of the H-tree according to the structure of the H-tree;
[0277] In the H-tree structure, the root node is usually the only node without a parent node, or is the node directly connected to the clock source.
[0278] A clock access point determination submodule, used to determine the distribution of clock access points according to the root node of the H tree;
[0279] Starting from the root node, along the branches of the H tree, determine the location of the clock access point according to the design requirements and the distribution strategy of the clock signal.
[0280] The second initial centroid generating submodule is used to determine the initial centroid of the H tree according to the distribution of the clock access points.
[0281] An initial centroid of the H tree is determined according to the distribution of the clock access points.
[0282] In one example, when an H-tree is given, the structure of the H-tree can be obtained first, and the distribution of taps and the location of the root node can be further determined. Then, based on the tap point information obtained by analyzing the H-tree structure, a preset clustering algorithm and an automated tool such as the ICC2 tool, an initial centroid of an optimized H-tree is generated. In this way, the embodiment of the present invention can not only generate a target layout, but also obtain an optimized H-tree layout by analyzing the layout of an existing H-tree.
[0283] The embodiment of the present invention can more comprehensively evaluate the impact of different centroid selections on the overall layout of the H tree by determining the process of optimizing the H tree layout score according to the initial centroid of the H tree and the preset optimization model, as well as according to the optimized H tree layout and the preset scoring rules. This global perspective is helpful to determine a more reasonable optimized centroid, thereby avoiding the problem of poor global layout caused by local optimization. In combination with the iterative conditions, this embodiment can continuously adjust the layout according to the scoring results through the iterative optimization process, and further approach the global optimal solution. Through the preset optimization model and scoring rules, the embodiment of the present invention can comprehensively consider global layout factors, such as the distribution of nodes, the direction of connecting lines, etc., to ensure that the generated H tree layout is globally optimal. This global consideration is incomparable to traditional local optimization methods.
[0284] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.
[0285] An embodiment of the present invention further provides an electronic device, including:
[0286] The invention comprises a processor, a memory and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, each process of the above-mentioned H-tree layout optimization method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.
[0287] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, each process of the above-mentioned H-tree layout optimization method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.
[0288] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.
[0289] It will be appreciated by those skilled in the art that the embodiments of the present invention may be provided as methods, devices, or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes.
[0290] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0291] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0292] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable terminal device. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0293] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.
[0294] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.
[0295] The H-tree layout optimization method, device, equipment and medium provided by the present invention are introduced in detail above. The principles and implementation methods of the present invention are explained in this article using specific examples. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present invention.
Claims
1. An H-tree layout optimization method, characterized in that: The method comprises: Get the initial centroid of the H tree; Determine an optimized centroid according to the initial centroid of the H-tree and a preset optimization model; Determining an optimized H-tree layout according to the optimized centroid; Determine the optimized H-tree layout score according to the optimized H-tree layout and the preset scoring rules; Under the condition that the score of the optimized H-tree layout meets a preset score threshold, determining a candidate H-tree layout according to the optimized H-tree layout; Determining whether a preset termination iteration condition is met according to the candidate H-tree layout; In the case that the candidate H-tree layout meets a preset termination iteration condition, a target H-tree layout is determined according to the candidate H-tree layout.
2. The method according to claim 1, characterized in that The determining whether a preset termination iteration condition is satisfied according to the candidate H-tree layout comprises: Determine a candidate layout score according to the candidate H-tree layout and a preset scoring rule; Determining a score difference according to the candidate layout score and the preset score threshold; When the score difference is less than a preset difference threshold, it is determined that the candidate H-tree layout meets a preset termination iteration condition.
3. The method according to claim 2, characterized in that The method further comprises: When the score difference is greater than or equal to the preset difference threshold, return to the step of determining the optimized centroid based on the initial centroid of the H-tree and the preset optimization model.
4. The method according to claim 3, characterized in that When the score difference is greater than or equal to a preset difference threshold, returning to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, comprises: Obtaining the number of processing times and the processing number threshold of the H tree; When the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing times threshold, returning to the step of determining the optimized centroid according to the initial centroid of the H-tree and the preset optimization model, and updating the number of processing times of the H-tree; The method further comprises: When the score difference is greater than or equal to a preset difference threshold and the number of processing times is equal to the preset number of processing times threshold, a target H-tree layout is determined according to the candidate H-tree layouts.
5. The method according to claim 4, characterized in that When the score difference is greater than or equal to a preset difference threshold and the number of processing times is less than the processing times threshold, returning to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and updating the number of processing times of the H tree, including: Determining a termination iteration parameter according to the number of processing times of the H tree and a preset adjustment factor; When the score difference is greater than or equal to the preset difference threshold and the number of processing times is less than the processing number threshold and the termination iteration parameter does not meet the preset termination iteration parameter condition, return to the step of determining the optimized centroid according to the initial centroid of the H tree and the preset optimization model, and update the number of processing times and the termination iteration parameter of the H tree; The method further comprises: When the score difference is greater than or equal to a preset difference threshold, the number of processing times is less than the preset number of processing times threshold, and the termination iteration parameter meets the preset termination iteration parameter condition, a target H-tree layout is determined according to the candidate H-tree layout.
6. The method according to claim 5, characterized in that The method further comprises: Get the duration and preset update time threshold of the H-tree centroid optimization; The termination iteration parameter is updated according to the preset adjustment factor, the duration of the current optimization of the H-tree centroid and the preset update time threshold.
7. The method according to any one of claims 1 to 6, characterized in that The step of determining a candidate H-tree layout according to the optimized H-tree layout under the condition that the optimized H-tree layout score satisfies a preset score threshold comprises: In a case where the layout score is greater than or equal to a score threshold, determining a candidate H-tree layout according to the optimized H-tree layout; The method further comprises: Under the condition that the layout score is less than a score threshold, obtaining a preset acceptance condition; In the case that the optimized H-tree layout satisfies a preset acceptance condition, a candidate H-tree layout is determined according to the optimized H-tree layout.
8. The method according to claim 7, characterized in that The obtaining of the initial centroid of the H-tree includes: Acquire the information of logic units that need clock signals in the design area of the H tree; the logic units include: information of logic units of components that need clock signals on the root node, clock access point and child nodes of the H tree; An initial centroid of the H-tree is generated according to the logic unit information.
9. The method according to claim 7, characterized in that: The obtaining of the initial centroid of the H-tree includes: Obtaining the structure of the H-tree; Determining a root node of the H tree according to the structure of the H tree; Determining the distribution of clock access points according to the root node of the H tree; An initial centroid of the H tree is determined according to the distribution of the clock access points.
10. An H-tree layout optimization device, characterized in that: The device comprises: Initial centroid generation module, used to obtain the initial centroid of the H-tree; An optimized centroid generation module, used to determine an optimized centroid according to the initial centroid of the H-tree and a preset optimization model; An H-tree layout generation module, used to determine an optimized H-tree layout according to the optimized centroid; A layout score determination module, used to determine the optimized H-tree layout score according to the optimized H-tree layout and preset scoring rules; A candidate layout determination module, configured to determine a candidate H-tree layout according to the optimized H-tree layout under the condition that the optimized H-tree layout score meets a preset score threshold; An iteration termination determination module, used to determine whether a preset iteration termination condition is met according to the candidate H-tree layout; The target layout determination module is used to determine the target H-tree layout according to the candidate H-tree layout when the candidate H-tree layout meets the preset termination iteration condition.
11. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, the steps of the H-tree centroid optimization method according to any one of claims 1 to 9 are implemented.
12. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the H-tree centroid optimization method according to any one of claims 1 to 9 are implemented.
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