Reset voltage control circuit

Abstract

A reset voltage control circuit provides at least one reset voltage to an organic light emitting diode panel, the organic light emitting diode panel is driven to display at least one picture, and each picture is provided with a plurality of pixels and corresponds to one reset voltage. The organic light-emitting diode panel resets the on-state of the organic light-emitting diode according to the reset voltage, and the reset voltage is dynamically generated according to the plurality of pixels of the picture.

Description

Technical Field

[0001] The present invention relates to the technical field of organic light emitting diodes, and in particular to an organic light emitting diode reset voltage control circuit. Background Art

[0002] In the driving of an organic light emitting diode (OLED) pixel circuit, since charges are easily accumulated in the transistors of the pixel circuit, a reset transistor is generally required to be additionally provided. After driving the pixel circuit, a reset voltage is applied to the reset transistor to open or close the current path of the pixel circuit. This is called OLED on-state reset, which can eliminate the charges accumulated in the transistor to avoid affecting the display effect.

[0003] To illustrate the aforementioned OLED on state reset, Figure 1 A conventional OLED pixel circuit is shown, wherein the aforementioned charge accumulation, for example, refers to the charge accumulation on the drain terminal of the transistor T3 due to the hysteresis phenomenon of the transistor T3. In order to provide a function of resetting the on state of the OLED, as shown in the figure, a reset transistor T8 is added to the OLED pixel circuit and a reset voltage Vint3 is provided. By applying the reset voltage to the reset transistor T8, the transistor T8 can be turned on when the transistor T5 is turned off, so as to use the current flowing through the transistor T3 between the voltage Vint3 of the node N2 and the voltage ELVSS to flush out the charge on the drain terminal.

[0004] In the existing OLED pixel circuit, the reset voltage Vint3 is a fixed value. Since the hysteresis of the transistor T3 is greatly related to the current flowing through the transistor T3 and the gate-drain bias voltage Vgd of the transistor T3, in order to fully clear the charge accumulated at the drain end, the reset voltage Vint3 generally uses a fixed voltage close to or even higher than ELVDD, resulting in higher power consumption. The heat generated by the high power consumption of the OLED panel will also affect the thin film transistor (TFT) characteristics of the OLED panel and the trustworthiness and reliability of the OLED material.

[0005] Therefore, there are still many deficiencies in the design of the existing organic light emitting diode pixel circuit, and there is a need to improve them. Summary of the invention

[0006] The main purpose of the present invention is to provide a reset voltage control circuit, which can achieve the purpose of reducing power consumption by dynamically adjusting the reset voltage.

[0007] To achieve the aforementioned objectives, the present invention proposes a reset voltage control circuit for providing at least one reset voltage to an organic light emitting diode panel, wherein the organic light emitting diode panel is driven to display at least one frame, each frame having a plurality of pixels and corresponding to a reset voltage, and the organic light emitting diode panel resets the organic light emitting diode on state according to the reset voltage, wherein the reset voltage is dynamically generated according to the plurality of pixels of the frame.

[0008] The above summary and the following detailed description are exemplary in nature and are intended to further illustrate the claims of the present invention. Other objects and advantages of the present invention will be described in the subsequent description and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 Shows the existing OLED pixel circuit.

[0010] Figure 2A The driving display of the OLED panel using the reset voltage control circuit of the present invention is schematically shown.

[0011] Figure 2B show Figure 2A A connection diagram of one of the pixel circuits of an OLED panel.

[0012] Figure 3A A control schematic diagram showing a reset voltage control circuit according to a first embodiment of the present invention is shown.

[0013] Figure 3B Another control schematic diagram of the reset voltage control circuit according to the first embodiment of the present invention is shown.

[0014] Figure 4 A control schematic diagram showing a reset voltage control circuit according to a second embodiment of the present invention is shown.

[0015] Figure 5 A control schematic diagram showing a reset voltage control circuit according to a third embodiment of the present invention is shown.

[0016] Figure 6 An implementation aspect of the reset voltage control circuit of the present invention is shown.

[0017] Figure 7 Another embodiment of the reset voltage control circuit of the present invention is shown.

[0018] Explanation of symbols:

[0019] Transistors T3, T5 reset transistor T8

[0020] Reset voltage Vint3, Vint gate drain bias Vgd

[0021] Reset voltage control circuit 10 OLED panel 20

[0022] Pixel circuit 21 Pixel 231

[0023] Screen 23, 23-a, 23-b, 23-c, 23-d, 23-e

[0024] Preset values ​​PN, PB Display driver chip 61

[0025] Picture analysis unit 101 Picture latch 102

[0026] Dynamic voltage controller 103 Voltage generator 104,

[0027] Power chip 71 DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the implementation of the present invention and are not intended to limit the present invention.

[0029] Figure 2A The driving display of an organic light emitting diode (OLED) panel using the reset voltage control circuit of the present invention is schematically shown, wherein the OLED panel 20 has a plurality of pixel circuits 21 arranged in a matrix form, and the OLED panel 20 can be driven to display at least one frame 23, each frame 23 has a plurality of pixels 231, and each pixel 231 has a grayscale value representing brightness. Figure 2B Further showing a connection diagram of one pixel circuit 21, please refer to Figure 2A and Figure 2B The pixel circuit 21 of the OLED panel 20 is driven by the control signal to display the pixel 231 of the corresponding picture 23 during a frame period. That is, the pixel circuit 21 is driven by the control signal to display the corresponding pixel 231 according to the input data representing the picture 23, and in the process of the OLED panel 20 displaying a picture 23, the reset voltage control circuit 10 provides at least one reset voltage Vint corresponding to the displayed picture 23 to the OLED panel 20, and the OLED panel 20 resets the OLED on state according to the reset voltage Vint, wherein the reset voltage Vint provided by the reset voltage control circuit 10 can be dynamically generated according to the multiple pixels 231 of the picture 23.

[0030] In the first embodiment of the reset voltage control circuit 10 of the present invention, the reset voltage Vint is dynamically generated according to the brightness information of the screen 23, that is, the reset voltage control circuit 10 performs voltage control by analyzing the brightness of the screen 23 to dynamically adjust the reset voltage Vint, thereby achieving the purpose of reducing power consumption. In one example, based on a plurality of pixels 231 in a displayed screen 23, the reset voltage control circuit 10 calculates the number of pixels 231 corresponding to each grayscale value to select the grayscale value corresponding to the pixel 231 with the largest number to generate the reset voltage Vint, such as Figure 3A A control schematic diagram of the reset voltage control circuit 10 of the present embodiment is shown. Assuming that the grayscale value displayed by the OLED panel drive is 0 to 255, and the number of pixel units 231 corresponding to the grayscale value i is the largest, the reset voltage Vint is generated with the grayscale value i, wherein the magnitude of the generated reset voltage Vint is proportional to the selected grayscale value, that is, the higher the brightness, the larger the reset voltage Vint.

[0031] In another example, based on a plurality of pixels 231 in a displayed frame 23, the reset voltage control circuit 10 finds the maximum grayscale value among the corresponding grayscale values ​​exceeding a first predetermined value PN, and generates the reset voltage Vint with the maximum grayscale value, such as Figure 3B Another control schematic diagram of the reset voltage control circuit 10 of the present embodiment is shown. It is assumed that the grayscale value displayed by the OLED panel drive is 0 to 255, and the corresponding grayscale values ​​exceeding the first predetermined value PN are 2, 3...i-1, i, i+1...k-1, k... etc., wherein the grayscale value k is the maximum grayscale value exceeding the first predetermined value PN, so the grayscale value k is selected to generate the reset voltage Vint, wherein the magnitude of the generated reset voltage Vint is proportional to the maximum grayscale value, that is, the higher the brightness, the larger the reset voltage Vint.

[0032] In another example, based on the corresponding grayscale values ​​of multiple pixels 231 in a displayed image 23, the reset voltage control circuit 10 calculates the average grayscale value AG of the multiple pixels 231, wherein, assuming that the grayscale value displayed by the OLED panel driver is 0-255, the average grayscale value AG is (0×G0+1×G1+2×G2+3×G3+…+254×G254+255×G255) / (G0+G1+G2+G3+…+G254+G255), wherein G0~G255 are the numbers of pixels 231 with grayscale values ​​of 0-255 respectively, and the reset voltage Vint is generated using this average grayscale value AG, wherein the magnitude of the generated reset voltage Vint is proportional to the average grayscale value AG, that is, the higher the brightness, the larger the reset voltage Vint.

[0033] In the first embodiment, the reset voltage control circuit 10 reflects the current size and the gate drain bias voltage Vgd according to the brightness information of the displayed screen 23, so as to adjust the voltage signal of the reset voltage Vint when the OLED finishes emitting light and enters the OLED on state reset. When the ion accumulation generated at the drain end is large, the reset voltage Vint is increased to strengthen the release of the accumulated charge at the drain end. On the contrary, when the ion accumulation generated at the drain end is small, the reset voltage Vint is lowered to reduce power consumption. By dynamically adjusting the voltage of the OLED on state reset according to the brightness information of the displayed screen 23, the purpose of reducing power consumption is achieved.

[0034] In the second embodiment of the reset voltage control circuit 10 of the present invention, the reset voltage Vint is dynamically generated based on the brightness information and timing information of the screen 23. That is, the reset voltage control circuit 10 performs voltage control by analyzing the brightness of the screen 23 and the progression of the screen display time to dynamically adjust the reset voltage Vint, thereby achieving the purpose of reducing power consumption. Figure 4 The control schematic diagram of the reset voltage control circuit 10 according to the present embodiment is shown. In the present embodiment, for a picture 23, in addition to generating the reset voltage Vint according to the first embodiment, when a plurality of pictures 23 having the same reset voltage Vint are displayed continuously, the reset voltage control circuit 10 can gradually increase the reset voltage Vint of the picture 23 according to the progress of the picture display time, for example, Figure 4 As shown, assuming that the three consecutively displayed images 23-a, 23-b, and 23-c have the same average grayscale value of 255 (also have the same reset voltage Vint), when the reset voltage Vint of image 23-a is V1, the reset voltage Vint of image 23-b is adjusted to V1+d, and the reset voltage Vint of image 23-c is adjusted to V1+2d.

[0035] In this embodiment, the reset voltage control circuit 10 reflects the current size and the gate drain bias voltage Vgd according to the brightness information of the screen 23, and refers to the display driving time. When the accumulated charge reaches a certain amount and causes the hysteresis phenomenon of the transistor to be sufficient to affect the response of the screen 23, when the OLED finishes emitting light and enters the OLED on-state reset, the voltage signal of the reset voltage Vint is adjusted to perform the OLED on-state reset action. When the ion accumulation generated at the drain end is large, the reset voltage Vint is increased to strengthen the release of the accumulated charge at the drain end. On the contrary, when the ion accumulation generated at the drain end is small, the reset voltage Vint is lowered to reduce power consumption. By dynamically adjusting the voltage of the OLED on-state reset according to the brightness information of the screen 23 and the timing information, the purpose of reducing power consumption is achieved.

[0036] In the third embodiment of the reset voltage control circuit 10 of the present invention, the reset voltage Vint is dynamically generated according to the brightness information of the screen 23 and the brightness difference. That is, the reset voltage control circuit 10 performs voltage control by analyzing the brightness information of the screen 23 and the brightness difference between two continuously displayed screens 23 to dynamically adjust the reset voltage Vint, thereby achieving the purpose of reducing power consumption. Figure 5 The control schematic diagram of the reset voltage control circuit 10 according to this embodiment is shown. In this embodiment, for the continuously displayed screens 23-d and 23-e, in addition to generating the reset voltage Vint according to the first embodiment, when the brightness difference between the screens 23-d and 23-e is greater than a second predetermined value PB, the reset voltage Vint of the screen 23-e can be compensated by a voltage compensation value ΔV. That is, the voltage compensation value ΔV is added to or subtracted from the reset voltage Vint of the screen 23-e. For example, as Figure 5 shown, the reset voltage Vint corresponding to the screen 23-d is V2, and the reset voltage Vint corresponding to the screen 23-e is V3. Assuming that the second predetermined value PB is 100, and the brightness Ld (e.g., average gray scale value) of the screen 23-d is 255, and the brightness Le (e.g., average gray scale value) of the screen 23-e is 120, then the brightness difference between the screens 23-d and 23-e is |Ld - Le| = |255 - 120| = 125. Since the brightness difference (= 125) is greater than the second predetermined value PB (= 100), therefore, the reset voltage Vint of the screen 23-e can be compensated. And since Ld > Le, therefore, the reset voltage Vint of the screen 23-e is V3 + ΔV. It should be noted that in other embodiments, when Ld < Le, the reset voltage Vint of the screen 23-e is V3 - ΔV.

[0037] This embodiment can solve the problem of instantaneous afterimage caused by the hysteresis phenomenon. When there is a brightness difference between two continuously displayed screens 23, it means that the transistors in the OLED pixels corresponding to the two continuously displayed screens 23 are subjected to different charge accumulations. Therefore, in some pixels 231 during the screen switching, it is easy for the brightness change to not keep up due to the accumulation of the transistors, thus forming a static afterimage. For this reason, it is necessary to refer to the brightness information of the two continuously displayed screens 23 to adjust the voltage for resetting the OLED on-state at the moment of the screen 23 change, and reduce the afterimage during the screen switching. If more ions accumulate at the drain end corresponding to the previous screen 23, the reset voltage Vint is increased to strengthen the release of the accumulated charges at the drain end. On the contrary, when less ions accumulate at the drain end, the reset voltage Vint is decreased to reduce the power consumption. By dynamically adjusting the voltage for resetting the OLED on-state according to the brightness information of the screen 23, the purpose of reducing power consumption is achieved.

[0038] Figure 6An embodiment of the reset voltage control circuit 10 of the present invention is shown, wherein the reset voltage control circuit 10 is implemented in a display driver chip (DDIC) 61 and includes a picture analysis unit 101, a picture latch 102, a dynamic voltage controller 103, and a voltage generator 104, wherein the picture analysis unit 101 receives input data representing a picture 23 to analyze a plurality of pixels 231 of the picture 23 according to the aforementioned embodiments; the picture latch 102 is coupled to the picture analysis unit 101 to latch the input data; the dynamic voltage controller 103 is coupled to the picture analysis unit 101 and the picture latch 102 to perform voltage control according to the input data latched by the picture latch 102 and the analysis result of the picture analysis unit 101, and output a dynamic voltage signal DV; the voltage generator 104 generates the reset voltage Vint according to the dynamic voltage signal DV. In another embodiment, a touch display driver integrated chip (TDDI) may be used instead of the display driver chip 61.

[0039] Figure 7 Another embodiment of the reset voltage control circuit 10 of the present invention is shown. Figure 6 The implementation of the reset voltage control circuit 10 is similar to that of the embodiment of the present invention, except that the reset voltage control circuit 10 is implemented in a display driver chip 61 and a power chip (Power IC) 71 located outside the display driver chip 61, wherein the image analysis unit 101, the image latch 102, and the dynamic voltage controller 103 are arranged in the display driver chip 61, and the voltage generator 104 is arranged in the power chip 71, thereby fully utilizing the voltage generation function of the power chip 71, effectively reducing the hardware cost.

[0040] The above embodiments are merely examples for the convenience of description. The scope of rights claimed by the present invention should be based on the claims, but not limited to the above embodiments.

Claims

1. A reset voltage control circuit for providing at least one reset voltage to an organic light emitting diode panel, wherein the organic light emitting diode panel is driven to display at least one frame, characterized in that: Each frame has a plurality of pixels and corresponds to a reset voltage. The organic light emitting diode panel resets the organic light emitting diode on state according to the reset voltage, wherein the reset voltage is dynamically generated according to the plurality of pixels of the frame.

2. The reset voltage control circuit according to claim 1, characterized in that: The reset voltage is dynamically generated according to the brightness information of the picture.

3. The reset voltage control circuit according to claim 2, wherein: Each pixel has a grayscale value, and based on the plurality of pixels in the frame, the reset voltage control circuit calculates the number of pixels corresponding to each grayscale value to select the grayscale value corresponding to the pixel with the largest number to generate the reset voltage.

4. The reset voltage control circuit according to claim 2, wherein: Each pixel has a grayscale value, and based on the plurality of pixels of the frame, the reset voltage control circuit finds the maximum grayscale value among the corresponding grayscale values ​​exceeding a first predetermined value, and generates the reset voltage with the maximum grayscale value.

5. The reset voltage control circuit according to claim 2, wherein: Each pixel has a grayscale value, and based on the corresponding grayscale values ​​of the plurality of pixels in the frame, the reset voltage control circuit calculates an average grayscale value of the plurality of pixels and generates the reset voltage with the average grayscale value.

6. The reset voltage control circuit according to claim 2, wherein: When a plurality of frames having the same reset voltage are displayed continuously, the reset voltage control circuit gradually increases the reset voltages corresponding to the plurality of frames as time progresses.

7. The reset voltage control circuit according to claim 2, wherein: The reset voltage is dynamically generated according to the brightness information and the timing information of the picture.

8. The reset voltage control circuit according to claim 2, wherein: For a first frame and a second frame that are displayed continuously, when a brightness difference between the first frame and the second frame is greater than a second predetermined value, a reset voltage corresponding to the second frame is compensated by a voltage compensation value.

9. The reset voltage control circuit according to claim 1, wherein: Also includes: a picture analysis unit, receiving input data representing the picture to analyze the plurality of pixels of the picture; a frame latch coupled to the frame analysis unit to latch the input data; a dynamic voltage controller coupled to the frame analysis unit and the frame latch to perform voltage control according to the input data latched by the frame latch and the analysis result of the frame analysis unit, and output a dynamic voltage signal; and A voltage generator generates the reset voltage according to the dynamic voltage signal.

10. The reset voltage control circuit according to claim 9, wherein: The picture analysis unit, the picture latch and the dynamic voltage controller are arranged in a display driving chip, and the voltage generator is arranged in a power chip located outside the display driving chip.

11. The reset voltage control circuit according to claim 9, characterized in that: The picture analysis unit, the picture latch, the dynamic voltage controller and the voltage generator are arranged in a display driving chip.

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