Hardware protection method and circuit for IGBT (Insulated Gate Bipolar Translator) in energy storage inverter device

Abstract

The invention provides a hardware protection method and circuit for an IGBT (Insulated Gate Bipolar Translator) in an energy storage inverter device. The method comprises the following steps: acquiring a working signal of a main loop of an inverter through a differential signal; transmitting the collected working signal to an overcurrent and overvoltage judgment module through a differential circuit, and outputting an overcurrent and overvoltage signal; logic processing is carried out on the overcurrent and overvoltage signals and IGBT signals output by the IGBT module, and output of PWM signals is controlled; and when any one of the overcurrent and overvoltage signals and the IGBT signal fails, the PWM signal is cut off, the IGBT cannot receive the PWM waveform, the IGBT is cut off, and the inverter stops working. Through cooperation of the hardware protection module and all the modules, when a fault is detected, output of a PWM waveform signal by the MCU is cut off in time, so that further rising of voltage and current in an inverter is prevented, and rapid and reliable protection of an IGBT is effectively realized; by using the differential circuit, the signal acquisition precision is improved, and the anti-interference capability of the system is enhanced; the MCU monitors in real time and automatically resets the fault state, and the maintenance work is simplified.

Description

Technical Field

[0001] The present invention belongs to the field of IGBT drive protection, and in particular relates to a hardware protection method and circuit for an IGBT in an energy storage inverter device. Background Art

[0002] In the inverter, IGBT (Insulated Gate Bipolar Transistor) is usually used as a switching element, and its on and off are controlled by PWM (Pulse Width Modulation) signals to achieve DC to AC conversion. In high-power application scenarios, the working environment of the inverter is complex and prone to various faults, including overcurrent, overvoltage faults or IGBT driver failure, which may cause the IGBT to cause the IGBT module to break down. In addition, IGBTs generate a lot of heat when working at high power. If the heat dissipation is poor or the protection mechanism fails, thermal runaway may occur, further increasing the risk of equipment damage.

[0003] At present, the protection mechanism of most inverters mainly relies on the software protection of the MCU. If the MCU fails or is disturbed, the software protection will not work properly, causing the inverter to lose its protection function and increasing the risk of IGBT damage. In addition, most existing solutions are single-type fault detection, and the signal acquisition accuracy is not high, and the signal processing delay is large, which increases the probability of failure. Summary of the invention

[0004] In order to solve the above problems in the prior art, the present invention provides a hardware protection method for IGBT in an energy storage inverter device, comprising the following steps: Step S1, collecting working signals of the inverter main circuit through differential signals, wherein the working signals include bus voltage, current and three-phase inverter current; Step S2, transmitting the collected working signal to an overcurrent and overvoltage judgment module via a differential circuit, and the overcurrent and overvoltage judgment module outputs an overcurrent and overvoltage signal according to the voltage and current status; Step S3, performing logic processing on the overcurrent and overvoltage signals and the IGBT signals output by the IGBT module to control the output of the PWM signal; Step S4, when any of the overcurrent and overvoltage signals and the IGBT signal fails, the PWM signal is cut off, the IGBT cannot receive the PWM waveform, the IGBT is turned off, and the inverter stops working; Step S5, when the fault is eliminated, the MCU outputs a PWM data clear signal, and the PWM signal is output normally.

[0005] On the basis of the above scheme, in step S2, the working signal obtained in step S1 is compared with the threshold through a comparison circuit to determine whether there is overcurrent or overvoltage, and an overcurrent and overvoltage signal is obtained. The threshold is the voltage and current value that the main circuit can withstand obtained by the differential circuit.

[0006] On the basis of the above scheme, a logic OR gate is used for logic processing, and the output of the logic OR gate is connected to the data input terminal of the latch, and the output terminal of the latch outputs a fault signal and latches the state of the fault signal.

[0007] On the basis of the above solution, the latch uses a D flip-flop, an SR latch or a JK latch to latch the output fault signal.

[0008] On the basis of the above scheme, the fault signal is input to the enable terminal of the PWM driver chip. When the fault signal is at a high level, the PWM driver chip is in a closed state, and the PWM signal sent by the MCU is cut off.

[0009] The present invention also provides a hardware protection circuit for IGBT in an energy storage inverter device, comprising: a differential signal data acquisition control module, the differential signal data acquisition control module acquires voltage and current signals of a DC bus, and the output end is connected to an overcurrent and overvoltage judgment module; the overcurrent and overvoltage judgment module analyzes the voltage and current signals, and the output end is connected to a hardware protection module; the input end of the hardware protection module is connected to an IGBT module and an overcurrent and overvoltage judgment module, and the output end is connected to a PWM data control module; the PWM data control module outputs to the IGBT module; the IGBT module and the overcurrent and overvoltage judgment module communicate with an MCU control module; the output of the MCU control module is connected to the PWM data control module and the hardware protection module.

[0010] On the basis of the above solution, the overcurrent and overvoltage judgment module includes a comparator, which compares the voltage and current signals collected by the differential signal data collection control module with the threshold value and outputs an overcurrent and overvoltage signal.

[0011] Based on the above scheme, the hardware protection module includes a logic OR gate and a latch, and the output signals of the IGBT module and the overcurrent and overvoltage judgment module are connected to the latch via the logic OR gate, and the latch latches and outputs a fault signal.

[0012] Based on the above solution, the latch is a D flip-flop, an SR latch or a JK latch, and the fault signal output is connected to the PWM control chip enable terminal of the PWM data control module to control the opening and closing of the PWM control chip.

[0013] Compared with the prior art, the present invention has the following beneficial effects: through the cooperation of the hardware protection module and each module, when a fault is detected, the output of the PWM waveform signal by the MCU is promptly cut off, thereby preventing the voltage and current in the inverter from further increasing, and effectively realizing the fast and reliable protection of the IGBT; the use of the differential circuit improves the accuracy of signal acquisition and enhances the anti-interference ability of the system; and the MCU monitors the fault state in real time and automatically resets the fault state, simplifying the maintenance work. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a flow chart of the IGBT hardware protection method of this application; Figure 2 The signal flow diagram of the IGBT hardware protection method of this application; Figure 3 A schematic diagram of a differential circuit provided for this application; Figure 4 A schematic diagram of a comparison circuit provided for this application; Figure 5 This is a data information diagram of over-current and over-voltage signals and IGBT signals in this application; Figure 6 This is a schematic diagram of the control of the PWM signal by the hardware protection module in this application; DETAILED DESCRIPTION The invention will be further described below in conjunction with specific embodiments.

[0015] like Figure 1 and Figure 2 As shown, the present invention provides a hardware protection method for IGBT in an energy storage inverter device, comprising: Step S1, using a differential signal data acquisition control module to collect voltage and current signals of the inverter main circuit, the voltage is the bus voltage, and the current includes the bus current I_DC and the three-phase inverter currents INVA, INVB, INVC, and INVN.

[0016] Specifically, the bus voltage is the voltage BUS+_N between the positive bus and the N phase, and the voltage BUS-_N between the negative bus and the N phase. By differential signal acquisition, common mode interference can be effectively reduced and measurement accuracy can be improved.

[0017] Step S2, connecting the voltage and current signals collected in step S1 to the comparison circuit via the differential circuit, and outputting corresponding over-current and over-voltage signals; Figure 3 As shown, the differential signals are passed into the differential circuit in pairs, and sampling signals are obtained through calculation. The sampling signals are connected to the comparison circuit, and the comparison circuit is used to determine whether the working signal is in an overcurrent or overvoltage state, and output corresponding overcurrent and overvoltage signals.

[0018] The voltage and current range that the main circuit can withstand is calculated through the differential circuit to obtain the threshold value, and the actual collected main circuit working signal is converted into a sampling signal through the differential circuit, such as Figure 4 As shown, the sampling signal is compared with the threshold through a comparison circuit, and an overcurrent and overvoltage signal is output. When the threshold is exceeded, it means that the signal is in an overvoltage or overcurrent fault state, and the comparator outputs a high-level overcurrent and overvoltage fault signal Over_IV. At the same time, this signal is output to the MCU so that the MCU can monitor the working status of the inverter in real time.

[0019] Step S3, the IGBT module sends out an IGBT signal, performs logic processing on the IGBT signal and the over-current and over-voltage signal output in step S2, and controls the PWM signal; Specifically, when the IGBT module fails, an IGBT fault signal IGBT_FLT_OUT is issued; Preferably, a logic gate is used to perform logic processing on the IGBT signal and the overcurrent and overvoltage signal. According to one embodiment, a high level is output when the IGBT signal fails, and a high level is output when the overcurrent and overvoltage signal fails. The logic gate uses a logic OR gate. When either the IGBT signal or the overcurrent and overvoltage signal is at a high level, the logic OR gate outputs a high level, indicating that a fault exists. The use of a logic OR gate can ensure that even if a certain protection mechanism fails, another mechanism can still function, thereby enhancing the redundancy and reliability of the system.

[0020] Furthermore, in order to ensure that the fault signal will not be lost due to instantaneous fluctuations, after the logic OR gate outputs a high level, a latch is used to latch the signal, and the latched fault signal is output to the PWM driver. Preferably, an R trigger is used to latch the fault signal. The R trigger can ensure that the fault signal will not be lost in a short time, preventing misjudgment due to instantaneous fluctuations. Only when the MCU sends a clear signal will the fault state be released, ensuring that the system can resume normal operation after the fault is eliminated.

[0021] According to another embodiment of the present invention, the latch can also use an SR latch or a JK latch. According to another embodiment, an SR latch is used to latch a fault signal, and the overcurrent and overvoltage signal is connected to the S input terminal of the SR latch, and at the same time, it is inverted and connected to the R input terminal. The EN enable terminal signal of the SR latch is connected to the MCU, and the output terminal controls the PWM signal. When the main circuit signal is in an overcurrent and overvoltage state, the overcurrent and overvoltage signal input to the SR trigger is a high level. At this time, a high level is input to the S terminal, a low level is input to the R terminal, and the SR trigger output is a high level. At the same time, the signal is latched, and the obtained high level fault signal is output to the PWM driver.

[0022] Step S4, when any signal in step S3 fails, the PWM signal is cut off, the IGBT cannot receive the PWM waveform, the IGBT is turned off, and the inverter stops working; Specifically, the fault signal is output to the enable end of the PWM driver, turning off the PWM driver chip. The PWM signal sent by the MCU is terminated here, and the IGBT cannot receive the PWM waveform and is in the off state. The inverter stops working. By controlling the enable end of the PWM driver, the PWM signal can be quickly cut off to ensure that the IGBT is immediately shut down in the fault state, avoiding damage to the device caused by continuous large current or high voltage.

[0023] Step S5, when the fault is eliminated, the MCU outputs a PWM data clear signal D_CLR to clear the data latch information, and the PWM signal can be output normally again.

[0024] Specifically, the D_CLR signal can reset the R flip-flop, release the fault latch state, the PWM signal can be output normally again, the IGBT resumes the on and off operation, and the inverter resumes normal operation.

[0025] The present invention also provides a hardware protection circuit for IGBT in an energy storage inverter device, comprising a differential signal data acquisition control module, wherein the differential signal data acquisition control module acquires voltage and current signals of a DC bus, and an output end is connected to an overcurrent and overvoltage judgment module via a sampling resistor; the overcurrent and overvoltage judgment module analyzes voltage and current signals, and an output end is connected to a hardware protection module; an input end of the hardware protection module is connected to an IGBT module and an overcurrent and overvoltage judgment module, and an output end is connected to a PWM data control module; the PWM data control module outputs to the IGBT module; the IGBT module and the overcurrent and overvoltage judgment module communicate with an MCU control module; the output of the MCU control module is connected to the PWM data control module and the hardware protection module.

[0026] The overcurrent and overvoltage judgment module is used to analyze the voltage and current signals collected by the differential signal data acquisition control module, determine whether it is in an overcurrent or overvoltage state, and output the corresponding fault signal. When the collected voltage or current exceeds the set threshold, the comparator outputs a high-level overcurrent and overvoltage fault signal, which indicates that the system is in an overvoltage or overcurrent fault state. The output end of the overcurrent and overvoltage judgment module is connected to the hardware protection module.

[0027] The IGBT module receives the PWM signal from the PWM data control module for power transmission and energy conversion of the inverter. According to the duty cycle of the PWM signal, the IGBT module controls the on and off of the IGBT to achieve normal operation of the inverter. At the same time, when the IGBT module fails, an IGBT fault signal is issued.

[0028] The hardware protection module is responsible for receiving the output signals from the IGBT module and the over-current and over-voltage judgment module, and performing logical processing, such as Figure 5 As shown, when the IGBT module or the overcurrent and overvoltage judgment module outputs a fault signal, the hardware protection module latches the fault signal PWM_Ctl, outputs it to the PWM driver, and controls the output of the PWM signal. Specifically, the hardware protection module includes a logic OR gate and a D flip-flop, and the output signals of the IGBT module and the overcurrent and overvoltage judgment module are connected to the D flip-flop via the logic OR gate, and the D flip-flop latches and outputs the fault signal.

[0029] like Figure 6 As shown, the hardware protection module latches the fault signal and outputs it to the PWM driver chip enable terminal of the PWM data control module to control the opening and closing of the PWM driver chip. The PWM data control module is connected to the IGBT module. The fault signal output by the hardware protection module turns off the PWM driver chip. The PWM signal sent by the MCU is cut off here, and the waveform cannot be output normally. The IGBT is turned off and the inverter stops working.

[0030] The MCU control module sends a PWM signal to the PWM driver, receives the fault signal output by the overcurrent and overvoltage judgment module and the IGBT module, and when the fault is removed, the MCU control module sends a PWM data clear signal D_CLR to the reset end of the trigger to clear the data latch information. The PWM signal sent by the MCU control module will not be cut off, the PWM data control module outputs the PWM signal normally, the IGBT is turned on and off normally, and the inverter resumes normal operation. In addition, the MCU can also adjust the duty cycle of the PWM signal according to actual needs to optimize the working efficiency of the inverter.

[0031] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0032] Although the above describes the specific implementation methods of the present invention, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A method for hardware protection of IGBT in an energy storage inverter device, characterized in that: The following steps are involved: Step S1, collecting working signals of the inverter main circuit through differential signals, wherein the working signals include bus voltage, current and three-phase inverter current; Step S2, transmitting the collected working signal to an overcurrent and overvoltage judgment module via a differential circuit, and the overcurrent and overvoltage judgment module outputs an overcurrent and overvoltage signal according to the voltage and current status; Step S3, performing logic processing on the overcurrent and overvoltage signals and the IGBT signals output by the IGBT module to control the output of the PWM signal; Step S4, when any of the overcurrent and overvoltage signals and the IGBT signal fails, the PWM signal is cut off, the IGBT cannot receive the PWM waveform, the IGBT is turned off, and the inverter stops working; Step S5, when the fault is eliminated, the MCU outputs a PWM data clear signal, and the PWM signal is output normally.

2. The hardware protection method for IGBT in an energy storage inverter device according to claim 1, characterized in that: In step S2, the working signal obtained in step S1 is compared with the threshold value through a comparison circuit to determine whether there is overcurrent or overvoltage, and an overcurrent or overvoltage signal is obtained. The threshold value is the voltage and current value that the main circuit can withstand obtained by the differential circuit.

3. The hardware protection method for IGBT in an energy storage inverter device according to claim 1, characterized in that: A logic OR gate is used to perform logic processing, and the output of the logic OR gate is connected to the data input terminal of the latch, and the output terminal of the latch outputs a fault signal and latches the state of the fault signal.

4. The hardware protection method for IGBT in an energy storage inverter device according to claim 3, characterized in that: The latch uses a D flip-flop, an SR latch or a JK latch to latch the output fault signal.

5. The hardware protection method for IGBT in an energy storage inverter device according to claim 3, characterized in that: The fault signal is input into the enable terminal of the PWM driving chip. When the fault signal is at a high level, the PWM driving chip is in a closed state, and the PWM signal sent by the MCU is cut off.

6. A hardware protection circuit for IGBT in an energy storage inverter device, characterized in that: include: A differential signal data acquisition control module, wherein the differential signal data acquisition control module acquires voltage and current signals of the DC bus, and an output end thereof is connected to an overcurrent and overvoltage judgment module; The overcurrent and overvoltage judgment module analyzes voltage and current signals, and the output end is connected to the hardware protection module; the input end of the hardware protection module is connected to the IGBT module and the overcurrent and overvoltage judgment module, and the output end is connected to the PWM data control module; the PWM data control module outputs to the IGBT module; the IGBT module and the overcurrent and overvoltage judgment module communicate with the MCU control module; the output of the MCU control module is connected to the PWM data control module and the hardware protection module.

7. The hardware protection circuit of IGBT in an energy storage inverter device according to claim 6, characterized in that: The overcurrent and overvoltage judgment module includes a comparator, which compares the voltage and current signals collected by the differential signal data collection control module with the threshold value and outputs an overcurrent and overvoltage signal.

8. The hardware protection circuit of IGBT in an energy storage inverter device according to claim 6, characterized in that: The hardware protection module includes a logic OR gate and a latch. The output signals of the IGBT module and the overcurrent and overvoltage judgment module are connected to the latch via the logic OR gate. The latch latches and outputs a fault signal.

9. The hardware protection circuit of IGBT in an energy storage inverter device according to claim 7, characterized in that: The latch is a D flip-flop, an SR latch or a JK latch, and the fault signal output is connected to the PWM control chip enable terminal of the PWM data control module to control the opening and closing of the PWM control chip.

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