DC-DC converter

By introducing a charge pump module into the SIMO type DC-DC converter, the charge of the branch switch is temporarily stored and multiplexed, the problem of large switching losses during gate switch switching is solved, and more efficient current transmission and lower losses are achieved.

CN119865054AActive Publication Date: 2025-04-22WUXI ZGMICRO ELECTRONICS CO LTD
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Patent Information

Application Number
CN202411997117.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2025-04-22
Estimated Expiration
2044-12-31

AI Technical Summary

Technical Problem

In the prior art, the switch loss of the SIMO type DC-DC converter is large during the switch switching operation, which affects efficiency.

Method used

By introducing a charge pump module into the DC-DC converter, the charge at the control end of the branch switch is temporarily stored and released when the next branch switch is turned on, increasing the control end voltage and reducing on-resistance and loss.

Benefits of technology

The conduction loss of branch switch is reduced, the current transmission efficiency of the system is improved, and the switching loss is further reduced by recycling the control terminal charge.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the technical field of power conversion circuits, and discloses a DC-DC converter which comprises an inductor, a plurality of branch switches and a charge pump module, each branch switch is connected between the inductor and a corresponding voltage output end, the control end of each branch switch receives a corresponding switch control signal, and the charge pump module is connected with the inductor. Each branch switch is switched on when the corresponding switch control signal is at a high level, and is switched off when the corresponding switch control signal is at a low level; the charge pump module comprises a switch combination and an energy storage capacitor, when one switch control signal is switched from a high level to a low level, charges at the control end of the branch switch corresponding to the switch control signal are stored in the energy storage capacitor through the switch combination, and when one switch control signal is switched from the low level to the high level, charges at the control end of the branch switch corresponding to the switch control signal are stored in the energy storage capacitor through the switch combination. And the charge in the energy storage capacitor is transmitted to the control end of the branch switch corresponding to the switch control signal through the switch combination. The problem that in the prior art, when a gating switch is switched, switching loss is large is solved.
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Description

Technical Field

[0001] The present invention relates to the technical field of power conversion circuits, and in particular to a DC-DC converter. Background Art

[0002] As an important voltage conversion module, DC-DC converter can convert a given voltage signal into the result required by the user, and is widely used in various types of power management chips. Generally, a separate inductor is required to achieve a specific output voltage. Since high-inductance inductors generally have a large area, poor integration, and correspondingly high costs, they are not suitable for today's era of increasing integration.

[0003] Single Inductor Multiple Output (SIMO) DC-DC converter has the function of obtaining multiple outputs by using a single inductor, reducing the number of components and overall size, while providing efficient power distribution, greatly reducing the cost of using DC-DC converters, and is increasingly used in various scenarios today.

[0004] However, due to the shared inductance, the corresponding shunt gate switch needs to be large in size to accurately adjust each output channel to ensure stability and reduce the output voltage regulation rate under high load scenarios. The larger gate switch size will also increase its switching loss due to its larger gate parasitic parameters. Therefore, an important step to improve the efficiency of SIMO-type DCDC is to reduce the switching loss of its gate switch when switching. Summary of the invention

[0005] In view of this, the present invention provides a DC-DC converter to solve the problem of large switching loss when the gate switch is switched in the prior art.

[0006] In a first aspect, the present invention provides a DC-DC converter, comprising: an inductor, a plurality of branch switches and a charge pump module, wherein:

[0007] Each branch switch is connected between the inductor and the corresponding voltage output terminal, and the control terminal of each branch switch receives the corresponding switch control signal. Each branch switch is turned on when the corresponding switch control signal is at a high level, and is turned off when the corresponding switch control signal is at a low level.

[0008] The charge pump module includes a switch combination and an energy storage capacitor. When a switch control signal is switched from a high level to a low level, the charge at the control end of the branch switch corresponding to the switch control signal is stored in the energy storage capacitor through the switch combination. When a switch control signal is switched from a low level to a high level, the charge in the energy storage capacitor is transferred to the control end of the branch switch corresponding to the switch control signal through the switch combination.

[0009] In traditional designs, the charge at the control end of the branch switch is usually discharged to the ground after each switching. However, the present invention temporarily stores these charges and releases the temporarily stored charges to the control end of the next branch switch when the next branch switch is turned on, thereby increasing the voltage at the control end of the next branch switch, thereby reducing the on-resistance of the branch switch, reducing the conduction loss, and recycling the control end charge to reduce the switching loss.

[0010] In an optional implementation manner, each branch switch is an NMOS transistor, and the gate of the NMOS transistor is the control terminal of the branch switch;

[0011] Among multiple branch switches, only one is turned on at the same time, and the other branch switches are turned off. Each branch switch is turned on in a regular order;

[0012] After a branch switch is switched from on to off, a dead time is waited for, and then the next branch switch is switched from off to on. During the dead time, all branch switches are off.

[0013] In an optional implementation, the DC-DC converter further includes: a first power transistor and a second power transistor;

[0014] The first power transistor connects or disconnects the input voltage and the switch node according to a first drive signal of the gate thereof, and the second power transistor connects or disconnects the ground terminal and the switch node according to a second drive signal of the gate thereof;

[0015] The inductor is connected between the switch node and the branch switch;

[0016] When the first driving signal is at a low level, the first power transistor connects the input voltage and the switch node; when the first driving signal is at a high level, the first power transistor disconnects the input voltage and the switch node;

[0017] When the second driving signal is at a high level, the second power transistor connects the ground terminal and the switch node; when the second driving signal is at a low level, the second power transistor disconnects the ground terminal and the switch node;

[0018] When the first power transistor is turned on, the second power transistor is turned off, and when the second power transistor is turned on, the first power transistor is turned off.

[0019] In an optional implementation, the switch combination includes a first switch combination, a second switch combination and a third switch combination, wherein:

[0020] The first switch combination selectively connects the first connection end of the energy storage capacitor to a power supply end or a ground end;

[0021] The second switch combination selectively connects the second connection end of the energy storage capacitor to the control end of any branch switch;

[0022] The third switch combination selectively connects the second connection end of the energy storage capacitor to the control ends of all branch switches.

[0023] In an optional implementation, when a switch control signal jumps from a high level to a low level and all switch control signals are at a low level, the first switch combination connects the first connection end of the energy storage capacitor to the ground end, and the third switch combination connects the second connection end of the energy storage capacitor to the control ends of all branch switches, so that the charge of the control end of the branch switch corresponding to the one switch control signal is stored in the energy storage capacitor through the third switch combination;

[0024] When a switch control signal switches from a low level to a high level, the first switch combination connects the first connection end of the energy storage capacitor to the power supply end, and the second switch combination connects the second connection end of the energy storage capacitor to the control end of the branch switch corresponding to the switch control signal, so as to transfer the charge in the energy storage capacitor to the control end of the corresponding branch switch through the second switch combination.

[0025] In an optional implementation, the first switch combination includes a first switch unit and a second switch unit, the first switch unit is connected between the first connection end of the energy storage capacitor and the ground end, and the second switch unit is connected between the first connection end of the energy storage capacitor and the power supply end;

[0026] The second switch combination includes a plurality of third switch units, each of which is connected between the second connection end of the energy storage capacitor and the control end of a corresponding branch switch;

[0027] The third switch combination includes a plurality of fourth switch units, each of which is connected between the second connection end of the energy storage capacitor and a control end of a corresponding branch switch.

[0028] In an optional implementation, when a switch control signal is switched from a high level to a low level and all switch control signals are at a low level, the first switch unit is turned on, the second switch unit is turned off, the plurality of fourth switch units are all turned on, the plurality of third switches are all turned off, and the first connection end of the energy storage capacitor is connected to the ground end, so that the charge at the control end of the branch switch corresponding to the one switch control signal is stored in the energy storage capacitor through the fourth switch unit;

[0029] When a switch control signal is switched from a low level to a high level, the first switch unit is disconnected and the second switch unit is turned on to connect the first connection end of the energy storage capacitor to the power supply end, the third switch unit corresponding to the switch control signal is turned on, the remaining third switch units are disconnected, and multiple fourth switches are disconnected, and the second connection end of the energy storage capacitor is connected to the control end of the corresponding branch switch through the corresponding third switch unit, so that the charge of the second connection end of the energy storage capacitor is transmitted to the control end of the corresponding branch switch through the corresponding third switch unit.

[0030] In an optional implementation manner, the first switch unit is an NMOS transistor, the drain and source of the NMOS transistor serve as connection terminals of the first switch unit, and the gate of the NMOS transistor serves as a control terminal of the first switch unit;

[0031] The second switch unit is a PMOS transistor;

[0032] The third switch unit is a PMOS transistor;

[0033] The fourth switch unit is a PMOS transistor;

[0034] The drain and source of the PMOS transistor serve as connection terminals of the second switch unit, the third switch unit and the fourth switch unit, and the gate of the PMOS transistor serves as a control terminal of the second switch unit, the third switch unit and the fourth switch unit.

[0035] In an optional implementation, the first switch combination and the third switch combination further include a third logic control circuit;

[0036] The third logic control circuit includes an OR gate;

[0037] Each switch control signal is input into the OR gate, and the output end of the OR gate is connected to the gate of each fourth switch unit;

[0038] The first switch combination also includes a first logic control circuit;

[0039] The first logic control circuit includes the OR gate and the first inverter in the third logic control circuit, that is, the third logic control circuit and the first logic control circuit share the OR gate;

[0040] The output end of the OR gate is connected to the gates of the first switch unit and the second switch unit through the first inverter.

[0041] In an optional implementation, the second switch combination further includes a second logic control circuit;

[0042] The second logic control circuit includes a plurality of second inverters, each second inverter corresponds to a third switch unit, and each switch control signal is connected to the gate of the third switch unit through a corresponding second inverter;

[0043] Each switch control signal is connected to the control terminal of the corresponding branch switch. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0045] Figure 1 It is a DC-DC converter structure diagram of the related technology;

[0046] Figure 2 is another DC-DC converter structure diagram of the related art;

[0047] Figure 3 It is a voltage waveform diagram of a branch switch of a DC-DC converter in the related art;

[0048] Figure 4 is a structural diagram of a first embodiment of a DC-DC converter according to an embodiment of the present invention;

[0049] Figure 5 is a structural diagram of a second embodiment of a DC-DC converter according to an embodiment of the present invention;

[0050] Figure 6 is a structural diagram of a third embodiment of a DC-DC converter according to an embodiment of the present invention;

[0051] Figure 7 is a detailed structural diagram of a fourth embodiment of a DC-DC converter according to an embodiment of the present invention;

[0052] Figure 8 is a structural diagram of a fourth embodiment of another DC-DC converter according to an embodiment of the present invention;

[0053] Fig. 9 1 is a voltage waveform diagram of each node of a DC-DC converter according to an embodiment of the present invention. DETAILED DESCRIPTION

[0054] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0055] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0056] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "install", "connect", and "connect" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be a connection between two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. In the present invention, words such as "connect", "connected", "connect", "connect", "couple", etc. that represent electrical connections, unless otherwise specified, represent direct or indirect electrical connections. The direct electrical connection indicates a direct connection between two or more objects without any intervening objects, and the indirect electrical connection indicates a connection between two or more objects with one or more objects (such as electrical components or electrical units such as resistors, capacitors, inductors, switches, filters, etc.) inserted.

[0057] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0058] As an important voltage conversion module, DC-DC converter can convert a given voltage signal into the result required by the user, and is widely used in various types of power management chips. Generally, a separate inductor is required to achieve a specific output voltage. Since high-inductance inductors generally have a large area, poor integration, and correspondingly high costs, they are not suitable for today's era of increasing integration.

[0059] refer to Figure 1 and Figure 2 The Single Inductor Multiple Output (SIMO) DC-DC converter has the function of obtaining multiple outputs by using a single inductor, reducing the number of components and the overall size, while providing efficient power distribution, greatly reducing the cost of using the DC-DC converter, and is being used more and more widely in various scenarios today.

[0060] However, due to the shared inductance, the corresponding shunt gate switch size needs to be large to accurately adjust each output channel to ensure stability and reduce the output voltage regulation rate under high load scenarios. The larger gate switch size will also increase its switching loss due to its larger gate parasitic parameters. Therefore, an important step to improve the efficiency of SIMO-type DCDC is to reduce the switching loss of its gate switch when switching. Reference Figure 1 , the gate voltage is VDD when it is at a high level, VDD is the battery or charger level, and the voltage is GND when it is at a low level. GATE is the gate pulse signal, VOUT1, VOUT2, ... VOUTn are the output voltages of the DCDC converter, refer to Figure 2 , Figure 2 It is a typical circuit topology of a traditional SIMO type DCDC converter. The PULSE signal is a gate pulse signal, BUF1 and BUF2 are forward drive modules, and S1, S2, ... Sn are branch selection switch pulses. Under normal circumstances, the PULSE signal controls the switching of PM1 and NM1 to change the charging or discharging mode of the inductor L1, thereby adjusting the output voltage required by the load. The switching of S1, S2, ... Sn is used to specify a certain path to be connected to the inductor to complete the charging and discharging operations of the path. That is to say, in the prior art, the gate voltage of each branch switch is low, resulting in large switching losses. Figure 3 is a gate voltage waveform diagram of each branch switch in the related art.

[0061] In this regard, a DC-DC converter is provided in this embodiment, such as Figure 4 As shown, the DC-DC converter includes: an inductor L1, a plurality of branch switches and a charge pump module 10, wherein:

[0062] Each branch switch N1-1 to N1-n is connected between the inductor L1 and the corresponding voltage output terminal Vout1-Voutn, and the control terminal of each branch switch receives the corresponding switch control signal S1-Sn. Each branch switch is turned on when the corresponding switch control signal is at a high level, and is turned off when the corresponding switch control signal is at a low level. For example, when the switch control signal S1 is at a high level, the corresponding branch switch N1-1 is turned on, when the switch control signal S1 is at a low level, the corresponding branch switch N1-1 is turned off, when the switch control signal S2 is at a high level, the corresponding branch switch N1-2 is turned on, when the switch control signal S2 is at a low level, the corresponding branch switch N1-2 is turned off, and so on.

[0063] The charge pump module 10 includes a switch combination M and an energy storage capacitor C1. When a switch control signal is switched from a high level to a low level, the charge at the control end of the branch switch corresponding to the switch control signal is stored in the energy storage capacitor C1 through the switch combination M, and when a switch control signal is switched from a low level to a high level, the charge in the energy storage capacitor C1 is transferred to the control end of the branch switch corresponding to the switch control signal through the switch combination M.

[0064] Specifically, Figure 4 As shown, the branch switches are N1-1, N1-2, ..., N1-n. The switch assembly M is connected to the control end of each branch switch.

[0065] Optionally, the switch combination includes multiple switches, which are turned on and off in coordination with each other. When a switch control signal is switched from a high level to a low level, the charge of the control end of the corresponding branch switch is stored in the energy storage capacitor C1, and when a switch control signal is switched from a low level to a high level, the charge of the energy storage capacitor C1 is transmitted to the control end of the corresponding branch switch.

[0066] It should be noted that the branch switch can also be called a gate switch. When the overall SIMO-type DCDC system completes the power-on operation and the output is stable, the branch switch begins to enter the working state and opens one by one. By multiplexing the control terminal charge of the branch switch and using the charge pump technology to increase the gate voltage of the gate switch unit of the subsequent path when it turns high, the voltage of each gate switch gate when it turns high is increased. Compared with traditional DC-DC converters, the gate voltage of the branch switch is often limited by the power supply voltage, which limits the ability to further reduce the on-resistance. By using the charge pump technology, the control terminal voltage of the branch switch is increased to a level higher than the power supply voltage, so that each branch switch can be more fully turned on. Thereby, not only the conduction loss is reduced, but also the current transmission efficiency of the system is improved. In addition, the higher control terminal drive voltage improves the performance of the voltage converter under heavy load conditions, helps to maintain a lower on-state voltage drop and higher efficiency, especially when dealing with high current applications, the efficiency is higher.

[0067] In the DC-DC converter of this embodiment, when a switch control signal such as S1 is switched from a high level to a low level, the branch switch N1-1 is turned off, and the charge at the control end of the branch switch N1-1 is stored in the energy storage capacitor C1 through the switch combination M; when a switch control signal such as S2 is switched from a low level to a high level, the branch switch N1-2 is turned on, and the charge of the energy storage capacitor C1 is transmitted to the control end of the turned-on branch switch N1-2 through the switch combination M, so that the voltage at the control end of N1-2 is higher than the original voltage (such as the power supply voltage) by the charge stored in the energy storage capacitor C1, thereby increasing the voltage at the control end of any branch switch when it is turned on, so that the charge at the control end of the branch switch is recycled, thereby greatly reducing the switching loss.

[0068] In some optional embodiments, Figure 5 As shown, each branch switch is an NMOS transistor, the gate of the NMOS transistor is the control terminal of the branch switch, and the source and drain are connection terminals;

[0069] Among multiple branch switches, only one is turned on at the same time, and the other branch switches are turned off. Each branch switch is turned on in a regular order;

[0070] After a branch switch switches from on to off, in order to prevent crosstalk between output paths, the switch logic of each path needs to wait for a dead time, and then the next branch switch switches from off to on. During the dead time, all branch switches are off.

[0071] Specifically, refer to Figure 5, multiple branch switches N1-1, N1-2, ... N1-n can be NMOS transistors respectively. The source and drain of the NMOS transistor are respectively used as the two connection terminals of the branch switch, and the gate of the NMOS transistor is the control terminal of the branch switch. Specifically, the drains of the NMOS transistors N1-1, N1-2, ... N1-n are connected to the inductor L1, the sources of N1-1, N1-2, ... N1-n are respectively connected to the ground after passing through the second capacitor C2 and the first resistor R1, and the sources of N1-1, N1-2, ... N1-n are respectively connected to the voltage output terminals Vout1-Voutn.

[0072] The regular order may be a preset order, and the preset order may be N1-1, N1-2, N1-3, ..., N1-n are turned on in sequence and cycled in this way, and only one branch switch is turned on at the same time. After one branch switch is turned off and before another branch switch is turned on, a dead time is waited, and during the dead time, all branch switches are turned off.

[0073] For example, refer to Figure 5 , S1, S2, ... Sn are the switch control signals of each control terminal of N1-1, N1-2, ... N1-n respectively. Through the switching of S1, S2, ... Sn, a branch switch is designated to be connected to the inductor L1. If a state is that N1-1 is turned on first, then N1-1 is turned off and N1-2 is turned on, and finally N1-2 is turned off and N1-3 is turned on, and similarly, N1-n-1 is turned off and N1-n is turned on. When N1-1-1 of S1 circuit changes from on to off state, the gate voltage is quickly pulled down from high, and at this time there will be a short state where S1, S2, ... Sn are all turned off (i.e., dead zone state).

[0074] In some optional embodiments, Figure 5 As shown, the DC-DC converter further includes: a first power transistor Q1 and a second power transistor Q2;

[0075] The first power transistor Q1 connects or disconnects the input voltage VDD and the switch node LX according to a first drive signal at its gate, and the second power transistor Q2 connects or disconnects the ground terminal and the switch node LX according to a second drive signal at its gate;

[0076] The inductor L1 is connected between the switch node LX and the branch switch;

[0077] When the first driving signal is at a low level, the first power transistor Q1 connects the input voltage to the switch node LX, and when the first driving signal is at a high level, the first power transistor Q1 disconnects the input voltage from the switch node LX;

[0078] When the second driving signal is at a high level, the second power transistor Q2 connects the ground terminal and the switch node LX, and when the second driving signal is at a low level, the second power transistor Q2 disconnects the ground terminal and the switch node LX;

[0079] When the first power transistor Q1 is turned on, the second power transistor Q2 is turned off, and the inductor L1 is charged at this time. When the second power transistor Q2 is turned on, the first power transistor Q1 is turned off, and the inductor L1 is discharged at this time.

[0080] Specifically, Figure 5 As shown, the gate of the first power transistor Q1 is connected to the output end of BUF2, the gate of the second power transistor Q2 is connected to the output end of BUF1, the source of the first power transistor Q1 is connected to the power supply end VDD, the drain of the first power transistor Q1 is connected to the switch node LX, the drain of the second power transistor Q2 is connected to the switch node LX, and the source of the second power transistor Q2 is connected to the ground end GND. The first power transistor Q1 is a PMOS transistor, the second power transistor Q2 is an NMOS transistor, the PULSE signal is a pulse control signal, BUF1 and BUF2 are forward drive modules, and the pulse control signal passes through BUF1 and BUF2 to obtain the first drive signal and the second drive signal respectively. Under normal circumstances, the pulse control signal controls the switching of the first power transistor Q1 and the second power transistor Q2 to change the charging or discharging mode of the inductor L1. By coordinating the on or off of the branch switch shown, the required voltage can be provided to different voltage output terminals Vout1-Voutn at different times.

[0081] For example, reference Figure 5 , if N1-1 is turned off after being turned on, during the dead zone, the switch combination M stores the charge of the gate of N1-1 in the energy storage capacitor C1. After the dead zone, when N1-2 is turned on, the switch combination M transfers the charge stored in the energy storage capacitor C1 to the gate of N1-2, so that the voltage of the gate of N1-2 can be increased to be higher than the power supply voltage VDD, and the charge of the gate of N1-1 is cyclically utilized. Subsequently, the charge of the gate of N1-2 can be temporarily stored by the energy storage capacitor C1, and then provided to the gate of N1-3, and then the charge of the gate of N1-3 can be temporarily stored by the energy storage capacitor C1, and then provided to the gate of N1-4, and so on.

[0082] In some optional embodiments, Figure 6 As shown, the switch combination M includes a first switch combination M1, a second switch combination M2 and a third switch combination M3, wherein:

[0083] The first switch combination M1 selectively connects the first connection end of the energy storage capacitor C1 to the power supply end VDD or the ground end GND;

[0084] The second switch combination M2 selectively connects the second connection end of the energy storage capacitor C1 to the control end of any branch switch;

[0085] The third switch combination M3 selectively connects the second connection end of the energy storage capacitor C1 to the control ends of all branch switches.

[0086] Specifically, refer to Figure 6 , the first end of the first switch combination M1 is connected to the first connection end of the energy storage capacitor C1, and the two second ends of the first switch combination M1 are respectively connected to the power supply end VDD and the ground end GND, and the first switch combination M1, the second switch combination M2 and the third switch combination M3 receive switch control signals S1, S2, ... Sn, and selectively connect the connection end of the energy storage capacitor C1 based on the switch control signals S1, S2, ... Sn. The first end of the second switch combination M2 is connected to the second connection end of the energy storage capacitor C1, and the multiple second ends of the second switch combination M2 are respectively connected to the control end of each branch switch; the first end of the third switch combination M3 is connected to the second connection end of the energy storage capacitor C1, and the multiple second ends of the third switch combination M3 are respectively connected to the control end of each branch switch.

[0087] In some optional embodiments, Figure 6 As shown, when a switch control signal jumps from a high level to a low level and all switch control signals are at a low level, the first switch combination M1 connects the first connection end of the energy storage capacitor C1 to the ground end GND, and the third switch combination M3 connects the second connection end of the energy storage capacitor C1 to the control ends of all branch switches, so that the charge of the control end of the branch switch corresponding to the one switch control signal is stored in the energy storage capacitor C1 through the third switch combination M3;

[0088] When a switch control signal switches from a low level to a high level, the first switch combination M1 connects the first connection end of the energy storage capacitor C1 to the power supply end VDD, and the second switch combination M2 connects the second connection end of the energy storage capacitor C1 to the control end of the branch switch corresponding to the switch control signal, so as to transfer the charge in the energy storage capacitor C1 to the control end of the corresponding branch switch through the second switch combination M2.

[0089] For example, reference Figure 6If the switch control signal S1 jumps from a high level to a low level, when N1-1 is turned on and then turned to an off state, the first switch combination M1 connects the first connection end of the energy storage capacitor C1 to the ground end GND, and the third switch combination M3 stores the charge of the control end of N1-1 to the energy storage capacitor C1. After the dead zone state, when the switch control signal S2 jumps from a low level to a high level, N1-2 is turned on, the first switch combination M1 connects the power supply end VDD to the first connection end of the energy storage capacitor C1, and the second switch combination M2 sends the charge stored in the energy storage capacitor C1 to the control end of N1-2, and so on.

[0090] In some optional embodiments, Figure 7 As shown, the first switch combination M1 includes a first switch unit 11 and a second switch unit 12, the first switch unit 11 is connected between the first connection end of the energy storage capacitor C1 and the ground terminal GND, and the second switch unit 12 is connected between the first connection end of the energy storage capacitor C1 and the power supply terminal VDD;

[0091] Specifically, the first switch unit 11 and the second switch unit 12 are turned on and off based on the switch control signals of all branch switches, and one of the first switch unit 11 and the second switch unit 12 is turned on and the other is turned off. The first switch combination M1 is connected to S1, S2, ... Sn respectively, and the first switch combination M1 also includes a first control logic. When all branch switches are turned off, the first control logic can control the first switch unit 11 to be turned on and the second switch unit 12 to be turned off. When any branch switch is turned on, the first control logic can control the first switch unit 11 to be turned off and the second switch unit 12 to be turned on.

[0092] The second switch combination M2 includes a plurality of third switch units 13-1 to 13-n, each of which is connected between the second connection end of the energy storage capacitor C1 and the control end of a corresponding branch switch;

[0093] Specifically, each third switch unit is turned on and off according to the switch control signal S1-Sn of the branch switch corresponding to the third switch unit, so as to transfer the charge stored in the energy storage capacitor C1 to the control end of the corresponding branch switch. The second switch combination M2 is respectively connected to S1, S2, ... Sn, and the second switch combination M2 includes a second control logic. When any branch switch is turned on, the second control logic can turn on the third switch unit corresponding to the branch switch and turn off the remaining third switch units.

[0094] The third switch combination M3 includes a plurality of fourth switch units 14 - 1 to 14 - n, each of which is connected between the second connection end of the energy storage capacitor C1 and a control end of a corresponding branch switch.

[0095] Specifically, each fourth switch unit is turned on and off according to all switch control signals, so as to transmit the voltage of the control end of the branch switch to the energy storage capacitor C1 for storage. The third switch combination M3 is connected to S1, S2, ... Sn respectively, and the third switch combination M3 also includes a third control logic. When all branch switches are disconnected, the third control logic can turn on all fourth switch units, otherwise, the third control logic turns off all fourth switch units.

[0096] In some optional embodiments, Figure 7 As shown, when a switch control signal is switched from a high level to a low level and all switch control signals are at a low level, that is, in a dead zone state, the first switch unit 11 is turned on, the second switch unit 12 is turned off, a plurality of fourth switch units are turned on, and a plurality of third switch units are turned off. At this time, the first connection end of the energy storage capacitor C1 is connected to the ground end GND, so that the charge of the control end of the branch switch corresponding to the one switch control signal is stored in the energy storage capacitor C1 through the fourth switch unit;

[0097] When a switch control signal is switched from a low level to a high level, the first switch unit 11 is disconnected and the second switch unit 12 is turned on to connect the first connection end of the energy storage capacitor C1 to the power supply end VDD, the third switch unit corresponding to the switch control signal is turned on, the remaining third switch units are disconnected, and multiple fourth switches are all disconnected, and the second connection end of the energy storage capacitor C1 is connected to the control end of the corresponding branch switch through the corresponding third switch unit, so that the charge of the second connection end of the energy storage capacitor is transmitted to the control end of the corresponding branch switch through the corresponding third switch unit.

[0098] Specifically, refer to Figure 7 The plurality of fourth switch units are 14-1, 14-2, ..., 14-n respectively. The plurality of third switch units are 13-1, 13-2, ..., 13-n respectively.

[0099] For example, reference Figure 7If the switch control signal S1 is switched from a high level to a low level and all switch control signals are at a low level, that is, in the dead zone state, the branch switch N1-1 is turned on and then turned to an off state, the first switch unit 11 is turned on, the second switch unit 12 is turned off, the plurality of fourth switch units are all turned on, and the plurality of third switch units are all turned off. At this time, the first connection end of the energy storage capacitor C1 is connected to the ground end GND, so that the charge at the control end of the branch switch N1-1 corresponding to the switch control signal S1 is stored in the energy storage capacitor C1 through the fourth switch unit. After the dead zone state, when a switch control signal S2 is switched from a low level to a high level, the first switch unit 11 is disconnected, and the second switch unit 12 is turned on to connect the first connection end of the energy storage capacitor C1 to the power supply end VDD, the third switch unit 13-2 corresponding to the switch control signal S2 is turned on, and the other third switch units are disconnected, and the plurality of fourth switches are all disconnected, and the second connection end of the energy storage capacitor C1 is connected to the control end of the corresponding branch switch N1-2 through the corresponding third switch unit 13-2, so that the charge of the second connection end of the energy storage capacitor C1 is transmitted to the control end of the corresponding branch switch N1-2 through the corresponding third switch unit 13-2. And so on.

[0100] In some optional embodiments, Figure 8 As shown, the first switch unit 11 is an NMOS transistor, the drain and source of the NMOS transistor serve as connection terminals of the first switch unit, and the gate of the NMOS transistor serves as a control terminal of the first switch unit;

[0101] The second switch unit 12 is a PMOS transistor;

[0102] The third switch unit is a PMOS transistor;

[0103] The fourth switch unit is a PMOS transistor;

[0104] The drain and source of the PMOS transistor serve as connection terminals of the second switch unit, the third switch unit and the fourth switch unit, and the gate of the PMOS transistor serves as a control terminal of the second switch unit, the third switch unit and the fourth switch unit.

[0105] Specifically, the first switch unit 11 is an NMOS transistor N2, which is turned on at a high level and turned off at a low level. The second switch unit 12 is a PMOS transistor P1, which is turned on at a low level and turned off at a high level. The plurality of third switch units are PMOS transistors P2-1, P2-2, ... P2-n. The plurality of fourth switch units are PMOS transistors P3-1, P3-2, ... P3-n. P2-1, P2-2, ... P2-n, P3-1, P3-2, ... P3-n are turned on at a low level and turned off at a high level.

[0106] It should be noted that the drain of each PMOS transistor P2-1, P2-2, ... P2-n is connected to the gate of the corresponding branch switch, and the source of P2-1, P2-2, ... P2-n is connected to the second connection end (i.e., the upper plate) of the energy storage capacitor C1. The source of each PMOS transistor P3-1, P3-2, ... P3-n is connected to the gate of the corresponding branch switch, and the drain of the PMOS transistor P3-1, P3-2, ... P3-n is connected to the second connection end (i.e., the upper plate) of the energy storage capacitor C1. The drain of P1 is connected to the first connection end (i.e., the lower plate) of the energy storage capacitor C1, and the source of P1 is connected to the power supply terminal VDD. The source of N2 is connected to the ground terminal GND, and the drain of N2 is connected to the first connection end (i.e., the lower plate) of the energy storage capacitor C1.

[0107] In some optional embodiments, Figure 7 and 8 As shown, the third switch combination M3 also includes a third logic control circuit;

[0108] The third logic control circuit includes an OR gate OR1;

[0109] Each switch control signal S1-Sn is input into the OR gate OR1, and the output end of the OR gate OR1 is connected to the gate of each fourth switch unit;

[0110] The first switch combination M1 also includes a first logic control circuit;

[0111] The first logic control circuit includes the OR gate and the first inverter NOT in the third logic control circuit, that is, the third logic control circuit and the first logic control circuit share the OR gate;

[0112] The output end of the OR gate OR1 is connected to the gates of the first switch unit and the second switch unit through the first inverter NOT.

[0113] Specifically, the OR gate OR1 has a plurality of input terminals, and each switch control signal is input into the OR gate OR1. If all switch control signals are at a low level, that is, in a dead zone state, a low level signal is output, and at this time, the plurality of fourth switch units are disconnected. If at least one switch control signal is at a high level, a high level signal is output, and at this time, the plurality of fourth switch units are disconnected.

[0114] Further, when the input of the first inverter NOT is at a high level, the output is a low level, and when the input of the first inverter NOT is at a low level, the output is a high level.

[0115] It should be noted that when the branch switch N1-1 is switched from on to off and all the switch control signals S1-Sn are at low levels, the OR gate OR1 outputs a low level signal, and the low level signal outputs a high level signal through the first inverter NOT, and the high level signal turns on N2 and turns off P1. Thus, the first connection end (i.e., the lower plate) of the energy storage capacitor C1 is connected to the ground terminal GND. At the same time, the OR gate OR1 outputs a low level signal, so that P3-1, P3-2, ... P3-n are all turned on, and the charge of the gate of the branch switch N1-1 is stored in the energy storage capacitor C1 through P3-1.

[0116] It should be noted that, if any switch control signal is at a high level, such as the switch control signal S2 is at a high level, the branch switch N1-2 is turned on, and the OR gate OR1 outputs a high level signal. The high level signal outputs a low level signal through the first inverter NOT, and the low level signal turns on P1 and turns off N2. Thus, the power supply terminal VDD is connected to the first connection terminal (i.e., the lower plate) of the energy storage capacitor C1. At the same time, the OR gate OR1 outputs a high level signal, so that P3-1, P3-2, ... P3-n are all turned off. At the same time, the switch control signal S2 turns on the corresponding P2-2, and connects the second connection terminal of the energy storage capacitor C1 to the control terminal of the corresponding branch switch N1-2 through the corresponding P2-2, so that the charge of the second connection terminal of the energy storage capacitor C1 is transmitted to the control terminal of the corresponding branch switch N1-2 through the corresponding P2-2.

[0117] In some optional embodiments, Figure 7 and 8 As shown, the second switch combination M2 also includes a second logic control circuit;

[0118] The second logic control circuit includes a plurality of second inverters, each second inverter corresponds to a third switch unit, and each switch control signal is connected to the gate of the third switch unit through a corresponding inverter;

[0119] Each switch control signal is connected to the control terminal of the corresponding branch switch.

[0120] Specifically, the plurality of second inverters are INV1, INV2, ... INVn, for example, the input end of INV1 is connected to receive the switch control signal S1, and the output end of INV1 is connected to the gate of P2-1.

[0121] It should be noted that when S1 changes from a low level to a high level, the high level is converted to a low level through INV1 corresponding to the switch control signal, and the low level turns on the corresponding P2-1. At this time, the second connection end (i.e., the upper plate) of the energy storage capacitor C1 is connected to the corresponding branch switch N1-1, so that the charge in the energy storage capacitor C1 is transmitted to the branch switch N1-1 after passing through the corresponding P2-1.

[0122] It should be noted that when the S2 switch control signal changes from a high level to a low level, the charge of the gate of N2 - 2 is transmitted to the energy storage capacitor C1 through the corresponding P3 - 2 .

[0123] For example, reference Figure 8 If S1 changes from a high level to a low level, N1-1 turns to an off state after being turned on. At this time, it is in a dead zone state, and the OR gate OR1 outputs a low level. P3-1 to P3-n are all turned on. After passing through the first inverter NOT, N2 is turned on, and P3-1 stores the charge of the gate of N1-1 in the energy storage capacitor C1. After the dead zone state, if S2 changes from a low level to a high level, P1 connects the power supply terminal VDD to the energy storage capacitor C1, and P2-2 is turned on at the same time. P2-2 sends the charge stored in the energy storage capacitor C1 to the control end of N1-2, and so on.

[0124] In summary, reference Fig. 9 , OR1 is the output waveform of the OR gate OR1, and C1 is the potential difference between the two plates of the energy storage capacitor C1. Through the discharge and charging process of the energy storage capacitor C1, the on-voltage of each branch switch is VDD+ΔV. The specific effect varies with the size difference of each selection switch, thereby increasing the voltage of the control end of any branch switch when it is turned on, and then reducing the on-resistance of the branch switch, thereby reducing the conduction loss and improving the current transmission efficiency of the system. In other words, the present invention stores the charge when the gate charge is pulled down at the last shutdown, and reuses it again when the branch switch is pulled up, which greatly reduces the switching loss compared to the traditional structure.

[0125] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A DC-DC converter, characterized in that: include: An inductor, a plurality of branch switches and a charge pump module, wherein: Each branch switch is connected between the inductor and the corresponding voltage output terminal, and the control terminal of each branch switch receives the corresponding switch control signal. Each branch switch is turned on when the corresponding switch control signal is at a high level, and is turned off when the corresponding switch control signal is at a low level. The charge pump module includes a switch combination and an energy storage capacitor. When a switch control signal is switched from a high level to a low level, the charge at the control end of the branch switch corresponding to the switch control signal is stored in the energy storage capacitor through the switch combination. When a switch control signal is switched from a low level to a high level, the charge in the energy storage capacitor is transferred to the control end of the branch switch corresponding to the switch control signal through the switch combination.

2. The DC-DC converter according to claim 1, characterized in that: Each branch switch is an NMOS transistor, and the gate of the NMOS transistor is the control terminal of the branch switch; Among multiple branch switches, only one is turned on at the same time, and the other branch switches are turned off. Each branch switch is turned on in a regular order; After a branch switch is switched from on to off, a dead time is waited for, and then the next branch switch is switched from off to on. During the dead time, all branch switches are off.

3. The DC-DC converter according to claim 1, characterized in that: The DC-DC converter further includes: a first power transistor and a second power transistor; The first power transistor connects or disconnects the input voltage and the switch node according to a first drive signal of the gate thereof, and the second power transistor connects or disconnects the ground terminal and the switch node according to a second drive signal of the gate thereof; The inductor is connected between the switch node and the branch switch; When the first driving signal is at a low level, the first power transistor connects the input voltage and the switch node; when the first driving signal is at a high level, the first power transistor disconnects the input voltage and the switch node; When the second driving signal is at a high level, the second power transistor connects the ground terminal and the switch node; when the second driving signal is at a low level, the second power transistor disconnects the ground terminal and the switch node; When the first power transistor is turned on, the second power transistor is turned off, and when the second power transistor is turned on, the first power transistor is turned off.

4. The DC-DC converter according to claim 1, characterized in that: The switch combination includes a first switch combination, a second switch combination and a third switch combination, wherein: The first switch combination selectively connects the first connection end of the energy storage capacitor to a power supply end or a ground end; The second switch combination selectively connects the second connection end of the energy storage capacitor to the control end of any branch switch; The third switch combination selectively connects the second connection end of the energy storage capacitor to the control ends of all branch switches.

5. The DC-DC converter according to claim 4, characterized in that: When a switch control signal jumps from a high level to a low level and all switch control signals are at a low level, the first switch combination connects the first connection end of the energy storage capacitor to the ground end, and the third switch combination connects the second connection end of the energy storage capacitor to the control ends of all branch switches, so that the charge of the control end of the branch switch corresponding to the switch control signal is stored in the energy storage capacitor through the third switch combination; When a switch control signal switches from a low level to a high level, the first switch combination connects the first connection end of the energy storage capacitor to the power supply end, and the second switch combination connects the second connection end of the energy storage capacitor to the control end of the branch switch corresponding to the switch control signal, so as to transfer the charge in the energy storage capacitor to the control end of the corresponding branch switch through the second switch combination.

6. The DC-DC converter according to claim 5, characterized in that: The first switch combination includes a first switch unit and a second switch unit, the first switch unit is connected between the first connection end of the energy storage capacitor and the ground end, and the second switch unit is connected between the first connection end of the energy storage capacitor and the power supply end; The second switch combination includes a plurality of third switch units, each of which is connected between the second connection end of the energy storage capacitor and the control end of a corresponding branch switch; The third switch combination includes a plurality of fourth switch units, each of which is connected between the second connection end of the energy storage capacitor and a control end of a corresponding branch switch.

7. The DC-DC converter according to claim 6, characterized in that: When a switch control signal is switched from a high level to a low level and all switch control signals are at a low level, the first switch unit is turned on, the second switch unit is turned off, the plurality of fourth switch units are all turned on, and the plurality of third switches are all turned off, so as to connect the first connection end of the energy storage capacitor to the ground end, and store the charge of the control end of the branch switch corresponding to the one switch control signal into the energy storage capacitor through the fourth switch unit; When a switch control signal is switched from a low level to a high level, the first switch unit is disconnected and the second switch unit is turned on to connect the first connection end of the energy storage capacitor to the power supply end, the third switch unit corresponding to the switch control signal is turned on, the remaining third switch units are disconnected, and multiple fourth switches are disconnected, and the second connection end of the energy storage capacitor is connected to the control end of the corresponding branch switch through the corresponding third switch unit, so that the charge of the second connection end of the energy storage capacitor is transmitted to the control end of the corresponding branch switch through the corresponding third switch unit.

8. The DC-DC converter according to claim 7, characterized in that: The first switch unit is an NMOS transistor, the drain and source of the NMOS transistor serve as connection terminals of the first switch unit, and the gate of the NMOS transistor serves as a control terminal of the first switch unit; The second switch unit is a PMOS transistor; The third switch unit is a PMOS transistor; The fourth switch unit is a PMOS transistor; The drain and source of the PMOS transistor serve as connection terminals of the second switch unit, the third switch unit and the fourth switch unit, and the gate of the PMOS transistor serves as a control terminal of the second switch unit, the third switch unit and the fourth switch unit.

9. The DC-DC converter according to claim 8, characterized in that: The third switch combination further includes a third logic control circuit; The third logic control circuit includes an OR gate; Each switch control signal is input into the OR gate, and the output end of the OR gate is connected to the gate of each fourth switch unit; The first switch combination also includes a first logic control circuit; The first logic control circuit includes the OR gate and the first inverter in the third logic control circuit, that is, the third logic control circuit and the first logic control circuit share the OR gate; The output end of the OR gate is connected to the gates of the first switch unit and the second switch unit through the first inverter.

10. The DC-DC converter according to claim 9, characterized in that: The second switch combination also includes a second logic control circuit; The second logic control circuit includes a plurality of second inverters, each second inverter corresponds to a third switch unit, and each switch control signal is connected to the gate of the third switch unit through a corresponding second inverter; Each switch control signal is connected to the control terminal of the corresponding branch switch.

Citation Information

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