Ferroelectric memory and preparation method thereof

Abstract

The invention provides a ferroelectric memory and a preparation method thereof, and belongs to the technical field of memorizers, the preparation method of the ferroelectric memory comprises the following steps: growing a single crystal back gate electrode on a single crystal substrate, and growing a single crystal gate dielectric layer on the single crystal back gate electrode, the single crystal gate dielectric layer being made of a single crystal ferroelectric oxide film; and transferring the semiconductor channel layer to the single crystal gate dielectric layer. The invention also provides the ferroelectric memory prepared by using the preparation method. The ferroelectric memory provided by the invention has better non-volatility and durability.

Description

Technical Field

[0001] At least one embodiment of the present invention relates to a memory, and more particularly to a ferroelectric memory and a method for preparing the same. Background Art

[0002] Ferroelectric transistors are composed of semiconductor channels, ferroelectric gate dielectric layers, and metal electrodes. They have the advantages of non-volatility, non-destructive reading, low power consumption, fast read and write speeds, and long data retention time. However, ferroelectric transistors based on traditional polycrystalline ferroelectric gate dielectrics such as (Pb(Zr,Ti)O3(PZT)) still have some shortcomings, mainly reflected in poor interfaces and many defects, resulting in poor retention and durability. Hafnium oxide, a polycrystalline gate dielectric material currently used in ferroelectric transistors, is widely favored because of its mature preparation process and ability to be combined with silicon. However, its large number of oxygen vacancies affects the leakage current and durability of the device. Summary of the invention

[0003] In view of this, in order to at least partially solve the above-mentioned technical problems, the present invention provides a ferroelectric memory and a preparation method thereof to improve the non-volatility and durability of the ferroelectric memory.

[0004] According to an embodiment of one aspect of the present invention, a method for preparing a ferroelectric memory is provided, comprising:

[0005] A single crystal back gate electrode is grown on a single crystal substrate, a single crystal gate dielectric layer is grown on the single crystal back gate electrode, wherein the single crystal gate dielectric layer is made of a single crystal ferroelectric oxide film; and a semiconductor channel layer is transferred to the single crystal gate dielectric layer.

[0006] According to another aspect of the present invention, there is provided a ferroelectric memory, comprising:

[0007] A single crystal substrate; a single crystal back gate electrode, located on the single crystal substrate; a single crystal gate dielectric layer, which is made of a single crystal ferroelectric oxide film and is located on the single crystal back gate electrode; and a semiconductor channel layer, which is located on the single crystal gate dielectric layer.

[0008] According to the method for preparing a ferroelectric memory provided by the above embodiment of the present invention, by depositing a high-quality single-crystalline ferroelectric oxide film on a single-crystalline back gate electrode and transferring a semiconductor channel layer onto the single-crystalline ferroelectric oxide film, the high-quality single-crystalline ferroelectric oxide film can be integrated with the semiconductor channel layer. The ferroelectric memory using the prepared high-quality single-crystalline ferroelectric oxide film as a gate dielectric layer can obtain better non-volatility and durability characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present invention, but are not intended to limit the present invention.

[0010] Figure 1 A cross-sectional schematic diagram of a ferroelectric memory provided by an embodiment of the present invention;

[0011] Figure 2 A schematic flow chart of a method for preparing a ferroelectric memory provided by an embodiment of the present invention;

[0012] Figure 3A to Figure 3D A schematic diagram of a preparation process of a ferroelectric memory provided by an embodiment of the present invention;

[0013] Figure 4 A schematic diagram of epitaxially growing a single crystal thin film using a laser pulse deposition device provided in an embodiment of the present invention;

[0014] Figure 5A to Figure 5C Diffraction spot patterns of reflection high energy electron diffraction (RHEED) of single crystal strontium titanate thin film, single crystal lanthanum strontium manganese oxide thin film and single crystal barium titanate thin film provided in the embodiments of the present invention;

[0015] Figure 6 The fatigue properties test results of the single crystal barium titanate film provided in the embodiment of the present invention;

[0016] Figure 7A~Figure 7B The fatigue characteristics test results of polycrystalline ferroelectric hafnium dioxide thin films in the related art; and

[0017] Figure 8 The figure is a comparison chart of the on-state current retention performance of a ferroelectric memory using a polycrystalline lead zirconate titanate film as a gate dielectric layer in the related art and a ferroelectric memory using a single crystal ferroelectric oxide film as a gate dielectric layer provided by an embodiment of the present invention.

[0018] Description of reference numerals:

[0019] 11- Silicon substrate;

[0020] 12-silicon dioxide layer;

[0021] 13-Nano silicon film;

[0022] 1- Single crystal substrate;

[0023] 2- single crystal back gate electrode;

[0024] 3-single crystal gate dielectric layer;

[0025] 4-semiconductor channel layer;

[0026] 5- Source;

[0027] 6-drain;

[0028] 10- vacuum chamber;

[0029] 20-support frame;

[0030] 30-substrate to be deposited;

[0031] 40-Target material. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical scheme and advantages of the present invention more clear, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. However, the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the invention thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, for clarity, the sizes and relative sizes of layers and regions may be exaggerated, and the same reference numerals throughout represent the same elements.

[0033] The terms used herein are only for describing specific embodiments and are not intended to limit the present invention. The terms "comprise", "include", etc. used herein indicate the existence of the features, steps, operations and / or components, but do not exclude the existence or addition of one or more other features, steps, operations or components.

[0034] The non-volatility of ferroelectric memory comes from ferroelectric materials. There is spontaneous polarization inside the ferroelectric material within a certain temperature range and when there is no external electric field. Under the action of the external electric field, the ferroelectric domains inside the ferroelectric material can be rearranged uniformly along the direction of the electric field, so that the polarization direction of each ferroelectric domain is consistent. Ideally, when the electric field is removed, the polarization direction will not change. Only when the electric field of the same opposite direction (called coercive electric field) is applied will the polarization direction change. Therefore, the polarization direction can be used to store information, and this information is non-volatile. However, the reality is that when the electric field is removed, there will be depolarization inside the ferroelectric material, so that the polarization direction of some ferroelectric domains will no longer remain consistent, resulting in a weakening of the polarization strength. When the ferroelectric memory is working, the storage time of the stored data is reduced, that is, the retention effect is weakened. In addition, ferroelectric materials also have fatigue phenomenon, that is, when the number of writes and erases is large, the polarization strength will also be weakened, which reduces its information storage capacity.

[0035] Ferroelectric memory devices that use polycrystalline ferroelectric materials as gate dielectric layers have poor retention and durability. Relatively speaking, single-crystalline materials have a regular internal structure and fewer defects (oxygen vacancies, etc.) and interface trap states. Therefore, using single-crystalline ferroelectric oxide films as gate dielectric layers can improve and enhance performance compared to previous polycrystalline ferroelectric materials used as gate dielectric layers.

[0036] The method of combining a single crystal ferroelectric oxide film with a semiconductor channel layer includes directly epitaxially growing a single crystal ferroelectric oxide film on a semiconductor channel material. However, since a corresponding substrate with a lattice matching is required when growing a single crystal material, strict growth conditions are also required. The problem of poor film quality exists when epitaxially growing a single crystal ferroelectric oxide film directly on a semiconductor channel layer. The method of combining a single crystal ferroelectric oxide film with a semiconductor channel layer also includes combining the two by means of thin film transfer. The thin film transfer method includes two situations. One is to transfer a single crystal ferroelectric oxide film to a semiconductor channel layer. However, different transfer methods need to be developed for different single crystal ferroelectric oxide films, and the single crystal ferroelectric oxide film may be damaged during the transfer process, causing cracks in the single crystal ferroelectric oxide film, which is not conducive to improving device performance. The second is to transfer a silicon-based semiconductor channel layer to a single crystal ferroelectric oxide film.

[0037] In view of this, the present invention provides a ferroelectric memory and a preparation method thereof, which improves the retention and fatigue effects of the ferroelectric memory and enhances the non-volatility and durability of the ferroelectric memory by integrating a single crystal ferroelectric oxide film with a silicon-based semiconductor channel layer.

[0038] Figure 1 A cross-sectional schematic diagram of a ferroelectric memory provided by an embodiment of the present invention.

[0039] Figure 2 A schematic flow chart of a method for preparing a ferroelectric memory provided in an embodiment of the present invention.

[0040] Figure 3A to Figure 3D A schematic diagram of a preparation process of a ferroelectric memory provided in an embodiment of the present invention.

[0041] According to an exemplary embodiment of the present invention, the present invention provides a method for preparing a ferroelectric memory, referring to Figure 1 , Figure 2 As shown, it includes: operation S1~operation S2.

[0042] In operation S1 , a single crystal back gate electrode 2 is grown on a single crystal substrate 1 , and a single crystal gate dielectric layer 3 is grown on the single crystal back gate electrode 2 , wherein the single crystal gate dielectric layer 3 is made of a single crystal ferroelectric oxide thin film.

[0043] In some embodiments, a single crystal back gate electrode 2 is deposited and grown on a single crystal substrate 1 using a pulsed laser deposition (PLD) device; and / or a single crystal ferroelectric oxide thin film is grown on the single crystal back gate electrode 2 using a pulsed laser deposition (PLD) device as a single crystal gate dielectric layer 3 .

[0044] Figure 4A schematic diagram of epitaxially growing a single crystal thin film using a laser pulse deposition device provided in an embodiment of the present invention.

[0045] According to an embodiment of the present invention, referring to Figure 4 As shown, in the vacuum chamber 10 of the laser pulse deposition device (PLD), the substrate 30 to be deposited is fixed on the support frame 30, and the target 40 faces the substrate 30 to be deposited. The high-power pulse laser generated by the laser acts on the surface of the target 40 of the growth material, and high-temperature and high-pressure target plasma is generated due to high temperature and ablation, and the target plasma expands directionally and locally and is deposited on the substrate 30 to be deposited to form a single crystal thin film.

[0046] In some embodiments, the single crystal substrate 1 includes a single crystal strontium titanate SrTiO3 (001) thin film, a single crystal neodymium gallate (NdGaO3) thin film, a single crystal dysprosium scandate (DyScO3) thin film, or a single crystal gadolinium scandate (GdScO3) thin film.

[0047] In some embodiments, the single-crystalline back-gate electrode 2 includes a single-crystalline lanthanum strontium manganese oxide thin film or a single-crystalline strontium ruthenate thin film.

[0048] In some embodiments, the single crystal ferroelectric oxide film includes a single crystal barium titanate film or a single crystal hafnium oxide film. According to an embodiment of the present invention, the single crystal substrate 1 is a material that matches the crystal orientation and lattice constant of the single crystal back gate electrode 2, so as to epitaxially grow a high-quality single crystal back gate electrode 2 on the single crystal substrate 1; the single crystal back gate electrode 2 is a material that matches the crystal orientation and lattice constant of the single crystal ferroelectric oxide film, so as to epitaxially grow a single crystal ferroelectric oxide film with stable quality on the single crystal back gate electrode 2.

[0049] In some embodiments, the single crystal substrate 1 is a single crystal strontium titanate SrTiO3 (001) film, the single crystal back gate electrode 2 is a single crystal lanthanum strontium manganese oxide film, and the single crystal ferroelectric oxide film is a single crystal barium titanate film.

[0050] In operation S2 , the semiconductor channel layer 4 is transferred onto the single crystal gate dielectric layer 3 .

[0051] In some embodiments, the semiconductor channel layer 4 may be a nano-silicon film 13 , and the nano-silicon film 13 is a single-crystal nano-silicon film.

[0052] In some embodiments, reference Figure 3A to Figure 3D As shown, transferring the semiconductor channel layer 4 onto the single crystal gate dielectric layer 3 includes: removing the silicon dioxide layer 12 of the silicon on insulator by hydrofluoric acid etching, transferring the nano silicon film 13 of the silicon on insulator (SOI) onto the single crystal gate dielectric layer 3 by using a flexible substrate, wherein the silicon on insulator includes a silicon substrate 11, a silicon dioxide layer 12, and a nano silicon film 13 from bottom to top; and removing the flexible substrate.

[0053] In some embodiments, the flexible substrate may be a polypropylene carbonate film.

[0054] In some embodiments, the SOI is cleaned, placed in hydrofluoric acid (mass fraction 40%), and immersed and etched for about 6 hours, so that the middle silicon dioxide layer is completely etched, and the nano silicon film on the surface can be peeled off because there is no middle layer (silicon dioxide layer) adhesion. The nano silicon film is transferred to the single crystal ferroelectric oxide film using a flexible substrate, and the nano silicon film is heated to completely adhere to the single crystal ferroelectric oxide film, and the transfer is completed.

[0055] According to an embodiment of the present invention, the above-mentioned preparation method further comprises: forming a source electrode 5 and a drain electrode 6 at two ends of the semiconductor channel layer 4 respectively.

[0056] According to the embodiments of the present invention, compared with polycrystalline gate dielectric materials, single crystal materials have more regular lattice arrangement and fewer defects (oxygen vacancies, etc.), which can alleviate fatigue depolarization and data retention caused by multiple voltage applications. By depositing a high-quality single crystal ferroelectric oxide film on a single crystal back gate electrode and transferring a semiconductor channel layer onto the single crystal ferroelectric oxide film, the single crystal ferroelectric oxide film and the semiconductor channel layer can be integrated together; compared with ferroelectric memory using polycrystalline ferroelectric materials as gate dielectric layers, the ferroelectric memory using high-quality single crystal ferroelectric oxide films prepared by the embodiments of the present invention as gate dielectric layers can improve the device's retention, fatigue and other performance, and can obtain better non-volatility and durability characteristics.

[0057] According to an exemplary embodiment of the present invention, the present invention provides a ferroelectric memory obtained by the above-mentioned preparation method, referring to Figure 1 As shown, including:

[0058] Single crystal substrate 1;

[0059] A single crystal back gate electrode 2 is located on the single crystal substrate 1;

[0060] A single crystal gate dielectric layer 3, which is made of a single crystal ferroelectric oxide thin film and is located on the single crystal back gate electrode 2; and

[0061] The semiconductor channel layer 4 is located on the single crystal gate dielectric layer 3 .

[0062] The designed ferroelectric memory and its preparation method are schematically described below. It should be noted that the example description is only a specific embodiment of the present invention and cannot limit the protection scope of the present invention.

[0063] Example 1

[0064] refer to Figure 1As shown, a single crystal strontium titanate film is used as a single crystal substrate 1, and a pulsed laser deposition (PLD) device is used to deposit and grow a single crystal lanthanum strontium manganese oxide film La on the single crystal strontium titanate film SrTiO3 (001). 0.3 Sr 0.7 MnO3 (LSMO) is used as the single crystal back gate electrode 2, wherein the growth conditions of the single crystal LSMO film are specifically as follows: temperature 700°C, oxygen pressure 10 -4 Torr, energy 0.8 J / cm 2 A single crystal barium titanate film BaTiO3 (BTO) is grown on the single crystal lanthanum strontium manganese oxide film using a laser pulse deposition device as the single crystal gate dielectric layer 3, wherein the growth conditions of the single crystal BTO film are a temperature of 700°C and an oxygen pressure of 10 -4 Torr, energy 1.2J / cm 2 .

[0065] The nano-silicon film 13 is transferred as the semiconductor channel layer 4 onto the single crystal gate dielectric layer 3 to prepare a ferroelectric memory.

[0066] Figure 5A to Figure 5C Diffraction spot patterns of reflection high energy electron diffraction (RHEED) of single crystal strontium titanate thin film, single crystal lanthanum strontium manganese oxide thin film and single crystal barium titanate thin film provided in the embodiments of the present invention.

[0067] refer to Figure 5A , Figure 5B , Figure 5C As shown, the diffraction spot patterns of reflection high energy electron diffraction (RHED) indicate that the prepared single crystal strontium titanate film, single crystal lanthanum strontium manganese oxide film, and single crystal barium titanate film are all single crystals with smooth surface morphology.

[0068] Figure 6 The fatigue properties test results of the single crystal barium titanate film provided in the embodiment of the present invention.

[0069] refer to Figure 6 As shown in the figure, the durability characteristics of the single crystal barium titanate film provided by the embodiment of the present invention are as follows: 10 After 10 pulse cycles, it still maintains a relatively stable state, which shows that after 10 10 After writing and erasing, the residual polarization value is still close to the initial state; Figure 6 The horizontal axis represents the number of pulse voltage cycles. Figure 6 The vertical axis represents the residual polarization intensity.

[0070] Comparative Example 1

[0071] The polycrystalline ferroelectric hafnium dioxide film commonly used in the related art is used as a gate dielectric layer, and the polycrystalline ferroelectric hafnium dioxide film is deposited on a semiconductor channel layer to prepare a ferroelectric memory.

[0072] Figure 7A~Figure 7B The figure shows the fatigue property test results of polycrystalline ferroelectric hafnium dioxide thin films in the related art.

[0073] refer to Fig. 7A , Figure 7B As shown in the figure, the durability of the polycrystalline hafnium dioxide film widely used in the related art is about 10 7 Up to 10 8 After the first cycle, the residual polarization value has dropped significantly, and the residual polarization value indicates the ability to retain data after the electric field is removed, which is an important indicator for measuring the non-volatile performance of ferroelectric memory. Fig. 7A The horizontal axis Voltage represents the voltage, and the vertical axis P represents the polarization intensity; Figure 7B The horizontal axis represents the number of cycles, and the vertical axis Pr represents the residual polarization intensity.

[0074] According to Example 1 and Comparative Example 1, the durability characteristics of the single-crystalline barium titanate film provided by the present invention are significantly improved by an order of magnitude compared to the polycrystalline ferroelectric hafnium dioxide film.

[0075] Comparative Example 2

[0076] A polycrystalline lead zirconate titanate (PZT) film commonly used in related technologies is used as a gate dielectric layer, and a polycrystalline lead zirconate titanate film is deposited on a semiconductor channel layer to prepare a ferroelectric memory.

[0077] Figure 8 The figure is a comparison chart of the on-state current retention performance of a ferroelectric memory using a polycrystalline lead zirconate titanate film as a gate dielectric layer in the related art and a ferroelectric memory using a single crystal ferroelectric oxide film as a gate dielectric layer provided by an embodiment of the present invention.

[0078] refer to Figure 8 As shown, a ferroelectric memory using a polycrystalline PZT film commonly used in the related art as a gate dielectric layer is 3 After 10 s of operation time, the on-state current of the ferroelectric memory drops significantly. 4After 10 s of working time, the on-state current remains stable without a significant decrease, and the retention time is about 10 years according to the linear extrapolation relationship under logarithmic coordinates. Compared with the ferroelectric memory using polycrystalline PZT thin film as the gate dielectric layer, the ferroelectric memory of the embodiment of the present invention has a better on-state retention characteristic; wherein the on-state retention characteristic is the data retention time when the external electric field is removed after the data is written, and the retention capacity is an important feature that highlights the non-volatility of the ferroelectric memory. It can be seen from the figure that the single crystal gate dielectric material of the present invention has a good improvement and enhancement in the retention capacity; wherein Figure 8 The horizontal axis represents working time. Figure 8 The vertical axis represents the on-state current of the device.

[0079] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for preparing a ferroelectric memory, characterized in that: include: Growing a single crystal back gate electrode (2) on a single crystal substrate (1), and growing a single crystal gate dielectric layer (3) on the single crystal back gate electrode (2), wherein the single crystal gate dielectric layer (3) is made of a single crystal ferroelectric oxide thin film; and The semiconductor channel layer (4) is transferred onto the single crystal gate dielectric layer (3).

2. The preparation method according to claim 1, characterized in that: growing a single crystal back gate electrode on the single crystal substrate using a laser pulse deposition device; And / or, a single crystal ferroelectric oxide thin film is grown on the single crystal back gate electrode using a laser pulse deposition device.

3. The preparation method according to claim 1, characterized in that: The semiconductor channel layer (4) comprises a nano silicon film (13).

4. The preparation method according to claim 3, characterized in that: Transferring the semiconductor channel layer (4) onto the single crystal gate dielectric layer (3) comprises: The silicon dioxide layer (12) of the silicon-on-insulator is removed by hydrofluoric acid etching, and the nano silicon film (13) of the silicon-on-insulator is transferred to the single crystal gate dielectric layer (3) by using a flexible substrate, wherein the silicon-on-insulator comprises, from bottom to top, a silicon substrate (11), a silicon dioxide layer (12), and a nano silicon film (13); and The flexible substrate is removed.

5. The preparation method according to claim 4, characterized in that: The flexible substrate includes a polypropylene carbonate film.

6. The preparation method according to claim 1, characterized in that: Also includes: A source electrode (5) and a drain electrode (6) are respectively formed at two ends of the semiconductor channel layer (4).

7. A ferroelectric memory obtained by the preparation method according to any one of claims 1 to 6, characterized in that: include: Single crystal substrate (1); A single crystal back gate electrode (2) located on the single crystal substrate (1); a single crystal gate dielectric layer (3), the single crystal gate dielectric layer being made of a single crystal ferroelectric oxide thin film and being located on the single crystal back gate electrode (2); and A semiconductor channel layer (4) is located on the single crystal gate dielectric layer (3).

8. The ferroelectric memory according to claim 7, characterized in that: The single crystal substrate (1) comprises a single crystal strontium titanate film, a single crystal neodymium gallate film, a single crystal dysprosium scandate film or a single crystal gadolinium scandate film.

9. The ferroelectric memory according to claim 7, characterized in that: The single crystal back gate electrode (2) comprises a single crystal lanthanum strontium manganese oxide film or a single crystal strontium ruthenate film.

10. The ferroelectric memory according to claim 7, characterized in that: The single crystal ferroelectric oxide film includes a single crystal barium titanate film and a single crystal hafnium oxide film.

Images