Multi-channel high-precision PET circuit acquisition system and use method thereof

Abstract

The invention relates to the technical field of positron emission tomography, in particular to a multi-channel high-precision PET (positron emission tomography) circuit acquisition system and a use method thereof, and the system comprises an FPGA (field programmable gate array) control panel which is used for controlling a bias voltage program-controlled output voltage value, a current program-controlled output voltage value and a current value according to a DAC (digital-to-analog converter) bias voltage value received from an upper computer, the voltage control precision and the current control precision respectively reach uV and uA levels, and DUT board configuration information received from the upper computer is sent to the DUT board; and the DUT board comprises multi-channel high-precision PET circuits, each circuit performs SPI protocol configuration according to DUT board configuration information received from the upper computer, time electric signal information output by the PET detector is acquired by adopting 16 channels, and energy electric signal information output by the PET detector is acquired by adopting 64 channels. The multi-channel high-precision PET circuit acquisition software and the hardware of the control system are portable, the software program of the upper computer is programmable, and the operation is simple and convenient.

Description

Technical Field

[0001] The present invention relates to the technical field of positron emission tomography (PET), and in particular to a multi-channel high-precision PET circuit acquisition system and a use method thereof. Background Art

[0002] PET is one of the most advanced large-scale medical diagnostic imaging technologies today. PET equipment includes PET detectors and readout circuits. PET detectors include crystal arrays, photoelectric conversion arrays or silicon photomultiplier tubes. The principle of PET imaging is: the organism located in the ring-shaped PET detector and injected with imaging agents will produce positrons due to the decay of the tracer, and the positrons and negative electrons will annihilate and emit two pairs of gamma rays moving in opposite directions at 180°. The crystals in the crystal array will convert the received gamma rays into photons, and then convert them into electrical signals through the photoelectric conversion array. The readout circuit collects the pulse time and pulse amplitude of the incoming electrical signal to generate corresponding time and energy signals respectively, so as to determine the specific location and photon energy of the received gamma rays in the crystal array, and then estimate the approximate location and image of the annihilation of the positrons. Through the collection and analysis of a large amount of data, PET image reconstruction is realized, and then a positron emission tomography image is formed.

[0003] The silicon photomultiplier (SiPM) array converts the collected gamma-ray photon signals from lutetium-yttrium oxyorthosilicate scintillation single orystals (LYSO) into electrical signals. At the same time, data is collected through a multi-channel high-precision PET circuit to convert the electrical signals into energy and time signals. After the FPGA collects the energy and time signals of 64 channels, it transmits the data through the JTAG communication protocol and realizes the display of the host computer, thereby estimating the approximate location where the positron annihilation occurs.

[0004] Multi-channel high-precision PET circuits are the core components of PET equipment and imaging systems, and their performance is directly related to the performance of the system. Building an effective multi-channel high-precision PET circuit acquisition system is a prerequisite for accurate evaluation of PET circuits, which has very important guiding significance for designers and users of PET circuits.

[0005] Compared with the traditional acquisition and measurement of PET circuit signals, multi-channel high-precision PET circuits have more channels, more complex functions, and higher precision. The acquisition system has higher and higher requirements for acquisition efficiency and acquisition accuracy. The traditional PET circuit acquisition system cannot meet the system-level test verification, nor can it meet the personalized needs of user human-machine delivery. Summary of the invention

[0006] In order to accurately evaluate the multi-channel high-precision PET circuit, the present invention proposes a multi-channel high-precision PET circuit acquisition system for processing the electrical signals output by the PET detector. The system includes a host computer and a main control board. The main control board includes an FPGA control board, a DUT board, a bias voltage program control, a current program control, an energy acquisition module, and a level conversion, wherein:

[0007] The host computer is used to configure the bias value of bias programming, the current value of current programming, and the SPI channel configuration of the DUT board circuit through the FPGA control board, and collect the data collected by the DUT board through the FPGA control board;

[0008] The FPGA control board is used to control the bias program-controlled output voltage value, control the current program-controlled output voltage value and current value according to the DAC bias value received from the host computer, and send the DUT board configuration information received from the host computer to the DUT board;

[0009] Bias voltage program control, used to provide 6-way bias voltage control for the DUT board according to the configuration information;

[0010] Current program control, used to provide 3-way current source control for the DUT board according to the configuration information;

[0011] The energy collection module is used to perform analog-to-digital conversion on the energy information collected by the DUT board and send the converted information to the host computer through the FPGA control board;

[0012] The DUT board includes multiple high-precision PET circuits. Each circuit is configured with the SPI protocol according to the DUT board configuration information received from the host computer. 16 channels are used to collect the time electrical signal information output by the PET detector, and 64 channels are used to collect the energy electrical signal information output by the PET detector.

[0013] The present invention collects and controls data from the multi-channel high-precision PET circuit, which is the core component of the PET equipment and imaging system. In order to accurately evaluate the multi-channel high-precision PET circuit, a multi-channel high-precision PET circuit acquisition system is built, and a control method for the multi-channel high-precision PET circuit acquisition system is proposed. The host computer VB software is used to independently develop a human-computer interaction interface for register configuration, data acquisition and processing. A 16-bit 16-channel DAC is used to develop a bias voltage program control system; four 16-bit 16-channel ADCs are used to develop an energy collection system; and the above two systems are used to pull the can current to develop a current program control system. Compared with the prior art, the present invention has the following beneficial effects:

[0014] 1. The multi-channel high-precision PET circuit acquisition system of the present invention has the advantages of low cost, simple operation, fast data acquisition and high precision;

[0015] 2. The present invention adopts the USB to URAT communication protocol for SPI configuration, and the PC host computer can perform man-machine delivery in real time, which is convenient for effectively reading and writing the full-channel register and the single-channel register of the PET circuit, reducing the system noise generated during configuration, and reducing the error code and garbled code caused by external interference during circuit SPI configuration, which can improve the efficiency and accuracy of SPI register batch configuration, can quickly realize the debugging of different working modes of the PET circuit, and has better signal quality;

[0016] 3. The present invention has developed a multi-channel high-precision PET circuit bias current control and data acquisition processing system, which fully adopts a human-machine delivery mode, has high visualization, has the ability to collect, monitor and test PET circuit signals online, and has real-time analysis of the position and energy of gamma rays generated in the crystal;

[0017] 4. The present invention has developed a bias voltage program control system, an energy collection system, and a current program control system, respectively. The system control and collection accuracy are high, the voltage control and collection can reach uV level, and the current can reach uA level;

[0018] The acquisition software and control system software of the host multi-channel high-precision PET circuit in the present invention are all independently developed, ensuring the accuracy of multi-channel high-precision PET circuit testing and signal acquisition, with portable hardware and programmable programs, and completely localized. It provides another implementation method and path for the circuit analysis of large-scale medical diagnosis PET imaging technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A system block diagram of a multi-channel high-precision PET circuit acquisition system provided in Example 1 of the present invention;

[0020] Figure 2A register configuration software for a multi-channel high-precision PET circuit acquisition system provided in Example 1 of the present invention;

[0021] Figure 3 A bias current control and data acquisition processing software for a multi-channel high-precision PET circuit acquisition system provided in Example 1 of the present invention;

[0022] Figure 4 Energy collection of a multi-channel high-precision PET circuit collection system provided in Example 1 of the present invention;

[0023] Figure 5 A bias voltage program control for a multi-channel high-precision PET circuit acquisition system provided in Example 1 of the present invention;

[0024] Figure 6 A current process control of a multi-channel high-precision PET circuit acquisition system provided in Example 1 of the present invention;

[0025] Figure 7 This is a flow chart of a multi-channel high-precision PET circuit acquisition system provided in Example 1 of the present invention. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] The present invention proposes a multi-channel high-precision PET circuit acquisition system for processing the electrical signals output by the PET detector. The system includes a host computer and a main control board. The main control board includes an FPGA control board, a DUT board, a bias voltage program control, a current program control, and an energy acquisition module, wherein:

[0028] The host computer is used to configure the bias value of bias programming, the current value of current programming, and the SPI channel configuration of the DUT board circuit through the FPGA control board, and collect the data collected by the DUT board through the FPGA control board;

[0029] The FPGA control board is used to control the bias program-controlled output voltage value, control the current program-controlled output voltage value and current value according to the DAC bias value received from the host computer, and send the DUT board configuration information received from the host computer to the DUT board;

[0030] Bias voltage program control, used to provide 6-way bias voltage control for the DUT board according to the configuration information;

[0031] Current program control, used to provide 3-way current source control for the DUT board according to the configuration information;

[0032] The energy collection module is used to perform analog-to-digital conversion on the energy information collected by the DUT board and send the converted information to the host computer through the FPGA control board;

[0033] The DUT board includes multiple high-precision PET circuits. Each circuit is configured with the SPI protocol according to the DUT board configuration information received from the host computer. 16 channels are used to collect the time electrical signal information output by the PET detector, and 64 channels are used to collect the energy electrical signal information output by the PET detector.

[0034] like Figure 1 In this embodiment, a multi-channel high-precision PET circuit acquisition system includes a PC host computer, a power supply, a LYSO+SiPM detector, and a main control board. The main control board also includes a level converter, a DUT board, a bias program control, an energy collection, a current program control, and an FPGA control board. The PC host computer is used for bias and current control, data collection and processing, and register configuration, wherein:

[0035] PC host computer, used for bias and current control, data acquisition and processing, and register configuration;

[0036] Power supply, used to provide high voltage power to the LYSO+SiPM detector and power the main control board;

[0037] The main control board is used for bias and current control, register configuration, and data transmission through the JTAG communication protocol after collecting 64 channels of energy and time signals, and realizing the upper computer display;

[0038] Level conversion, used to power the main control board, the PET circuit of the DUT board and the FPGA control board;

[0039] The DUT board is used to place multi-channel high-precision PET circuits. It is fixed with a fixture to facilitate multiple placements. It collects time and energy from the electrical signals of the PET detector (LYSO+SiPM detector) and outputs them using 16 channels and 64 channels respectively. At the same time, the collected energy is output to the energy collection module through the 64 channels, and the collected time TDC is transmitted to the FPGA.

[0040] Bias voltage programming is used to provide 6-way bias voltage control for the multi-channel high-precision PET circuit in the DUT board;

[0041] Energy harvesting, used to convert the energy collected by the multi-channel high-precision PET circuit into analog-to-digital signals and output the converted digital signals to the FPGA;

[0042] Current process control is used to provide 3-way current source control for the multi-channel high-precision PET circuit in the DUT board, which is achieved by pulling the current through the load resistor R;

[0043] The FPGA control board is used to realize the collection of energy and time signals, timing control, register configuration, and communication with the host computer; the FPGA control board also includes a crystal oscillator, Nor Flash, FPGA, and JTAG, wherein: the crystal oscillator is used to provide a 50MHz clock signal to the FPGA; the Nor Flash is used to perform SPI initialization configuration on the PET circuit through the FPGA after power-on; the JTAG is used to convert the collected signals through the JTAG communication protocol, and transmit the converted signals to the host computer, which collects, processes and displays the uploaded signals.

[0044] This embodiment uses the USB to URAT communication protocol for SPI configuration. The PC host computer develops a human-computer interaction interface for register configuration through VB software, which is convenient for effective reading and writing of all registers and single-channel registers of the PET circuit, and can batch import SPI configuration files to the FPGA control board. The FPGA control board then batch configures the registers inside the PET circuit, which can quickly debug different working modes of the PET circuit and facilitate personalized configuration and control. The register values ​​inside the circuit can also be read back in batches through the FPGA control board and displayed on the PC human-computer interaction interface. The data transmission mode also includes frame-by-frame transmission and package transmission, which improves the efficiency and accuracy of batch configuration of SPI registers of the PET circuit;

[0045] Similarly, in this embodiment, the PC host computer independently develops a data acquisition and processing system through VB software, which can control the bias voltage and current of the PET circuit; by setting the method of acquiring and processing the time TDC and energy Energy data of the PET circuit, batch data output and storage are performed; and the time TDC (ps) and energy (pC) of the 64 channels of the PET circuit can be collected and displayed separately. Therefore, the specific location and energy size of the crystal gamma ray can be accurately determined.

[0046] In the present invention, a LYSO crystal array and a SiPM array optical coupling agent are coupled to each other to form a PET detector. The LYSO crystal array is used to contact and interact with γ photons, depositing part or all of the energy of high-energy γ photons in the crystal. After being excited by the high-energy γ photons, the crystal releases excess energy in the form of low-energy such as visible light. The SiPM array is used to convert the received visible light photons into electrical signals and current pulse signals through a photoelectric conversion array.

[0047] The bias voltage program control system of the present invention uses a 16-bit 16-channel output AD5360BSTZ (hereinafter referred to as DAC) as the core to develop the bias voltage program control system, which provides a driving voltage to the analog input end of the PET circuit and also provides one high-power and two high-precision voltage outputs.

[0048] The energy collection module of the present invention uses four 16-bit 16-channel AD7616BSTZ (hereinafter referred to as ADC) to perform digital-to-analog conversion on the high-precision 64-channel PET circuit. The FPGA samples the code value output by the ADC to calculate the energy output by the PET circuit.

[0049] The current program control system uses the above-mentioned energy collection system and bias program control system. The analog output ports of the multi-channel high-precision PET circuit are connected to the energy collection system and the resistor R respectively. The ADC in the energy collection system performs analog-to-digital conversion on the collected analog signal VIN (energy) to generate the corresponding digital signal CODE. The FPGA calculates the received digital signal CODE according to the current value set by the host computer to obtain the code value of the DAC bias program control, and transmits the code value to the DAC of the bias program control system, thereby obtaining different bias voltages. The bias program control system outputs the output bias voltage to one end VREF of the resistor R and the analog input port of the PET circuit respectively.

[0050] Next, in this embodiment, a multi-channel high-precision PET circuit acquisition system and a method for using the same are further described through several embodiments of the present invention.

[0051] Example 1

[0052] like Figure 1 As shown, a multi-channel high-precision PET circuit acquisition system and its control method include a PC host computer, a power supply, a LYSO+SiPM detector, and a main control board. The main control board also includes an FPGA control board, a bias voltage program control, a DUT board, energy collection, and a level conversion, wherein:

[0053] The PC host computer includes bias and current control, data acquisition and processing, and register configuration. The bias and current control is used to put the DAC bias value required in the DUT board into the bias register of the FPGA through the UART communication protocol. Data acquisition and processing is used to collect and process data with the FPGA through the JTAG interface and then display it, and obtain the 64-channel time TDC and energy Energy data collected by the PET circuit. The register configuration is used to transmit the generated circuit register configuration file to the UART to SPI module in the FPGA control board through the UART communication protocol. The UART to SPI module converts the UART data into SPI data; the converted SPI data is used to perform SPI configuration on the multi-channel high-precision PET imaging circuit in the DUT board, and the working mode of different channels of the circuit is started. The URAT control end adopts the CP2102 circuit to realize USB to UART conversion, and uses the DuPont line to connect and communicate with the FPGA interface.

[0054] The power supply is used to provide high voltage power to the LYSO+SiPM detector. The power supply uses the IT6332B multifunctional three-way power supply with a maximum output voltage of 30V and a maximum output current of 6A. 28V is used to power the SiPM detector, and 5V is used to power the main control board.

[0055] LYSO+SiPM detector, in the PET system, the scintillation crystal array LYSO and the photoelectric conversion device SiPM are coupled to each other through optical coupling agents such as silicone oil or silicone grease to form a PET detector. After the positron is annihilated in the body, two γ photons will be generated. The scintillation crystal array first contacts and interacts with the γ photons (including Compton effect and photoelectric effect, etc.), and deposits part or all of the energy of the high-energy γ photons in the crystal. The electrons in the crystal excited by the high-energy γ photons undergo a transition from the ground state to the excited state, and finally return from the excited state to the ground state, and release the excess energy in the form of low energy such as visible light. The light emitted by LYSO generally has multiple wavelengths, and the number of photons of different wavelengths is also different. The emission spectrum of LYSO refers to the distribution law between the number of photons emitted by the crystal and the wavelength. Different scintillation crystals have different spectral characteristics. The PET circuit imaging system requires that the peak of the emission spectrum of LYSO can match the peak of the spectral response of the photoelectric device SiPM detector coupled to it, so as to improve the detection sensitivity of the system.

[0056] The main control board collects the energy and time signals of 64 channels and converts the data through the JTAG communication protocol, and realizes the upper computer display, so as to determine the specific position and time of the crystal receiving the gamma ray, and then estimate the approximate position where the positron annihilates. The main control board also includes level conversion, DUT board, bias programming, energy collection, current programming, and FPGA control board, among which:

[0057] Level conversion, the 5V voltage provided by the power supply is converted to 3.3V through the high-current LDO circuit LT1764EQ-3.3V, and then converted to 1.2V through the high-precision high-current LDO circuit LT3083. 3.3V and 1.2V are used to power the multi-channel high-precision PET circuit and FPGA of the DUT board at the same time.

[0058] DUT board, multi-channel high-precision PET circuit uses a self-designed 64-channel photoelectric detection front-end dedicated integrated readout circuit (hereinafter referred to as PET circuit). When the 8*8 array SiPM converts the input optical signal into an electrical signal, the FPGA provides a 100MHz LVDS data format clock and control timing to the PET circuit, and configures the circuit SPI register. At the same time, the DAC provides a bias voltage to the PET circuit, so that after the PET circuit works normally, the 64 channels of electrical signals output by the LYSO+SiPM detector are respectively collected in time and energy. The PET circuit outputs the collected 64 channels of energy to the energy collection module, and directly transmits the collected time TDC to the FPGA.

[0059] Bias voltage programming, in order to provide 6-way bias voltage control for the multi-channel high-precision PET circuit in the DUT board, and provide one high-power and two high-precision bias voltage control. The 16-channel output 16-Bit AD5360BSTZ (hereinafter referred to as DAC) is selected for bias voltage programming, of which the 5V reference voltage of the DAC is provided by the high-precision AD584, and the DC / DC-WRA-_YMD-6W (DC / DC module, realizing +5V to ±15V) is selected to provide ±15V voltage for the DAC. At the same time, one output of the DAC needs to be connected to the OPA544F high-power operational amplifier to improve the output driving capability, and the 2 outputs of the DAC need to be connected to the LT6231CS8 high-precision operational amplifier to improve the output voltage accuracy.

[0060] Energy harvesting, converting the energy collected by the PET circuit into analog-to-digital signals, and outputting the converted digital signals to the FPGA. The AD7616BSTZ (hereinafter referred to as ADC) is selected. It has a built-in dual-channel 16-bit DAS, can process bipolar input signals, and dual-channel synchronous sampling, thus supporting dual-channel synchronous sampling of 16 channels. The ADC is powered by a single 5V power supply. At the same time, each pair of channels can have a throughput rate of up to 1Msps. ADR421ARZ is selected to provide the reference voltage for the ADC. Since the PET circuit has 64 channels for energy output and an energy harvesting module has only 16 acquisition channels, 4 ADC modules are used for acquisition.

[0061] Current programming, in order to make the multi-channel high-precision PET circuit in the DUT board provide 3-way current source control, is implemented by pulling the current through the load resistor R. First, the FPGA obtains the code value of the 16-bit ADC of the energy harvesting system, calculates the voltage value VIN at one end of the load resistor, and then uses the FPGA to output the code value to the bias programming system, and then the bias programming system outputs the voltage value VREF, and finally the required load current value is obtained through the formula IREFT = ± (VIN-VREF) / R.

[0062] FPGA control board, which realizes the acquisition of energy and time signals, timing control, register configuration, and communication with the host computer. The FPGA control board also includes crystal oscillator, Nor Flash, FPGA, and JTAG, including:

[0063] Crystal oscillator, use a 50MHz active crystal oscillator to provide the clock signal to the FPGA.

[0064] Nor Flash uses SM25QH256M 256Mbits SPI Flash non-volatile serial Nor Flash memory to store hundreds of default register values ​​of the ASIC circuit, so that the ASIC circuit can be initialized and configured by SPI through FPGA after power-on.

[0065] FPGA is the core part of the whole multi-channel high-precision PET circuit acquisition system. The UART to SPI module in the FPGA is used to transmit the UART control end of the host computer to the UART to SPI module in the FPGA control board through the UART communication protocol. The UART to SPI module converts the UART data into SPI data, and uses the converted SPI data to perform SPI configuration on the multi-channel high-precision PET circuit in the DUT board, and enables different functions according to different register configurations. The UART control end and the NorFlash memory are both circuit register configurations, but the difference between them is that the UART control end implements the human delivery interface, and performs personalized configuration and modification on the circuit, while the Nor Flash automatically completes the initialization configuration of the circuit after a short wait after power-on. The bias register in the FPGA is used to store the DAC bias value transmitted from the PC host computer bias and the current control end. The FPGA then controls it according to the communication protocol of the AD7616BSTZ, outputs the corresponding bias value, and simultaneously collects the energy signal and time TDC signal output from the multi-channel high-precision PET circuit.

[0066] JTAG, FPGA converts the collected signals into JTAG communication protocol, and inputs the converted signals into the PC host computer, which collects, processes and displays the uploaded signals.

[0067] Example 2

[0068] like Figure 2 As shown, in order to achieve the above purpose, the present invention provides a register configuration software for a multi-channel high-precision PET circuit acquisition system. The functions are as follows:

[0069] Open the "Multi-channel high-precision PET circuit register configuration system" according to the PC host computer register configuration. When configuring, the software client can display and view the type and model of the connected FPGA board; and select the data length when configuring the register; select the sending method when sending data, there are two methods: "frame-by-frame sending" and "package sending"; select the storage path of the configuration use case from the PC host computer's memory, and display it in the "UART Receive" window after UART readback; you can choose the full register configuration of the multi-channel high-precision PET circuit and the shortcut to full register readback; you can also choose the single-channel register configuration of the PET circuit. The software configuration end is as follows Figure 2 As shown, they are marked with dotted lines, where:

[0070] ①Realize the connection of URAT to the serial port com port and display the baud rate. The box displays the type and model of the connected FPGA board;

[0071] ②Realize the selection of the import register configuration use case path. The path can be the path of the batch registers saved in the PC;

[0072] ③Control the data length of the imported configuration case in bytes;

[0073] ④When sending data, you can choose the sending method, there are two methods: "send frame by frame" and "send in packages";

[0074] ⑤Display the data after importing the configuration use case;

[0075] ⑥UART reads back and displays the register value;

[0076] ⑦ Select the shortcut method for full register configuration and full register readback of multi-channel high-precision PET circuit;

[0077] ⑧ Select the PET circuit (ASIC) single channel register configuration selection, you can select 64 channels; TIA gain attenuation value; current adjustment range (0 ~ 255mA); single channel register configuration; register reset option.

[0078] The present invention adopts the communication protocol of USB to URAT for SPI configuration, and the PC host computer can realize human-machine delivery, which is convenient for effectively reading and writing the full-channel register and the single-channel register of the PET circuit, reducing the system noise generated during configuration, and can quickly realize the debugging of different working modes of the PET circuit, with a good signal-to-noise ratio, so that the PET circuit can accurately collect the specific position and time information of the gamma ray generated in the crystal. The present invention reduces the situation of bit errors and garbled codes generated by external interference in the PET circuit during SPI configuration, and can improve the efficiency and accuracy of SPI register configuration. The PET circuit acquisition system of the present invention has online acquisition, monitoring, and testing capabilities, and can improve the efficiency of batch configuration.

[0079] Example 3

[0080] like Figure 3 As shown, in order to achieve the above purpose, the present invention provides a bias current control and data acquisition processing software for a multi-channel high-precision PET circuit acquisition system. The bias and current of the PET circuit can be controlled; the acquisition and processing method of the time TDC and energy Energy data of the PET circuit can be selected; the time TDC and energy Energy of the 64 channels of the PET circuit are collected and displayed respectively. The working modes and functions of the multi-channel high-precision PET circuit bias control and data acquisition processing system are as follows, marked with dotted lines:

[0081] ① Get the 64-channel time TDC and energy data collected by the PET circuit, and choose to save it in the corresponding location, the time of data collection, and the opening and closing of the trigger mode;

[0082] ②Process the original time TDC and energy Energy data collected by the PET circuit, select the output positions of the original data and the processed data, and select the data conversion mode and data processing percentage. The output format after processing can be Binary, Octal, Dec, Hex, etc.

[0083] ③ Bias control for multi-channel high-precision PET circuits. The voltage value can be set from 0 to 3.3V to control the reference voltages of VREF_BG_EXT, VREF_SEL, VREF_BG, VREF_SHAPER, VREF_BLH, and VREF_INT respectively.

[0084] ④ The current value of 0~100mA can be set for the multi-channel high-precision PET circuit. The series resistor mode is used here to control the external voltage value, so as to realize the current pull-in function, and respectively realize the control of the pull-in current of IBIAS_EXT, IREFT_ST, IREFT_IN, etc.;

[0085] ⑤ Collect and display the time TDC (in ps) of 64 channels of the high-precision PET circuit respectively;

[0086] ⑥ Collect and display the energy (in pC) of the 64 channels of the high-precision PET circuit respectively.

[0087] The present invention adopts the USB to URAT communication protocol to control bias voltage and current, adopts JTAG to collect and process FPGA data, and realizes human-machine delivery, and displays and controls the energy and time of 64 channels of the PET circuit respectively. The present invention has good human-machine interaction function for the control and collection of multi-channel high-precision PET circuits, has real-time performance for PET circuit analysis, and has different modes of selection for data collection and processing.

[0088] Example 4

[0089] like Figure 4 As shown, in order to achieve the above purpose, the present invention provides an energy collection system for a multi-channel high-precision PET circuit collection system. The energy Energy (i.e., input voltage VIN) of the 64 channels of the PET circuit is collected separately, and the energy collection module performs analog-to-digital conversion on the energy collected by the PET circuit, and outputs the converted CODE to the FPGA through the control timing. The specific circuits and circuit functions are as follows:

[0090] The energy collected by the PET circuit is converted into analog-to-digital. The AD7616BSTZ (hereinafter referred to as ADC) is selected. It has a built-in dual-channel 16-bit DAS, can process bipolar input signals, and dual-channel synchronous sampling, and thus supports dual-channel synchronous sampling of 16 channels. At the same time, each pair of channels can have a throughput rate of up to 1Msps; AMS1117-3.3V is selected to provide pull-up voltage for ADC; ADR421ARZ high-precision low-noise reference level is selected to provide 2.5V reference voltage for ADC; 40-pin spacing 2.54mm dual-in-line connector is selected as the adapter to connect the energy collection module and the FPGA main control board. The control of the energy collection module by FPGA and the reading of digital signals are realized through this adapter. Since the PET circuit has 64 channels for energy output and an energy collection module has only 16 collection channels, 4 ADC modules are used for collection.

[0091] The code value calculation of ADC sampling is shown in formula (1):

[0092]

[0093] Among them, VIN is the input voltage; REFINOUT is the reference voltage. In this embodiment, ADR421ARZ is selected to provide a 2.5V reference voltage; Vrag is the full-scale range of the actual energy input, which can be set to ±10V, ±5V, ±2.5V, and is configured to the ADC through the control timing of the FPGA; CODE is the code value output by the AD, that is, the code value obtained by the FPGA sampling ADC. In order to obtain the corresponding input voltage, the input voltage value, that is, the energy output by the PET circuit, can be obtained through formula (1). The energy calculation is shown in formula (2):

[0094]

[0095] Example 5

[0096] like Figure 5 As shown, in order to achieve the above purpose, the present invention provides a bias control system for a multi-channel high-precision PET circuit acquisition system. The driving voltage is provided for the PET circuit, and the program control and display are performed through the visual interface of the host computer so that the circuit can work normally. One high-power and two high-precision voltage outputs are also provided. The specific selected circuits and circuit functions are as follows:

[0097] Bias voltage programming: In order to provide 6-way bias voltage control for the multi-channel high-precision PET circuit in the DUT board, the module uses a 16-bit 16-channel output 16-Bit AD5360BSTZ (hereinafter referred to as DAC) as the core device. FPGA writes control timing through LDAC_DA, RESET_DA, SYNC_DA, SCLK_DA, and SDI_DA ports to perform bias voltage programming. The Ref_5V reference voltage of the ADC is provided by the high-precision AD584, and the DC / DC-WRA-_YMD-6W (DC / DC module, realizing +5V to ±15V) is selected to provide ±15V voltage for the DAC. At the same time, one output of the DAC needs to be connected to the OPA544F high-power op amp to improve the driving capability of the output to the PET circuit, and the two outputs of the DAC need to be connected to the LT6231CS8 high-precision op amp to improve the voltage accuracy of the output to the PET circuit.

[0098] The calculation of bias control is shown in formula (3):

[0099]

[0100] Among them, VREF is the output bias voltage, Ref_5V is the reference voltage 5V, and DAC_CODE is the control code value of the DAC. In order to obtain the corresponding output voltage, the corresponding DAC control code value can be obtained through formula (3), that is, the code value output by FPGA to control the DAC, and the calculation is shown in formula (4):

[0101]

[0102] Example 6

[0103] like Figure 6 As shown, in order to achieve the above purpose, the present invention provides a current program control system for a multi-channel high-precision PET circuit acquisition system. Provide three load currents to the PET circuit, and program control and display through the upper computer visual interface so that the circuit can work normally. The structure and function of the load current program control are shown in FIG. Figure 6 As shown, the analog output port of the multi-channel high-precision PET circuit is connected to the energy collection system and the resistor R respectively. The energy collection system converts the collected analog signal VIN (i.e., energy) into a digital signal to generate a corresponding digital signal CODE. The specific conversion process is shown in Example 4. The FPGA calculates the received digital signal CODE according to the current value set by the host computer to obtain the code value of the program-controlled DAC bias output. The specific conversion process is shown in Example 5. The bias program control system outputs the output voltage to one end VREF of the resistor R and the analog input port of the PET circuit respectively. Among them, -IREFT represents the current value IREFT pulled out of the PET circuit, and +IREFT represents the current value IREFT injected into the PET circuit.

[0104] The calculation of current process control is shown in formula (5):

[0105]

[0106] Among them, IREFT is the program-controlled current. In this embodiment, the program-controlled current can be set through the upper computer interface, and the FPGA automatically generates the code value for controlling the DAC through the program-controlled current; ± is the direction of the pull-in current; R is the resistance value, which is 10k here; VIN is the voltage value output when the PET circuit port is unloaded, and the VIN value here is obtained by sampling the AD7616BSTZ in the above-mentioned embodiment 4; VREF is the program-controlled voltage value calculated according to the load current applied after the resistance value of 10k is connected. Substituting VIN in the above formula (2) and VREF in the formula (3) into formula (5), we can get:

[0107]

[0108] Among them, REFINOUT is the reference voltage of AD7616BSTZ, and ADR421ARZ is selected here to provide a 2.5V reference voltage; CODE is the code value output by AD7616BSTZ after sampling the VIN value; Vrag is the full-scale range of the actual energy input of the PET circuit; Ref_5V is the reference voltage of 5V; DAC_CODE is the control code value of AD5360BSTZ. In order to obtain the corresponding load current, the corresponding control code value of AD5360BSTZ can be obtained through formula (6), that is, the code value output by FPGA to control AD5360BSTZ, as shown in formula (7):

[0109]

[0110] Example 7

[0111] like Figure 7 As shown, in order to achieve the above-mentioned purpose, the present invention provides a flow chart of a multi-channel high-precision PET circuit acquisition system. The flow chart includes the following steps:

[0112] Step 1: Build a multi-channel high-precision PET circuit acquisition system

[0113] According to the system block diagram of Example 1, a multi-channel high-precision PET circuit acquisition system is built. The acquisition system is placed in a fixed position, connected to the JTAG port of the FPGA control board, and connected to the URAT control end (including register configuration, bias and current control). The control end uses a CP2102 circuit and uses a DuPont line to connect and communicate with the FPGA interface. At the same time, a high-density connection line is used to connect the LYSO+SiPM detector to the main control board.

[0114] Step 2:

[0115] Turn on the prepared power supply and supply power to the main control board and LYSO+SiPM detector respectively to see if the system works normally. If the power-on is abnormal, repeat the operation of step 1 until the system is built normally.

[0116] Step 3:

[0117] When the FPGA control board is successfully powered on, after waiting for a few seconds, the SM25QH256M type 256Mbits SPI Flash non-volatile serial Nor Flash memory is initialized and configured by SPI through the FPGA, so that the multi-channel high-precision PET circuit can work normally. Then, the generated circuit register configuration file is transmitted to the UART to SPI module in the FPGA control board through the UART communication protocol through the register configuration end in the host computer, and the UART to SPI module converts the UART data into SPI data; the converted SPI data is used to perform SPI channel configuration on the multi-channel high-precision PET circuit in the DUT board, and the circuit 64 channels are started in different working modes. Then, the voltage and current values ​​of the DAC to be controlled are transmitted to the bias register in the FPGA control board through the bias and current control end in the host computer through the UART communication protocol. The FPGA calculates the value of the bias register and outputs the code value of the control DAC, respectively realizing the control of the bias program control and current program control modules, thereby realizing the application of voltage and current to the analog input and output ports of the multi-channel high-precision PET circuit. If the system does not receive the control instruction or the control is unsuccessful, you can wait for 50ms to repeat the above operation.

[0118] Step 4:

[0119] Through the host computer human-machine delivery interface, as shown in Example 3, select the data acquisition and processing method. The multi-channel high-precision PET circuit transmits the time TDC of the LYSO+SiPM detector to the FPGA, and transmits the collected energy signal to the energy collection system. The energy collection system performs analog-to-digital conversion through the ADC and transmits the converted energy digital signal to the FPGA. The FPGA transmits the energy and time TDC to the data acquisition and processing interface of the host computer through the JTAG port for display. Repeat step 4 until all data are collected and analyzed.

[0120] The present invention adopts UART communication protocol, and the host computer realizes visual SPI configuration through the UART port, and the data transmission has the advantages of fast data transmission and large data volume. When the PET circuit works normally, the data is transmitted back to the JTAG port of FPGA, and the JTAG port is transmitted back to the host computer. The PC develops a human-computer interaction interface to realize the dynamic real-time display of time and energy.

[0121] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A multi-channel high-precision PET circuit acquisition system for processing electrical signals output by a PET detector, characterized in that: The system includes a host computer and a main control board, wherein the main control board includes an FPGA control board, a DUT board, a bias voltage program control, a current program control, and an energy collection module, wherein: The host computer is used to configure the bias value of bias programming, the current value of current programming, and the SPI channel configuration of the DUT board circuit through the FPGA control board, and collect the data collected by the DUT board through the FPGA control board; The FPGA control board is used to control the bias program-controlled output voltage value, control the current program-controlled output voltage value and current value according to the DAC bias value received from the host computer, and send the DUT board configuration information received from the host computer to the DUT board; Bias voltage program control, used to provide 6-way bias voltage control for the DUT board according to the configuration information; Current program control, used to provide 3-way current source control for the DUT board according to the configuration information; The energy collection module is used to perform analog-to-digital conversion on the energy information collected by the DUT board and send the converted information to the host computer through the FPGA control board; The DUT board includes multiple high-precision PET circuits. Each circuit is configured with the SPI protocol according to the DUT board configuration information received from the host computer. 16 channels are used to collect the time electrical signal information output by the PET detector, and 64 channels are used to collect the energy electrical signal information output by the PET detector.

2. A multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that: The LYSO crystal array and SiPM array optical coupling agents are coupled to each other to form a PET detector. The LYSO crystal array is used to contact and interact with gamma photons, depositing part or all of the energy of high-energy gamma photons in the crystal. After being excited by the high-energy gamma photons, the crystal releases the excess energy in the form of low-energy such as visible light. The SiPM array is used to convert the received visible light photons into electrical signals through the photoelectric conversion array.

3. A multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that: The process of the host computer configuring the bias value of bias programming and the current value of current programming through the FPGA control board includes: transmitting the DAC bias value to the FPGA control board through the UART communication protocol, storing the DAC bias value in the register of the FPGA control board, and controlling the bias programming and current programming through the DAC communication protocol, so that the bias programming and current programming output corresponding bias and current.

4. A multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that: The process of the host computer configuring the SPI channel configuration of the DUT board circuit through the FPGA control board includes: sending the SPI channel configuration of the DUT board circuit to the FPGA control board through the UART communication protocol, the FPGA control board converts the SPI channel configuration into an SPI format, and sends the SPI channel configuration information of the DUT board circuit after the format conversion to the DUT board circuit, and the DUT board circuit configures each channel according to the information.

5. A multi-channel high-precision PET circuit acquisition system according to claim 1, characterized in that: The energy collection module generates the corresponding digital signal CODE by performing analog-to-digital conversion based on the analog signal collected from the analog output port of the multi-channel high-precision PET circuit. The FPGA control board calculates the digital signal CODE according to the current value set by the host computer to obtain the code value of the DAC bias programming, and transmits the code value to the DAC of the bias programming to obtain different bias voltages. The obtained bias voltage acts on the resistor between the analog output port of the multi-channel high-precision PET circuit and the bias programming to obtain the current value of the current programming.

6. A multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that: The energy collection module performs digital-to-analog conversion based on the analog signal collected from the analog output port of the multi-channel high-precision PET circuit to generate the corresponding digital signal CODE, including: Among them, VIN is the input voltage, that is, the energy electrical signal collected from the analog output port of the multi-channel high-precision PET circuit; Vrag is the full-scale range of the actual energy input; REFINOUT is the reference voltage, and CODE is the code value obtained by FPGA sampling ADC.

7. A multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that: The FPGA control board calculates the digital signal CODE according to the current value set by the host computer to obtain the code value of the DAC bias programming, including: Among them, DAC_CODE is the code value of DAC bias programming; Vrag is the full-scale range of actual energy input; REFINOUT is the first reference voltage; IREFT is the programming current; R is the resistance value of the resistor between the analog output port of the multi-channel high-precision PET circuit and the bias programming; Ref is the reference voltage of bias programming.

8. The multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that: The code value is transmitted to the bias-programmed DAC to obtain different bias voltages. The process includes: Among them, Ref is the reference voltage of bias voltage programming, and DAC_CODE is the code value of DAC bias voltage programming.

9. The multi-channel high-precision PET circuit acquisition system according to claim 5, characterized in that: The bias voltage acts on the resistor between the analog output port of the multi-channel high-precision PET circuit and the bias voltage program control, and the process of obtaining the current value of the current program control includes: Among them, IREFT is the current value obtained by current programming; Ref is the reference voltage of bias programming, DAC_CODE is the code value of DAC bias control; CODE is the code value obtained by FPGA sampling ADC; Vrag is the full-scale range of actual energy input; REFINOUT is the reference voltage of the energy collection module; R is the resistance value of the resistor between the analog output port of the multi-channel high-precision PET circuit and the bias control.

10. A method for using a multi-channel high-precision PET circuit acquisition system, characterized in that: The method is used to implement the use of the multi-channel high-precision PET circuit acquisition system described in claim 1, specifically comprising the following steps: When the FPGA control board is powered on, the DUT board is initialized and configured through the SPI configuration information stored locally, so that the multi-channel high-precision PET circuit can work normally; The generated circuit register configuration file is transmitted to the UART to SPI module in the FPGA control board through the UART communication protocol by the register configuration terminal in the host computer, and the UART to SPI module converts the UART data into SPI data; Use the converted SPI data to configure the SPI channels of the multi-channel high-precision PET circuit in the DUT board, and start the circuit's 64 channels in different working modes; The voltage and current values ​​of the DAC to be controlled are transmitted to the bias register in the FPGA control board through the bias and current control terminals in the host computer via the UART communication protocol. The FPGA calculates the value of the bias register and outputs the code value of the control DAC to respectively control the bias program control and current program control modules, thereby applying voltage and current to the analog input and output ports of the multi-channel high-precision PET circuit. If the system does not receive the control command or the control is unsuccessful, you can wait for 50ms and repeat the above operation; The data acquisition and processing method is selected through the host computer human-machine delivery interface; the multi-channel high-precision PET circuit transmits the time information of the PET detector to the FPGA control board, and transmits the collected energy signal to the energy collection system. The energy collection system performs analog-to-digital conversion through the ADC and transmits the converted energy digital signal to the FPGA control board; The FPGA control board transmits the energy and time TDC to the data acquisition and processing interface of the host computer through the JTAG port for display.

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