Balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation
By designing a high-performance balanced zero-beat detector including multiple signal processing and amplification modules, the problems of bandwidth limitation and insufficient signal-to-noise ratio in the prior art are solved, and efficient quantum random number generation and high-quality random number generation are achieved.
Patent Information
- Application Number
- CN202510075315.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-17
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2045-01-17
AI Technical Summary
The bandwidth of existing balanced zero-beat detectors limits the generation rate of quantum random numbers, and the signal-to-noise ratio and common mode rejection ratio are insufficient, affecting the purity and quality of the random numbers.
A high-performance balanced zero-beat detector composed of a signal processing module and a signal amplification module is designed. Through the photocurrent difference signal generation module, an AC-DC separation module, a cascaded RF AC amplification module and a same-direction proportional amplification DC amplification module are realized to achieve high gain and low noise signal processing and amplification.
The signal-to-noise ratio and common mode rejection ratio of the balanced zero-beat detector are improved, the quantum random number generation rate is enhanced, and the purity and quality of the random number are improved.
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Figure CN119880006A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the field of quantum information technology, and in particular relates to a balanced zero-beat detector for generating high-entropy high-speed continuous variable quantum random numbers. Background Art
[0002] With the rapid development of quantum information technology, balanced zero-beat detectors are very important devices in quantum random number generation. Continuous variable quantum random number generation systems generate random numbers by measuring continuous variables such as the amplitude and phase of the light field. The upper limit of its random number generation rate is determined by the product of quantum minimum entropy and sampling rate. As the scheme to improve the minimum entropy reaches a bottleneck, the limiting factor of the random number generation rate returns to the core issue - sampling rate, and the sampling rate is limited by the bandwidth of the balanced zero-beat detector. Although the orthogonal components of the vacuum state are expressed in the form of shot noise, the bandwidth of its noise power spectrum is theoretically infinite, but the range of the sampling rate is not infinite. According to the Nyquist sampling theorem, when the sampling rate exceeds twice the bandwidth of the balanced zero-beat detector, autocorrelation will appear between the sampling points, which will affect the randomness of the random number. Therefore, the sampling rate is limited by the bandwidth of the balanced zero-beat detector.
[0003] On the other hand, in order to more effectively extract the quantum entropy source based on balanced zero-beat detection, it is necessary not only to further improve the bandwidth of the balanced zero-beat detector, but also to ensure that the signal-to-noise ratio within the bandwidth is greater than 10dB. If the signal-to-noise ratio of the detector is low, more noise will be mixed into the measurement results, which may cause the generated random numbers to be not "random" enough; in order to effectively reduce the influence of noise from electronic equipment or external interference sources and ensure that the detector only responds to the target quantum signal, it is necessary to improve the common-mode rejection ratio of the balanced zero-beat detector. This puts forward more comprehensive requirements on the performance of BHD: high bandwidth (GHz level) is required to increase the generation rate of random numbers, and high signal-to-noise ratio (greater than 10dB) and high common-mode rejection ratio (greater than 25dB) are required to ensure the purity and quality of random numbers. Therefore, research on balanced zero-beat detectors has become increasingly important. Summary of the invention
[0004] In order to solve the problems of low random number generation rate in vacuum state and poor purity and quality of random numbers, the present invention provides a new type of high-performance balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation.
[0005] The technical solution of the present invention is as follows:
[0006] A balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation, consisting of a signal processing module and a signal amplification module; the signal processing module includes a photocurrent difference signal generation and AC / DC separation module, generates a photocurrent difference signal through a series connection of photodiodes and related components, and completes AC / DC signal separation with the help of a DC blocking capacitor and related components; the AC / DC separation module completes module function selection through switch control, disconnects the switch to block the influence of DC part noise on the AC part, closes the switch to detect the DC signal; the signal amplification module includes a cascaded radio frequency AC amplification module and a co-directional proportional amplification DC amplification module, the cascaded radio frequency AC amplification module uses a two-stage radio frequency amplifier and related components to achieve high-gain amplification of the AC signal; the co-directional proportional amplification DC amplification module uses a low-noise amplifier and related components to achieve accurate detection and amplification of the DC signal.
[0007] Further, the photocurrent difference signal generating module includes a first photodiode PD1, a second photodiode PD2, a power supply filter capacitor C1, a current limiting resistor R1, a filter capacitor C2, a power supply filter capacitor C4, a current limiting resistor R2, and a filter capacitor C3;
[0008] The cathode of the first photodiode PD1 is connected to one end of the current limiting resistor R1 and one end of the filter capacitor C2, the other end of the current limiting resistor R1 and one end of the power filter capacitor C1 are connected to a positive voltage, and the other end of the power filter capacitor C1 and the other end of the filter capacitor C2 are connected to the ground;
[0009] The anode of the second photodiode PD2 is connected to one end of the current limiting resistor R2 and one end of the filter capacitor C3, the other end of the current limiting resistor R2 and one end of the power filter capacitor C4 are connected to a negative voltage, and the other end of the power filter capacitor C4 and the other end of the filter capacitor C3 are connected to the ground;
[0010] The anode of the first photodiode PD1 is connected to the cathode of the second photodiode PD2, and the node is a; the node a is connected to the input end of the AC / DC separation module.
[0011] Furthermore, the AC / DC separation module includes a DC isolation capacitor C5, a switch SW, an AC isolation inductor L1, and a terminal resistor R3;
[0012] One end of the switch SW is connected to the input end of the DC blocking capacitor C5, and the other end is connected to the input end of the AC blocking inductor L1. The output end of the DC blocking capacitor C5 is connected to the cascaded RF AC amplification module. The output end of the AC blocking inductor L1 and the input end of the terminal resistor R3 form a node b and are connected to the same-direction proportional amplification DC amplification module; the output end of the terminal resistor R3 is grounded.
[0013] Further, the cascaded RF AC amplification module includes: a first RF amplifier U1, a second RF amplifier U2, an AC isolation inductor L2, an AC isolation inductor L3, a DC isolation capacitor C6, a DC isolation capacitor C7, a power supply filter capacitor C8, a bypass capacitor C9, a power supply filter capacitor C10, and a bypass capacitor C11;
[0014] The first RF amplifier U1 includes: pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6; pin 1 and pin 2 of the first RF amplifier U1 are connected to the ground together, pin 3 of the first RF amplifier U1 is connected to the output end of the AC / DC separation module, pin 4 of the first RF amplifier U1 and the input end of the power filter capacitor C8 are connected to the positive voltage +5v, the output end of the power filter capacitor C8 is grounded, pin 5 of the first RF amplifier U1 is connected to the ground, and pin 6 of the first RF amplifier U1 is connected to the input end of the DC blocking capacitor C6; the input end of the AC blocking inductor L2 is connected to the input end of the DC blocking capacitor C6; the output end of the AC blocking inductor L2 is connected to the input end of the bypass capacitor C9; the output end of the bypass capacitor C9 is grounded;
[0015] The second RF amplifier U2 includes: pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6; pin 1 and pin 2 of the second RF amplifier U2 are commonly connected to the ground, pin 3 of the second RF amplifier U2 is connected to the output end of the DC blocking capacitor C6, pin 4 of the second RF amplifier U2 and the input end of the power supply filter capacitor C10 are connected to the positive voltage +5v, the output end of the power supply filter capacitor C10 is grounded, pin 5 of the second RF amplifier U2 is connected to the ground, pin 6 of the second RF amplifier U2 is connected to the input end of the DC blocking capacitor C7, the input end of the AC blocking inductor L3 is connected to the input end of the DC blocking capacitor C7, the output end of the AC blocking inductor L3 is connected to the input end of the bypass capacitor C11, the output end of the bypass capacitor C11 is grounded, and the output end of the DC blocking capacitor C7 is connected to the AC signal output end AC-Out.
[0016] Further, the same-direction proportional amplification DC amplification module includes: a low noise amplifier U3, a current limiting resistor R4, a filter capacitor C12, a power supply filter capacitor C13, a power supply filter capacitor C14, a feedback resistor R6, a resistor R5, and an output resistor R7;
[0017] Among them, the low noise amplifier U3 includes: pin 2, pin 3, pin 4, pin 6, and pin 7; pin 2 of the low noise amplifier U3 is connected to the input end of the resistor R5, the output end of the resistor R5 is grounded, the pin 3 of the low noise amplifier U3 is connected to the output end of the current limiting resistor R4 and the input end of the filter capacitor C12, the pin 4 of the low noise amplifier U3 is connected to the negative voltage -5v passing through the power supply filter capacitor C13, the pin 6 of the low noise amplifier U3 is connected to the feedback resistor R6 and the output resistor R7, the pin 7 of the low noise amplifier U3 is connected to the positive voltage +5v passing through the power supply filter capacitor C14, and the output end of the output resistor R7 is connected to the DC signal output end DC-Out.
[0018] Furthermore, the models of the first RF amplifier U1 and the second RF amplifier U2 are RF amplifier chips ABA-52563.
[0019] Furthermore, the model of the first photodiode PD1 and the second photodiode PD2 is LSIPD-LD50.
[0020] Furthermore, the model of the SW is DSIC01LS-P, specifically a single-pole single-throw switch.
[0021] Compared with the prior art, the present invention has the following advantages:
[0022] The present invention improves the signal-to-noise ratio of the balanced zero-beat detector. The photocurrent difference signal generation module adopts a self-subtraction design by connecting the first photodiode PD1 and the second photodiode PD2 in series. Such a subtraction design can not only reduce the classical noise, but also reduce another noise source, 1 / f flicker noise.
[0023] The present invention realizes the functions under different requirements. The AC-DC separation module completes the function selection of the balanced zero-beat detector by designing a switch. When the switch is disconnected, the influence of the noise in the DC amplifier circuit on the AC amplifier circuit can be greatly reduced, thereby greatly improving the signal-to-noise ratio; when the switch is closed, the DC part is amplified by the voltage amplifier and used to detect the intensity of the incident light.
[0024] The present invention realizes high-gain AC amplification. The cascaded radio frequency AC amplification module of the balanced zero-beat detector realizes high-gain AC amplification by selecting a low-noise, high-gain radio frequency amplifier and adopting a two-stage cascaded amplification structure.
[0025] The invention realizes accurate detection and amplification of DC signals. The DC amplification module of the balanced zero-beat detector adopts a low-noise, low-drift operational amplifier and a same-direction proportional amplification structure, which can ensure accurate detection and amplification of DC signals.
[0026] The present invention achieves an effective improvement in the common mode rejection ratio of a balanced zero-beat detector. In the PCB design of the balanced zero-beat detector, the routing and layout of the circuit are replanned, and a "Y" type distribution structure optimization design is adopted between the first photodiode PD1 and the second photodiode PD2 to the DC blocking capacitor C5 to achieve a high degree of symmetry.
[0027] The invention realizes the miniaturization of the balanced zero-beat detector, adopts Rogers 4350 which is suitable for high-frequency amplification and has a thickness of only 0.51 mm, and selects a smaller 0402 capacitor package. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The accompanying drawings generally illustrate various embodiments by way of example and not limitation, and together with the description and claims, serve to illustrate the embodiments of the invention. Where appropriate, the same reference numerals are used throughout the drawings to refer to the same or similar parts. Such embodiments are illustrative and are not intended to be exhaustive or exclusive embodiments of the present apparatus or method.
[0029] Figure 1 This is a structural diagram of the new high-performance balanced zero-beat detector described in the present invention;
[0030] Figure 2 This is a circuit diagram of a novel high performance balanced zero-beat detector according to the present invention;
[0031] Figure 3 This is a diagram of a photocurrent difference signal generating module according to the present invention;
[0032] Figure 4 This is a diagram of the cascaded radio frequency AC amplifier module of the present invention;
[0033] Figure 5 This is a diagram of a DC amplification module for proportional amplification in the same direction as described in the present invention;
[0034] Figure 6 This is a diagram of an experimental device for testing vacuum shot noise according to the present invention;
[0035] Figure 7 This is a result diagram of the new high-performance balanced zero-beat detector shown in the present invention detecting shot noise elevation in different frequency bands;
[0036] Figure 8 A signal-to-noise ratio result diagram of the function selection completed by the new high-performance balanced zero-beat detector control switch shown in the present invention;
[0037] Fig. 9 This is a graph showing the experimental results of the common mode rejection ratio of the novel high-performance balanced zero-beat detector shown in the present invention;
[0038] Figure 6 In: 5- single-mode semiconductor continuous wave laser with a wavelength of 1550nm, 6- arbitrary waveform signal generator, 7- intensity modulator, 8- variable optical attenuator, 9- half-wave plate, 10- polarization beam splitter, 11- half-wave plate, 12- polarization beam splitter, 13- photodiode PD1, 14- photodiode PD2, 15- balanced zero-beat detector, 16- spectrum analyzer, 17- oscilloscope. DETAILED DESCRIPTION
[0039] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0040] The design circuits of the present invention are all printed on a double-layer circuit board. The circuit board material is Rogers 4350 with good high-frequency performance, and the vias are connected to the GND ground. The power supply and the ground layer adopt a full copper laying process.
[0041] AC-Out and DC-Out use SMA RF interface.
[0042] Embodiment 1
[0043] A balanced zero-beat detector for generating high-entropy high-speed continuous variable quantum random numbers, specifically comprising: a photocurrent difference signal generating module 1, an AC / DC separation module 2, a cascaded radio frequency AC amplification module 3, and a same-direction proportional amplification DC amplification module 4.
[0044] like Figure 2 As shown, the photocurrent difference signal generating module 1 includes a first photodiode PD1, a second photodiode PD2, a power supply filter capacitor C1, a current limiting resistor R1, a filter capacitor C2, a power supply filter capacitor C4, a current limiting resistor R2, and a filter capacitor C3; the AC / DC separation module 2 includes a DC blocking capacitor C5, a switch SW, an AC blocking inductor L1, and a terminal resistor R3; the cascaded RF AC amplification module 3 includes: a first RF amplifier U1, a second RF amplifier U2, an AC blocking inductor L2, an AC blocking inductor L3, a DC blocking capacitor C6, a DC blocking capacitor C7, a power supply filter capacitor C8, a bypass capacitor C9, a power supply filter capacitor C10, and a bypass capacitor C11; the in-phase proportional amplification DC amplification module 4 includes: a low noise amplifier U3, a current limiting resistor R4, a filter capacitor C12, a power supply filter capacitor C13, a power supply filter capacitor C14, a feedback resistor R6, a resistor R5, and an output resistor R7.
[0045] The cathode of the first photodiode PD1 is connected to a positive voltage, the anode of the second photodiode PD2 is connected to a negative voltage, the anode of the first photodiode PD1 is connected to the cathode of the second photodiode PD2, and the node is a; the node a is connected to the input end of the DC blocking capacitor C5, the output end of the DC blocking capacitor C5 is connected to the first RF amplifier U1, the first RF amplifier U1 is connected to the input end of the DC blocking capacitor C6, the output end of the DC blocking capacitor C6 is connected to the input end of the second RF amplifier U2, the output end of the second RF amplifier U2 is connected to the input end of the DC blocking capacitor C7, and the output end of the DC blocking capacitor C7 is connected to the AC signal output end A. C-Out is connected; the input end of the DC blocking capacitor C5 is connected to the switch SW, the other side of the switch is connected to the input end of the isolation inductor L1, the output end of the isolation inductor L1 is connected to the input end of the terminal resistor R3, and the node is b; the other side of the terminal resistor R3 is grounded; the node b is connected to the input end of the current limiting resistor R4, the output end of the current limiting resistor R4 is connected to the input end of the filter capacitor C12 and the input end of the low noise amplifier U3, the output end of the filter capacitor C12 is grounded, the low noise amplifier U3 is connected to the input end of the output resistor R7, and the output end of the output resistor R7 is connected to the DC signal output terminal DC-Out;
[0046] like Figure 3 The cathode of the first photodiode PD1 is connected to one end of a current limiting resistor R1 and one end of a filter capacitor C2, the other end of the current limiting resistor R1 and one end of a power filter capacitor C1 are connected to a positive voltage, and the other end of the power filter capacitor C1 and the other end of the filter capacitor C2 are connected to the ground;
[0047] The anode of the second photodiode PD2 is connected to one end of the current limiting resistor R2 and one end of the filter capacitor C3, the other end of the current limiting resistor R2 and one end of the power filter capacitor C4 are connected to a negative voltage, and the other end of the power filter capacitor C4 and the other end of the filter capacitor C3 are connected to the ground;
[0048] like Figure 4As shown, the first RF amplifier U1 is an RF amplifier chip ABA-52563, including pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6; pin 1 and pin 2 of the RF amplifier chip ABA-52563 are connected to the ground together, pin 3 of the RF amplifier chip ABA-52563 is connected to the output end of the DC blocking capacitor C5, pin 4 of the RF amplifier chip ABA-52563 and one end of the power supply filter capacitor C8 are connected to the positive voltage +5v, the other end of the power supply filter capacitor C8 is grounded, pin 5 of the RF amplifier chip ABA-52563 is connected to the ground, and pin 6 of the RF amplifier chip ABA-52563 is connected to the DC blocking capacitor C6; the DC blocking capacitor C6 is used to prevent the DC power supply of the RF amplifier chip ABA-52563 from mixing with the AC signal after the first stage amplification and entering the second stage amplification circuit, and the AC blocking inductor L2 is used to prevent the AC signal after the first stage amplification from entering the power supply of the first RF amplifier U1, making the power supply unstable, which in turn affects the stability of the first RF amplifier U1.
[0049] The second RF amplifier U2 is a RF amplifier chip ABA-52563, including pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6; pin 1 and pin 2 of the RF amplifier chip ABA-52563 are connected to the ground, pin 3 of the RF amplifier chip ABA-52563 is connected to the output end of the DC isolation capacitor C6, pin 4 of the RF amplifier chip ABA-52563 and one end of the power filter capacitor C10 are connected to the positive voltage +5v, the other end of the power filter capacitor C10 is grounded, pin 5 of the RF amplifier chip ABA-52563 is connected to the ground, and pin 6 of the RF amplifier chip ABA-52563 is connected to the DC isolation capacitor C7. The AC isolation inductor L3 is used to prevent the AC signal after the second stage amplification from entering the power supply of the second RF amplifier U2, making the power supply unstable, which in turn affects the stability of the second RF amplifier U2.
[0050] like Figure 5As shown, the low noise amplifier U3 is a low noise amplifier chip OP 27 including pin 2, pin 3, pin 4, pin 6, and pin 7; pin 2 of the low noise amplifier U3 is connected to resistor R5, pin 3 of the low noise amplifier U3 is connected to the output end of the current limiting resistor R4 and the input end of the filter capacitor C12, pin 4 of the low noise amplifier U3 is connected to the negative voltage -5v after passing through the power filter capacitor C13, pin 6 of the low noise amplifier U3 is connected to the feedback resistor R6 and the output resistor R7, and pin 7 of the low noise amplifier U3 is connected to the positive voltage +5v after passing through the power filter capacitor C14. Since the DC signal is a voltage signal, a proportional amplifier circuit is designed with the voltage amplifier as the core, and a unidirectional amplifier structure is adopted. The DC signal enters the positive input end of the voltage amplifier after passing through the current limiting resistor R4; the feedback resistor R6 and the resistor R5 jointly determine the amplification factor of the DC signal; the amplified DC signal is output through the output resistor R7. OP 27 is powered by dual power supplies, and the power supply is ±5V.
[0051] Embodiment 2
[0052] Figure 6 The figure is a diagram of the experimental device for testing the vacuum shot noise of the present invention, wherein 5 is a single-mode semiconductor continuous wave laser with a wavelength of 1550nm, which is used to output a continuous wave light source and serve as a local oscillator light source of a balanced zero-beat detector; 6 is an arbitrary waveform generator, which outputs a sinusoidal signal; 7 is an intensity modulator, which linearly modulates the local oscillator light source; 8 is a variable optical attenuator, which is used to adjust the intensity of the optical signal; 9 and 11 are half-wave plates, which are used to adjust the polarization direction of the incident light; 10 and 12 are polarization beam splitters, which are used to split the incident light into two beams of linearly polarized light; 13 and 14 are photodiodes, which are used to convert the optical signal into an electrical signal; 15 is a balanced zero-beat detector, which is used to test the shot noise; 16 is a spectrum analyzer, which is used to measure and analyze the AC-Out output; 17 is an oscilloscope, which is used to monitor the DC signal of the DC-Out output.
[0053] Figure 7 The result diagram of the balanced zero-beat detector shown in the present invention detecting the elevated shot noise in different frequency bands. The spectrum from top to bottom are: incident light power of 2mW, incident light power of 1mW, incident light power of 0.5mW, balanced zero-beat detector electronic noise, and background noise of the spectrum analyzer. It can be seen that with the increase of the incident light power, the spectrum shows an upward trend. When the incident light power doubles, the spectrum rises by 3dB. When the incident light power is 2mW, the signal-to-noise ratio reaches 41.5dB at 1.75GHz, achieving high-gain AC amplification, and the effective bandwidth reaches the GHz level. Strong noise or interference signals appear at specific frequencies. These peaks may come from radio frequency interference in the external environment.
[0054] Figure 8 This is a graph showing the signal-to-noise ratio results of the balanced zero-beat detector control switch function selection shown in the present invention. The spectrum from top to bottom are: when the incident light power is 1mW and the switch SW is disconnected, when the incident light power is 1mW and the switch SW is closed, the electronic noise of the balanced zero-beat detector, and the background noise of the spectrum analyzer. When the switch SW is in the disconnected state, the electronic noise of the AC branch is significantly reduced due to the elimination of the inherent shunt of the unidirectional proportional amplification DC amplification module, so the signal-to-noise ratio of the balanced zero-beat detector is relatively high; when the switch SW is closed, it can be seen that the noise brought by the unidirectional proportional amplification DC amplification module of the balanced zero-beat detector makes the signal-to-noise ratio within the working bandwidth of the balanced zero-beat detector relatively low.
[0055] Fig. 9 This is a graph of the experimental results of the common mode rejection ratio of the balanced zero-beat detector shown in the present invention. The spectrum from top to bottom are: 0.1mW light passing through both arms, 0.1mW light passing through one arm, balanced zero-beat detector electronic noise, and background noise of the spectrum analyzer. When the same incident light of 0.1mW is passed through the two photodiodes PD1 and PD2, that is, double-ended input, AC-Out is the amplified common-mode signal; when 0.1mW of incident light is passed through one photodiode PD1 and the other photodiode does not pass the incident light, that is, single-ended input, AC-Out is the amplified differential-mode signal. It can be seen that at 100MHz, the common-mode rejection ratio is 30dB, indicating that the balanced zero-beat detector has a good ability to amplify differential-mode signals and suppress common-mode signal interference.
[0056] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.
Claims
1. A balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation, characterized in that: It is composed of a signal processing module and a signal amplification module; the signal processing module includes a photocurrent difference signal generation and AC / DC separation module, which generates a photocurrent difference signal through a series connection of photodiodes and related components, and completes AC / DC signal separation with the help of DC blocking capacitors and related components; the AC / DC separation module completes module function selection through switch control, disconnects the switch to block the influence of DC part noise on the AC part, closes the switch to detect the DC signal; the signal amplification module includes a cascaded RF AC amplification module and a co-directional proportional amplification DC amplification module, the cascaded RF AC amplification module uses a two-stage RF amplifier and related components to achieve high-gain amplification of the AC signal; the co-directional proportional amplification DC amplification module uses a low-noise amplifier and related components to achieve accurate detection and amplification of the DC signal.
2. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 1, characterized in that: The photocurrent difference signal generating module includes a first photodiode PD1, a second photodiode PD2, a power supply filter capacitor C1, a current limiting resistor R1, a filter capacitor C2, a power supply filter capacitor C4, a current limiting resistor R2, and a filter capacitor C3; The cathode of the first photodiode PD1 is connected to one end of the current limiting resistor R1 and one end of the filter capacitor C2, the other end of the current limiting resistor R1 and one end of the power filter capacitor C1 are connected to a positive voltage, and the other end of the power filter capacitor C1 and the other end of the filter capacitor C2 are connected to the ground; The anode of the second photodiode PD2 is connected to one end of the current limiting resistor R2 and one end of the filter capacitor C3, the other end of the current limiting resistor R2 and one end of the power filter capacitor C4 are connected to a negative voltage, and the other end of the power filter capacitor C4 and the other end of the filter capacitor C3 are connected to the ground; The anode of the first photodiode PD1 is connected to the cathode of the second photodiode PD2, and the node is a; the node a is connected to the input end of the AC / DC separation module.
3. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 1, characterized in that: The AC / DC separation module includes a DC isolation capacitor C5, a switch SW, an AC isolation inductor L1, and a terminal resistor R3; One end of the switch SW is connected to the input end of the DC blocking capacitor C5, and the other end is connected to the input end of the AC blocking inductor L1. The output end of the DC blocking capacitor C5 is connected to the cascaded RF AC amplification module. The output end of the AC blocking inductor L1 and the input end of the terminal resistor R3 form a node b and are connected to the same-direction proportional amplification DC amplification module; the output end of the terminal resistor R3 is grounded.
4. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 1, characterized in that: The cascaded RF AC amplification module includes: a first RF amplifier U1, a second RF amplifier U2, an AC isolation inductor L2, an AC isolation inductor L3, a DC isolation capacitor C6, a DC isolation capacitor C7, a power supply filter capacitor C8, a bypass capacitor C9, a power supply filter capacitor C10, and a bypass capacitor C11; The first RF amplifier U1 includes: pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6; pin 1 and pin 2 of the first RF amplifier U1 are connected to the ground together, pin 3 of the first RF amplifier U1 is connected to the output end of the AC / DC separation module, pin 4 of the first RF amplifier U1 and the input end of the power filter capacitor C8 are connected to the positive voltage +5v, the output end of the power filter capacitor C8 is grounded, pin 5 of the first RF amplifier U1 is connected to the ground, and pin 6 of the first RF amplifier U1 is connected to the input end of the DC blocking capacitor C6; the input end of the AC blocking inductor L2 is connected to the input end of the DC blocking capacitor C6; the output end of the AC blocking inductor L2 is connected to the input end of the bypass capacitor C9; the output end of the bypass capacitor C9 is grounded; The second RF amplifier U2 includes: pin 1, pin 2, pin 3, pin 4, pin 5, and pin 6; pin 1 and pin 2 of the second RF amplifier U2 are commonly connected to the ground, pin 3 of the second RF amplifier U2 is connected to the output end of the DC blocking capacitor C6, pin 4 of the second RF amplifier U2 and the input end of the power supply filter capacitor C10 are connected to the positive voltage +5v, the output end of the power supply filter capacitor C10 is grounded, pin 5 of the second RF amplifier U2 is connected to the ground, and pin 6 of the second RF amplifier U2 is connected to the input end of the DC blocking capacitor C7; the input end of the AC blocking inductor L3 is connected to the input end of the DC blocking capacitor C7, the output end of the AC blocking inductor L3 is connected to the input end of the bypass capacitor C11, the output end of the bypass capacitor C11 is grounded, and the output end of the DC blocking capacitor C7 is connected to the AC signal output end AC-Out.
5. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 1, characterized in that: The same-direction proportional amplification DC amplification module includes: a low noise amplifier U3, a current limiting resistor R4, a filter capacitor C12, a power filter capacitor C13, a power filter capacitor C14, a feedback resistor R6, a resistor R5, and an output resistor R7; Among them, the low noise amplifier U3 includes: pin 2, pin 3, pin 4, pin 6, and pin 7; pin 2 of the low noise amplifier U3 is connected to the input end of the resistor R5, the output end of the resistor R5 is grounded, the pin 3 of the low noise amplifier U3 is connected to the output end of the current limiting resistor R4 and the input end of the filter capacitor C12, the pin 4 of the low noise amplifier U3 is connected to the negative voltage -5v passing through the power supply filter capacitor C13, the pin 6 of the low noise amplifier U3 is connected to the feedback resistor R6 and the output resistor R7, the pin 7 of the low noise amplifier U3 is connected to the positive voltage +5v passing through the power supply filter capacitor C14, and the output end of the output resistor R7 is connected to the DC signal output end DC-Out.
6. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 4, characterized in that: The models of the first RF amplifier U1 and the second RF amplifier U2 are RF amplifier chips ABA-52563.
7. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 2, characterized in that: The model of the first photodiode PD1 and the second photodiode PD2 is LSIPD-LD50.
8. The balanced zero-beat detector for high-entropy high-speed continuous variable quantum random number generation according to claim 3, characterized in that: The model of the SW is DSIC01LS-P, specifically a single-pole single-throw switch.
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