Method for testing current change within long time by integrated circuit test platform
By subdividing the test time periods of the integrated circuit test platform and cyclically testing, the situation in the prior art that the current changes in real time cannot be sampled and recorded over a long period of time is solved, and a higher accuracy of test data collection and chip performance analysis are achieved.
Patent Information
- Application Number
- CN202411825974.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-04-25
AI Technical Summary
When the existing integrated circuit test platform tests current changes over a long period of time, it is impossible to sample and record the current value in real time, resulting in low accuracy of the test time and the specific location of the sampling point in this vector time, resulting in large errors.
The time periods that need to be tested are divided into multiple short time periods, and the current test vector is executed within each time period, the current value at each time point is recorded, and finally the data is combined to sort out the overall current changes in the original test time.
By subdividing the test time period and cycling the test, the current value of the chip at each time point can be accurately recorded, the accuracy of the test data, the error can be reduced, and the current changes of the chip can be analyzed, which is more suitable for the analysis of chip performance and power consumption.
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Figure CN119881432A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuit testing, and in particular to a method for an integrated circuit testing platform to test current changes over a long period of time. Background Art
[0002] As the number of smart devices we use increases, analog / sensor ICs have become critical not only in the smart society but also in other fields. These devices require higher performance, higher accuracy, and more robust reliability than ever before. To meet these challenges, measurement systems need to have many functions while keeping the test cost very low, and engineers responsible for developing test programs need very good coding skills and in-depth operational knowledge of the test system.
[0003] The new highly integrated measurement system requires the ability to support power supplies, SMUs (four-quadrant DC signal measurement units), pattern generators, arbitrary waveform generators, digitizers, and oscilloscopes, which are necessary for complete analog / mixed signal / sensor / digital IC devices and modules (including electronic control units (ECUs) for automotive evaluation and measurement). This new measurement system allows engineers to quickly build their own measurement environment without combining several independent instruments.
[0004] For example, Advantest EVA100 is a low-cost integrated circuit test platform launched by Advantest, which is suitable for testing low-pin analog, mixed signal and sensor products, such as power IC, magnifier, sensor, audio codec IC, etc. This desktop test platform adopts an extensible architecture design and can flexibly perform multiple measurement functions. The operation program is very intuitive, and users do not need to have advanced programming skills to operate it. It can perform multi-functional tests at the same time, making it the first choice for test equipment of small and medium-sized IC companies.
[0005] However, when the DPS_TPIG function in the test vector scheme of EVA100 is used to test the current value, only the average current value within a test vector can be tested, but the current change during this operation cannot be obtained; and during the test process, a set of test vectors can only perform one current test.
[0006] For example, the DPS_TPIG test solution provided by the EVA100 system is used, that is, the DPS_TPIG functional test is only performed on the test time T.
[0007] The test vectors are represented as:
[0008] PatternSection:
[0009] Label,Instruction,"ABCD",TS,Control #Address and Comment:
[0010] ,NOP ,1 1 1 1,1,DPS_TPIG1 #T
[0011] ,STPS ,1 1 1 1,1, #end
[0012] The test time is set to: TS1 = T ns;
[0013] Under this test condition, a set of test vectors can only perform a current test on a certain vector once, and the test time accuracy is low, that is, the specific location of the sampling point within the vector time cannot be determined, which will lead to large errors when encountering a long test time. If the solution of reading the current and continuing to run after the test vector is paused is used, the problem of interfering with the accuracy of the test vector time will occur.
[0014] When the maximum current of the chip in a certain working state under a specified operation needs to be measured in the vector test function of the integrated circuit test platform due to the need for chip performance parameters in production and sales, the DPS_TPIG function cannot meet the test requirements. Summary of the invention
[0015] Based on the above problems, the purpose of the present invention is to subdivide the long test time of the test vector scheme of the integrated circuit test platform, divide the longer test time into segments, test the current value of the chip at each time point respectively, and finally merge the test data of different time segments into the overall current change of the original test time.
[0016] The technical solution adopted by the present invention to achieve its invention object is a method for testing current changes over a long period of time on an integrated circuit test platform, comprising the following steps:
[0017] S1, divide the time period T that needs to test the current change into three sections, where the duration of the first section TS1 is t, take the shortest time value TS2 of the test vector compatible with the integrated circuit test platform as the second section and set the current test sampling point, and the third section TS3 is Tt-TS2; after setting the time value of the test vector to these three values respectively, the subsequent loop operation can be started;
[0018] S2, set the initial value of t to 0ns;
[0019] S3, execute the test vector on the current test sampling point, obtain the current measurement value at time t and record it;
[0020] S4, increase t by TS2, and determine whether the new t value is greater than or equal to T. If t is greater than or equal to T, then end the test of the current test sampling point and go to step S5; if t is less than T, then go to step S3;
[0021] S5. Output the current measurement value of each sampling point of duration TS2 within the time period T.
[0022] Furthermore, in step S5, the maximum current value and the minimum current value in the time period T are also counted.
[0023] Furthermore, the TS2 is equal to 10ns.
[0024] The beneficial effects of the present invention are:
[0025] The present invention uses short-time offset scanning point current to obtain long-term current changes, that is, the original test time is segmented, and the current value of the chip at each time point is tested separately by using vector cyclic testing and changing the test points. Finally, the current value and time obtained from each cyclic test are sorted out to obtain the required current value change.
[0026] When using the test scheme of the integrated circuit test platform provided by the present invention, the test performance of the test vector scheme can be improved, more accurate test data can be obtained, and the current change situation that is not easy to obtain under the original test scheme can be obtained through subsequent processing, which is more conducive to the analysis of the performance and power consumption of the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 This is a schematic diagram of the test time segmentation of an embodiment of the present invention;
[0028] Figure 2 The figure is a schematic diagram of the operation flow of an embodiment of the present invention. DETAILED DESCRIPTION
[0029] In order to more clearly understand the above-mentioned objects, features and advantages of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0030] Figures 1-2 A specific implementation of the method for testing the current change over a long period of time using an integrated circuit test platform of the present invention is shown. The integrated circuit test platform uses an Advantest EVA100 tester, including the following steps:
[0031] S1. Divide the time period T that needs to test the current change into three sections, where the duration of the first section TS1 is t, take the shortest time value of the test vector compatible with the Advantest EVA100 tester, 10ns, as the second section and set DPS_TPIG, i.e., the current test sampling point, and the third section TS3 is (Tt-10)ns; the time segmentation is as follows Figure 1As shown;
[0032] S2, set the initial value of t to 0ns;
[0033] S3, execute the test vector on the current test sampling point, obtain the current measurement value at time t and record it;
[0034] S4, increase t by 10ns, and determine whether the new t value is greater than or equal to T. If t is greater than or equal to T, then end the test on the current test sampling point and go to step S5. If t is less than T, then go to step S3.
[0035] S5. Output the current measurement value of each 10 ns sampling point within the time period T, and calculate the maximum current value and the minimum current value within the time period T.
[0036] In this embodiment, the initial value of t is set to 0ns, with a step value of 10ns. After each test vector is executed, t is increased by 10ns, and a loop operation is performed to obtain the current measurement value of each 10ns sampling point under the entire time T, thereby obtaining the current test result array under each loop. When t increases to T, that is, after the loop test is completed, the change of the chip current in this time period can be obtained, and thus the maximum and minimum current values required for the test can be obtained.
[0037] The test vectors are represented as:
[0038] PatternSection:
[0039] Label,Instruction,"ABCD",TS,Control #Address and 0Comment:
[0040] ,NOP ,1 1 1 1,1, #t
[0041] ,NOP ,1 1 1 1,2,DPS_TPIG1 #sampling point
[0042] ,STPS ,1 1 1 1,3, #Tt-10
[0043] The test time is set as: TS1 = t ns; TS2 = 10ns; TS3 = (Tt-10)ns;
[0044] The initial value of t is set to 0, and then the vector is executed in a loop. After each execution of the vector, t is increased by 10ns until t=T. The test data current value and the corresponding t of each cycle are obtained, and the current change in the time period T, as well as the maximum current value and the minimum current value in the time period T can be obtained.
[0045] This test scheme is used to improve the test performance of the vector test, and more accurate test data can be obtained. The current change that is not easy to obtain under the original DPS_TPIG test scheme can also be obtained through subsequent processing, which is more conducive to analyzing the chip's performance, power consumption and other parameters.
[0046] The above embodiments of the present invention are merely examples for illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes and modifications can be made based on the above description. It is impossible to list all the embodiments here. Any obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.
Claims
1. A method for testing current changes over a long period of time on an integrated circuit test platform, characterized in that: The steps include: S1, divide the time period T that needs to test the current change into three sections, where the duration of the first section TS1 is t, take the shortest time value TS2 of the test vector compatible with the integrated circuit test platform as the second section and set the current test sampling point, and the third section TS3 is Tt-TS2; S2, set the initial value of t to 0ns; S3, execute the test vector on the current test sampling point, obtain the current measurement value at time t and record it; S4, increase t by TS2, and determine whether the new t value is greater than or equal to T. If t is greater than or equal to T, go to step S5; if t is less than T, go to step S3; S5. Output the current measurement value of each sampling point of duration TS2 within the time period T.
2. The method for testing long-term current changes on an integrated circuit test platform according to claim 1, characterized in that: In step S5, the maximum current value and the minimum current value in the time period T are also counted.
3. The method for testing long-term current changes on an integrated circuit test platform according to claim 1, characterized in that: The TS2 is equal to 10ns.